swim3.c 29 KB

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  1. /*
  2. * Driver for the SWIM3 (Super Woz Integrated Machine 3)
  3. * floppy controller found on Power Macintoshes.
  4. *
  5. * Copyright (C) 1996 Paul Mackerras.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. /*
  13. * TODO:
  14. * handle 2 drives
  15. * handle GCR disks
  16. */
  17. #include <linux/config.h>
  18. #include <linux/stddef.h>
  19. #include <linux/kernel.h>
  20. #include <linux/sched.h>
  21. #include <linux/timer.h>
  22. #include <linux/delay.h>
  23. #include <linux/fd.h>
  24. #include <linux/ioctl.h>
  25. #include <linux/blkdev.h>
  26. #include <linux/devfs_fs_kernel.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/module.h>
  29. #include <linux/spinlock.h>
  30. #include <asm/io.h>
  31. #include <asm/dbdma.h>
  32. #include <asm/prom.h>
  33. #include <asm/uaccess.h>
  34. #include <asm/mediabay.h>
  35. #include <asm/machdep.h>
  36. #include <asm/pmac_feature.h>
  37. static struct request_queue *swim3_queue;
  38. static struct gendisk *disks[2];
  39. static struct request *fd_req;
  40. #define MAX_FLOPPIES 2
  41. enum swim_state {
  42. idle,
  43. locating,
  44. seeking,
  45. settling,
  46. do_transfer,
  47. jogging,
  48. available,
  49. revalidating,
  50. ejecting
  51. };
  52. #define REG(x) unsigned char x; char x ## _pad[15];
  53. /*
  54. * The names for these registers mostly represent speculation on my part.
  55. * It will be interesting to see how close they are to the names Apple uses.
  56. */
  57. struct swim3 {
  58. REG(data);
  59. REG(timer); /* counts down at 1MHz */
  60. REG(error);
  61. REG(mode);
  62. REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
  63. REG(setup);
  64. REG(control); /* writing bits clears them */
  65. REG(status); /* writing bits sets them in control */
  66. REG(intr);
  67. REG(nseek); /* # tracks to seek */
  68. REG(ctrack); /* current track number */
  69. REG(csect); /* current sector number */
  70. REG(gap3); /* size of gap 3 in track format */
  71. REG(sector); /* sector # to read or write */
  72. REG(nsect); /* # sectors to read or write */
  73. REG(intr_enable);
  74. };
  75. #define control_bic control
  76. #define control_bis status
  77. /* Bits in select register */
  78. #define CA_MASK 7
  79. #define LSTRB 8
  80. /* Bits in control register */
  81. #define DO_SEEK 0x80
  82. #define FORMAT 0x40
  83. #define SELECT 0x20
  84. #define WRITE_SECTORS 0x10
  85. #define DO_ACTION 0x08
  86. #define DRIVE2_ENABLE 0x04
  87. #define DRIVE_ENABLE 0x02
  88. #define INTR_ENABLE 0x01
  89. /* Bits in status register */
  90. #define FIFO_1BYTE 0x80
  91. #define FIFO_2BYTE 0x40
  92. #define ERROR 0x20
  93. #define DATA 0x08
  94. #define RDDATA 0x04
  95. #define INTR_PENDING 0x02
  96. #define MARK_BYTE 0x01
  97. /* Bits in intr and intr_enable registers */
  98. #define ERROR_INTR 0x20
  99. #define DATA_CHANGED 0x10
  100. #define TRANSFER_DONE 0x08
  101. #define SEEN_SECTOR 0x04
  102. #define SEEK_DONE 0x02
  103. #define TIMER_DONE 0x01
  104. /* Bits in error register */
  105. #define ERR_DATA_CRC 0x80
  106. #define ERR_ADDR_CRC 0x40
  107. #define ERR_OVERRUN 0x04
  108. #define ERR_UNDERRUN 0x01
  109. /* Bits in setup register */
  110. #define S_SW_RESET 0x80
  111. #define S_GCR_WRITE 0x40
  112. #define S_IBM_DRIVE 0x20
  113. #define S_TEST_MODE 0x10
  114. #define S_FCLK_DIV2 0x08
  115. #define S_GCR 0x04
  116. #define S_COPY_PROT 0x02
  117. #define S_INV_WDATA 0x01
  118. /* Select values for swim3_action */
  119. #define SEEK_POSITIVE 0
  120. #define SEEK_NEGATIVE 4
  121. #define STEP 1
  122. #define MOTOR_ON 2
  123. #define MOTOR_OFF 6
  124. #define INDEX 3
  125. #define EJECT 7
  126. #define SETMFM 9
  127. #define SETGCR 13
  128. /* Select values for swim3_select and swim3_readbit */
  129. #define STEP_DIR 0
  130. #define STEPPING 1
  131. #define MOTOR_ON 2
  132. #define RELAX 3 /* also eject in progress */
  133. #define READ_DATA_0 4
  134. #define TWOMEG_DRIVE 5
  135. #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
  136. #define DRIVE_PRESENT 7
  137. #define DISK_IN 8
  138. #define WRITE_PROT 9
  139. #define TRACK_ZERO 10
  140. #define TACHO 11
  141. #define READ_DATA_1 12
  142. #define MFM_MODE 13
  143. #define SEEK_COMPLETE 14
  144. #define ONEMEG_MEDIA 15
  145. /* Definitions of values used in writing and formatting */
  146. #define DATA_ESCAPE 0x99
  147. #define GCR_SYNC_EXC 0x3f
  148. #define GCR_SYNC_CONV 0x80
  149. #define GCR_FIRST_MARK 0xd5
  150. #define GCR_SECOND_MARK 0xaa
  151. #define GCR_ADDR_MARK "\xd5\xaa\x00"
  152. #define GCR_DATA_MARK "\xd5\xaa\x0b"
  153. #define GCR_SLIP_BYTE "\x27\xaa"
  154. #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
  155. #define DATA_99 "\x99\x99"
  156. #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
  157. #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
  158. #define MFM_GAP_LEN 12
  159. struct floppy_state {
  160. enum swim_state state;
  161. spinlock_t lock;
  162. struct swim3 __iomem *swim3; /* hardware registers */
  163. struct dbdma_regs __iomem *dma; /* DMA controller registers */
  164. int swim3_intr; /* interrupt number for SWIM3 */
  165. int dma_intr; /* interrupt number for DMA channel */
  166. int cur_cyl; /* cylinder head is on, or -1 */
  167. int cur_sector; /* last sector we saw go past */
  168. int req_cyl; /* the cylinder for the current r/w request */
  169. int head; /* head number ditto */
  170. int req_sector; /* sector number ditto */
  171. int scount; /* # sectors we're transferring at present */
  172. int retries;
  173. int settle_time;
  174. int secpercyl; /* disk geometry information */
  175. int secpertrack;
  176. int total_secs;
  177. int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
  178. struct dbdma_cmd *dma_cmd;
  179. int ref_count;
  180. int expect_cyl;
  181. struct timer_list timeout;
  182. int timeout_pending;
  183. int ejected;
  184. wait_queue_head_t wait;
  185. int wanted;
  186. struct device_node* media_bay; /* NULL when not in bay */
  187. char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
  188. };
  189. static struct floppy_state floppy_states[MAX_FLOPPIES];
  190. static int floppy_count = 0;
  191. static DEFINE_SPINLOCK(swim3_lock);
  192. static unsigned short write_preamble[] = {
  193. 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
  194. 0, 0, 0, 0, 0, 0, /* sync field */
  195. 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
  196. 0x990f /* no escape for 512 bytes */
  197. };
  198. static unsigned short write_postamble[] = {
  199. 0x9904, /* insert CRC */
  200. 0x4e4e, 0x4e4e,
  201. 0x9908, /* stop writing */
  202. 0, 0, 0, 0, 0, 0
  203. };
  204. static void swim3_select(struct floppy_state *fs, int sel);
  205. static void swim3_action(struct floppy_state *fs, int action);
  206. static int swim3_readbit(struct floppy_state *fs, int bit);
  207. static void do_fd_request(request_queue_t * q);
  208. static void start_request(struct floppy_state *fs);
  209. static void set_timeout(struct floppy_state *fs, int nticks,
  210. void (*proc)(unsigned long));
  211. static void scan_track(struct floppy_state *fs);
  212. static void seek_track(struct floppy_state *fs, int n);
  213. static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count);
  214. static void setup_transfer(struct floppy_state *fs);
  215. static void act(struct floppy_state *fs);
  216. static void scan_timeout(unsigned long data);
  217. static void seek_timeout(unsigned long data);
  218. static void settle_timeout(unsigned long data);
  219. static void xfer_timeout(unsigned long data);
  220. static irqreturn_t swim3_interrupt(int irq, void *dev_id, struct pt_regs *regs);
  221. /*static void fd_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs);*/
  222. static int grab_drive(struct floppy_state *fs, enum swim_state state,
  223. int interruptible);
  224. static void release_drive(struct floppy_state *fs);
  225. static int fd_eject(struct floppy_state *fs);
  226. static int floppy_ioctl(struct inode *inode, struct file *filp,
  227. unsigned int cmd, unsigned long param);
  228. static int floppy_open(struct inode *inode, struct file *filp);
  229. static int floppy_release(struct inode *inode, struct file *filp);
  230. static int floppy_check_change(struct gendisk *disk);
  231. static int floppy_revalidate(struct gendisk *disk);
  232. static int swim3_add_device(struct device_node *swims);
  233. int swim3_init(void);
  234. #ifndef CONFIG_PMAC_MEDIABAY
  235. #define check_media_bay(which, what) 1
  236. #endif
  237. static void swim3_select(struct floppy_state *fs, int sel)
  238. {
  239. struct swim3 __iomem *sw = fs->swim3;
  240. out_8(&sw->select, RELAX);
  241. if (sel & 8)
  242. out_8(&sw->control_bis, SELECT);
  243. else
  244. out_8(&sw->control_bic, SELECT);
  245. out_8(&sw->select, sel & CA_MASK);
  246. }
  247. static void swim3_action(struct floppy_state *fs, int action)
  248. {
  249. struct swim3 __iomem *sw = fs->swim3;
  250. swim3_select(fs, action);
  251. udelay(1);
  252. out_8(&sw->select, sw->select | LSTRB);
  253. udelay(2);
  254. out_8(&sw->select, sw->select & ~LSTRB);
  255. udelay(1);
  256. }
  257. static int swim3_readbit(struct floppy_state *fs, int bit)
  258. {
  259. struct swim3 __iomem *sw = fs->swim3;
  260. int stat;
  261. swim3_select(fs, bit);
  262. udelay(1);
  263. stat = in_8(&sw->status);
  264. return (stat & DATA) == 0;
  265. }
  266. static void do_fd_request(request_queue_t * q)
  267. {
  268. int i;
  269. for(i=0;i<floppy_count;i++)
  270. {
  271. #ifdef CONFIG_PMAC_MEDIABAY
  272. if (floppy_states[i].media_bay &&
  273. check_media_bay(floppy_states[i].media_bay, MB_FD))
  274. continue;
  275. #endif /* CONFIG_PMAC_MEDIABAY */
  276. start_request(&floppy_states[i]);
  277. }
  278. }
  279. static void start_request(struct floppy_state *fs)
  280. {
  281. struct request *req;
  282. unsigned long x;
  283. if (fs->state == idle && fs->wanted) {
  284. fs->state = available;
  285. wake_up(&fs->wait);
  286. return;
  287. }
  288. while (fs->state == idle && (req = elv_next_request(swim3_queue))) {
  289. #if 0
  290. printk("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%ld buf=%p\n",
  291. req->rq_disk->disk_name, req->cmd,
  292. (long)req->sector, req->nr_sectors, req->buffer);
  293. printk(" rq_status=%d errors=%d current_nr_sectors=%ld\n",
  294. req->rq_status, req->errors, req->current_nr_sectors);
  295. #endif
  296. if (req->sector < 0 || req->sector >= fs->total_secs) {
  297. end_request(req, 0);
  298. continue;
  299. }
  300. if (req->current_nr_sectors == 0) {
  301. end_request(req, 1);
  302. continue;
  303. }
  304. if (fs->ejected) {
  305. end_request(req, 0);
  306. continue;
  307. }
  308. if (rq_data_dir(req) == WRITE) {
  309. if (fs->write_prot < 0)
  310. fs->write_prot = swim3_readbit(fs, WRITE_PROT);
  311. if (fs->write_prot) {
  312. end_request(req, 0);
  313. continue;
  314. }
  315. }
  316. /* Do not remove the cast. req->sector is now a sector_t and
  317. * can be 64 bits, but it will never go past 32 bits for this
  318. * driver anyway, so we can safely cast it down and not have
  319. * to do a 64/32 division
  320. */
  321. fs->req_cyl = ((long)req->sector) / fs->secpercyl;
  322. x = ((long)req->sector) % fs->secpercyl;
  323. fs->head = x / fs->secpertrack;
  324. fs->req_sector = x % fs->secpertrack + 1;
  325. fd_req = req;
  326. fs->state = do_transfer;
  327. fs->retries = 0;
  328. act(fs);
  329. }
  330. }
  331. static void set_timeout(struct floppy_state *fs, int nticks,
  332. void (*proc)(unsigned long))
  333. {
  334. unsigned long flags;
  335. spin_lock_irqsave(&fs->lock, flags);
  336. if (fs->timeout_pending)
  337. del_timer(&fs->timeout);
  338. fs->timeout.expires = jiffies + nticks;
  339. fs->timeout.function = proc;
  340. fs->timeout.data = (unsigned long) fs;
  341. add_timer(&fs->timeout);
  342. fs->timeout_pending = 1;
  343. spin_unlock_irqrestore(&fs->lock, flags);
  344. }
  345. static inline void scan_track(struct floppy_state *fs)
  346. {
  347. struct swim3 __iomem *sw = fs->swim3;
  348. swim3_select(fs, READ_DATA_0);
  349. in_8(&sw->intr); /* clear SEEN_SECTOR bit */
  350. in_8(&sw->error);
  351. out_8(&sw->intr_enable, SEEN_SECTOR);
  352. out_8(&sw->control_bis, DO_ACTION);
  353. /* enable intr when track found */
  354. set_timeout(fs, HZ, scan_timeout); /* enable timeout */
  355. }
  356. static inline void seek_track(struct floppy_state *fs, int n)
  357. {
  358. struct swim3 __iomem *sw = fs->swim3;
  359. if (n >= 0) {
  360. swim3_action(fs, SEEK_POSITIVE);
  361. sw->nseek = n;
  362. } else {
  363. swim3_action(fs, SEEK_NEGATIVE);
  364. sw->nseek = -n;
  365. }
  366. fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
  367. swim3_select(fs, STEP);
  368. in_8(&sw->error);
  369. /* enable intr when seek finished */
  370. out_8(&sw->intr_enable, SEEK_DONE);
  371. out_8(&sw->control_bis, DO_SEEK);
  372. set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
  373. fs->settle_time = 0;
  374. }
  375. static inline void init_dma(struct dbdma_cmd *cp, int cmd,
  376. void *buf, int count)
  377. {
  378. st_le16(&cp->req_count, count);
  379. st_le16(&cp->command, cmd);
  380. st_le32(&cp->phy_addr, virt_to_bus(buf));
  381. cp->xfer_status = 0;
  382. }
  383. static inline void setup_transfer(struct floppy_state *fs)
  384. {
  385. int n;
  386. struct swim3 __iomem *sw = fs->swim3;
  387. struct dbdma_cmd *cp = fs->dma_cmd;
  388. struct dbdma_regs __iomem *dr = fs->dma;
  389. if (fd_req->current_nr_sectors <= 0) {
  390. printk(KERN_ERR "swim3: transfer 0 sectors?\n");
  391. return;
  392. }
  393. if (rq_data_dir(fd_req) == WRITE)
  394. n = 1;
  395. else {
  396. n = fs->secpertrack - fs->req_sector + 1;
  397. if (n > fd_req->current_nr_sectors)
  398. n = fd_req->current_nr_sectors;
  399. }
  400. fs->scount = n;
  401. swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
  402. out_8(&sw->sector, fs->req_sector);
  403. out_8(&sw->nsect, n);
  404. out_8(&sw->gap3, 0);
  405. out_le32(&dr->cmdptr, virt_to_bus(cp));
  406. if (rq_data_dir(fd_req) == WRITE) {
  407. /* Set up 3 dma commands: write preamble, data, postamble */
  408. init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble));
  409. ++cp;
  410. init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512);
  411. ++cp;
  412. init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble));
  413. } else {
  414. init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512);
  415. }
  416. ++cp;
  417. out_le16(&cp->command, DBDMA_STOP);
  418. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  419. in_8(&sw->error);
  420. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  421. if (rq_data_dir(fd_req) == WRITE)
  422. out_8(&sw->control_bis, WRITE_SECTORS);
  423. in_8(&sw->intr);
  424. out_le32(&dr->control, (RUN << 16) | RUN);
  425. /* enable intr when transfer complete */
  426. out_8(&sw->intr_enable, TRANSFER_DONE);
  427. out_8(&sw->control_bis, DO_ACTION);
  428. set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
  429. }
  430. static void act(struct floppy_state *fs)
  431. {
  432. for (;;) {
  433. switch (fs->state) {
  434. case idle:
  435. return; /* XXX shouldn't get here */
  436. case locating:
  437. if (swim3_readbit(fs, TRACK_ZERO)) {
  438. fs->cur_cyl = 0;
  439. if (fs->req_cyl == 0)
  440. fs->state = do_transfer;
  441. else
  442. fs->state = seeking;
  443. break;
  444. }
  445. scan_track(fs);
  446. return;
  447. case seeking:
  448. if (fs->cur_cyl < 0) {
  449. fs->expect_cyl = -1;
  450. fs->state = locating;
  451. break;
  452. }
  453. if (fs->req_cyl == fs->cur_cyl) {
  454. printk("whoops, seeking 0\n");
  455. fs->state = do_transfer;
  456. break;
  457. }
  458. seek_track(fs, fs->req_cyl - fs->cur_cyl);
  459. return;
  460. case settling:
  461. /* check for SEEK_COMPLETE after 30ms */
  462. fs->settle_time = (HZ + 32) / 33;
  463. set_timeout(fs, fs->settle_time, settle_timeout);
  464. return;
  465. case do_transfer:
  466. if (fs->cur_cyl != fs->req_cyl) {
  467. if (fs->retries > 5) {
  468. end_request(fd_req, 0);
  469. fs->state = idle;
  470. return;
  471. }
  472. fs->state = seeking;
  473. break;
  474. }
  475. setup_transfer(fs);
  476. return;
  477. case jogging:
  478. seek_track(fs, -5);
  479. return;
  480. default:
  481. printk(KERN_ERR"swim3: unknown state %d\n", fs->state);
  482. return;
  483. }
  484. }
  485. }
  486. static void scan_timeout(unsigned long data)
  487. {
  488. struct floppy_state *fs = (struct floppy_state *) data;
  489. struct swim3 __iomem *sw = fs->swim3;
  490. fs->timeout_pending = 0;
  491. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  492. out_8(&sw->select, RELAX);
  493. out_8(&sw->intr_enable, 0);
  494. fs->cur_cyl = -1;
  495. if (fs->retries > 5) {
  496. end_request(fd_req, 0);
  497. fs->state = idle;
  498. start_request(fs);
  499. } else {
  500. fs->state = jogging;
  501. act(fs);
  502. }
  503. }
  504. static void seek_timeout(unsigned long data)
  505. {
  506. struct floppy_state *fs = (struct floppy_state *) data;
  507. struct swim3 __iomem *sw = fs->swim3;
  508. fs->timeout_pending = 0;
  509. out_8(&sw->control_bic, DO_SEEK);
  510. out_8(&sw->select, RELAX);
  511. out_8(&sw->intr_enable, 0);
  512. printk(KERN_ERR "swim3: seek timeout\n");
  513. end_request(fd_req, 0);
  514. fs->state = idle;
  515. start_request(fs);
  516. }
  517. static void settle_timeout(unsigned long data)
  518. {
  519. struct floppy_state *fs = (struct floppy_state *) data;
  520. struct swim3 __iomem *sw = fs->swim3;
  521. fs->timeout_pending = 0;
  522. if (swim3_readbit(fs, SEEK_COMPLETE)) {
  523. out_8(&sw->select, RELAX);
  524. fs->state = locating;
  525. act(fs);
  526. return;
  527. }
  528. out_8(&sw->select, RELAX);
  529. if (fs->settle_time < 2*HZ) {
  530. ++fs->settle_time;
  531. set_timeout(fs, 1, settle_timeout);
  532. return;
  533. }
  534. printk(KERN_ERR "swim3: seek settle timeout\n");
  535. end_request(fd_req, 0);
  536. fs->state = idle;
  537. start_request(fs);
  538. }
  539. static void xfer_timeout(unsigned long data)
  540. {
  541. struct floppy_state *fs = (struct floppy_state *) data;
  542. struct swim3 __iomem *sw = fs->swim3;
  543. struct dbdma_regs __iomem *dr = fs->dma;
  544. struct dbdma_cmd *cp = fs->dma_cmd;
  545. unsigned long s;
  546. int n;
  547. fs->timeout_pending = 0;
  548. out_le32(&dr->control, RUN << 16);
  549. /* We must wait a bit for dbdma to stop */
  550. for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
  551. udelay(1);
  552. out_8(&sw->intr_enable, 0);
  553. out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
  554. out_8(&sw->select, RELAX);
  555. if (rq_data_dir(fd_req) == WRITE)
  556. ++cp;
  557. if (ld_le16(&cp->xfer_status) != 0)
  558. s = fs->scount - ((ld_le16(&cp->res_count) + 511) >> 9);
  559. else
  560. s = 0;
  561. fd_req->sector += s;
  562. fd_req->current_nr_sectors -= s;
  563. printk(KERN_ERR "swim3: timeout %sing sector %ld\n",
  564. (rq_data_dir(fd_req)==WRITE? "writ": "read"), (long)fd_req->sector);
  565. end_request(fd_req, 0);
  566. fs->state = idle;
  567. start_request(fs);
  568. }
  569. static irqreturn_t swim3_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  570. {
  571. struct floppy_state *fs = (struct floppy_state *) dev_id;
  572. struct swim3 __iomem *sw = fs->swim3;
  573. int intr, err, n;
  574. int stat, resid;
  575. struct dbdma_regs __iomem *dr;
  576. struct dbdma_cmd *cp;
  577. intr = in_8(&sw->intr);
  578. err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
  579. if ((intr & ERROR_INTR) && fs->state != do_transfer)
  580. printk(KERN_ERR "swim3_interrupt, state=%d, dir=%lx, intr=%x, err=%x\n",
  581. fs->state, rq_data_dir(fd_req), intr, err);
  582. switch (fs->state) {
  583. case locating:
  584. if (intr & SEEN_SECTOR) {
  585. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  586. out_8(&sw->select, RELAX);
  587. out_8(&sw->intr_enable, 0);
  588. del_timer(&fs->timeout);
  589. fs->timeout_pending = 0;
  590. if (sw->ctrack == 0xff) {
  591. printk(KERN_ERR "swim3: seen sector but cyl=ff?\n");
  592. fs->cur_cyl = -1;
  593. if (fs->retries > 5) {
  594. end_request(fd_req, 0);
  595. fs->state = idle;
  596. start_request(fs);
  597. } else {
  598. fs->state = jogging;
  599. act(fs);
  600. }
  601. break;
  602. }
  603. fs->cur_cyl = sw->ctrack;
  604. fs->cur_sector = sw->csect;
  605. if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
  606. printk(KERN_ERR "swim3: expected cyl %d, got %d\n",
  607. fs->expect_cyl, fs->cur_cyl);
  608. fs->state = do_transfer;
  609. act(fs);
  610. }
  611. break;
  612. case seeking:
  613. case jogging:
  614. if (sw->nseek == 0) {
  615. out_8(&sw->control_bic, DO_SEEK);
  616. out_8(&sw->select, RELAX);
  617. out_8(&sw->intr_enable, 0);
  618. del_timer(&fs->timeout);
  619. fs->timeout_pending = 0;
  620. if (fs->state == seeking)
  621. ++fs->retries;
  622. fs->state = settling;
  623. act(fs);
  624. }
  625. break;
  626. case settling:
  627. out_8(&sw->intr_enable, 0);
  628. del_timer(&fs->timeout);
  629. fs->timeout_pending = 0;
  630. act(fs);
  631. break;
  632. case do_transfer:
  633. if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
  634. break;
  635. out_8(&sw->intr_enable, 0);
  636. out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
  637. out_8(&sw->select, RELAX);
  638. del_timer(&fs->timeout);
  639. fs->timeout_pending = 0;
  640. dr = fs->dma;
  641. cp = fs->dma_cmd;
  642. if (rq_data_dir(fd_req) == WRITE)
  643. ++cp;
  644. /*
  645. * Check that the main data transfer has finished.
  646. * On writing, the swim3 sometimes doesn't use
  647. * up all the bytes of the postamble, so we can still
  648. * see DMA active here. That doesn't matter as long
  649. * as all the sector data has been transferred.
  650. */
  651. if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
  652. /* wait a little while for DMA to complete */
  653. for (n = 0; n < 100; ++n) {
  654. if (cp->xfer_status != 0)
  655. break;
  656. udelay(1);
  657. barrier();
  658. }
  659. }
  660. /* turn off DMA */
  661. out_le32(&dr->control, (RUN | PAUSE) << 16);
  662. stat = ld_le16(&cp->xfer_status);
  663. resid = ld_le16(&cp->res_count);
  664. if (intr & ERROR_INTR) {
  665. n = fs->scount - 1 - resid / 512;
  666. if (n > 0) {
  667. fd_req->sector += n;
  668. fd_req->current_nr_sectors -= n;
  669. fd_req->buffer += n * 512;
  670. fs->req_sector += n;
  671. }
  672. if (fs->retries < 5) {
  673. ++fs->retries;
  674. act(fs);
  675. } else {
  676. printk("swim3: error %sing block %ld (err=%x)\n",
  677. rq_data_dir(fd_req) == WRITE? "writ": "read",
  678. (long)fd_req->sector, err);
  679. end_request(fd_req, 0);
  680. fs->state = idle;
  681. }
  682. } else {
  683. if ((stat & ACTIVE) == 0 || resid != 0) {
  684. /* musta been an error */
  685. printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid);
  686. printk(KERN_ERR " state=%d, dir=%lx, intr=%x, err=%x\n",
  687. fs->state, rq_data_dir(fd_req), intr, err);
  688. end_request(fd_req, 0);
  689. fs->state = idle;
  690. start_request(fs);
  691. break;
  692. }
  693. fd_req->sector += fs->scount;
  694. fd_req->current_nr_sectors -= fs->scount;
  695. fd_req->buffer += fs->scount * 512;
  696. if (fd_req->current_nr_sectors <= 0) {
  697. end_request(fd_req, 1);
  698. fs->state = idle;
  699. } else {
  700. fs->req_sector += fs->scount;
  701. if (fs->req_sector > fs->secpertrack) {
  702. fs->req_sector -= fs->secpertrack;
  703. if (++fs->head > 1) {
  704. fs->head = 0;
  705. ++fs->req_cyl;
  706. }
  707. }
  708. act(fs);
  709. }
  710. }
  711. if (fs->state == idle)
  712. start_request(fs);
  713. break;
  714. default:
  715. printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state);
  716. }
  717. return IRQ_HANDLED;
  718. }
  719. /*
  720. static void fd_dma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  721. {
  722. }
  723. */
  724. static int grab_drive(struct floppy_state *fs, enum swim_state state,
  725. int interruptible)
  726. {
  727. unsigned long flags;
  728. spin_lock_irqsave(&fs->lock, flags);
  729. if (fs->state != idle) {
  730. ++fs->wanted;
  731. while (fs->state != available) {
  732. if (interruptible && signal_pending(current)) {
  733. --fs->wanted;
  734. spin_unlock_irqrestore(&fs->lock, flags);
  735. return -EINTR;
  736. }
  737. interruptible_sleep_on(&fs->wait);
  738. }
  739. --fs->wanted;
  740. }
  741. fs->state = state;
  742. spin_unlock_irqrestore(&fs->lock, flags);
  743. return 0;
  744. }
  745. static void release_drive(struct floppy_state *fs)
  746. {
  747. unsigned long flags;
  748. spin_lock_irqsave(&fs->lock, flags);
  749. fs->state = idle;
  750. start_request(fs);
  751. spin_unlock_irqrestore(&fs->lock, flags);
  752. }
  753. static int fd_eject(struct floppy_state *fs)
  754. {
  755. int err, n;
  756. err = grab_drive(fs, ejecting, 1);
  757. if (err)
  758. return err;
  759. swim3_action(fs, EJECT);
  760. for (n = 20; n > 0; --n) {
  761. if (signal_pending(current)) {
  762. err = -EINTR;
  763. break;
  764. }
  765. swim3_select(fs, RELAX);
  766. schedule_timeout_interruptible(1);
  767. if (swim3_readbit(fs, DISK_IN) == 0)
  768. break;
  769. }
  770. swim3_select(fs, RELAX);
  771. udelay(150);
  772. fs->ejected = 1;
  773. release_drive(fs);
  774. return err;
  775. }
  776. static struct floppy_struct floppy_type =
  777. { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
  778. static int floppy_ioctl(struct inode *inode, struct file *filp,
  779. unsigned int cmd, unsigned long param)
  780. {
  781. struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
  782. int err;
  783. if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
  784. return -EPERM;
  785. #ifdef CONFIG_PMAC_MEDIABAY
  786. if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
  787. return -ENXIO;
  788. #endif
  789. switch (cmd) {
  790. case FDEJECT:
  791. if (fs->ref_count != 1)
  792. return -EBUSY;
  793. err = fd_eject(fs);
  794. return err;
  795. case FDGETPRM:
  796. if (copy_to_user((void __user *) param, &floppy_type,
  797. sizeof(struct floppy_struct)))
  798. return -EFAULT;
  799. return 0;
  800. }
  801. return -ENOTTY;
  802. }
  803. static int floppy_open(struct inode *inode, struct file *filp)
  804. {
  805. struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
  806. struct swim3 __iomem *sw = fs->swim3;
  807. int n, err = 0;
  808. if (fs->ref_count == 0) {
  809. #ifdef CONFIG_PMAC_MEDIABAY
  810. if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
  811. return -ENXIO;
  812. #endif
  813. out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
  814. out_8(&sw->control_bic, 0xff);
  815. out_8(&sw->mode, 0x95);
  816. udelay(10);
  817. out_8(&sw->intr_enable, 0);
  818. out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
  819. swim3_action(fs, MOTOR_ON);
  820. fs->write_prot = -1;
  821. fs->cur_cyl = -1;
  822. for (n = 0; n < 2 * HZ; ++n) {
  823. if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
  824. break;
  825. if (signal_pending(current)) {
  826. err = -EINTR;
  827. break;
  828. }
  829. swim3_select(fs, RELAX);
  830. schedule_timeout_interruptible(1);
  831. }
  832. if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
  833. || swim3_readbit(fs, DISK_IN) == 0))
  834. err = -ENXIO;
  835. swim3_action(fs, SETMFM);
  836. swim3_select(fs, RELAX);
  837. } else if (fs->ref_count == -1 || filp->f_flags & O_EXCL)
  838. return -EBUSY;
  839. if (err == 0 && (filp->f_flags & O_NDELAY) == 0
  840. && (filp->f_mode & 3)) {
  841. check_disk_change(inode->i_bdev);
  842. if (fs->ejected)
  843. err = -ENXIO;
  844. }
  845. if (err == 0 && (filp->f_mode & 2)) {
  846. if (fs->write_prot < 0)
  847. fs->write_prot = swim3_readbit(fs, WRITE_PROT);
  848. if (fs->write_prot)
  849. err = -EROFS;
  850. }
  851. if (err) {
  852. if (fs->ref_count == 0) {
  853. swim3_action(fs, MOTOR_OFF);
  854. out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
  855. swim3_select(fs, RELAX);
  856. }
  857. return err;
  858. }
  859. if (filp->f_flags & O_EXCL)
  860. fs->ref_count = -1;
  861. else
  862. ++fs->ref_count;
  863. return 0;
  864. }
  865. static int floppy_release(struct inode *inode, struct file *filp)
  866. {
  867. struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
  868. struct swim3 __iomem *sw = fs->swim3;
  869. if (fs->ref_count > 0 && --fs->ref_count == 0) {
  870. swim3_action(fs, MOTOR_OFF);
  871. out_8(&sw->control_bic, 0xff);
  872. swim3_select(fs, RELAX);
  873. }
  874. return 0;
  875. }
  876. static int floppy_check_change(struct gendisk *disk)
  877. {
  878. struct floppy_state *fs = disk->private_data;
  879. return fs->ejected;
  880. }
  881. static int floppy_revalidate(struct gendisk *disk)
  882. {
  883. struct floppy_state *fs = disk->private_data;
  884. struct swim3 __iomem *sw;
  885. int ret, n;
  886. #ifdef CONFIG_PMAC_MEDIABAY
  887. if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
  888. return -ENXIO;
  889. #endif
  890. sw = fs->swim3;
  891. grab_drive(fs, revalidating, 0);
  892. out_8(&sw->intr_enable, 0);
  893. out_8(&sw->control_bis, DRIVE_ENABLE);
  894. swim3_action(fs, MOTOR_ON); /* necessary? */
  895. fs->write_prot = -1;
  896. fs->cur_cyl = -1;
  897. mdelay(1);
  898. for (n = HZ; n > 0; --n) {
  899. if (swim3_readbit(fs, SEEK_COMPLETE))
  900. break;
  901. if (signal_pending(current))
  902. break;
  903. swim3_select(fs, RELAX);
  904. schedule_timeout_interruptible(1);
  905. }
  906. ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
  907. || swim3_readbit(fs, DISK_IN) == 0;
  908. if (ret)
  909. swim3_action(fs, MOTOR_OFF);
  910. else {
  911. fs->ejected = 0;
  912. swim3_action(fs, SETMFM);
  913. }
  914. swim3_select(fs, RELAX);
  915. release_drive(fs);
  916. return ret;
  917. }
  918. static struct block_device_operations floppy_fops = {
  919. .open = floppy_open,
  920. .release = floppy_release,
  921. .ioctl = floppy_ioctl,
  922. .media_changed = floppy_check_change,
  923. .revalidate_disk= floppy_revalidate,
  924. };
  925. int swim3_init(void)
  926. {
  927. struct device_node *swim;
  928. int err = -ENOMEM;
  929. int i;
  930. devfs_mk_dir("floppy");
  931. swim = find_devices("floppy");
  932. while (swim && (floppy_count < MAX_FLOPPIES))
  933. {
  934. swim3_add_device(swim);
  935. swim = swim->next;
  936. }
  937. swim = find_devices("swim3");
  938. while (swim && (floppy_count < MAX_FLOPPIES))
  939. {
  940. swim3_add_device(swim);
  941. swim = swim->next;
  942. }
  943. if (!floppy_count)
  944. return -ENODEV;
  945. for (i = 0; i < floppy_count; i++) {
  946. disks[i] = alloc_disk(1);
  947. if (!disks[i])
  948. goto out;
  949. }
  950. if (register_blkdev(FLOPPY_MAJOR, "fd")) {
  951. err = -EBUSY;
  952. goto out;
  953. }
  954. swim3_queue = blk_init_queue(do_fd_request, &swim3_lock);
  955. if (!swim3_queue) {
  956. err = -ENOMEM;
  957. goto out_queue;
  958. }
  959. for (i = 0; i < floppy_count; i++) {
  960. struct gendisk *disk = disks[i];
  961. disk->major = FLOPPY_MAJOR;
  962. disk->first_minor = i;
  963. disk->fops = &floppy_fops;
  964. disk->private_data = &floppy_states[i];
  965. disk->queue = swim3_queue;
  966. disk->flags |= GENHD_FL_REMOVABLE;
  967. sprintf(disk->disk_name, "fd%d", i);
  968. sprintf(disk->devfs_name, "floppy/%d", i);
  969. set_capacity(disk, 2880);
  970. add_disk(disk);
  971. }
  972. return 0;
  973. out_queue:
  974. unregister_blkdev(FLOPPY_MAJOR, "fd");
  975. out:
  976. while (i--)
  977. put_disk(disks[i]);
  978. /* shouldn't we do something with results of swim_add_device()? */
  979. return err;
  980. }
  981. static int swim3_add_device(struct device_node *swim)
  982. {
  983. struct device_node *mediabay;
  984. struct floppy_state *fs = &floppy_states[floppy_count];
  985. struct resource res_reg, res_dma;
  986. if (of_address_to_resource(swim, 0, &res_reg) ||
  987. of_address_to_resource(swim, 1, &res_dma)) {
  988. printk(KERN_ERR "swim3: Can't get addresses\n");
  989. return -EINVAL;
  990. }
  991. if (request_mem_region(res_reg.start, res_reg.end - res_reg.start + 1,
  992. " (reg)") == NULL) {
  993. printk(KERN_ERR "swim3: Can't request register space\n");
  994. return -EINVAL;
  995. }
  996. if (request_mem_region(res_dma.start, res_dma.end - res_dma.start + 1,
  997. " (dma)") == NULL) {
  998. release_mem_region(res_reg.start,
  999. res_reg.end - res_reg.start + 1);
  1000. printk(KERN_ERR "swim3: Can't request DMA space\n");
  1001. return -EINVAL;
  1002. }
  1003. if (swim->n_intrs < 2) {
  1004. printk(KERN_INFO "swim3: expecting 2 intrs (n_intrs:%d)\n",
  1005. swim->n_intrs);
  1006. release_mem_region(res_reg.start,
  1007. res_reg.end - res_reg.start + 1);
  1008. release_mem_region(res_dma.start,
  1009. res_dma.end - res_dma.start + 1);
  1010. return -EINVAL;
  1011. }
  1012. mediabay = (strcasecmp(swim->parent->type, "media-bay") == 0) ? swim->parent : NULL;
  1013. if (mediabay == NULL)
  1014. pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
  1015. memset(fs, 0, sizeof(*fs));
  1016. spin_lock_init(&fs->lock);
  1017. fs->state = idle;
  1018. fs->swim3 = (struct swim3 __iomem *)ioremap(res_reg.start, 0x200);
  1019. fs->dma = (struct dbdma_regs __iomem *)ioremap(res_dma.start, 0x200);
  1020. fs->swim3_intr = swim->intrs[0].line;
  1021. fs->dma_intr = swim->intrs[1].line;
  1022. fs->cur_cyl = -1;
  1023. fs->cur_sector = -1;
  1024. fs->secpercyl = 36;
  1025. fs->secpertrack = 18;
  1026. fs->total_secs = 2880;
  1027. fs->media_bay = mediabay;
  1028. init_waitqueue_head(&fs->wait);
  1029. fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
  1030. memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
  1031. st_le16(&fs->dma_cmd[1].command, DBDMA_STOP);
  1032. if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
  1033. printk(KERN_ERR "Couldn't get irq %d for SWIM3\n", fs->swim3_intr);
  1034. pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
  1035. return -EBUSY;
  1036. }
  1037. /*
  1038. if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) {
  1039. printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA",
  1040. fs->dma_intr);
  1041. pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
  1042. return -EBUSY;
  1043. }
  1044. */
  1045. init_timer(&fs->timeout);
  1046. printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count,
  1047. mediabay ? "in media bay" : "");
  1048. floppy_count++;
  1049. return 0;
  1050. }
  1051. module_init(swim3_init)
  1052. MODULE_LICENSE("GPL");
  1053. MODULE_AUTHOR("Paul Mackerras");
  1054. MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);