setup.c 15 KB

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  1. /*
  2. * 64-bit pSeries and RS/6000 setup code.
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * bootup setup stuff..
  16. */
  17. #undef DEBUG
  18. #include <linux/config.h>
  19. #include <linux/cpu.h>
  20. #include <linux/errno.h>
  21. #include <linux/sched.h>
  22. #include <linux/kernel.h>
  23. #include <linux/mm.h>
  24. #include <linux/stddef.h>
  25. #include <linux/unistd.h>
  26. #include <linux/slab.h>
  27. #include <linux/user.h>
  28. #include <linux/a.out.h>
  29. #include <linux/tty.h>
  30. #include <linux/major.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/reboot.h>
  33. #include <linux/init.h>
  34. #include <linux/ioport.h>
  35. #include <linux/console.h>
  36. #include <linux/pci.h>
  37. #include <linux/utsname.h>
  38. #include <linux/adb.h>
  39. #include <linux/module.h>
  40. #include <linux/delay.h>
  41. #include <linux/irq.h>
  42. #include <linux/seq_file.h>
  43. #include <linux/root_dev.h>
  44. #include <asm/mmu.h>
  45. #include <asm/processor.h>
  46. #include <asm/io.h>
  47. #include <asm/pgtable.h>
  48. #include <asm/prom.h>
  49. #include <asm/rtas.h>
  50. #include <asm/pci-bridge.h>
  51. #include <asm/iommu.h>
  52. #include <asm/dma.h>
  53. #include <asm/machdep.h>
  54. #include <asm/irq.h>
  55. #include <asm/kexec.h>
  56. #include <asm/time.h>
  57. #include <asm/nvram.h>
  58. #include "xics.h"
  59. #include <asm/firmware.h>
  60. #include <asm/pmc.h>
  61. #include <asm/mpic.h>
  62. #include <asm/ppc-pci.h>
  63. #include <asm/i8259.h>
  64. #include <asm/udbg.h>
  65. #include <asm/smp.h>
  66. #include "plpar_wrappers.h"
  67. #ifdef DEBUG
  68. #define DBG(fmt...) udbg_printf(fmt)
  69. #else
  70. #define DBG(fmt...)
  71. #endif
  72. extern void find_udbg_vterm(void);
  73. int fwnmi_active; /* TRUE if an FWNMI handler is present */
  74. extern void pSeries_system_reset_exception(struct pt_regs *regs);
  75. extern int pSeries_machine_check_exception(struct pt_regs *regs);
  76. static void pseries_shared_idle(void);
  77. static void pseries_dedicated_idle(void);
  78. struct mpic *pSeries_mpic;
  79. void pSeries_show_cpuinfo(struct seq_file *m)
  80. {
  81. struct device_node *root;
  82. const char *model = "";
  83. root = of_find_node_by_path("/");
  84. if (root)
  85. model = get_property(root, "model", NULL);
  86. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  87. of_node_put(root);
  88. }
  89. /* Initialize firmware assisted non-maskable interrupts if
  90. * the firmware supports this feature.
  91. */
  92. static void __init fwnmi_init(void)
  93. {
  94. unsigned long system_reset_addr, machine_check_addr;
  95. int ibm_nmi_register = rtas_token("ibm,nmi-register");
  96. if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
  97. return;
  98. /* If the kernel's not linked at zero we point the firmware at low
  99. * addresses anyway, and use a trampoline to get to the real code. */
  100. system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
  101. machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
  102. if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
  103. machine_check_addr))
  104. fwnmi_active = 1;
  105. }
  106. static void __init pSeries_init_mpic(void)
  107. {
  108. unsigned int *addrp;
  109. struct device_node *np;
  110. unsigned long intack = 0;
  111. /* All ISUs are setup, complete initialization */
  112. mpic_init(pSeries_mpic);
  113. /* Check what kind of cascade ACK we have */
  114. if (!(np = of_find_node_by_name(NULL, "pci"))
  115. || !(addrp = (unsigned int *)
  116. get_property(np, "8259-interrupt-acknowledge", NULL)))
  117. printk(KERN_ERR "Cannot find pci to get ack address\n");
  118. else
  119. intack = addrp[prom_n_addr_cells(np)-1];
  120. of_node_put(np);
  121. /* Setup the legacy interrupts & controller */
  122. i8259_init(intack, 0);
  123. /* Hook cascade to mpic */
  124. mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL);
  125. }
  126. static void __init pSeries_setup_mpic(void)
  127. {
  128. unsigned int *opprop;
  129. unsigned long openpic_addr = 0;
  130. unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
  131. struct device_node *root;
  132. int irq_count;
  133. /* Find the Open PIC if present */
  134. root = of_find_node_by_path("/");
  135. opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
  136. if (opprop != 0) {
  137. int n = prom_n_addr_cells(root);
  138. for (openpic_addr = 0; n > 0; --n)
  139. openpic_addr = (openpic_addr << 32) + *opprop++;
  140. printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
  141. }
  142. of_node_put(root);
  143. BUG_ON(openpic_addr == 0);
  144. /* Get the sense values from OF */
  145. prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
  146. /* Setup the openpic driver */
  147. irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
  148. pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
  149. 16, 16, irq_count, /* isu size, irq offset, irq count */
  150. NR_IRQS - 4, /* ipi offset */
  151. senses, irq_count, /* sense & sense size */
  152. " MPIC ");
  153. }
  154. static void pseries_lpar_enable_pmcs(void)
  155. {
  156. unsigned long set, reset;
  157. power4_enable_pmcs();
  158. set = 1UL << 63;
  159. reset = 0;
  160. plpar_hcall_norets(H_PERFMON, set, reset);
  161. /* instruct hypervisor to maintain PMCs */
  162. if (firmware_has_feature(FW_FEATURE_SPLPAR))
  163. get_paca()->lppaca.pmcregs_in_use = 1;
  164. }
  165. static void __init pSeries_setup_arch(void)
  166. {
  167. /* Fixup ppc_md depending on the type of interrupt controller */
  168. if (ppc64_interrupt_controller == IC_OPEN_PIC) {
  169. ppc_md.init_IRQ = pSeries_init_mpic;
  170. ppc_md.get_irq = mpic_get_irq;
  171. /* Allocate the mpic now, so that find_and_init_phbs() can
  172. * fill the ISUs */
  173. pSeries_setup_mpic();
  174. } else {
  175. ppc_md.init_IRQ = xics_init_IRQ;
  176. ppc_md.get_irq = xics_get_irq;
  177. }
  178. #ifdef CONFIG_SMP
  179. smp_init_pSeries();
  180. #endif
  181. /* openpic global configuration register (64-bit format). */
  182. /* openpic Interrupt Source Unit pointer (64-bit format). */
  183. /* python0 facility area (mmio) (64-bit format) REAL address. */
  184. /* init to some ~sane value until calibrate_delay() runs */
  185. loops_per_jiffy = 50000000;
  186. if (ROOT_DEV == 0) {
  187. printk("No ramdisk, default root is /dev/sda2\n");
  188. ROOT_DEV = Root_SDA2;
  189. }
  190. fwnmi_init();
  191. /* Find and initialize PCI host bridges */
  192. init_pci_config_tokens();
  193. find_and_init_phbs();
  194. eeh_init();
  195. pSeries_nvram_init();
  196. /* Choose an idle loop */
  197. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  198. vpa_init(boot_cpuid);
  199. if (get_paca()->lppaca.shared_proc) {
  200. printk(KERN_INFO "Using shared processor idle loop\n");
  201. ppc_md.idle_loop = pseries_shared_idle;
  202. } else {
  203. printk(KERN_INFO "Using dedicated idle loop\n");
  204. ppc_md.idle_loop = pseries_dedicated_idle;
  205. }
  206. } else {
  207. printk(KERN_INFO "Using default idle loop\n");
  208. ppc_md.idle_loop = default_idle;
  209. }
  210. if (platform_is_lpar())
  211. ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
  212. else
  213. ppc_md.enable_pmcs = power4_enable_pmcs;
  214. }
  215. static int __init pSeries_init_panel(void)
  216. {
  217. /* Manually leave the kernel version on the panel. */
  218. ppc_md.progress("Linux ppc64\n", 0);
  219. ppc_md.progress(system_utsname.version, 0);
  220. return 0;
  221. }
  222. arch_initcall(pSeries_init_panel);
  223. /* Build up the ppc64_firmware_features bitmask field
  224. * using contents of device-tree/ibm,hypertas-functions.
  225. * Ultimately this functionality may be moved into prom.c prom_init().
  226. */
  227. static void __init fw_feature_init(void)
  228. {
  229. struct device_node * dn;
  230. char * hypertas;
  231. unsigned int len;
  232. DBG(" -> fw_feature_init()\n");
  233. ppc64_firmware_features = 0;
  234. dn = of_find_node_by_path("/rtas");
  235. if (dn == NULL) {
  236. printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
  237. goto no_rtas;
  238. }
  239. hypertas = get_property(dn, "ibm,hypertas-functions", &len);
  240. if (hypertas) {
  241. while (len > 0){
  242. int i, hypertas_len;
  243. /* check value against table of strings */
  244. for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
  245. if ((firmware_features_table[i].name) &&
  246. (strcmp(firmware_features_table[i].name,hypertas))==0) {
  247. /* we have a match */
  248. ppc64_firmware_features |=
  249. (firmware_features_table[i].val);
  250. break;
  251. }
  252. }
  253. hypertas_len = strlen(hypertas);
  254. len -= hypertas_len +1;
  255. hypertas+= hypertas_len +1;
  256. }
  257. }
  258. of_node_put(dn);
  259. no_rtas:
  260. DBG(" <- fw_feature_init()\n");
  261. }
  262. static void __init pSeries_discover_pic(void)
  263. {
  264. struct device_node *np;
  265. char *typep;
  266. /*
  267. * Setup interrupt mapping options that are needed for finish_device_tree
  268. * to properly parse the OF interrupt tree & do the virtual irq mapping
  269. */
  270. __irq_offset_value = NUM_ISA_INTERRUPTS;
  271. ppc64_interrupt_controller = IC_INVALID;
  272. for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
  273. typep = (char *)get_property(np, "compatible", NULL);
  274. if (strstr(typep, "open-pic"))
  275. ppc64_interrupt_controller = IC_OPEN_PIC;
  276. else if (strstr(typep, "ppc-xicp"))
  277. ppc64_interrupt_controller = IC_PPC_XIC;
  278. else
  279. printk("pSeries_discover_pic: failed to recognize"
  280. " interrupt-controller\n");
  281. break;
  282. }
  283. }
  284. static void pSeries_mach_cpu_die(void)
  285. {
  286. local_irq_disable();
  287. idle_task_exit();
  288. /* Some hardware requires clearing the CPPR, while other hardware does not
  289. * it is safe either way
  290. */
  291. pSeriesLP_cppr_info(0, 0);
  292. rtas_stop_self();
  293. /* Should never get here... */
  294. BUG();
  295. for(;;);
  296. }
  297. static int pseries_set_dabr(unsigned long dabr)
  298. {
  299. return plpar_hcall_norets(H_SET_DABR, dabr);
  300. }
  301. static int pseries_set_xdabr(unsigned long dabr)
  302. {
  303. /* We want to catch accesses from kernel and userspace */
  304. return plpar_hcall_norets(H_SET_XDABR, dabr,
  305. H_DABRX_KERNEL | H_DABRX_USER);
  306. }
  307. /*
  308. * Early initialization. Relocation is on but do not reference unbolted pages
  309. */
  310. static void __init pSeries_init_early(void)
  311. {
  312. int iommu_off = 0;
  313. DBG(" -> pSeries_init_early()\n");
  314. fw_feature_init();
  315. if (platform_is_lpar())
  316. hpte_init_lpar();
  317. else {
  318. hpte_init_native();
  319. iommu_off = (of_chosen &&
  320. get_property(of_chosen, "linux,iommu-off", NULL));
  321. }
  322. if (platform_is_lpar())
  323. find_udbg_vterm();
  324. if (firmware_has_feature(FW_FEATURE_DABR))
  325. ppc_md.set_dabr = pseries_set_dabr;
  326. else if (firmware_has_feature(FW_FEATURE_XDABR))
  327. ppc_md.set_dabr = pseries_set_xdabr;
  328. iommu_init_early_pSeries();
  329. pSeries_discover_pic();
  330. DBG(" <- pSeries_init_early()\n");
  331. }
  332. static int pSeries_check_legacy_ioport(unsigned int baseport)
  333. {
  334. struct device_node *np;
  335. #define I8042_DATA_REG 0x60
  336. #define FDC_BASE 0x3f0
  337. switch(baseport) {
  338. case I8042_DATA_REG:
  339. np = of_find_node_by_type(NULL, "8042");
  340. if (np == NULL)
  341. return -ENODEV;
  342. of_node_put(np);
  343. break;
  344. case FDC_BASE:
  345. np = of_find_node_by_type(NULL, "fdc");
  346. if (np == NULL)
  347. return -ENODEV;
  348. of_node_put(np);
  349. break;
  350. }
  351. return 0;
  352. }
  353. /*
  354. * Called very early, MMU is off, device-tree isn't unflattened
  355. */
  356. extern struct machdep_calls pSeries_md;
  357. static int __init pSeries_probe(int platform)
  358. {
  359. if (platform != PLATFORM_PSERIES &&
  360. platform != PLATFORM_PSERIES_LPAR)
  361. return 0;
  362. /* if we have some ppc_md fixups for LPAR to do, do
  363. * it here ...
  364. */
  365. return 1;
  366. }
  367. DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
  368. static inline void dedicated_idle_sleep(unsigned int cpu)
  369. {
  370. struct paca_struct *ppaca = &paca[cpu ^ 1];
  371. /* Only sleep if the other thread is not idle */
  372. if (!(ppaca->lppaca.idle)) {
  373. local_irq_disable();
  374. /*
  375. * We are about to sleep the thread and so wont be polling any
  376. * more.
  377. */
  378. clear_thread_flag(TIF_POLLING_NRFLAG);
  379. smp_mb__after_clear_bit();
  380. /*
  381. * SMT dynamic mode. Cede will result in this thread going
  382. * dormant, if the partner thread is still doing work. Thread
  383. * wakes up if partner goes idle, an interrupt is presented, or
  384. * a prod occurs. Returning from the cede enables external
  385. * interrupts.
  386. */
  387. if (!need_resched())
  388. cede_processor();
  389. else
  390. local_irq_enable();
  391. set_thread_flag(TIF_POLLING_NRFLAG);
  392. } else {
  393. /*
  394. * Give the HV an opportunity at the processor, since we are
  395. * not doing any work.
  396. */
  397. poll_pending();
  398. }
  399. }
  400. static void pseries_dedicated_idle(void)
  401. {
  402. struct paca_struct *lpaca = get_paca();
  403. unsigned int cpu = smp_processor_id();
  404. unsigned long start_snooze;
  405. unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
  406. set_thread_flag(TIF_POLLING_NRFLAG);
  407. while (1) {
  408. /*
  409. * Indicate to the HV that we are idle. Now would be
  410. * a good time to find other work to dispatch.
  411. */
  412. lpaca->lppaca.idle = 1;
  413. if (!need_resched()) {
  414. start_snooze = get_tb() +
  415. *smt_snooze_delay * tb_ticks_per_usec;
  416. while (!need_resched() && !cpu_is_offline(cpu)) {
  417. ppc64_runlatch_off();
  418. /*
  419. * Go into low thread priority and possibly
  420. * low power mode.
  421. */
  422. HMT_low();
  423. HMT_very_low();
  424. if (*smt_snooze_delay != 0 &&
  425. get_tb() > start_snooze) {
  426. HMT_medium();
  427. dedicated_idle_sleep(cpu);
  428. }
  429. }
  430. HMT_medium();
  431. }
  432. lpaca->lppaca.idle = 0;
  433. ppc64_runlatch_on();
  434. preempt_enable_no_resched();
  435. schedule();
  436. preempt_disable();
  437. if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
  438. cpu_die();
  439. }
  440. }
  441. static void pseries_shared_idle(void)
  442. {
  443. struct paca_struct *lpaca = get_paca();
  444. unsigned int cpu = smp_processor_id();
  445. while (1) {
  446. /*
  447. * Indicate to the HV that we are idle. Now would be
  448. * a good time to find other work to dispatch.
  449. */
  450. lpaca->lppaca.idle = 1;
  451. while (!need_resched() && !cpu_is_offline(cpu)) {
  452. local_irq_disable();
  453. ppc64_runlatch_off();
  454. /*
  455. * Yield the processor to the hypervisor. We return if
  456. * an external interrupt occurs (which are driven prior
  457. * to returning here) or if a prod occurs from another
  458. * processor. When returning here, external interrupts
  459. * are enabled.
  460. *
  461. * Check need_resched() again with interrupts disabled
  462. * to avoid a race.
  463. */
  464. if (!need_resched())
  465. cede_processor();
  466. else
  467. local_irq_enable();
  468. HMT_medium();
  469. }
  470. lpaca->lppaca.idle = 0;
  471. ppc64_runlatch_on();
  472. preempt_enable_no_resched();
  473. schedule();
  474. preempt_disable();
  475. if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
  476. cpu_die();
  477. }
  478. }
  479. static int pSeries_pci_probe_mode(struct pci_bus *bus)
  480. {
  481. if (platform_is_lpar())
  482. return PCI_PROBE_DEVTREE;
  483. return PCI_PROBE_NORMAL;
  484. }
  485. #ifdef CONFIG_KEXEC
  486. static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
  487. {
  488. /* Don't risk a hypervisor call if we're crashing */
  489. if (!crash_shutdown) {
  490. unsigned long vpa = __pa(&get_paca()->lppaca);
  491. if (unregister_vpa(hard_smp_processor_id(), vpa)) {
  492. printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
  493. "failed\n", smp_processor_id(),
  494. hard_smp_processor_id());
  495. }
  496. }
  497. if (ppc64_interrupt_controller == IC_OPEN_PIC)
  498. mpic_teardown_this_cpu(secondary);
  499. else
  500. xics_teardown_cpu(secondary);
  501. }
  502. #endif
  503. struct machdep_calls __initdata pSeries_md = {
  504. .probe = pSeries_probe,
  505. .setup_arch = pSeries_setup_arch,
  506. .init_early = pSeries_init_early,
  507. .show_cpuinfo = pSeries_show_cpuinfo,
  508. .log_error = pSeries_log_error,
  509. .pcibios_fixup = pSeries_final_fixup,
  510. .pci_probe_mode = pSeries_pci_probe_mode,
  511. .irq_bus_setup = pSeries_irq_bus_setup,
  512. .restart = rtas_restart,
  513. .power_off = rtas_power_off,
  514. .halt = rtas_halt,
  515. .panic = rtas_os_term,
  516. .cpu_die = pSeries_mach_cpu_die,
  517. .get_boot_time = rtas_get_boot_time,
  518. .get_rtc_time = rtas_get_rtc_time,
  519. .set_rtc_time = rtas_set_rtc_time,
  520. .calibrate_decr = generic_calibrate_decr,
  521. .progress = rtas_progress,
  522. .check_legacy_ioport = pSeries_check_legacy_ioport,
  523. .system_reset_exception = pSeries_system_reset_exception,
  524. .machine_check_exception = pSeries_machine_check_exception,
  525. #ifdef CONFIG_KEXEC
  526. .kexec_cpu_down = pseries_kexec_cpu_down,
  527. .machine_kexec = default_machine_kexec,
  528. .machine_kexec_prepare = default_machine_kexec_prepare,
  529. .machine_crash_shutdown = default_machine_crash_shutdown,
  530. #endif
  531. };