synclink_cs.c 118 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/config.h>
  36. #include <linux/module.h>
  37. #include <linux/errno.h>
  38. #include <linux/signal.h>
  39. #include <linux/sched.h>
  40. #include <linux/timer.h>
  41. #include <linux/time.h>
  42. #include <linux/interrupt.h>
  43. #include <linux/pci.h>
  44. #include <linux/tty.h>
  45. #include <linux/tty_flip.h>
  46. #include <linux/serial.h>
  47. #include <linux/major.h>
  48. #include <linux/string.h>
  49. #include <linux/fcntl.h>
  50. #include <linux/ptrace.h>
  51. #include <linux/ioport.h>
  52. #include <linux/mm.h>
  53. #include <linux/slab.h>
  54. #include <linux/netdevice.h>
  55. #include <linux/vmalloc.h>
  56. #include <linux/init.h>
  57. #include <asm/serial.h>
  58. #include <linux/delay.h>
  59. #include <linux/ioctl.h>
  60. #include <asm/system.h>
  61. #include <asm/io.h>
  62. #include <asm/irq.h>
  63. #include <asm/dma.h>
  64. #include <linux/bitops.h>
  65. #include <asm/types.h>
  66. #include <linux/termios.h>
  67. #include <linux/workqueue.h>
  68. #include <linux/hdlc.h>
  69. #include <pcmcia/cs_types.h>
  70. #include <pcmcia/cs.h>
  71. #include <pcmcia/cistpl.h>
  72. #include <pcmcia/cisreg.h>
  73. #include <pcmcia/ds.h>
  74. #ifdef CONFIG_HDLC_MODULE
  75. #define CONFIG_HDLC 1
  76. #endif
  77. #define GET_USER(error,value,addr) error = get_user(value,addr)
  78. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  79. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  80. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  81. #include <asm/uaccess.h>
  82. #include "linux/synclink.h"
  83. static MGSL_PARAMS default_params = {
  84. MGSL_MODE_HDLC, /* unsigned long mode */
  85. 0, /* unsigned char loopback; */
  86. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  87. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  88. 0, /* unsigned long clock_speed; */
  89. 0xff, /* unsigned char addr_filter; */
  90. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  91. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  92. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  93. 9600, /* unsigned long data_rate; */
  94. 8, /* unsigned char data_bits; */
  95. 1, /* unsigned char stop_bits; */
  96. ASYNC_PARITY_NONE /* unsigned char parity; */
  97. };
  98. typedef struct
  99. {
  100. int count;
  101. unsigned char status;
  102. char data[1];
  103. } RXBUF;
  104. /* The queue of BH actions to be performed */
  105. #define BH_RECEIVE 1
  106. #define BH_TRANSMIT 2
  107. #define BH_STATUS 4
  108. #define IO_PIN_SHUTDOWN_LIMIT 100
  109. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  110. struct _input_signal_events {
  111. int ri_up;
  112. int ri_down;
  113. int dsr_up;
  114. int dsr_down;
  115. int dcd_up;
  116. int dcd_down;
  117. int cts_up;
  118. int cts_down;
  119. };
  120. /*
  121. * Device instance data structure
  122. */
  123. typedef struct _mgslpc_info {
  124. void *if_ptr; /* General purpose pointer (used by SPPP) */
  125. int magic;
  126. int flags;
  127. int count; /* count of opens */
  128. int line;
  129. unsigned short close_delay;
  130. unsigned short closing_wait; /* time to wait before closing */
  131. struct mgsl_icount icount;
  132. struct tty_struct *tty;
  133. int timeout;
  134. int x_char; /* xon/xoff character */
  135. int blocked_open; /* # of blocked opens */
  136. unsigned char read_status_mask;
  137. unsigned char ignore_status_mask;
  138. unsigned char *tx_buf;
  139. int tx_put;
  140. int tx_get;
  141. int tx_count;
  142. /* circular list of fixed length rx buffers */
  143. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  144. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  145. int rx_put; /* index of next empty rx buffer */
  146. int rx_get; /* index of next full rx buffer */
  147. int rx_buf_size; /* size in bytes of single rx buffer */
  148. int rx_buf_count; /* total number of rx buffers */
  149. int rx_frame_count; /* number of full rx buffers */
  150. wait_queue_head_t open_wait;
  151. wait_queue_head_t close_wait;
  152. wait_queue_head_t status_event_wait_q;
  153. wait_queue_head_t event_wait_q;
  154. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  155. struct _mgslpc_info *next_device; /* device list link */
  156. unsigned short imra_value;
  157. unsigned short imrb_value;
  158. unsigned char pim_value;
  159. spinlock_t lock;
  160. struct work_struct task; /* task structure for scheduling bh */
  161. u32 max_frame_size;
  162. u32 pending_bh;
  163. int bh_running;
  164. int bh_requested;
  165. int dcd_chkcount; /* check counts to prevent */
  166. int cts_chkcount; /* too many IRQs if a signal */
  167. int dsr_chkcount; /* is floating */
  168. int ri_chkcount;
  169. int rx_enabled;
  170. int rx_overflow;
  171. int tx_enabled;
  172. int tx_active;
  173. int tx_aborting;
  174. u32 idle_mode;
  175. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  176. char device_name[25]; /* device instance name */
  177. unsigned int io_base; /* base I/O address of adapter */
  178. unsigned int irq_level;
  179. MGSL_PARAMS params; /* communications parameters */
  180. unsigned char serial_signals; /* current serial signal states */
  181. char irq_occurred; /* for diagnostics use */
  182. char testing_irq;
  183. unsigned int init_error; /* startup error (DIAGS) */
  184. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  185. BOOLEAN drop_rts_on_tx_done;
  186. struct _input_signal_events input_signal_events;
  187. /* PCMCIA support */
  188. dev_link_t link;
  189. dev_node_t node;
  190. int stop;
  191. /* SPPP/Cisco HDLC device parts */
  192. int netcount;
  193. int dosyncppp;
  194. spinlock_t netlock;
  195. #ifdef CONFIG_HDLC
  196. struct net_device *netdev;
  197. #endif
  198. } MGSLPC_INFO;
  199. #define MGSLPC_MAGIC 0x5402
  200. /*
  201. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  202. */
  203. #define TXBUFSIZE 4096
  204. #define CHA 0x00 /* channel A offset */
  205. #define CHB 0x40 /* channel B offset */
  206. /*
  207. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  208. */
  209. #undef PVR
  210. #define RXFIFO 0
  211. #define TXFIFO 0
  212. #define STAR 0x20
  213. #define CMDR 0x20
  214. #define RSTA 0x21
  215. #define PRE 0x21
  216. #define MODE 0x22
  217. #define TIMR 0x23
  218. #define XAD1 0x24
  219. #define XAD2 0x25
  220. #define RAH1 0x26
  221. #define RAH2 0x27
  222. #define DAFO 0x27
  223. #define RAL1 0x28
  224. #define RFC 0x28
  225. #define RHCR 0x29
  226. #define RAL2 0x29
  227. #define RBCL 0x2a
  228. #define XBCL 0x2a
  229. #define RBCH 0x2b
  230. #define XBCH 0x2b
  231. #define CCR0 0x2c
  232. #define CCR1 0x2d
  233. #define CCR2 0x2e
  234. #define CCR3 0x2f
  235. #define VSTR 0x34
  236. #define BGR 0x34
  237. #define RLCR 0x35
  238. #define AML 0x36
  239. #define AMH 0x37
  240. #define GIS 0x38
  241. #define IVA 0x38
  242. #define IPC 0x39
  243. #define ISR 0x3a
  244. #define IMR 0x3a
  245. #define PVR 0x3c
  246. #define PIS 0x3d
  247. #define PIM 0x3d
  248. #define PCR 0x3e
  249. #define CCR4 0x3f
  250. // IMR/ISR
  251. #define IRQ_BREAK_ON BIT15 // rx break detected
  252. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  253. #define IRQ_ALLSENT BIT13 // all sent
  254. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  255. #define IRQ_TIMER BIT11 // timer interrupt
  256. #define IRQ_CTS BIT10 // CTS status change
  257. #define IRQ_TXREPEAT BIT9 // tx message repeat
  258. #define IRQ_TXFIFO BIT8 // transmit pool ready
  259. #define IRQ_RXEOM BIT7 // receive message end
  260. #define IRQ_EXITHUNT BIT6 // receive frame start
  261. #define IRQ_RXTIME BIT6 // rx char timeout
  262. #define IRQ_DCD BIT2 // carrier detect status change
  263. #define IRQ_OVERRUN BIT1 // receive frame overflow
  264. #define IRQ_RXFIFO BIT0 // receive pool full
  265. // STAR
  266. #define XFW BIT6 // transmit FIFO write enable
  267. #define CEC BIT2 // command executing
  268. #define CTS BIT1 // CTS state
  269. #define PVR_DTR BIT0
  270. #define PVR_DSR BIT1
  271. #define PVR_RI BIT2
  272. #define PVR_AUTOCTS BIT3
  273. #define PVR_RS232 0x20 /* 0010b */
  274. #define PVR_V35 0xe0 /* 1110b */
  275. #define PVR_RS422 0x40 /* 0100b */
  276. /* Register access functions */
  277. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  278. #define read_reg(info, reg) inb((info)->io_base + (reg))
  279. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  280. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  281. #define set_reg_bits(info, reg, mask) \
  282. write_reg(info, (reg), \
  283. (unsigned char) (read_reg(info, (reg)) | (mask)))
  284. #define clear_reg_bits(info, reg, mask) \
  285. write_reg(info, (reg), \
  286. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  287. /*
  288. * interrupt enable/disable routines
  289. */
  290. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  291. {
  292. if (channel == CHA) {
  293. info->imra_value |= mask;
  294. write_reg16(info, CHA + IMR, info->imra_value);
  295. } else {
  296. info->imrb_value |= mask;
  297. write_reg16(info, CHB + IMR, info->imrb_value);
  298. }
  299. }
  300. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  301. {
  302. if (channel == CHA) {
  303. info->imra_value &= ~mask;
  304. write_reg16(info, CHA + IMR, info->imra_value);
  305. } else {
  306. info->imrb_value &= ~mask;
  307. write_reg16(info, CHB + IMR, info->imrb_value);
  308. }
  309. }
  310. #define port_irq_disable(info, mask) \
  311. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  312. #define port_irq_enable(info, mask) \
  313. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  314. static void rx_start(MGSLPC_INFO *info);
  315. static void rx_stop(MGSLPC_INFO *info);
  316. static void tx_start(MGSLPC_INFO *info);
  317. static void tx_stop(MGSLPC_INFO *info);
  318. static void tx_set_idle(MGSLPC_INFO *info);
  319. static void get_signals(MGSLPC_INFO *info);
  320. static void set_signals(MGSLPC_INFO *info);
  321. static void reset_device(MGSLPC_INFO *info);
  322. static void hdlc_mode(MGSLPC_INFO *info);
  323. static void async_mode(MGSLPC_INFO *info);
  324. static void tx_timeout(unsigned long context);
  325. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  326. #ifdef CONFIG_HDLC
  327. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  328. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  329. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  330. static int hdlcdev_init(MGSLPC_INFO *info);
  331. static void hdlcdev_exit(MGSLPC_INFO *info);
  332. #endif
  333. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  334. static BOOLEAN register_test(MGSLPC_INFO *info);
  335. static BOOLEAN irq_test(MGSLPC_INFO *info);
  336. static int adapter_test(MGSLPC_INFO *info);
  337. static int claim_resources(MGSLPC_INFO *info);
  338. static void release_resources(MGSLPC_INFO *info);
  339. static void mgslpc_add_device(MGSLPC_INFO *info);
  340. static void mgslpc_remove_device(MGSLPC_INFO *info);
  341. static int rx_get_frame(MGSLPC_INFO *info);
  342. static void rx_reset_buffers(MGSLPC_INFO *info);
  343. static int rx_alloc_buffers(MGSLPC_INFO *info);
  344. static void rx_free_buffers(MGSLPC_INFO *info);
  345. static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs);
  346. /*
  347. * Bottom half interrupt handlers
  348. */
  349. static void bh_handler(void* Context);
  350. static void bh_transmit(MGSLPC_INFO *info);
  351. static void bh_status(MGSLPC_INFO *info);
  352. /*
  353. * ioctl handlers
  354. */
  355. static int tiocmget(struct tty_struct *tty, struct file *file);
  356. static int tiocmset(struct tty_struct *tty, struct file *file,
  357. unsigned int set, unsigned int clear);
  358. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  359. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  360. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  361. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  362. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  363. static int set_txenable(MGSLPC_INFO *info, int enable);
  364. static int tx_abort(MGSLPC_INFO *info);
  365. static int set_rxenable(MGSLPC_INFO *info, int enable);
  366. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  367. static MGSLPC_INFO *mgslpc_device_list = NULL;
  368. static int mgslpc_device_count = 0;
  369. /*
  370. * Set this param to non-zero to load eax with the
  371. * .text section address and breakpoint on module load.
  372. * This is useful for use with gdb and add-symbol-file command.
  373. */
  374. static int break_on_load=0;
  375. /*
  376. * Driver major number, defaults to zero to get auto
  377. * assigned major number. May be forced as module parameter.
  378. */
  379. static int ttymajor=0;
  380. static int debug_level = 0;
  381. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  382. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  383. module_param(break_on_load, bool, 0);
  384. module_param(ttymajor, int, 0);
  385. module_param(debug_level, int, 0);
  386. module_param_array(maxframe, int, NULL, 0);
  387. module_param_array(dosyncppp, int, NULL, 0);
  388. MODULE_LICENSE("GPL");
  389. static char *driver_name = "SyncLink PC Card driver";
  390. static char *driver_version = "$Revision: 4.34 $";
  391. static struct tty_driver *serial_driver;
  392. /* number of characters left in xmit buffer before we ask for more */
  393. #define WAKEUP_CHARS 256
  394. static void mgslpc_change_params(MGSLPC_INFO *info);
  395. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  396. /* PCMCIA prototypes */
  397. static void mgslpc_config(dev_link_t *link);
  398. static void mgslpc_release(u_long arg);
  399. static int mgslpc_event(event_t event, int priority,
  400. event_callback_args_t *args);
  401. static dev_link_t *mgslpc_attach(void);
  402. static void mgslpc_detach(struct pcmcia_device *p_dev);
  403. static dev_info_t dev_info = "synclink_cs";
  404. static dev_link_t *dev_list = NULL;
  405. /*
  406. * 1st function defined in .text section. Calling this function in
  407. * init_module() followed by a breakpoint allows a remote debugger
  408. * (gdb) to get the .text address for the add-symbol-file command.
  409. * This allows remote debugging of dynamically loadable modules.
  410. */
  411. static void* mgslpc_get_text_ptr(void)
  412. {
  413. return mgslpc_get_text_ptr;
  414. }
  415. /**
  416. * line discipline callback wrappers
  417. *
  418. * The wrappers maintain line discipline references
  419. * while calling into the line discipline.
  420. *
  421. * ldisc_flush_buffer - flush line discipline receive buffers
  422. * ldisc_receive_buf - pass receive data to line discipline
  423. */
  424. static void ldisc_flush_buffer(struct tty_struct *tty)
  425. {
  426. struct tty_ldisc *ld = tty_ldisc_ref(tty);
  427. if (ld) {
  428. if (ld->flush_buffer)
  429. ld->flush_buffer(tty);
  430. tty_ldisc_deref(ld);
  431. }
  432. }
  433. static void ldisc_receive_buf(struct tty_struct *tty,
  434. const __u8 *data, char *flags, int count)
  435. {
  436. struct tty_ldisc *ld;
  437. if (!tty)
  438. return;
  439. ld = tty_ldisc_ref(tty);
  440. if (ld) {
  441. if (ld->receive_buf)
  442. ld->receive_buf(tty, data, flags, count);
  443. tty_ldisc_deref(ld);
  444. }
  445. }
  446. static dev_link_t *mgslpc_attach(void)
  447. {
  448. MGSLPC_INFO *info;
  449. dev_link_t *link;
  450. client_reg_t client_reg;
  451. int ret;
  452. if (debug_level >= DEBUG_LEVEL_INFO)
  453. printk("mgslpc_attach\n");
  454. info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  455. if (!info) {
  456. printk("Error can't allocate device instance data\n");
  457. return NULL;
  458. }
  459. memset(info, 0, sizeof(MGSLPC_INFO));
  460. info->magic = MGSLPC_MAGIC;
  461. INIT_WORK(&info->task, bh_handler, info);
  462. info->max_frame_size = 4096;
  463. info->close_delay = 5*HZ/10;
  464. info->closing_wait = 30*HZ;
  465. init_waitqueue_head(&info->open_wait);
  466. init_waitqueue_head(&info->close_wait);
  467. init_waitqueue_head(&info->status_event_wait_q);
  468. init_waitqueue_head(&info->event_wait_q);
  469. spin_lock_init(&info->lock);
  470. spin_lock_init(&info->netlock);
  471. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  472. info->idle_mode = HDLC_TXIDLE_FLAGS;
  473. info->imra_value = 0xffff;
  474. info->imrb_value = 0xffff;
  475. info->pim_value = 0xff;
  476. link = &info->link;
  477. link->priv = info;
  478. /* Initialize the dev_link_t structure */
  479. /* Interrupt setup */
  480. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  481. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  482. link->irq.Handler = NULL;
  483. link->conf.Attributes = 0;
  484. link->conf.Vcc = 50;
  485. link->conf.IntType = INT_MEMORY_AND_IO;
  486. /* Register with Card Services */
  487. link->next = dev_list;
  488. dev_list = link;
  489. client_reg.dev_info = &dev_info;
  490. client_reg.Version = 0x0210;
  491. client_reg.event_callback_args.client_data = link;
  492. ret = pcmcia_register_client(&link->handle, &client_reg);
  493. if (ret != CS_SUCCESS) {
  494. cs_error(link->handle, RegisterClient, ret);
  495. mgslpc_detach(link->handle);
  496. return NULL;
  497. }
  498. mgslpc_add_device(info);
  499. return link;
  500. }
  501. /* Card has been inserted.
  502. */
  503. #define CS_CHECK(fn, ret) \
  504. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  505. static void mgslpc_config(dev_link_t *link)
  506. {
  507. client_handle_t handle = link->handle;
  508. MGSLPC_INFO *info = link->priv;
  509. tuple_t tuple;
  510. cisparse_t parse;
  511. int last_fn, last_ret;
  512. u_char buf[64];
  513. config_info_t conf;
  514. cistpl_cftable_entry_t dflt = { 0 };
  515. cistpl_cftable_entry_t *cfg;
  516. if (debug_level >= DEBUG_LEVEL_INFO)
  517. printk("mgslpc_config(0x%p)\n", link);
  518. /* read CONFIG tuple to find its configuration registers */
  519. tuple.DesiredTuple = CISTPL_CONFIG;
  520. tuple.Attributes = 0;
  521. tuple.TupleData = buf;
  522. tuple.TupleDataMax = sizeof(buf);
  523. tuple.TupleOffset = 0;
  524. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
  525. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
  526. CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
  527. link->conf.ConfigBase = parse.config.base;
  528. link->conf.Present = parse.config.rmask[0];
  529. /* Configure card */
  530. link->state |= DEV_CONFIG;
  531. /* Look up the current Vcc */
  532. CS_CHECK(GetConfigurationInfo, pcmcia_get_configuration_info(handle, &conf));
  533. link->conf.Vcc = conf.Vcc;
  534. /* get CIS configuration entry */
  535. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  536. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
  537. cfg = &(parse.cftable_entry);
  538. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
  539. CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
  540. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  541. if (cfg->index == 0)
  542. goto cs_failed;
  543. link->conf.ConfigIndex = cfg->index;
  544. link->conf.Attributes |= CONF_ENABLE_IRQ;
  545. /* IO window settings */
  546. link->io.NumPorts1 = 0;
  547. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  548. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  549. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  550. if (!(io->flags & CISTPL_IO_8BIT))
  551. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  552. if (!(io->flags & CISTPL_IO_16BIT))
  553. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  554. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  555. link->io.BasePort1 = io->win[0].base;
  556. link->io.NumPorts1 = io->win[0].len;
  557. CS_CHECK(RequestIO, pcmcia_request_io(link->handle, &link->io));
  558. }
  559. link->conf.Attributes = CONF_ENABLE_IRQ;
  560. link->conf.Vcc = 50;
  561. link->conf.IntType = INT_MEMORY_AND_IO;
  562. link->conf.ConfigIndex = 8;
  563. link->conf.Present = PRESENT_OPTION;
  564. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  565. link->irq.Handler = mgslpc_isr;
  566. link->irq.Instance = info;
  567. CS_CHECK(RequestIRQ, pcmcia_request_irq(link->handle, &link->irq));
  568. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link->handle, &link->conf));
  569. info->io_base = link->io.BasePort1;
  570. info->irq_level = link->irq.AssignedIRQ;
  571. /* add to linked list of devices */
  572. sprintf(info->node.dev_name, "mgslpc0");
  573. info->node.major = info->node.minor = 0;
  574. link->dev = &info->node;
  575. printk(KERN_INFO "%s: index 0x%02x:",
  576. info->node.dev_name, link->conf.ConfigIndex);
  577. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  578. printk(", irq %d", link->irq.AssignedIRQ);
  579. if (link->io.NumPorts1)
  580. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  581. link->io.BasePort1+link->io.NumPorts1-1);
  582. printk("\n");
  583. link->state &= ~DEV_CONFIG_PENDING;
  584. return;
  585. cs_failed:
  586. cs_error(link->handle, last_fn, last_ret);
  587. mgslpc_release((u_long)link);
  588. }
  589. /* Card has been removed.
  590. * Unregister device and release PCMCIA configuration.
  591. * If device is open, postpone until it is closed.
  592. */
  593. static void mgslpc_release(u_long arg)
  594. {
  595. dev_link_t *link = (dev_link_t *)arg;
  596. if (debug_level >= DEBUG_LEVEL_INFO)
  597. printk("mgslpc_release(0x%p)\n", link);
  598. /* Unlink the device chain */
  599. link->dev = NULL;
  600. link->state &= ~DEV_CONFIG;
  601. pcmcia_release_configuration(link->handle);
  602. if (link->io.NumPorts1)
  603. pcmcia_release_io(link->handle, &link->io);
  604. if (link->irq.AssignedIRQ)
  605. pcmcia_release_irq(link->handle, &link->irq);
  606. }
  607. static void mgslpc_detach(struct pcmcia_device *p_dev)
  608. {
  609. dev_link_t *link = dev_to_instance(p_dev);
  610. dev_link_t **linkp;
  611. if (debug_level >= DEBUG_LEVEL_INFO)
  612. printk("mgslpc_detach(0x%p)\n", link);
  613. /* find device */
  614. for (linkp = &dev_list; *linkp; linkp = &(*linkp)->next)
  615. if (*linkp == link) break;
  616. if (*linkp == NULL)
  617. return;
  618. if (link->state & DEV_CONFIG) {
  619. ((MGSLPC_INFO *)link->priv)->stop = 1;
  620. mgslpc_release((u_long)link);
  621. }
  622. /* Unlink device structure, and free it */
  623. *linkp = link->next;
  624. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  625. }
  626. static int mgslpc_suspend(struct pcmcia_device *dev)
  627. {
  628. dev_link_t *link = dev_to_instance(dev);
  629. MGSLPC_INFO *info = link->priv;
  630. link->state |= DEV_SUSPEND;
  631. info->stop = 1;
  632. if (link->state & DEV_CONFIG)
  633. pcmcia_release_configuration(link->handle);
  634. return 0;
  635. }
  636. static int mgslpc_resume(struct pcmcia_device *dev)
  637. {
  638. dev_link_t *link = dev_to_instance(dev);
  639. MGSLPC_INFO *info = link->priv;
  640. link->state &= ~DEV_SUSPEND;
  641. if (link->state & DEV_CONFIG)
  642. pcmcia_request_configuration(link->handle, &link->conf);
  643. info->stop = 0;
  644. return 0;
  645. }
  646. static int mgslpc_event(event_t event, int priority,
  647. event_callback_args_t *args)
  648. {
  649. dev_link_t *link = args->client_data;
  650. if (debug_level >= DEBUG_LEVEL_INFO)
  651. printk("mgslpc_event(0x%06x)\n", event);
  652. switch (event) {
  653. case CS_EVENT_CARD_INSERTION:
  654. link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
  655. mgslpc_config(link);
  656. break;
  657. }
  658. return 0;
  659. }
  660. static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
  661. char *name, const char *routine)
  662. {
  663. #ifdef MGSLPC_PARANOIA_CHECK
  664. static const char *badmagic =
  665. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  666. static const char *badinfo =
  667. "Warning: null mgslpc_info for (%s) in %s\n";
  668. if (!info) {
  669. printk(badinfo, name, routine);
  670. return 1;
  671. }
  672. if (info->magic != MGSLPC_MAGIC) {
  673. printk(badmagic, name, routine);
  674. return 1;
  675. }
  676. #else
  677. if (!info)
  678. return 1;
  679. #endif
  680. return 0;
  681. }
  682. #define CMD_RXFIFO BIT7 // release current rx FIFO
  683. #define CMD_RXRESET BIT6 // receiver reset
  684. #define CMD_RXFIFO_READ BIT5
  685. #define CMD_START_TIMER BIT4
  686. #define CMD_TXFIFO BIT3 // release current tx FIFO
  687. #define CMD_TXEOM BIT1 // transmit end message
  688. #define CMD_TXRESET BIT0 // transmit reset
  689. static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  690. {
  691. int i = 0;
  692. /* wait for command completion */
  693. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  694. udelay(1);
  695. if (i++ == 1000)
  696. return FALSE;
  697. }
  698. return TRUE;
  699. }
  700. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  701. {
  702. wait_command_complete(info, channel);
  703. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  704. }
  705. static void tx_pause(struct tty_struct *tty)
  706. {
  707. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  708. unsigned long flags;
  709. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  710. return;
  711. if (debug_level >= DEBUG_LEVEL_INFO)
  712. printk("tx_pause(%s)\n",info->device_name);
  713. spin_lock_irqsave(&info->lock,flags);
  714. if (info->tx_enabled)
  715. tx_stop(info);
  716. spin_unlock_irqrestore(&info->lock,flags);
  717. }
  718. static void tx_release(struct tty_struct *tty)
  719. {
  720. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  721. unsigned long flags;
  722. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  723. return;
  724. if (debug_level >= DEBUG_LEVEL_INFO)
  725. printk("tx_release(%s)\n",info->device_name);
  726. spin_lock_irqsave(&info->lock,flags);
  727. if (!info->tx_enabled)
  728. tx_start(info);
  729. spin_unlock_irqrestore(&info->lock,flags);
  730. }
  731. /* Return next bottom half action to perform.
  732. * or 0 if nothing to do.
  733. */
  734. static int bh_action(MGSLPC_INFO *info)
  735. {
  736. unsigned long flags;
  737. int rc = 0;
  738. spin_lock_irqsave(&info->lock,flags);
  739. if (info->pending_bh & BH_RECEIVE) {
  740. info->pending_bh &= ~BH_RECEIVE;
  741. rc = BH_RECEIVE;
  742. } else if (info->pending_bh & BH_TRANSMIT) {
  743. info->pending_bh &= ~BH_TRANSMIT;
  744. rc = BH_TRANSMIT;
  745. } else if (info->pending_bh & BH_STATUS) {
  746. info->pending_bh &= ~BH_STATUS;
  747. rc = BH_STATUS;
  748. }
  749. if (!rc) {
  750. /* Mark BH routine as complete */
  751. info->bh_running = 0;
  752. info->bh_requested = 0;
  753. }
  754. spin_unlock_irqrestore(&info->lock,flags);
  755. return rc;
  756. }
  757. void bh_handler(void* Context)
  758. {
  759. MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
  760. int action;
  761. if (!info)
  762. return;
  763. if (debug_level >= DEBUG_LEVEL_BH)
  764. printk( "%s(%d):bh_handler(%s) entry\n",
  765. __FILE__,__LINE__,info->device_name);
  766. info->bh_running = 1;
  767. while((action = bh_action(info)) != 0) {
  768. /* Process work item */
  769. if ( debug_level >= DEBUG_LEVEL_BH )
  770. printk( "%s(%d):bh_handler() work item action=%d\n",
  771. __FILE__,__LINE__,action);
  772. switch (action) {
  773. case BH_RECEIVE:
  774. while(rx_get_frame(info));
  775. break;
  776. case BH_TRANSMIT:
  777. bh_transmit(info);
  778. break;
  779. case BH_STATUS:
  780. bh_status(info);
  781. break;
  782. default:
  783. /* unknown work item ID */
  784. printk("Unknown work item ID=%08X!\n", action);
  785. break;
  786. }
  787. }
  788. if (debug_level >= DEBUG_LEVEL_BH)
  789. printk( "%s(%d):bh_handler(%s) exit\n",
  790. __FILE__,__LINE__,info->device_name);
  791. }
  792. void bh_transmit(MGSLPC_INFO *info)
  793. {
  794. struct tty_struct *tty = info->tty;
  795. if (debug_level >= DEBUG_LEVEL_BH)
  796. printk("bh_transmit() entry on %s\n", info->device_name);
  797. if (tty) {
  798. tty_wakeup(tty);
  799. wake_up_interruptible(&tty->write_wait);
  800. }
  801. }
  802. void bh_status(MGSLPC_INFO *info)
  803. {
  804. info->ri_chkcount = 0;
  805. info->dsr_chkcount = 0;
  806. info->dcd_chkcount = 0;
  807. info->cts_chkcount = 0;
  808. }
  809. /* eom: non-zero = end of frame */
  810. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  811. {
  812. unsigned char data[2];
  813. unsigned char fifo_count, read_count, i;
  814. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  815. if (debug_level >= DEBUG_LEVEL_ISR)
  816. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  817. if (!info->rx_enabled)
  818. return;
  819. if (info->rx_frame_count >= info->rx_buf_count) {
  820. /* no more free buffers */
  821. issue_command(info, CHA, CMD_RXRESET);
  822. info->pending_bh |= BH_RECEIVE;
  823. info->rx_overflow = 1;
  824. info->icount.buf_overrun++;
  825. return;
  826. }
  827. if (eom) {
  828. /* end of frame, get FIFO count from RBCL register */
  829. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  830. fifo_count = 32;
  831. } else
  832. fifo_count = 32;
  833. do {
  834. if (fifo_count == 1) {
  835. read_count = 1;
  836. data[0] = read_reg(info, CHA + RXFIFO);
  837. } else {
  838. read_count = 2;
  839. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  840. }
  841. fifo_count -= read_count;
  842. if (!fifo_count && eom)
  843. buf->status = data[--read_count];
  844. for (i = 0; i < read_count; i++) {
  845. if (buf->count >= info->max_frame_size) {
  846. /* frame too large, reset receiver and reset current buffer */
  847. issue_command(info, CHA, CMD_RXRESET);
  848. buf->count = 0;
  849. return;
  850. }
  851. *(buf->data + buf->count) = data[i];
  852. buf->count++;
  853. }
  854. } while (fifo_count);
  855. if (eom) {
  856. info->pending_bh |= BH_RECEIVE;
  857. info->rx_frame_count++;
  858. info->rx_put++;
  859. if (info->rx_put >= info->rx_buf_count)
  860. info->rx_put = 0;
  861. }
  862. issue_command(info, CHA, CMD_RXFIFO);
  863. }
  864. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  865. {
  866. unsigned char data, status;
  867. int fifo_count;
  868. struct tty_struct *tty = info->tty;
  869. struct mgsl_icount *icount = &info->icount;
  870. if (tcd) {
  871. /* early termination, get FIFO count from RBCL register */
  872. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  873. /* Zero fifo count could mean 0 or 32 bytes available.
  874. * If BIT5 of STAR is set then at least 1 byte is available.
  875. */
  876. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  877. fifo_count = 32;
  878. } else
  879. fifo_count = 32;
  880. /* Flush received async data to receive data buffer. */
  881. while (fifo_count) {
  882. data = read_reg(info, CHA + RXFIFO);
  883. status = read_reg(info, CHA + RXFIFO);
  884. fifo_count -= 2;
  885. if (tty->flip.count >= TTY_FLIPBUF_SIZE)
  886. break;
  887. *tty->flip.char_buf_ptr = data;
  888. icount->rx++;
  889. *tty->flip.flag_buf_ptr = 0;
  890. // if no frameing/crc error then save data
  891. // BIT7:parity error
  892. // BIT6:framing error
  893. if (status & (BIT7 + BIT6)) {
  894. if (status & BIT7)
  895. icount->parity++;
  896. else
  897. icount->frame++;
  898. /* discard char if tty control flags say so */
  899. if (status & info->ignore_status_mask)
  900. continue;
  901. status &= info->read_status_mask;
  902. if (status & BIT7)
  903. *tty->flip.flag_buf_ptr = TTY_PARITY;
  904. else if (status & BIT6)
  905. *tty->flip.flag_buf_ptr = TTY_FRAME;
  906. }
  907. tty->flip.flag_buf_ptr++;
  908. tty->flip.char_buf_ptr++;
  909. tty->flip.count++;
  910. }
  911. issue_command(info, CHA, CMD_RXFIFO);
  912. if (debug_level >= DEBUG_LEVEL_ISR) {
  913. printk("%s(%d):rx_ready_async count=%d\n",
  914. __FILE__,__LINE__,tty->flip.count);
  915. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  916. __FILE__,__LINE__,icount->rx,icount->brk,
  917. icount->parity,icount->frame,icount->overrun);
  918. }
  919. if (tty->flip.count)
  920. tty_flip_buffer_push(tty);
  921. }
  922. static void tx_done(MGSLPC_INFO *info)
  923. {
  924. if (!info->tx_active)
  925. return;
  926. info->tx_active = 0;
  927. info->tx_aborting = 0;
  928. if (info->params.mode == MGSL_MODE_ASYNC)
  929. return;
  930. info->tx_count = info->tx_put = info->tx_get = 0;
  931. del_timer(&info->tx_timer);
  932. if (info->drop_rts_on_tx_done) {
  933. get_signals(info);
  934. if (info->serial_signals & SerialSignal_RTS) {
  935. info->serial_signals &= ~SerialSignal_RTS;
  936. set_signals(info);
  937. }
  938. info->drop_rts_on_tx_done = 0;
  939. }
  940. #ifdef CONFIG_HDLC
  941. if (info->netcount)
  942. hdlcdev_tx_done(info);
  943. else
  944. #endif
  945. {
  946. if (info->tty->stopped || info->tty->hw_stopped) {
  947. tx_stop(info);
  948. return;
  949. }
  950. info->pending_bh |= BH_TRANSMIT;
  951. }
  952. }
  953. static void tx_ready(MGSLPC_INFO *info)
  954. {
  955. unsigned char fifo_count = 32;
  956. int c;
  957. if (debug_level >= DEBUG_LEVEL_ISR)
  958. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  959. if (info->params.mode == MGSL_MODE_HDLC) {
  960. if (!info->tx_active)
  961. return;
  962. } else {
  963. if (info->tty->stopped || info->tty->hw_stopped) {
  964. tx_stop(info);
  965. return;
  966. }
  967. if (!info->tx_count)
  968. info->tx_active = 0;
  969. }
  970. if (!info->tx_count)
  971. return;
  972. while (info->tx_count && fifo_count) {
  973. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  974. if (c == 1) {
  975. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  976. } else {
  977. write_reg16(info, CHA + TXFIFO,
  978. *((unsigned short*)(info->tx_buf + info->tx_get)));
  979. }
  980. info->tx_count -= c;
  981. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  982. fifo_count -= c;
  983. }
  984. if (info->params.mode == MGSL_MODE_ASYNC) {
  985. if (info->tx_count < WAKEUP_CHARS)
  986. info->pending_bh |= BH_TRANSMIT;
  987. issue_command(info, CHA, CMD_TXFIFO);
  988. } else {
  989. if (info->tx_count)
  990. issue_command(info, CHA, CMD_TXFIFO);
  991. else
  992. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  993. }
  994. }
  995. static void cts_change(MGSLPC_INFO *info)
  996. {
  997. get_signals(info);
  998. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  999. irq_disable(info, CHB, IRQ_CTS);
  1000. info->icount.cts++;
  1001. if (info->serial_signals & SerialSignal_CTS)
  1002. info->input_signal_events.cts_up++;
  1003. else
  1004. info->input_signal_events.cts_down++;
  1005. wake_up_interruptible(&info->status_event_wait_q);
  1006. wake_up_interruptible(&info->event_wait_q);
  1007. if (info->flags & ASYNC_CTS_FLOW) {
  1008. if (info->tty->hw_stopped) {
  1009. if (info->serial_signals & SerialSignal_CTS) {
  1010. if (debug_level >= DEBUG_LEVEL_ISR)
  1011. printk("CTS tx start...");
  1012. if (info->tty)
  1013. info->tty->hw_stopped = 0;
  1014. tx_start(info);
  1015. info->pending_bh |= BH_TRANSMIT;
  1016. return;
  1017. }
  1018. } else {
  1019. if (!(info->serial_signals & SerialSignal_CTS)) {
  1020. if (debug_level >= DEBUG_LEVEL_ISR)
  1021. printk("CTS tx stop...");
  1022. if (info->tty)
  1023. info->tty->hw_stopped = 1;
  1024. tx_stop(info);
  1025. }
  1026. }
  1027. }
  1028. info->pending_bh |= BH_STATUS;
  1029. }
  1030. static void dcd_change(MGSLPC_INFO *info)
  1031. {
  1032. get_signals(info);
  1033. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1034. irq_disable(info, CHB, IRQ_DCD);
  1035. info->icount.dcd++;
  1036. if (info->serial_signals & SerialSignal_DCD) {
  1037. info->input_signal_events.dcd_up++;
  1038. }
  1039. else
  1040. info->input_signal_events.dcd_down++;
  1041. #ifdef CONFIG_HDLC
  1042. if (info->netcount)
  1043. hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, info->netdev);
  1044. #endif
  1045. wake_up_interruptible(&info->status_event_wait_q);
  1046. wake_up_interruptible(&info->event_wait_q);
  1047. if (info->flags & ASYNC_CHECK_CD) {
  1048. if (debug_level >= DEBUG_LEVEL_ISR)
  1049. printk("%s CD now %s...", info->device_name,
  1050. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  1051. if (info->serial_signals & SerialSignal_DCD)
  1052. wake_up_interruptible(&info->open_wait);
  1053. else {
  1054. if (debug_level >= DEBUG_LEVEL_ISR)
  1055. printk("doing serial hangup...");
  1056. if (info->tty)
  1057. tty_hangup(info->tty);
  1058. }
  1059. }
  1060. info->pending_bh |= BH_STATUS;
  1061. }
  1062. static void dsr_change(MGSLPC_INFO *info)
  1063. {
  1064. get_signals(info);
  1065. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1066. port_irq_disable(info, PVR_DSR);
  1067. info->icount.dsr++;
  1068. if (info->serial_signals & SerialSignal_DSR)
  1069. info->input_signal_events.dsr_up++;
  1070. else
  1071. info->input_signal_events.dsr_down++;
  1072. wake_up_interruptible(&info->status_event_wait_q);
  1073. wake_up_interruptible(&info->event_wait_q);
  1074. info->pending_bh |= BH_STATUS;
  1075. }
  1076. static void ri_change(MGSLPC_INFO *info)
  1077. {
  1078. get_signals(info);
  1079. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1080. port_irq_disable(info, PVR_RI);
  1081. info->icount.rng++;
  1082. if (info->serial_signals & SerialSignal_RI)
  1083. info->input_signal_events.ri_up++;
  1084. else
  1085. info->input_signal_events.ri_down++;
  1086. wake_up_interruptible(&info->status_event_wait_q);
  1087. wake_up_interruptible(&info->event_wait_q);
  1088. info->pending_bh |= BH_STATUS;
  1089. }
  1090. /* Interrupt service routine entry point.
  1091. *
  1092. * Arguments:
  1093. *
  1094. * irq interrupt number that caused interrupt
  1095. * dev_id device ID supplied during interrupt registration
  1096. * regs interrupted processor context
  1097. */
  1098. static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs)
  1099. {
  1100. MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
  1101. unsigned short isr;
  1102. unsigned char gis, pis;
  1103. int count=0;
  1104. if (debug_level >= DEBUG_LEVEL_ISR)
  1105. printk("mgslpc_isr(%d) entry.\n", irq);
  1106. if (!info)
  1107. return IRQ_NONE;
  1108. if (!(info->link.state & DEV_CONFIG))
  1109. return IRQ_HANDLED;
  1110. spin_lock(&info->lock);
  1111. while ((gis = read_reg(info, CHA + GIS))) {
  1112. if (debug_level >= DEBUG_LEVEL_ISR)
  1113. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1114. if ((gis & 0x70) || count > 1000) {
  1115. printk("synclink_cs:hardware failed or ejected\n");
  1116. break;
  1117. }
  1118. count++;
  1119. if (gis & (BIT1 + BIT0)) {
  1120. isr = read_reg16(info, CHB + ISR);
  1121. if (isr & IRQ_DCD)
  1122. dcd_change(info);
  1123. if (isr & IRQ_CTS)
  1124. cts_change(info);
  1125. }
  1126. if (gis & (BIT3 + BIT2))
  1127. {
  1128. isr = read_reg16(info, CHA + ISR);
  1129. if (isr & IRQ_TIMER) {
  1130. info->irq_occurred = 1;
  1131. irq_disable(info, CHA, IRQ_TIMER);
  1132. }
  1133. /* receive IRQs */
  1134. if (isr & IRQ_EXITHUNT) {
  1135. info->icount.exithunt++;
  1136. wake_up_interruptible(&info->event_wait_q);
  1137. }
  1138. if (isr & IRQ_BREAK_ON) {
  1139. info->icount.brk++;
  1140. if (info->flags & ASYNC_SAK)
  1141. do_SAK(info->tty);
  1142. }
  1143. if (isr & IRQ_RXTIME) {
  1144. issue_command(info, CHA, CMD_RXFIFO_READ);
  1145. }
  1146. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1147. if (info->params.mode == MGSL_MODE_HDLC)
  1148. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1149. else
  1150. rx_ready_async(info, isr & IRQ_RXEOM);
  1151. }
  1152. /* transmit IRQs */
  1153. if (isr & IRQ_UNDERRUN) {
  1154. if (info->tx_aborting)
  1155. info->icount.txabort++;
  1156. else
  1157. info->icount.txunder++;
  1158. tx_done(info);
  1159. }
  1160. else if (isr & IRQ_ALLSENT) {
  1161. info->icount.txok++;
  1162. tx_done(info);
  1163. }
  1164. else if (isr & IRQ_TXFIFO)
  1165. tx_ready(info);
  1166. }
  1167. if (gis & BIT7) {
  1168. pis = read_reg(info, CHA + PIS);
  1169. if (pis & BIT1)
  1170. dsr_change(info);
  1171. if (pis & BIT2)
  1172. ri_change(info);
  1173. }
  1174. }
  1175. /* Request bottom half processing if there's something
  1176. * for it to do and the bh is not already running
  1177. */
  1178. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1179. if ( debug_level >= DEBUG_LEVEL_ISR )
  1180. printk("%s(%d):%s queueing bh task.\n",
  1181. __FILE__,__LINE__,info->device_name);
  1182. schedule_work(&info->task);
  1183. info->bh_requested = 1;
  1184. }
  1185. spin_unlock(&info->lock);
  1186. if (debug_level >= DEBUG_LEVEL_ISR)
  1187. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1188. __FILE__,__LINE__,irq);
  1189. return IRQ_HANDLED;
  1190. }
  1191. /* Initialize and start device.
  1192. */
  1193. static int startup(MGSLPC_INFO * info)
  1194. {
  1195. int retval = 0;
  1196. if (debug_level >= DEBUG_LEVEL_INFO)
  1197. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1198. if (info->flags & ASYNC_INITIALIZED)
  1199. return 0;
  1200. if (!info->tx_buf) {
  1201. /* allocate a page of memory for a transmit buffer */
  1202. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1203. if (!info->tx_buf) {
  1204. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1205. __FILE__,__LINE__,info->device_name);
  1206. return -ENOMEM;
  1207. }
  1208. }
  1209. info->pending_bh = 0;
  1210. memset(&info->icount, 0, sizeof(info->icount));
  1211. init_timer(&info->tx_timer);
  1212. info->tx_timer.data = (unsigned long)info;
  1213. info->tx_timer.function = tx_timeout;
  1214. /* Allocate and claim adapter resources */
  1215. retval = claim_resources(info);
  1216. /* perform existance check and diagnostics */
  1217. if ( !retval )
  1218. retval = adapter_test(info);
  1219. if ( retval ) {
  1220. if (capable(CAP_SYS_ADMIN) && info->tty)
  1221. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1222. release_resources(info);
  1223. return retval;
  1224. }
  1225. /* program hardware for current parameters */
  1226. mgslpc_change_params(info);
  1227. if (info->tty)
  1228. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1229. info->flags |= ASYNC_INITIALIZED;
  1230. return 0;
  1231. }
  1232. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1233. */
  1234. static void shutdown(MGSLPC_INFO * info)
  1235. {
  1236. unsigned long flags;
  1237. if (!(info->flags & ASYNC_INITIALIZED))
  1238. return;
  1239. if (debug_level >= DEBUG_LEVEL_INFO)
  1240. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1241. __FILE__,__LINE__, info->device_name );
  1242. /* clear status wait queue because status changes */
  1243. /* can't happen after shutting down the hardware */
  1244. wake_up_interruptible(&info->status_event_wait_q);
  1245. wake_up_interruptible(&info->event_wait_q);
  1246. del_timer(&info->tx_timer);
  1247. if (info->tx_buf) {
  1248. free_page((unsigned long) info->tx_buf);
  1249. info->tx_buf = NULL;
  1250. }
  1251. spin_lock_irqsave(&info->lock,flags);
  1252. rx_stop(info);
  1253. tx_stop(info);
  1254. /* TODO:disable interrupts instead of reset to preserve signal states */
  1255. reset_device(info);
  1256. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1257. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1258. set_signals(info);
  1259. }
  1260. spin_unlock_irqrestore(&info->lock,flags);
  1261. release_resources(info);
  1262. if (info->tty)
  1263. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1264. info->flags &= ~ASYNC_INITIALIZED;
  1265. }
  1266. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1267. {
  1268. unsigned long flags;
  1269. spin_lock_irqsave(&info->lock,flags);
  1270. rx_stop(info);
  1271. tx_stop(info);
  1272. info->tx_count = info->tx_put = info->tx_get = 0;
  1273. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1274. hdlc_mode(info);
  1275. else
  1276. async_mode(info);
  1277. set_signals(info);
  1278. info->dcd_chkcount = 0;
  1279. info->cts_chkcount = 0;
  1280. info->ri_chkcount = 0;
  1281. info->dsr_chkcount = 0;
  1282. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1283. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1284. get_signals(info);
  1285. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1286. rx_start(info);
  1287. spin_unlock_irqrestore(&info->lock,flags);
  1288. }
  1289. /* Reconfigure adapter based on new parameters
  1290. */
  1291. static void mgslpc_change_params(MGSLPC_INFO *info)
  1292. {
  1293. unsigned cflag;
  1294. int bits_per_char;
  1295. if (!info->tty || !info->tty->termios)
  1296. return;
  1297. if (debug_level >= DEBUG_LEVEL_INFO)
  1298. printk("%s(%d):mgslpc_change_params(%s)\n",
  1299. __FILE__,__LINE__, info->device_name );
  1300. cflag = info->tty->termios->c_cflag;
  1301. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1302. /* otherwise assert DTR and RTS */
  1303. if (cflag & CBAUD)
  1304. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1305. else
  1306. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1307. /* byte size and parity */
  1308. switch (cflag & CSIZE) {
  1309. case CS5: info->params.data_bits = 5; break;
  1310. case CS6: info->params.data_bits = 6; break;
  1311. case CS7: info->params.data_bits = 7; break;
  1312. case CS8: info->params.data_bits = 8; break;
  1313. default: info->params.data_bits = 7; break;
  1314. }
  1315. if (cflag & CSTOPB)
  1316. info->params.stop_bits = 2;
  1317. else
  1318. info->params.stop_bits = 1;
  1319. info->params.parity = ASYNC_PARITY_NONE;
  1320. if (cflag & PARENB) {
  1321. if (cflag & PARODD)
  1322. info->params.parity = ASYNC_PARITY_ODD;
  1323. else
  1324. info->params.parity = ASYNC_PARITY_EVEN;
  1325. #ifdef CMSPAR
  1326. if (cflag & CMSPAR)
  1327. info->params.parity = ASYNC_PARITY_SPACE;
  1328. #endif
  1329. }
  1330. /* calculate number of jiffies to transmit a full
  1331. * FIFO (32 bytes) at specified data rate
  1332. */
  1333. bits_per_char = info->params.data_bits +
  1334. info->params.stop_bits + 1;
  1335. /* if port data rate is set to 460800 or less then
  1336. * allow tty settings to override, otherwise keep the
  1337. * current data rate.
  1338. */
  1339. if (info->params.data_rate <= 460800) {
  1340. info->params.data_rate = tty_get_baud_rate(info->tty);
  1341. }
  1342. if ( info->params.data_rate ) {
  1343. info->timeout = (32*HZ*bits_per_char) /
  1344. info->params.data_rate;
  1345. }
  1346. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1347. if (cflag & CRTSCTS)
  1348. info->flags |= ASYNC_CTS_FLOW;
  1349. else
  1350. info->flags &= ~ASYNC_CTS_FLOW;
  1351. if (cflag & CLOCAL)
  1352. info->flags &= ~ASYNC_CHECK_CD;
  1353. else
  1354. info->flags |= ASYNC_CHECK_CD;
  1355. /* process tty input control flags */
  1356. info->read_status_mask = 0;
  1357. if (I_INPCK(info->tty))
  1358. info->read_status_mask |= BIT7 | BIT6;
  1359. if (I_IGNPAR(info->tty))
  1360. info->ignore_status_mask |= BIT7 | BIT6;
  1361. mgslpc_program_hw(info);
  1362. }
  1363. /* Add a character to the transmit buffer
  1364. */
  1365. static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1366. {
  1367. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1368. unsigned long flags;
  1369. if (debug_level >= DEBUG_LEVEL_INFO) {
  1370. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1371. __FILE__,__LINE__,ch,info->device_name);
  1372. }
  1373. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1374. return;
  1375. if (!tty || !info->tx_buf)
  1376. return;
  1377. spin_lock_irqsave(&info->lock,flags);
  1378. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1379. if (info->tx_count < TXBUFSIZE - 1) {
  1380. info->tx_buf[info->tx_put++] = ch;
  1381. info->tx_put &= TXBUFSIZE-1;
  1382. info->tx_count++;
  1383. }
  1384. }
  1385. spin_unlock_irqrestore(&info->lock,flags);
  1386. }
  1387. /* Enable transmitter so remaining characters in the
  1388. * transmit buffer are sent.
  1389. */
  1390. static void mgslpc_flush_chars(struct tty_struct *tty)
  1391. {
  1392. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1393. unsigned long flags;
  1394. if (debug_level >= DEBUG_LEVEL_INFO)
  1395. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1396. __FILE__,__LINE__,info->device_name,info->tx_count);
  1397. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1398. return;
  1399. if (info->tx_count <= 0 || tty->stopped ||
  1400. tty->hw_stopped || !info->tx_buf)
  1401. return;
  1402. if (debug_level >= DEBUG_LEVEL_INFO)
  1403. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1404. __FILE__,__LINE__,info->device_name);
  1405. spin_lock_irqsave(&info->lock,flags);
  1406. if (!info->tx_active)
  1407. tx_start(info);
  1408. spin_unlock_irqrestore(&info->lock,flags);
  1409. }
  1410. /* Send a block of data
  1411. *
  1412. * Arguments:
  1413. *
  1414. * tty pointer to tty information structure
  1415. * buf pointer to buffer containing send data
  1416. * count size of send data in bytes
  1417. *
  1418. * Returns: number of characters written
  1419. */
  1420. static int mgslpc_write(struct tty_struct * tty,
  1421. const unsigned char *buf, int count)
  1422. {
  1423. int c, ret = 0;
  1424. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1425. unsigned long flags;
  1426. if (debug_level >= DEBUG_LEVEL_INFO)
  1427. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1428. __FILE__,__LINE__,info->device_name,count);
  1429. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1430. !tty || !info->tx_buf)
  1431. goto cleanup;
  1432. if (info->params.mode == MGSL_MODE_HDLC) {
  1433. if (count > TXBUFSIZE) {
  1434. ret = -EIO;
  1435. goto cleanup;
  1436. }
  1437. if (info->tx_active)
  1438. goto cleanup;
  1439. else if (info->tx_count)
  1440. goto start;
  1441. }
  1442. for (;;) {
  1443. c = min(count,
  1444. min(TXBUFSIZE - info->tx_count - 1,
  1445. TXBUFSIZE - info->tx_put));
  1446. if (c <= 0)
  1447. break;
  1448. memcpy(info->tx_buf + info->tx_put, buf, c);
  1449. spin_lock_irqsave(&info->lock,flags);
  1450. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1451. info->tx_count += c;
  1452. spin_unlock_irqrestore(&info->lock,flags);
  1453. buf += c;
  1454. count -= c;
  1455. ret += c;
  1456. }
  1457. start:
  1458. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1459. spin_lock_irqsave(&info->lock,flags);
  1460. if (!info->tx_active)
  1461. tx_start(info);
  1462. spin_unlock_irqrestore(&info->lock,flags);
  1463. }
  1464. cleanup:
  1465. if (debug_level >= DEBUG_LEVEL_INFO)
  1466. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1467. __FILE__,__LINE__,info->device_name,ret);
  1468. return ret;
  1469. }
  1470. /* Return the count of free bytes in transmit buffer
  1471. */
  1472. static int mgslpc_write_room(struct tty_struct *tty)
  1473. {
  1474. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1475. int ret;
  1476. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1477. return 0;
  1478. if (info->params.mode == MGSL_MODE_HDLC) {
  1479. /* HDLC (frame oriented) mode */
  1480. if (info->tx_active)
  1481. return 0;
  1482. else
  1483. return HDLC_MAX_FRAME_SIZE;
  1484. } else {
  1485. ret = TXBUFSIZE - info->tx_count - 1;
  1486. if (ret < 0)
  1487. ret = 0;
  1488. }
  1489. if (debug_level >= DEBUG_LEVEL_INFO)
  1490. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1491. __FILE__,__LINE__, info->device_name, ret);
  1492. return ret;
  1493. }
  1494. /* Return the count of bytes in transmit buffer
  1495. */
  1496. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1497. {
  1498. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1499. int rc;
  1500. if (debug_level >= DEBUG_LEVEL_INFO)
  1501. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1502. __FILE__,__LINE__, info->device_name );
  1503. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1504. return 0;
  1505. if (info->params.mode == MGSL_MODE_HDLC)
  1506. rc = info->tx_active ? info->max_frame_size : 0;
  1507. else
  1508. rc = info->tx_count;
  1509. if (debug_level >= DEBUG_LEVEL_INFO)
  1510. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1511. __FILE__,__LINE__, info->device_name, rc);
  1512. return rc;
  1513. }
  1514. /* Discard all data in the send buffer
  1515. */
  1516. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1517. {
  1518. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1519. unsigned long flags;
  1520. if (debug_level >= DEBUG_LEVEL_INFO)
  1521. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1522. __FILE__,__LINE__, info->device_name );
  1523. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1524. return;
  1525. spin_lock_irqsave(&info->lock,flags);
  1526. info->tx_count = info->tx_put = info->tx_get = 0;
  1527. del_timer(&info->tx_timer);
  1528. spin_unlock_irqrestore(&info->lock,flags);
  1529. wake_up_interruptible(&tty->write_wait);
  1530. tty_wakeup(tty);
  1531. }
  1532. /* Send a high-priority XON/XOFF character
  1533. */
  1534. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1535. {
  1536. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1537. unsigned long flags;
  1538. if (debug_level >= DEBUG_LEVEL_INFO)
  1539. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1540. __FILE__,__LINE__, info->device_name, ch );
  1541. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1542. return;
  1543. info->x_char = ch;
  1544. if (ch) {
  1545. spin_lock_irqsave(&info->lock,flags);
  1546. if (!info->tx_enabled)
  1547. tx_start(info);
  1548. spin_unlock_irqrestore(&info->lock,flags);
  1549. }
  1550. }
  1551. /* Signal remote device to throttle send data (our receive data)
  1552. */
  1553. static void mgslpc_throttle(struct tty_struct * tty)
  1554. {
  1555. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1556. unsigned long flags;
  1557. if (debug_level >= DEBUG_LEVEL_INFO)
  1558. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1559. __FILE__,__LINE__, info->device_name );
  1560. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1561. return;
  1562. if (I_IXOFF(tty))
  1563. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1564. if (tty->termios->c_cflag & CRTSCTS) {
  1565. spin_lock_irqsave(&info->lock,flags);
  1566. info->serial_signals &= ~SerialSignal_RTS;
  1567. set_signals(info);
  1568. spin_unlock_irqrestore(&info->lock,flags);
  1569. }
  1570. }
  1571. /* Signal remote device to stop throttling send data (our receive data)
  1572. */
  1573. static void mgslpc_unthrottle(struct tty_struct * tty)
  1574. {
  1575. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1576. unsigned long flags;
  1577. if (debug_level >= DEBUG_LEVEL_INFO)
  1578. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1579. __FILE__,__LINE__, info->device_name );
  1580. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1581. return;
  1582. if (I_IXOFF(tty)) {
  1583. if (info->x_char)
  1584. info->x_char = 0;
  1585. else
  1586. mgslpc_send_xchar(tty, START_CHAR(tty));
  1587. }
  1588. if (tty->termios->c_cflag & CRTSCTS) {
  1589. spin_lock_irqsave(&info->lock,flags);
  1590. info->serial_signals |= SerialSignal_RTS;
  1591. set_signals(info);
  1592. spin_unlock_irqrestore(&info->lock,flags);
  1593. }
  1594. }
  1595. /* get the current serial statistics
  1596. */
  1597. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1598. {
  1599. int err;
  1600. if (debug_level >= DEBUG_LEVEL_INFO)
  1601. printk("get_params(%s)\n", info->device_name);
  1602. if (!user_icount) {
  1603. memset(&info->icount, 0, sizeof(info->icount));
  1604. } else {
  1605. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1606. if (err)
  1607. return -EFAULT;
  1608. }
  1609. return 0;
  1610. }
  1611. /* get the current serial parameters
  1612. */
  1613. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1614. {
  1615. int err;
  1616. if (debug_level >= DEBUG_LEVEL_INFO)
  1617. printk("get_params(%s)\n", info->device_name);
  1618. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1619. if (err)
  1620. return -EFAULT;
  1621. return 0;
  1622. }
  1623. /* set the serial parameters
  1624. *
  1625. * Arguments:
  1626. *
  1627. * info pointer to device instance data
  1628. * new_params user buffer containing new serial params
  1629. *
  1630. * Returns: 0 if success, otherwise error code
  1631. */
  1632. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1633. {
  1634. unsigned long flags;
  1635. MGSL_PARAMS tmp_params;
  1636. int err;
  1637. if (debug_level >= DEBUG_LEVEL_INFO)
  1638. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1639. info->device_name );
  1640. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1641. if (err) {
  1642. if ( debug_level >= DEBUG_LEVEL_INFO )
  1643. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1644. __FILE__,__LINE__,info->device_name);
  1645. return -EFAULT;
  1646. }
  1647. spin_lock_irqsave(&info->lock,flags);
  1648. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1649. spin_unlock_irqrestore(&info->lock,flags);
  1650. mgslpc_change_params(info);
  1651. return 0;
  1652. }
  1653. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1654. {
  1655. int err;
  1656. if (debug_level >= DEBUG_LEVEL_INFO)
  1657. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1658. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1659. if (err)
  1660. return -EFAULT;
  1661. return 0;
  1662. }
  1663. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1664. {
  1665. unsigned long flags;
  1666. if (debug_level >= DEBUG_LEVEL_INFO)
  1667. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1668. spin_lock_irqsave(&info->lock,flags);
  1669. info->idle_mode = idle_mode;
  1670. tx_set_idle(info);
  1671. spin_unlock_irqrestore(&info->lock,flags);
  1672. return 0;
  1673. }
  1674. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1675. {
  1676. int err;
  1677. if (debug_level >= DEBUG_LEVEL_INFO)
  1678. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1679. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1680. if (err)
  1681. return -EFAULT;
  1682. return 0;
  1683. }
  1684. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1685. {
  1686. unsigned long flags;
  1687. unsigned char val;
  1688. if (debug_level >= DEBUG_LEVEL_INFO)
  1689. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1690. spin_lock_irqsave(&info->lock,flags);
  1691. info->if_mode = if_mode;
  1692. val = read_reg(info, PVR) & 0x0f;
  1693. switch (info->if_mode)
  1694. {
  1695. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1696. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1697. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1698. }
  1699. write_reg(info, PVR, val);
  1700. spin_unlock_irqrestore(&info->lock,flags);
  1701. return 0;
  1702. }
  1703. static int set_txenable(MGSLPC_INFO * info, int enable)
  1704. {
  1705. unsigned long flags;
  1706. if (debug_level >= DEBUG_LEVEL_INFO)
  1707. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1708. spin_lock_irqsave(&info->lock,flags);
  1709. if (enable) {
  1710. if (!info->tx_enabled)
  1711. tx_start(info);
  1712. } else {
  1713. if (info->tx_enabled)
  1714. tx_stop(info);
  1715. }
  1716. spin_unlock_irqrestore(&info->lock,flags);
  1717. return 0;
  1718. }
  1719. static int tx_abort(MGSLPC_INFO * info)
  1720. {
  1721. unsigned long flags;
  1722. if (debug_level >= DEBUG_LEVEL_INFO)
  1723. printk("tx_abort(%s)\n", info->device_name);
  1724. spin_lock_irqsave(&info->lock,flags);
  1725. if (info->tx_active && info->tx_count &&
  1726. info->params.mode == MGSL_MODE_HDLC) {
  1727. /* clear data count so FIFO is not filled on next IRQ.
  1728. * This results in underrun and abort transmission.
  1729. */
  1730. info->tx_count = info->tx_put = info->tx_get = 0;
  1731. info->tx_aborting = TRUE;
  1732. }
  1733. spin_unlock_irqrestore(&info->lock,flags);
  1734. return 0;
  1735. }
  1736. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1737. {
  1738. unsigned long flags;
  1739. if (debug_level >= DEBUG_LEVEL_INFO)
  1740. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1741. spin_lock_irqsave(&info->lock,flags);
  1742. if (enable) {
  1743. if (!info->rx_enabled)
  1744. rx_start(info);
  1745. } else {
  1746. if (info->rx_enabled)
  1747. rx_stop(info);
  1748. }
  1749. spin_unlock_irqrestore(&info->lock,flags);
  1750. return 0;
  1751. }
  1752. /* wait for specified event to occur
  1753. *
  1754. * Arguments: info pointer to device instance data
  1755. * mask pointer to bitmask of events to wait for
  1756. * Return Value: 0 if successful and bit mask updated with
  1757. * of events triggerred,
  1758. * otherwise error code
  1759. */
  1760. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1761. {
  1762. unsigned long flags;
  1763. int s;
  1764. int rc=0;
  1765. struct mgsl_icount cprev, cnow;
  1766. int events;
  1767. int mask;
  1768. struct _input_signal_events oldsigs, newsigs;
  1769. DECLARE_WAITQUEUE(wait, current);
  1770. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1771. if (rc)
  1772. return -EFAULT;
  1773. if (debug_level >= DEBUG_LEVEL_INFO)
  1774. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1775. spin_lock_irqsave(&info->lock,flags);
  1776. /* return immediately if state matches requested events */
  1777. get_signals(info);
  1778. s = info->serial_signals;
  1779. events = mask &
  1780. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1781. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1782. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1783. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1784. if (events) {
  1785. spin_unlock_irqrestore(&info->lock,flags);
  1786. goto exit;
  1787. }
  1788. /* save current irq counts */
  1789. cprev = info->icount;
  1790. oldsigs = info->input_signal_events;
  1791. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1792. (mask & MgslEvent_ExitHuntMode))
  1793. irq_enable(info, CHA, IRQ_EXITHUNT);
  1794. set_current_state(TASK_INTERRUPTIBLE);
  1795. add_wait_queue(&info->event_wait_q, &wait);
  1796. spin_unlock_irqrestore(&info->lock,flags);
  1797. for(;;) {
  1798. schedule();
  1799. if (signal_pending(current)) {
  1800. rc = -ERESTARTSYS;
  1801. break;
  1802. }
  1803. /* get current irq counts */
  1804. spin_lock_irqsave(&info->lock,flags);
  1805. cnow = info->icount;
  1806. newsigs = info->input_signal_events;
  1807. set_current_state(TASK_INTERRUPTIBLE);
  1808. spin_unlock_irqrestore(&info->lock,flags);
  1809. /* if no change, wait aborted for some reason */
  1810. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1811. newsigs.dsr_down == oldsigs.dsr_down &&
  1812. newsigs.dcd_up == oldsigs.dcd_up &&
  1813. newsigs.dcd_down == oldsigs.dcd_down &&
  1814. newsigs.cts_up == oldsigs.cts_up &&
  1815. newsigs.cts_down == oldsigs.cts_down &&
  1816. newsigs.ri_up == oldsigs.ri_up &&
  1817. newsigs.ri_down == oldsigs.ri_down &&
  1818. cnow.exithunt == cprev.exithunt &&
  1819. cnow.rxidle == cprev.rxidle) {
  1820. rc = -EIO;
  1821. break;
  1822. }
  1823. events = mask &
  1824. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1825. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1826. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1827. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1828. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1829. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1830. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1831. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1832. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1833. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1834. if (events)
  1835. break;
  1836. cprev = cnow;
  1837. oldsigs = newsigs;
  1838. }
  1839. remove_wait_queue(&info->event_wait_q, &wait);
  1840. set_current_state(TASK_RUNNING);
  1841. if (mask & MgslEvent_ExitHuntMode) {
  1842. spin_lock_irqsave(&info->lock,flags);
  1843. if (!waitqueue_active(&info->event_wait_q))
  1844. irq_disable(info, CHA, IRQ_EXITHUNT);
  1845. spin_unlock_irqrestore(&info->lock,flags);
  1846. }
  1847. exit:
  1848. if (rc == 0)
  1849. PUT_USER(rc, events, mask_ptr);
  1850. return rc;
  1851. }
  1852. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1853. {
  1854. unsigned long flags;
  1855. int rc;
  1856. struct mgsl_icount cprev, cnow;
  1857. DECLARE_WAITQUEUE(wait, current);
  1858. /* save current irq counts */
  1859. spin_lock_irqsave(&info->lock,flags);
  1860. cprev = info->icount;
  1861. add_wait_queue(&info->status_event_wait_q, &wait);
  1862. set_current_state(TASK_INTERRUPTIBLE);
  1863. spin_unlock_irqrestore(&info->lock,flags);
  1864. for(;;) {
  1865. schedule();
  1866. if (signal_pending(current)) {
  1867. rc = -ERESTARTSYS;
  1868. break;
  1869. }
  1870. /* get new irq counts */
  1871. spin_lock_irqsave(&info->lock,flags);
  1872. cnow = info->icount;
  1873. set_current_state(TASK_INTERRUPTIBLE);
  1874. spin_unlock_irqrestore(&info->lock,flags);
  1875. /* if no change, wait aborted for some reason */
  1876. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1877. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1878. rc = -EIO;
  1879. break;
  1880. }
  1881. /* check for change in caller specified modem input */
  1882. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1883. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1884. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1885. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1886. rc = 0;
  1887. break;
  1888. }
  1889. cprev = cnow;
  1890. }
  1891. remove_wait_queue(&info->status_event_wait_q, &wait);
  1892. set_current_state(TASK_RUNNING);
  1893. return rc;
  1894. }
  1895. /* return the state of the serial control and status signals
  1896. */
  1897. static int tiocmget(struct tty_struct *tty, struct file *file)
  1898. {
  1899. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1900. unsigned int result;
  1901. unsigned long flags;
  1902. spin_lock_irqsave(&info->lock,flags);
  1903. get_signals(info);
  1904. spin_unlock_irqrestore(&info->lock,flags);
  1905. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1906. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1907. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1908. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1909. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1910. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1911. if (debug_level >= DEBUG_LEVEL_INFO)
  1912. printk("%s(%d):%s tiocmget() value=%08X\n",
  1913. __FILE__,__LINE__, info->device_name, result );
  1914. return result;
  1915. }
  1916. /* set modem control signals (DTR/RTS)
  1917. */
  1918. static int tiocmset(struct tty_struct *tty, struct file *file,
  1919. unsigned int set, unsigned int clear)
  1920. {
  1921. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1922. unsigned long flags;
  1923. if (debug_level >= DEBUG_LEVEL_INFO)
  1924. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1925. __FILE__,__LINE__,info->device_name, set, clear);
  1926. if (set & TIOCM_RTS)
  1927. info->serial_signals |= SerialSignal_RTS;
  1928. if (set & TIOCM_DTR)
  1929. info->serial_signals |= SerialSignal_DTR;
  1930. if (clear & TIOCM_RTS)
  1931. info->serial_signals &= ~SerialSignal_RTS;
  1932. if (clear & TIOCM_DTR)
  1933. info->serial_signals &= ~SerialSignal_DTR;
  1934. spin_lock_irqsave(&info->lock,flags);
  1935. set_signals(info);
  1936. spin_unlock_irqrestore(&info->lock,flags);
  1937. return 0;
  1938. }
  1939. /* Set or clear transmit break condition
  1940. *
  1941. * Arguments: tty pointer to tty instance data
  1942. * break_state -1=set break condition, 0=clear
  1943. */
  1944. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1945. {
  1946. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1947. unsigned long flags;
  1948. if (debug_level >= DEBUG_LEVEL_INFO)
  1949. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1950. __FILE__,__LINE__, info->device_name, break_state);
  1951. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1952. return;
  1953. spin_lock_irqsave(&info->lock,flags);
  1954. if (break_state == -1)
  1955. set_reg_bits(info, CHA+DAFO, BIT6);
  1956. else
  1957. clear_reg_bits(info, CHA+DAFO, BIT6);
  1958. spin_unlock_irqrestore(&info->lock,flags);
  1959. }
  1960. /* Service an IOCTL request
  1961. *
  1962. * Arguments:
  1963. *
  1964. * tty pointer to tty instance data
  1965. * file pointer to associated file object for device
  1966. * cmd IOCTL command code
  1967. * arg command argument/context
  1968. *
  1969. * Return Value: 0 if success, otherwise error code
  1970. */
  1971. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1972. unsigned int cmd, unsigned long arg)
  1973. {
  1974. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1975. if (debug_level >= DEBUG_LEVEL_INFO)
  1976. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1977. info->device_name, cmd );
  1978. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1979. return -ENODEV;
  1980. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1981. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1982. if (tty->flags & (1 << TTY_IO_ERROR))
  1983. return -EIO;
  1984. }
  1985. return ioctl_common(info, cmd, arg);
  1986. }
  1987. int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1988. {
  1989. int error;
  1990. struct mgsl_icount cnow; /* kernel counter temps */
  1991. struct serial_icounter_struct __user *p_cuser; /* user space */
  1992. void __user *argp = (void __user *)arg;
  1993. unsigned long flags;
  1994. switch (cmd) {
  1995. case MGSL_IOCGPARAMS:
  1996. return get_params(info, argp);
  1997. case MGSL_IOCSPARAMS:
  1998. return set_params(info, argp);
  1999. case MGSL_IOCGTXIDLE:
  2000. return get_txidle(info, argp);
  2001. case MGSL_IOCSTXIDLE:
  2002. return set_txidle(info, (int)arg);
  2003. case MGSL_IOCGIF:
  2004. return get_interface(info, argp);
  2005. case MGSL_IOCSIF:
  2006. return set_interface(info,(int)arg);
  2007. case MGSL_IOCTXENABLE:
  2008. return set_txenable(info,(int)arg);
  2009. case MGSL_IOCRXENABLE:
  2010. return set_rxenable(info,(int)arg);
  2011. case MGSL_IOCTXABORT:
  2012. return tx_abort(info);
  2013. case MGSL_IOCGSTATS:
  2014. return get_stats(info, argp);
  2015. case MGSL_IOCWAITEVENT:
  2016. return wait_events(info, argp);
  2017. case TIOCMIWAIT:
  2018. return modem_input_wait(info,(int)arg);
  2019. case TIOCGICOUNT:
  2020. spin_lock_irqsave(&info->lock,flags);
  2021. cnow = info->icount;
  2022. spin_unlock_irqrestore(&info->lock,flags);
  2023. p_cuser = argp;
  2024. PUT_USER(error,cnow.cts, &p_cuser->cts);
  2025. if (error) return error;
  2026. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  2027. if (error) return error;
  2028. PUT_USER(error,cnow.rng, &p_cuser->rng);
  2029. if (error) return error;
  2030. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  2031. if (error) return error;
  2032. PUT_USER(error,cnow.rx, &p_cuser->rx);
  2033. if (error) return error;
  2034. PUT_USER(error,cnow.tx, &p_cuser->tx);
  2035. if (error) return error;
  2036. PUT_USER(error,cnow.frame, &p_cuser->frame);
  2037. if (error) return error;
  2038. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  2039. if (error) return error;
  2040. PUT_USER(error,cnow.parity, &p_cuser->parity);
  2041. if (error) return error;
  2042. PUT_USER(error,cnow.brk, &p_cuser->brk);
  2043. if (error) return error;
  2044. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  2045. if (error) return error;
  2046. return 0;
  2047. default:
  2048. return -ENOIOCTLCMD;
  2049. }
  2050. return 0;
  2051. }
  2052. /* Set new termios settings
  2053. *
  2054. * Arguments:
  2055. *
  2056. * tty pointer to tty structure
  2057. * termios pointer to buffer to hold returned old termios
  2058. */
  2059. static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
  2060. {
  2061. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  2062. unsigned long flags;
  2063. if (debug_level >= DEBUG_LEVEL_INFO)
  2064. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  2065. tty->driver->name );
  2066. /* just return if nothing has changed */
  2067. if ((tty->termios->c_cflag == old_termios->c_cflag)
  2068. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  2069. == RELEVANT_IFLAG(old_termios->c_iflag)))
  2070. return;
  2071. mgslpc_change_params(info);
  2072. /* Handle transition to B0 status */
  2073. if (old_termios->c_cflag & CBAUD &&
  2074. !(tty->termios->c_cflag & CBAUD)) {
  2075. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  2076. spin_lock_irqsave(&info->lock,flags);
  2077. set_signals(info);
  2078. spin_unlock_irqrestore(&info->lock,flags);
  2079. }
  2080. /* Handle transition away from B0 status */
  2081. if (!(old_termios->c_cflag & CBAUD) &&
  2082. tty->termios->c_cflag & CBAUD) {
  2083. info->serial_signals |= SerialSignal_DTR;
  2084. if (!(tty->termios->c_cflag & CRTSCTS) ||
  2085. !test_bit(TTY_THROTTLED, &tty->flags)) {
  2086. info->serial_signals |= SerialSignal_RTS;
  2087. }
  2088. spin_lock_irqsave(&info->lock,flags);
  2089. set_signals(info);
  2090. spin_unlock_irqrestore(&info->lock,flags);
  2091. }
  2092. /* Handle turning off CRTSCTS */
  2093. if (old_termios->c_cflag & CRTSCTS &&
  2094. !(tty->termios->c_cflag & CRTSCTS)) {
  2095. tty->hw_stopped = 0;
  2096. tx_release(tty);
  2097. }
  2098. }
  2099. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2100. {
  2101. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2102. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2103. return;
  2104. if (debug_level >= DEBUG_LEVEL_INFO)
  2105. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2106. __FILE__,__LINE__, info->device_name, info->count);
  2107. if (!info->count)
  2108. return;
  2109. if (tty_hung_up_p(filp))
  2110. goto cleanup;
  2111. if ((tty->count == 1) && (info->count != 1)) {
  2112. /*
  2113. * tty->count is 1 and the tty structure will be freed.
  2114. * info->count should be one in this case.
  2115. * if it's not, correct it so that the port is shutdown.
  2116. */
  2117. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2118. "info->count is %d\n", info->count);
  2119. info->count = 1;
  2120. }
  2121. info->count--;
  2122. /* if at least one open remaining, leave hardware active */
  2123. if (info->count)
  2124. goto cleanup;
  2125. info->flags |= ASYNC_CLOSING;
  2126. /* set tty->closing to notify line discipline to
  2127. * only process XON/XOFF characters. Only the N_TTY
  2128. * discipline appears to use this (ppp does not).
  2129. */
  2130. tty->closing = 1;
  2131. /* wait for transmit data to clear all layers */
  2132. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2133. if (debug_level >= DEBUG_LEVEL_INFO)
  2134. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2135. __FILE__,__LINE__, info->device_name );
  2136. tty_wait_until_sent(tty, info->closing_wait);
  2137. }
  2138. if (info->flags & ASYNC_INITIALIZED)
  2139. mgslpc_wait_until_sent(tty, info->timeout);
  2140. if (tty->driver->flush_buffer)
  2141. tty->driver->flush_buffer(tty);
  2142. ldisc_flush_buffer(tty);
  2143. shutdown(info);
  2144. tty->closing = 0;
  2145. info->tty = NULL;
  2146. if (info->blocked_open) {
  2147. if (info->close_delay) {
  2148. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2149. }
  2150. wake_up_interruptible(&info->open_wait);
  2151. }
  2152. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2153. wake_up_interruptible(&info->close_wait);
  2154. cleanup:
  2155. if (debug_level >= DEBUG_LEVEL_INFO)
  2156. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2157. tty->driver->name, info->count);
  2158. }
  2159. /* Wait until the transmitter is empty.
  2160. */
  2161. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2162. {
  2163. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2164. unsigned long orig_jiffies, char_time;
  2165. if (!info )
  2166. return;
  2167. if (debug_level >= DEBUG_LEVEL_INFO)
  2168. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2169. __FILE__,__LINE__, info->device_name );
  2170. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2171. return;
  2172. if (!(info->flags & ASYNC_INITIALIZED))
  2173. goto exit;
  2174. orig_jiffies = jiffies;
  2175. /* Set check interval to 1/5 of estimated time to
  2176. * send a character, and make it at least 1. The check
  2177. * interval should also be less than the timeout.
  2178. * Note: use tight timings here to satisfy the NIST-PCTS.
  2179. */
  2180. if ( info->params.data_rate ) {
  2181. char_time = info->timeout/(32 * 5);
  2182. if (!char_time)
  2183. char_time++;
  2184. } else
  2185. char_time = 1;
  2186. if (timeout)
  2187. char_time = min_t(unsigned long, char_time, timeout);
  2188. if (info->params.mode == MGSL_MODE_HDLC) {
  2189. while (info->tx_active) {
  2190. msleep_interruptible(jiffies_to_msecs(char_time));
  2191. if (signal_pending(current))
  2192. break;
  2193. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2194. break;
  2195. }
  2196. } else {
  2197. while ((info->tx_count || info->tx_active) &&
  2198. info->tx_enabled) {
  2199. msleep_interruptible(jiffies_to_msecs(char_time));
  2200. if (signal_pending(current))
  2201. break;
  2202. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2203. break;
  2204. }
  2205. }
  2206. exit:
  2207. if (debug_level >= DEBUG_LEVEL_INFO)
  2208. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2209. __FILE__,__LINE__, info->device_name );
  2210. }
  2211. /* Called by tty_hangup() when a hangup is signaled.
  2212. * This is the same as closing all open files for the port.
  2213. */
  2214. static void mgslpc_hangup(struct tty_struct *tty)
  2215. {
  2216. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2217. if (debug_level >= DEBUG_LEVEL_INFO)
  2218. printk("%s(%d):mgslpc_hangup(%s)\n",
  2219. __FILE__,__LINE__, info->device_name );
  2220. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2221. return;
  2222. mgslpc_flush_buffer(tty);
  2223. shutdown(info);
  2224. info->count = 0;
  2225. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2226. info->tty = NULL;
  2227. wake_up_interruptible(&info->open_wait);
  2228. }
  2229. /* Block the current process until the specified port
  2230. * is ready to be opened.
  2231. */
  2232. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2233. MGSLPC_INFO *info)
  2234. {
  2235. DECLARE_WAITQUEUE(wait, current);
  2236. int retval;
  2237. int do_clocal = 0, extra_count = 0;
  2238. unsigned long flags;
  2239. if (debug_level >= DEBUG_LEVEL_INFO)
  2240. printk("%s(%d):block_til_ready on %s\n",
  2241. __FILE__,__LINE__, tty->driver->name );
  2242. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2243. /* nonblock mode is set or port is not enabled */
  2244. /* just verify that callout device is not active */
  2245. info->flags |= ASYNC_NORMAL_ACTIVE;
  2246. return 0;
  2247. }
  2248. if (tty->termios->c_cflag & CLOCAL)
  2249. do_clocal = 1;
  2250. /* Wait for carrier detect and the line to become
  2251. * free (i.e., not in use by the callout). While we are in
  2252. * this loop, info->count is dropped by one, so that
  2253. * mgslpc_close() knows when to free things. We restore it upon
  2254. * exit, either normal or abnormal.
  2255. */
  2256. retval = 0;
  2257. add_wait_queue(&info->open_wait, &wait);
  2258. if (debug_level >= DEBUG_LEVEL_INFO)
  2259. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2260. __FILE__,__LINE__, tty->driver->name, info->count );
  2261. spin_lock_irqsave(&info->lock, flags);
  2262. if (!tty_hung_up_p(filp)) {
  2263. extra_count = 1;
  2264. info->count--;
  2265. }
  2266. spin_unlock_irqrestore(&info->lock, flags);
  2267. info->blocked_open++;
  2268. while (1) {
  2269. if ((tty->termios->c_cflag & CBAUD)) {
  2270. spin_lock_irqsave(&info->lock,flags);
  2271. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2272. set_signals(info);
  2273. spin_unlock_irqrestore(&info->lock,flags);
  2274. }
  2275. set_current_state(TASK_INTERRUPTIBLE);
  2276. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2277. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2278. -EAGAIN : -ERESTARTSYS;
  2279. break;
  2280. }
  2281. spin_lock_irqsave(&info->lock,flags);
  2282. get_signals(info);
  2283. spin_unlock_irqrestore(&info->lock,flags);
  2284. if (!(info->flags & ASYNC_CLOSING) &&
  2285. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2286. break;
  2287. }
  2288. if (signal_pending(current)) {
  2289. retval = -ERESTARTSYS;
  2290. break;
  2291. }
  2292. if (debug_level >= DEBUG_LEVEL_INFO)
  2293. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2294. __FILE__,__LINE__, tty->driver->name, info->count );
  2295. schedule();
  2296. }
  2297. set_current_state(TASK_RUNNING);
  2298. remove_wait_queue(&info->open_wait, &wait);
  2299. if (extra_count)
  2300. info->count++;
  2301. info->blocked_open--;
  2302. if (debug_level >= DEBUG_LEVEL_INFO)
  2303. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2304. __FILE__,__LINE__, tty->driver->name, info->count );
  2305. if (!retval)
  2306. info->flags |= ASYNC_NORMAL_ACTIVE;
  2307. return retval;
  2308. }
  2309. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2310. {
  2311. MGSLPC_INFO *info;
  2312. int retval, line;
  2313. unsigned long flags;
  2314. /* verify range of specified line number */
  2315. line = tty->index;
  2316. if ((line < 0) || (line >= mgslpc_device_count)) {
  2317. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2318. __FILE__,__LINE__,line);
  2319. return -ENODEV;
  2320. }
  2321. /* find the info structure for the specified line */
  2322. info = mgslpc_device_list;
  2323. while(info && info->line != line)
  2324. info = info->next_device;
  2325. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2326. return -ENODEV;
  2327. tty->driver_data = info;
  2328. info->tty = tty;
  2329. if (debug_level >= DEBUG_LEVEL_INFO)
  2330. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2331. __FILE__,__LINE__,tty->driver->name, info->count);
  2332. /* If port is closing, signal caller to try again */
  2333. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2334. if (info->flags & ASYNC_CLOSING)
  2335. interruptible_sleep_on(&info->close_wait);
  2336. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2337. -EAGAIN : -ERESTARTSYS);
  2338. goto cleanup;
  2339. }
  2340. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2341. spin_lock_irqsave(&info->netlock, flags);
  2342. if (info->netcount) {
  2343. retval = -EBUSY;
  2344. spin_unlock_irqrestore(&info->netlock, flags);
  2345. goto cleanup;
  2346. }
  2347. info->count++;
  2348. spin_unlock_irqrestore(&info->netlock, flags);
  2349. if (info->count == 1) {
  2350. /* 1st open on this device, init hardware */
  2351. retval = startup(info);
  2352. if (retval < 0)
  2353. goto cleanup;
  2354. }
  2355. retval = block_til_ready(tty, filp, info);
  2356. if (retval) {
  2357. if (debug_level >= DEBUG_LEVEL_INFO)
  2358. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2359. __FILE__,__LINE__, info->device_name, retval);
  2360. goto cleanup;
  2361. }
  2362. if (debug_level >= DEBUG_LEVEL_INFO)
  2363. printk("%s(%d):mgslpc_open(%s) success\n",
  2364. __FILE__,__LINE__, info->device_name);
  2365. retval = 0;
  2366. cleanup:
  2367. if (retval) {
  2368. if (tty->count == 1)
  2369. info->tty = NULL; /* tty layer will release tty struct */
  2370. if(info->count)
  2371. info->count--;
  2372. }
  2373. return retval;
  2374. }
  2375. /*
  2376. * /proc fs routines....
  2377. */
  2378. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2379. {
  2380. char stat_buf[30];
  2381. int ret;
  2382. unsigned long flags;
  2383. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2384. info->device_name, info->io_base, info->irq_level);
  2385. /* output current serial signal states */
  2386. spin_lock_irqsave(&info->lock,flags);
  2387. get_signals(info);
  2388. spin_unlock_irqrestore(&info->lock,flags);
  2389. stat_buf[0] = 0;
  2390. stat_buf[1] = 0;
  2391. if (info->serial_signals & SerialSignal_RTS)
  2392. strcat(stat_buf, "|RTS");
  2393. if (info->serial_signals & SerialSignal_CTS)
  2394. strcat(stat_buf, "|CTS");
  2395. if (info->serial_signals & SerialSignal_DTR)
  2396. strcat(stat_buf, "|DTR");
  2397. if (info->serial_signals & SerialSignal_DSR)
  2398. strcat(stat_buf, "|DSR");
  2399. if (info->serial_signals & SerialSignal_DCD)
  2400. strcat(stat_buf, "|CD");
  2401. if (info->serial_signals & SerialSignal_RI)
  2402. strcat(stat_buf, "|RI");
  2403. if (info->params.mode == MGSL_MODE_HDLC) {
  2404. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2405. info->icount.txok, info->icount.rxok);
  2406. if (info->icount.txunder)
  2407. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2408. if (info->icount.txabort)
  2409. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2410. if (info->icount.rxshort)
  2411. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2412. if (info->icount.rxlong)
  2413. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2414. if (info->icount.rxover)
  2415. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2416. if (info->icount.rxcrc)
  2417. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2418. } else {
  2419. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2420. info->icount.tx, info->icount.rx);
  2421. if (info->icount.frame)
  2422. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2423. if (info->icount.parity)
  2424. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2425. if (info->icount.brk)
  2426. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2427. if (info->icount.overrun)
  2428. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2429. }
  2430. /* Append serial signal status to end */
  2431. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2432. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2433. info->tx_active,info->bh_requested,info->bh_running,
  2434. info->pending_bh);
  2435. return ret;
  2436. }
  2437. /* Called to print information about devices
  2438. */
  2439. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2440. int *eof, void *data)
  2441. {
  2442. int len = 0, l;
  2443. off_t begin = 0;
  2444. MGSLPC_INFO *info;
  2445. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2446. info = mgslpc_device_list;
  2447. while( info ) {
  2448. l = line_info(page + len, info);
  2449. len += l;
  2450. if (len+begin > off+count)
  2451. goto done;
  2452. if (len+begin < off) {
  2453. begin += len;
  2454. len = 0;
  2455. }
  2456. info = info->next_device;
  2457. }
  2458. *eof = 1;
  2459. done:
  2460. if (off >= len+begin)
  2461. return 0;
  2462. *start = page + (off-begin);
  2463. return ((count < begin+len-off) ? count : begin+len-off);
  2464. }
  2465. int rx_alloc_buffers(MGSLPC_INFO *info)
  2466. {
  2467. /* each buffer has header and data */
  2468. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2469. /* calculate total allocation size for 8 buffers */
  2470. info->rx_buf_total_size = info->rx_buf_size * 8;
  2471. /* limit total allocated memory */
  2472. if (info->rx_buf_total_size > 0x10000)
  2473. info->rx_buf_total_size = 0x10000;
  2474. /* calculate number of buffers */
  2475. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2476. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2477. if (info->rx_buf == NULL)
  2478. return -ENOMEM;
  2479. rx_reset_buffers(info);
  2480. return 0;
  2481. }
  2482. void rx_free_buffers(MGSLPC_INFO *info)
  2483. {
  2484. kfree(info->rx_buf);
  2485. info->rx_buf = NULL;
  2486. }
  2487. int claim_resources(MGSLPC_INFO *info)
  2488. {
  2489. if (rx_alloc_buffers(info) < 0 ) {
  2490. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2491. release_resources(info);
  2492. return -ENODEV;
  2493. }
  2494. return 0;
  2495. }
  2496. void release_resources(MGSLPC_INFO *info)
  2497. {
  2498. if (debug_level >= DEBUG_LEVEL_INFO)
  2499. printk("release_resources(%s)\n", info->device_name);
  2500. rx_free_buffers(info);
  2501. }
  2502. /* Add the specified device instance data structure to the
  2503. * global linked list of devices and increment the device count.
  2504. *
  2505. * Arguments: info pointer to device instance data
  2506. */
  2507. void mgslpc_add_device(MGSLPC_INFO *info)
  2508. {
  2509. info->next_device = NULL;
  2510. info->line = mgslpc_device_count;
  2511. sprintf(info->device_name,"ttySLP%d",info->line);
  2512. if (info->line < MAX_DEVICE_COUNT) {
  2513. if (maxframe[info->line])
  2514. info->max_frame_size = maxframe[info->line];
  2515. info->dosyncppp = dosyncppp[info->line];
  2516. }
  2517. mgslpc_device_count++;
  2518. if (!mgslpc_device_list)
  2519. mgslpc_device_list = info;
  2520. else {
  2521. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2522. while( current_dev->next_device )
  2523. current_dev = current_dev->next_device;
  2524. current_dev->next_device = info;
  2525. }
  2526. if (info->max_frame_size < 4096)
  2527. info->max_frame_size = 4096;
  2528. else if (info->max_frame_size > 65535)
  2529. info->max_frame_size = 65535;
  2530. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2531. info->device_name, info->io_base, info->irq_level);
  2532. #ifdef CONFIG_HDLC
  2533. hdlcdev_init(info);
  2534. #endif
  2535. }
  2536. void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2537. {
  2538. MGSLPC_INFO *info = mgslpc_device_list;
  2539. MGSLPC_INFO *last = NULL;
  2540. while(info) {
  2541. if (info == remove_info) {
  2542. if (last)
  2543. last->next_device = info->next_device;
  2544. else
  2545. mgslpc_device_list = info->next_device;
  2546. #ifdef CONFIG_HDLC
  2547. hdlcdev_exit(info);
  2548. #endif
  2549. release_resources(info);
  2550. kfree(info);
  2551. mgslpc_device_count--;
  2552. return;
  2553. }
  2554. last = info;
  2555. info = info->next_device;
  2556. }
  2557. }
  2558. static struct pcmcia_device_id mgslpc_ids[] = {
  2559. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2560. PCMCIA_DEVICE_NULL
  2561. };
  2562. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2563. static struct pcmcia_driver mgslpc_driver = {
  2564. .owner = THIS_MODULE,
  2565. .drv = {
  2566. .name = "synclink_cs",
  2567. },
  2568. .attach = mgslpc_attach,
  2569. .event = mgslpc_event,
  2570. .remove = mgslpc_detach,
  2571. .id_table = mgslpc_ids,
  2572. .suspend = mgslpc_suspend,
  2573. .resume = mgslpc_resume,
  2574. };
  2575. static struct tty_operations mgslpc_ops = {
  2576. .open = mgslpc_open,
  2577. .close = mgslpc_close,
  2578. .write = mgslpc_write,
  2579. .put_char = mgslpc_put_char,
  2580. .flush_chars = mgslpc_flush_chars,
  2581. .write_room = mgslpc_write_room,
  2582. .chars_in_buffer = mgslpc_chars_in_buffer,
  2583. .flush_buffer = mgslpc_flush_buffer,
  2584. .ioctl = mgslpc_ioctl,
  2585. .throttle = mgslpc_throttle,
  2586. .unthrottle = mgslpc_unthrottle,
  2587. .send_xchar = mgslpc_send_xchar,
  2588. .break_ctl = mgslpc_break,
  2589. .wait_until_sent = mgslpc_wait_until_sent,
  2590. .read_proc = mgslpc_read_proc,
  2591. .set_termios = mgslpc_set_termios,
  2592. .stop = tx_pause,
  2593. .start = tx_release,
  2594. .hangup = mgslpc_hangup,
  2595. .tiocmget = tiocmget,
  2596. .tiocmset = tiocmset,
  2597. };
  2598. static void synclink_cs_cleanup(void)
  2599. {
  2600. int rc;
  2601. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2602. while(mgslpc_device_list)
  2603. mgslpc_remove_device(mgslpc_device_list);
  2604. if (serial_driver) {
  2605. if ((rc = tty_unregister_driver(serial_driver)))
  2606. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2607. __FILE__,__LINE__,rc);
  2608. put_tty_driver(serial_driver);
  2609. }
  2610. pcmcia_unregister_driver(&mgslpc_driver);
  2611. BUG_ON(dev_list != NULL);
  2612. }
  2613. static int __init synclink_cs_init(void)
  2614. {
  2615. int rc;
  2616. if (break_on_load) {
  2617. mgslpc_get_text_ptr();
  2618. BREAKPOINT();
  2619. }
  2620. printk("%s %s\n", driver_name, driver_version);
  2621. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2622. return rc;
  2623. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2624. if (!serial_driver) {
  2625. rc = -ENOMEM;
  2626. goto error;
  2627. }
  2628. /* Initialize the tty_driver structure */
  2629. serial_driver->owner = THIS_MODULE;
  2630. serial_driver->driver_name = "synclink_cs";
  2631. serial_driver->name = "ttySLP";
  2632. serial_driver->major = ttymajor;
  2633. serial_driver->minor_start = 64;
  2634. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2635. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2636. serial_driver->init_termios = tty_std_termios;
  2637. serial_driver->init_termios.c_cflag =
  2638. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2639. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2640. tty_set_operations(serial_driver, &mgslpc_ops);
  2641. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2642. printk("%s(%d):Couldn't register serial driver\n",
  2643. __FILE__,__LINE__);
  2644. put_tty_driver(serial_driver);
  2645. serial_driver = NULL;
  2646. goto error;
  2647. }
  2648. printk("%s %s, tty major#%d\n",
  2649. driver_name, driver_version,
  2650. serial_driver->major);
  2651. return 0;
  2652. error:
  2653. synclink_cs_cleanup();
  2654. return rc;
  2655. }
  2656. static void __exit synclink_cs_exit(void)
  2657. {
  2658. synclink_cs_cleanup();
  2659. }
  2660. module_init(synclink_cs_init);
  2661. module_exit(synclink_cs_exit);
  2662. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2663. {
  2664. unsigned int M, N;
  2665. unsigned char val;
  2666. /* note:standard BRG mode is broken in V3.2 chip
  2667. * so enhanced mode is always used
  2668. */
  2669. if (rate) {
  2670. N = 3686400 / rate;
  2671. if (!N)
  2672. N = 1;
  2673. N >>= 1;
  2674. for (M = 1; N > 64 && M < 16; M++)
  2675. N >>= 1;
  2676. N--;
  2677. /* BGR[5..0] = N
  2678. * BGR[9..6] = M
  2679. * BGR[7..0] contained in BGR register
  2680. * BGR[9..8] contained in CCR2[7..6]
  2681. * divisor = (N+1)*2^M
  2682. *
  2683. * Note: M *must* not be zero (causes asymetric duty cycle)
  2684. */
  2685. write_reg(info, (unsigned char) (channel + BGR),
  2686. (unsigned char) ((M << 6) + N));
  2687. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2688. val |= ((M << 4) & 0xc0);
  2689. write_reg(info, (unsigned char) (channel + CCR2), val);
  2690. }
  2691. }
  2692. /* Enabled the AUX clock output at the specified frequency.
  2693. */
  2694. static void enable_auxclk(MGSLPC_INFO *info)
  2695. {
  2696. unsigned char val;
  2697. /* MODE
  2698. *
  2699. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2700. * 05 ADM Address Mode, 0 = no addr recognition
  2701. * 04 TMD Timer Mode, 0 = external
  2702. * 03 RAC Receiver Active, 0 = inactive
  2703. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2704. * 01 TRS Timer Resolution, 1=512
  2705. * 00 TLP Test Loop, 0 = no loop
  2706. *
  2707. * 1000 0010
  2708. */
  2709. val = 0x82;
  2710. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2711. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2712. val |= BIT2;
  2713. write_reg(info, CHB + MODE, val);
  2714. /* CCR0
  2715. *
  2716. * 07 PU Power Up, 1=active, 0=power down
  2717. * 06 MCE Master Clock Enable, 1=enabled
  2718. * 05 Reserved, 0
  2719. * 04..02 SC[2..0] Encoding
  2720. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2721. *
  2722. * 11000000
  2723. */
  2724. write_reg(info, CHB + CCR0, 0xc0);
  2725. /* CCR1
  2726. *
  2727. * 07 SFLG Shared Flag, 0 = disable shared flags
  2728. * 06 GALP Go Active On Loop, 0 = not used
  2729. * 05 GLP Go On Loop, 0 = not used
  2730. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2731. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2732. * 02..00 CM[2..0] Clock Mode
  2733. *
  2734. * 0001 0111
  2735. */
  2736. write_reg(info, CHB + CCR1, 0x17);
  2737. /* CCR2 (Channel B)
  2738. *
  2739. * 07..06 BGR[9..8] Baud rate bits 9..8
  2740. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2741. * 04 SSEL Clock source select, 1=submode b
  2742. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2743. * 02 RWX Read/Write Exchange 0=disabled
  2744. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2745. * 00 DIV, data inversion 0=disabled, 1=enabled
  2746. *
  2747. * 0011 1000
  2748. */
  2749. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2750. write_reg(info, CHB + CCR2, 0x38);
  2751. else
  2752. write_reg(info, CHB + CCR2, 0x30);
  2753. /* CCR4
  2754. *
  2755. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2756. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2757. * 05 TST1 Test Pin, 0=normal operation
  2758. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2759. * 03..02 Reserved, must be 0
  2760. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2761. *
  2762. * 0101 0000
  2763. */
  2764. write_reg(info, CHB + CCR4, 0x50);
  2765. /* if auxclk not enabled, set internal BRG so
  2766. * CTS transitions can be detected (requires TxC)
  2767. */
  2768. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2769. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2770. else
  2771. mgslpc_set_rate(info, CHB, 921600);
  2772. }
  2773. static void loopback_enable(MGSLPC_INFO *info)
  2774. {
  2775. unsigned char val;
  2776. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2777. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2778. write_reg(info, CHA + CCR1, val);
  2779. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2780. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2781. write_reg(info, CHA + CCR2, val);
  2782. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2783. if (info->params.clock_speed)
  2784. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2785. else
  2786. mgslpc_set_rate(info, CHA, 1843200);
  2787. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2788. val = read_reg(info, CHA + MODE) | BIT0;
  2789. write_reg(info, CHA + MODE, val);
  2790. }
  2791. void hdlc_mode(MGSLPC_INFO *info)
  2792. {
  2793. unsigned char val;
  2794. unsigned char clkmode, clksubmode;
  2795. /* disable all interrupts */
  2796. irq_disable(info, CHA, 0xffff);
  2797. irq_disable(info, CHB, 0xffff);
  2798. port_irq_disable(info, 0xff);
  2799. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2800. clkmode = clksubmode = 0;
  2801. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2802. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2803. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2804. clkmode = 7;
  2805. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2806. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2807. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2808. clkmode = 7;
  2809. clksubmode = 1;
  2810. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2811. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2812. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2813. clkmode = 6;
  2814. clksubmode = 1;
  2815. } else {
  2816. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2817. clkmode = 6;
  2818. }
  2819. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2820. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2821. clksubmode = 1;
  2822. }
  2823. /* MODE
  2824. *
  2825. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2826. * 05 ADM Address Mode, 0 = no addr recognition
  2827. * 04 TMD Timer Mode, 0 = external
  2828. * 03 RAC Receiver Active, 0 = inactive
  2829. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2830. * 01 TRS Timer Resolution, 1=512
  2831. * 00 TLP Test Loop, 0 = no loop
  2832. *
  2833. * 1000 0010
  2834. */
  2835. val = 0x82;
  2836. if (info->params.loopback)
  2837. val |= BIT0;
  2838. /* preserve RTS state */
  2839. if (info->serial_signals & SerialSignal_RTS)
  2840. val |= BIT2;
  2841. write_reg(info, CHA + MODE, val);
  2842. /* CCR0
  2843. *
  2844. * 07 PU Power Up, 1=active, 0=power down
  2845. * 06 MCE Master Clock Enable, 1=enabled
  2846. * 05 Reserved, 0
  2847. * 04..02 SC[2..0] Encoding
  2848. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2849. *
  2850. * 11000000
  2851. */
  2852. val = 0xc0;
  2853. switch (info->params.encoding)
  2854. {
  2855. case HDLC_ENCODING_NRZI:
  2856. val |= BIT3;
  2857. break;
  2858. case HDLC_ENCODING_BIPHASE_SPACE:
  2859. val |= BIT4;
  2860. break; // FM0
  2861. case HDLC_ENCODING_BIPHASE_MARK:
  2862. val |= BIT4 + BIT2;
  2863. break; // FM1
  2864. case HDLC_ENCODING_BIPHASE_LEVEL:
  2865. val |= BIT4 + BIT3;
  2866. break; // Manchester
  2867. }
  2868. write_reg(info, CHA + CCR0, val);
  2869. /* CCR1
  2870. *
  2871. * 07 SFLG Shared Flag, 0 = disable shared flags
  2872. * 06 GALP Go Active On Loop, 0 = not used
  2873. * 05 GLP Go On Loop, 0 = not used
  2874. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2875. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2876. * 02..00 CM[2..0] Clock Mode
  2877. *
  2878. * 0001 0000
  2879. */
  2880. val = 0x10 + clkmode;
  2881. write_reg(info, CHA + CCR1, val);
  2882. /* CCR2
  2883. *
  2884. * 07..06 BGR[9..8] Baud rate bits 9..8
  2885. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2886. * 04 SSEL Clock source select, 1=submode b
  2887. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2888. * 02 RWX Read/Write Exchange 0=disabled
  2889. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2890. * 00 DIV, data inversion 0=disabled, 1=enabled
  2891. *
  2892. * 0000 0000
  2893. */
  2894. val = 0x00;
  2895. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2896. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2897. val |= BIT5;
  2898. if (clksubmode)
  2899. val |= BIT4;
  2900. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2901. val |= BIT1;
  2902. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2903. val |= BIT0;
  2904. write_reg(info, CHA + CCR2, val);
  2905. /* CCR3
  2906. *
  2907. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2908. * 05 EPT Enable preamble transmission, 1=enabled
  2909. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2910. * 03 CRL CRC Reset Level, 0=FFFF
  2911. * 02 RCRC Rx CRC 0=On 1=Off
  2912. * 01 TCRC Tx CRC 0=On 1=Off
  2913. * 00 PSD DPLL Phase Shift Disable
  2914. *
  2915. * 0000 0000
  2916. */
  2917. val = 0x00;
  2918. if (info->params.crc_type == HDLC_CRC_NONE)
  2919. val |= BIT2 + BIT1;
  2920. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2921. val |= BIT5;
  2922. switch (info->params.preamble_length)
  2923. {
  2924. case HDLC_PREAMBLE_LENGTH_16BITS:
  2925. val |= BIT6;
  2926. break;
  2927. case HDLC_PREAMBLE_LENGTH_32BITS:
  2928. val |= BIT6;
  2929. break;
  2930. case HDLC_PREAMBLE_LENGTH_64BITS:
  2931. val |= BIT7 + BIT6;
  2932. break;
  2933. }
  2934. write_reg(info, CHA + CCR3, val);
  2935. /* PRE - Preamble pattern */
  2936. val = 0;
  2937. switch (info->params.preamble)
  2938. {
  2939. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2940. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2941. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2942. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2943. }
  2944. write_reg(info, CHA + PRE, val);
  2945. /* CCR4
  2946. *
  2947. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2948. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2949. * 05 TST1 Test Pin, 0=normal operation
  2950. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2951. * 03..02 Reserved, must be 0
  2952. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2953. *
  2954. * 0101 0000
  2955. */
  2956. val = 0x50;
  2957. write_reg(info, CHA + CCR4, val);
  2958. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2959. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2960. else
  2961. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2962. /* RLCR Receive length check register
  2963. *
  2964. * 7 1=enable receive length check
  2965. * 6..0 Max frame length = (RL + 1) * 32
  2966. */
  2967. write_reg(info, CHA + RLCR, 0);
  2968. /* XBCH Transmit Byte Count High
  2969. *
  2970. * 07 DMA mode, 0 = interrupt driven
  2971. * 06 NRM, 0=ABM (ignored)
  2972. * 05 CAS Carrier Auto Start
  2973. * 04 XC Transmit Continuously (ignored)
  2974. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2975. *
  2976. * 0000 0000
  2977. */
  2978. val = 0x00;
  2979. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2980. val |= BIT5;
  2981. write_reg(info, CHA + XBCH, val);
  2982. enable_auxclk(info);
  2983. if (info->params.loopback || info->testing_irq)
  2984. loopback_enable(info);
  2985. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2986. {
  2987. irq_enable(info, CHB, IRQ_CTS);
  2988. /* PVR[3] 1=AUTO CTS active */
  2989. set_reg_bits(info, CHA + PVR, BIT3);
  2990. } else
  2991. clear_reg_bits(info, CHA + PVR, BIT3);
  2992. irq_enable(info, CHA,
  2993. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2994. IRQ_UNDERRUN + IRQ_TXFIFO);
  2995. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2996. wait_command_complete(info, CHA);
  2997. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2998. /* Master clock mode enabled above to allow reset commands
  2999. * to complete even if no data clocks are present.
  3000. *
  3001. * Disable master clock mode for normal communications because
  3002. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  3003. * IRQ when in master clock mode.
  3004. *
  3005. * Leave master clock mode enabled for IRQ test because the
  3006. * timer IRQ used by the test can only happen in master clock mode.
  3007. */
  3008. if (!info->testing_irq)
  3009. clear_reg_bits(info, CHA + CCR0, BIT6);
  3010. tx_set_idle(info);
  3011. tx_stop(info);
  3012. rx_stop(info);
  3013. }
  3014. void rx_stop(MGSLPC_INFO *info)
  3015. {
  3016. if (debug_level >= DEBUG_LEVEL_ISR)
  3017. printk("%s(%d):rx_stop(%s)\n",
  3018. __FILE__,__LINE__, info->device_name );
  3019. /* MODE:03 RAC Receiver Active, 0=inactive */
  3020. clear_reg_bits(info, CHA + MODE, BIT3);
  3021. info->rx_enabled = 0;
  3022. info->rx_overflow = 0;
  3023. }
  3024. void rx_start(MGSLPC_INFO *info)
  3025. {
  3026. if (debug_level >= DEBUG_LEVEL_ISR)
  3027. printk("%s(%d):rx_start(%s)\n",
  3028. __FILE__,__LINE__, info->device_name );
  3029. rx_reset_buffers(info);
  3030. info->rx_enabled = 0;
  3031. info->rx_overflow = 0;
  3032. /* MODE:03 RAC Receiver Active, 1=active */
  3033. set_reg_bits(info, CHA + MODE, BIT3);
  3034. info->rx_enabled = 1;
  3035. }
  3036. void tx_start(MGSLPC_INFO *info)
  3037. {
  3038. if (debug_level >= DEBUG_LEVEL_ISR)
  3039. printk("%s(%d):tx_start(%s)\n",
  3040. __FILE__,__LINE__, info->device_name );
  3041. if (info->tx_count) {
  3042. /* If auto RTS enabled and RTS is inactive, then assert */
  3043. /* RTS and set a flag indicating that the driver should */
  3044. /* negate RTS when the transmission completes. */
  3045. info->drop_rts_on_tx_done = 0;
  3046. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  3047. get_signals(info);
  3048. if (!(info->serial_signals & SerialSignal_RTS)) {
  3049. info->serial_signals |= SerialSignal_RTS;
  3050. set_signals(info);
  3051. info->drop_rts_on_tx_done = 1;
  3052. }
  3053. }
  3054. if (info->params.mode == MGSL_MODE_ASYNC) {
  3055. if (!info->tx_active) {
  3056. info->tx_active = 1;
  3057. tx_ready(info);
  3058. }
  3059. } else {
  3060. info->tx_active = 1;
  3061. tx_ready(info);
  3062. info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
  3063. add_timer(&info->tx_timer);
  3064. }
  3065. }
  3066. if (!info->tx_enabled)
  3067. info->tx_enabled = 1;
  3068. }
  3069. void tx_stop(MGSLPC_INFO *info)
  3070. {
  3071. if (debug_level >= DEBUG_LEVEL_ISR)
  3072. printk("%s(%d):tx_stop(%s)\n",
  3073. __FILE__,__LINE__, info->device_name );
  3074. del_timer(&info->tx_timer);
  3075. info->tx_enabled = 0;
  3076. info->tx_active = 0;
  3077. }
  3078. /* Reset the adapter to a known state and prepare it for further use.
  3079. */
  3080. void reset_device(MGSLPC_INFO *info)
  3081. {
  3082. /* power up both channels (set BIT7) */
  3083. write_reg(info, CHA + CCR0, 0x80);
  3084. write_reg(info, CHB + CCR0, 0x80);
  3085. write_reg(info, CHA + MODE, 0);
  3086. write_reg(info, CHB + MODE, 0);
  3087. /* disable all interrupts */
  3088. irq_disable(info, CHA, 0xffff);
  3089. irq_disable(info, CHB, 0xffff);
  3090. port_irq_disable(info, 0xff);
  3091. /* PCR Port Configuration Register
  3092. *
  3093. * 07..04 DEC[3..0] Serial I/F select outputs
  3094. * 03 output, 1=AUTO CTS control enabled
  3095. * 02 RI Ring Indicator input 0=active
  3096. * 01 DSR input 0=active
  3097. * 00 DTR output 0=active
  3098. *
  3099. * 0000 0110
  3100. */
  3101. write_reg(info, PCR, 0x06);
  3102. /* PVR Port Value Register
  3103. *
  3104. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3105. * 03 AUTO CTS output 1=enabled
  3106. * 02 RI Ring Indicator input
  3107. * 01 DSR input
  3108. * 00 DTR output (1=inactive)
  3109. *
  3110. * 0000 0001
  3111. */
  3112. // write_reg(info, PVR, PVR_DTR);
  3113. /* IPC Interrupt Port Configuration
  3114. *
  3115. * 07 VIS 1=Masked interrupts visible
  3116. * 06..05 Reserved, 0
  3117. * 04..03 SLA Slave address, 00 ignored
  3118. * 02 CASM Cascading Mode, 1=daisy chain
  3119. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3120. *
  3121. * 0000 0101
  3122. */
  3123. write_reg(info, IPC, 0x05);
  3124. }
  3125. void async_mode(MGSLPC_INFO *info)
  3126. {
  3127. unsigned char val;
  3128. /* disable all interrupts */
  3129. irq_disable(info, CHA, 0xffff);
  3130. irq_disable(info, CHB, 0xffff);
  3131. port_irq_disable(info, 0xff);
  3132. /* MODE
  3133. *
  3134. * 07 Reserved, 0
  3135. * 06 FRTS RTS State, 0=active
  3136. * 05 FCTS Flow Control on CTS
  3137. * 04 FLON Flow Control Enable
  3138. * 03 RAC Receiver Active, 0 = inactive
  3139. * 02 RTS 0=Auto RTS, 1=manual RTS
  3140. * 01 TRS Timer Resolution, 1=512
  3141. * 00 TLP Test Loop, 0 = no loop
  3142. *
  3143. * 0000 0110
  3144. */
  3145. val = 0x06;
  3146. if (info->params.loopback)
  3147. val |= BIT0;
  3148. /* preserve RTS state */
  3149. if (!(info->serial_signals & SerialSignal_RTS))
  3150. val |= BIT6;
  3151. write_reg(info, CHA + MODE, val);
  3152. /* CCR0
  3153. *
  3154. * 07 PU Power Up, 1=active, 0=power down
  3155. * 06 MCE Master Clock Enable, 1=enabled
  3156. * 05 Reserved, 0
  3157. * 04..02 SC[2..0] Encoding, 000=NRZ
  3158. * 01..00 SM[1..0] Serial Mode, 11=Async
  3159. *
  3160. * 1000 0011
  3161. */
  3162. write_reg(info, CHA + CCR0, 0x83);
  3163. /* CCR1
  3164. *
  3165. * 07..05 Reserved, 0
  3166. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3167. * 03 BCR Bit Clock Rate, 1=16x
  3168. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3169. *
  3170. * 0001 1111
  3171. */
  3172. write_reg(info, CHA + CCR1, 0x1f);
  3173. /* CCR2 (channel A)
  3174. *
  3175. * 07..06 BGR[9..8] Baud rate bits 9..8
  3176. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3177. * 04 SSEL Clock source select, 1=submode b
  3178. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3179. * 02 RWX Read/Write Exchange 0=disabled
  3180. * 01 Reserved, 0
  3181. * 00 DIV, data inversion 0=disabled, 1=enabled
  3182. *
  3183. * 0001 0000
  3184. */
  3185. write_reg(info, CHA + CCR2, 0x10);
  3186. /* CCR3
  3187. *
  3188. * 07..01 Reserved, 0
  3189. * 00 PSD DPLL Phase Shift Disable
  3190. *
  3191. * 0000 0000
  3192. */
  3193. write_reg(info, CHA + CCR3, 0);
  3194. /* CCR4
  3195. *
  3196. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3197. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3198. * 05 TST1 Test Pin, 0=normal operation
  3199. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3200. * 03..00 Reserved, must be 0
  3201. *
  3202. * 0101 0000
  3203. */
  3204. write_reg(info, CHA + CCR4, 0x50);
  3205. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3206. /* DAFO Data Format
  3207. *
  3208. * 07 Reserved, 0
  3209. * 06 XBRK transmit break, 0=normal operation
  3210. * 05 Stop bits (0=1, 1=2)
  3211. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3212. * 02 PAREN Parity Enable
  3213. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3214. *
  3215. */
  3216. val = 0x00;
  3217. if (info->params.data_bits != 8)
  3218. val |= BIT0; /* 7 bits */
  3219. if (info->params.stop_bits != 1)
  3220. val |= BIT5;
  3221. if (info->params.parity != ASYNC_PARITY_NONE)
  3222. {
  3223. val |= BIT2; /* Parity enable */
  3224. if (info->params.parity == ASYNC_PARITY_ODD)
  3225. val |= BIT3;
  3226. else
  3227. val |= BIT4;
  3228. }
  3229. write_reg(info, CHA + DAFO, val);
  3230. /* RFC Rx FIFO Control
  3231. *
  3232. * 07 Reserved, 0
  3233. * 06 DPS, 1=parity bit not stored in data byte
  3234. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3235. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3236. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3237. * 01 Reserved, 0
  3238. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3239. *
  3240. * 0101 1100
  3241. */
  3242. write_reg(info, CHA + RFC, 0x5c);
  3243. /* RLCR Receive length check register
  3244. *
  3245. * Max frame length = (RL + 1) * 32
  3246. */
  3247. write_reg(info, CHA + RLCR, 0);
  3248. /* XBCH Transmit Byte Count High
  3249. *
  3250. * 07 DMA mode, 0 = interrupt driven
  3251. * 06 NRM, 0=ABM (ignored)
  3252. * 05 CAS Carrier Auto Start
  3253. * 04 XC Transmit Continuously (ignored)
  3254. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3255. *
  3256. * 0000 0000
  3257. */
  3258. val = 0x00;
  3259. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3260. val |= BIT5;
  3261. write_reg(info, CHA + XBCH, val);
  3262. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3263. irq_enable(info, CHA, IRQ_CTS);
  3264. /* MODE:03 RAC Receiver Active, 1=active */
  3265. set_reg_bits(info, CHA + MODE, BIT3);
  3266. enable_auxclk(info);
  3267. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3268. irq_enable(info, CHB, IRQ_CTS);
  3269. /* PVR[3] 1=AUTO CTS active */
  3270. set_reg_bits(info, CHA + PVR, BIT3);
  3271. } else
  3272. clear_reg_bits(info, CHA + PVR, BIT3);
  3273. irq_enable(info, CHA,
  3274. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3275. IRQ_ALLSENT + IRQ_TXFIFO);
  3276. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3277. wait_command_complete(info, CHA);
  3278. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3279. }
  3280. /* Set the HDLC idle mode for the transmitter.
  3281. */
  3282. void tx_set_idle(MGSLPC_INFO *info)
  3283. {
  3284. /* Note: ESCC2 only supports flags and one idle modes */
  3285. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3286. set_reg_bits(info, CHA + CCR1, BIT3);
  3287. else
  3288. clear_reg_bits(info, CHA + CCR1, BIT3);
  3289. }
  3290. /* get state of the V24 status (input) signals.
  3291. */
  3292. void get_signals(MGSLPC_INFO *info)
  3293. {
  3294. unsigned char status = 0;
  3295. /* preserve DTR and RTS */
  3296. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3297. if (read_reg(info, CHB + VSTR) & BIT7)
  3298. info->serial_signals |= SerialSignal_DCD;
  3299. if (read_reg(info, CHB + STAR) & BIT1)
  3300. info->serial_signals |= SerialSignal_CTS;
  3301. status = read_reg(info, CHA + PVR);
  3302. if (!(status & PVR_RI))
  3303. info->serial_signals |= SerialSignal_RI;
  3304. if (!(status & PVR_DSR))
  3305. info->serial_signals |= SerialSignal_DSR;
  3306. }
  3307. /* Set the state of DTR and RTS based on contents of
  3308. * serial_signals member of device extension.
  3309. */
  3310. void set_signals(MGSLPC_INFO *info)
  3311. {
  3312. unsigned char val;
  3313. val = read_reg(info, CHA + MODE);
  3314. if (info->params.mode == MGSL_MODE_ASYNC) {
  3315. if (info->serial_signals & SerialSignal_RTS)
  3316. val &= ~BIT6;
  3317. else
  3318. val |= BIT6;
  3319. } else {
  3320. if (info->serial_signals & SerialSignal_RTS)
  3321. val |= BIT2;
  3322. else
  3323. val &= ~BIT2;
  3324. }
  3325. write_reg(info, CHA + MODE, val);
  3326. if (info->serial_signals & SerialSignal_DTR)
  3327. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3328. else
  3329. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3330. }
  3331. void rx_reset_buffers(MGSLPC_INFO *info)
  3332. {
  3333. RXBUF *buf;
  3334. int i;
  3335. info->rx_put = 0;
  3336. info->rx_get = 0;
  3337. info->rx_frame_count = 0;
  3338. for (i=0 ; i < info->rx_buf_count ; i++) {
  3339. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3340. buf->status = buf->count = 0;
  3341. }
  3342. }
  3343. /* Attempt to return a received HDLC frame
  3344. * Only frames received without errors are returned.
  3345. *
  3346. * Returns 1 if frame returned, otherwise 0
  3347. */
  3348. int rx_get_frame(MGSLPC_INFO *info)
  3349. {
  3350. unsigned short status;
  3351. RXBUF *buf;
  3352. unsigned int framesize = 0;
  3353. unsigned long flags;
  3354. struct tty_struct *tty = info->tty;
  3355. int return_frame = 0;
  3356. if (info->rx_frame_count == 0)
  3357. return 0;
  3358. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3359. status = buf->status;
  3360. /* 07 VFR 1=valid frame
  3361. * 06 RDO 1=data overrun
  3362. * 05 CRC 1=OK, 0=error
  3363. * 04 RAB 1=frame aborted
  3364. */
  3365. if ((status & 0xf0) != 0xA0) {
  3366. if (!(status & BIT7) || (status & BIT4))
  3367. info->icount.rxabort++;
  3368. else if (status & BIT6)
  3369. info->icount.rxover++;
  3370. else if (!(status & BIT5)) {
  3371. info->icount.rxcrc++;
  3372. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3373. return_frame = 1;
  3374. }
  3375. framesize = 0;
  3376. #ifdef CONFIG_HDLC
  3377. {
  3378. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3379. stats->rx_errors++;
  3380. stats->rx_frame_errors++;
  3381. }
  3382. #endif
  3383. } else
  3384. return_frame = 1;
  3385. if (return_frame)
  3386. framesize = buf->count;
  3387. if (debug_level >= DEBUG_LEVEL_BH)
  3388. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3389. __FILE__,__LINE__,info->device_name,status,framesize);
  3390. if (debug_level >= DEBUG_LEVEL_DATA)
  3391. trace_block(info, buf->data, framesize, 0);
  3392. if (framesize) {
  3393. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3394. framesize+1 > info->max_frame_size) ||
  3395. framesize > info->max_frame_size)
  3396. info->icount.rxlong++;
  3397. else {
  3398. if (status & BIT5)
  3399. info->icount.rxok++;
  3400. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3401. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3402. ++framesize;
  3403. }
  3404. #ifdef CONFIG_HDLC
  3405. if (info->netcount)
  3406. hdlcdev_rx(info, buf->data, framesize);
  3407. else
  3408. #endif
  3409. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3410. }
  3411. }
  3412. spin_lock_irqsave(&info->lock,flags);
  3413. buf->status = buf->count = 0;
  3414. info->rx_frame_count--;
  3415. info->rx_get++;
  3416. if (info->rx_get >= info->rx_buf_count)
  3417. info->rx_get = 0;
  3418. spin_unlock_irqrestore(&info->lock,flags);
  3419. return 1;
  3420. }
  3421. BOOLEAN register_test(MGSLPC_INFO *info)
  3422. {
  3423. static unsigned char patterns[] =
  3424. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3425. static unsigned int count = sizeof(patterns) / sizeof(patterns[0]);
  3426. unsigned int i;
  3427. BOOLEAN rc = TRUE;
  3428. unsigned long flags;
  3429. spin_lock_irqsave(&info->lock,flags);
  3430. reset_device(info);
  3431. for (i = 0; i < count; i++) {
  3432. write_reg(info, XAD1, patterns[i]);
  3433. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3434. if ((read_reg(info, XAD1) != patterns[i]) ||
  3435. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3436. rc = FALSE;
  3437. break;
  3438. }
  3439. }
  3440. spin_unlock_irqrestore(&info->lock,flags);
  3441. return rc;
  3442. }
  3443. BOOLEAN irq_test(MGSLPC_INFO *info)
  3444. {
  3445. unsigned long end_time;
  3446. unsigned long flags;
  3447. spin_lock_irqsave(&info->lock,flags);
  3448. reset_device(info);
  3449. info->testing_irq = TRUE;
  3450. hdlc_mode(info);
  3451. info->irq_occurred = FALSE;
  3452. /* init hdlc mode */
  3453. irq_enable(info, CHA, IRQ_TIMER);
  3454. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3455. issue_command(info, CHA, CMD_START_TIMER);
  3456. spin_unlock_irqrestore(&info->lock,flags);
  3457. end_time=100;
  3458. while(end_time-- && !info->irq_occurred) {
  3459. msleep_interruptible(10);
  3460. }
  3461. info->testing_irq = FALSE;
  3462. spin_lock_irqsave(&info->lock,flags);
  3463. reset_device(info);
  3464. spin_unlock_irqrestore(&info->lock,flags);
  3465. return info->irq_occurred ? TRUE : FALSE;
  3466. }
  3467. int adapter_test(MGSLPC_INFO *info)
  3468. {
  3469. if (!register_test(info)) {
  3470. info->init_error = DiagStatus_AddressFailure;
  3471. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3472. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3473. return -ENODEV;
  3474. }
  3475. if (!irq_test(info)) {
  3476. info->init_error = DiagStatus_IrqFailure;
  3477. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3478. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3479. return -ENODEV;
  3480. }
  3481. if (debug_level >= DEBUG_LEVEL_INFO)
  3482. printk("%s(%d):device %s passed diagnostics\n",
  3483. __FILE__,__LINE__,info->device_name);
  3484. return 0;
  3485. }
  3486. void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3487. {
  3488. int i;
  3489. int linecount;
  3490. if (xmit)
  3491. printk("%s tx data:\n",info->device_name);
  3492. else
  3493. printk("%s rx data:\n",info->device_name);
  3494. while(count) {
  3495. if (count > 16)
  3496. linecount = 16;
  3497. else
  3498. linecount = count;
  3499. for(i=0;i<linecount;i++)
  3500. printk("%02X ",(unsigned char)data[i]);
  3501. for(;i<17;i++)
  3502. printk(" ");
  3503. for(i=0;i<linecount;i++) {
  3504. if (data[i]>=040 && data[i]<=0176)
  3505. printk("%c",data[i]);
  3506. else
  3507. printk(".");
  3508. }
  3509. printk("\n");
  3510. data += linecount;
  3511. count -= linecount;
  3512. }
  3513. }
  3514. /* HDLC frame time out
  3515. * update stats and do tx completion processing
  3516. */
  3517. void tx_timeout(unsigned long context)
  3518. {
  3519. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3520. unsigned long flags;
  3521. if ( debug_level >= DEBUG_LEVEL_INFO )
  3522. printk( "%s(%d):tx_timeout(%s)\n",
  3523. __FILE__,__LINE__,info->device_name);
  3524. if(info->tx_active &&
  3525. info->params.mode == MGSL_MODE_HDLC) {
  3526. info->icount.txtimeout++;
  3527. }
  3528. spin_lock_irqsave(&info->lock,flags);
  3529. info->tx_active = 0;
  3530. info->tx_count = info->tx_put = info->tx_get = 0;
  3531. spin_unlock_irqrestore(&info->lock,flags);
  3532. #ifdef CONFIG_HDLC
  3533. if (info->netcount)
  3534. hdlcdev_tx_done(info);
  3535. else
  3536. #endif
  3537. bh_transmit(info);
  3538. }
  3539. #ifdef CONFIG_HDLC
  3540. /**
  3541. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3542. * set encoding and frame check sequence (FCS) options
  3543. *
  3544. * dev pointer to network device structure
  3545. * encoding serial encoding setting
  3546. * parity FCS setting
  3547. *
  3548. * returns 0 if success, otherwise error code
  3549. */
  3550. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3551. unsigned short parity)
  3552. {
  3553. MGSLPC_INFO *info = dev_to_port(dev);
  3554. unsigned char new_encoding;
  3555. unsigned short new_crctype;
  3556. /* return error if TTY interface open */
  3557. if (info->count)
  3558. return -EBUSY;
  3559. switch (encoding)
  3560. {
  3561. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3562. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3563. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3564. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3565. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3566. default: return -EINVAL;
  3567. }
  3568. switch (parity)
  3569. {
  3570. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3571. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3572. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3573. default: return -EINVAL;
  3574. }
  3575. info->params.encoding = new_encoding;
  3576. info->params.crc_type = new_crctype;;
  3577. /* if network interface up, reprogram hardware */
  3578. if (info->netcount)
  3579. mgslpc_program_hw(info);
  3580. return 0;
  3581. }
  3582. /**
  3583. * called by generic HDLC layer to send frame
  3584. *
  3585. * skb socket buffer containing HDLC frame
  3586. * dev pointer to network device structure
  3587. *
  3588. * returns 0 if success, otherwise error code
  3589. */
  3590. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3591. {
  3592. MGSLPC_INFO *info = dev_to_port(dev);
  3593. struct net_device_stats *stats = hdlc_stats(dev);
  3594. unsigned long flags;
  3595. if (debug_level >= DEBUG_LEVEL_INFO)
  3596. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3597. /* stop sending until this frame completes */
  3598. netif_stop_queue(dev);
  3599. /* copy data to device buffers */
  3600. memcpy(info->tx_buf, skb->data, skb->len);
  3601. info->tx_get = 0;
  3602. info->tx_put = info->tx_count = skb->len;
  3603. /* update network statistics */
  3604. stats->tx_packets++;
  3605. stats->tx_bytes += skb->len;
  3606. /* done with socket buffer, so free it */
  3607. dev_kfree_skb(skb);
  3608. /* save start time for transmit timeout detection */
  3609. dev->trans_start = jiffies;
  3610. /* start hardware transmitter if necessary */
  3611. spin_lock_irqsave(&info->lock,flags);
  3612. if (!info->tx_active)
  3613. tx_start(info);
  3614. spin_unlock_irqrestore(&info->lock,flags);
  3615. return 0;
  3616. }
  3617. /**
  3618. * called by network layer when interface enabled
  3619. * claim resources and initialize hardware
  3620. *
  3621. * dev pointer to network device structure
  3622. *
  3623. * returns 0 if success, otherwise error code
  3624. */
  3625. static int hdlcdev_open(struct net_device *dev)
  3626. {
  3627. MGSLPC_INFO *info = dev_to_port(dev);
  3628. int rc;
  3629. unsigned long flags;
  3630. if (debug_level >= DEBUG_LEVEL_INFO)
  3631. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3632. /* generic HDLC layer open processing */
  3633. if ((rc = hdlc_open(dev)))
  3634. return rc;
  3635. /* arbitrate between network and tty opens */
  3636. spin_lock_irqsave(&info->netlock, flags);
  3637. if (info->count != 0 || info->netcount != 0) {
  3638. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3639. spin_unlock_irqrestore(&info->netlock, flags);
  3640. return -EBUSY;
  3641. }
  3642. info->netcount=1;
  3643. spin_unlock_irqrestore(&info->netlock, flags);
  3644. /* claim resources and init adapter */
  3645. if ((rc = startup(info)) != 0) {
  3646. spin_lock_irqsave(&info->netlock, flags);
  3647. info->netcount=0;
  3648. spin_unlock_irqrestore(&info->netlock, flags);
  3649. return rc;
  3650. }
  3651. /* assert DTR and RTS, apply hardware settings */
  3652. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3653. mgslpc_program_hw(info);
  3654. /* enable network layer transmit */
  3655. dev->trans_start = jiffies;
  3656. netif_start_queue(dev);
  3657. /* inform generic HDLC layer of current DCD status */
  3658. spin_lock_irqsave(&info->lock, flags);
  3659. get_signals(info);
  3660. spin_unlock_irqrestore(&info->lock, flags);
  3661. hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, dev);
  3662. return 0;
  3663. }
  3664. /**
  3665. * called by network layer when interface is disabled
  3666. * shutdown hardware and release resources
  3667. *
  3668. * dev pointer to network device structure
  3669. *
  3670. * returns 0 if success, otherwise error code
  3671. */
  3672. static int hdlcdev_close(struct net_device *dev)
  3673. {
  3674. MGSLPC_INFO *info = dev_to_port(dev);
  3675. unsigned long flags;
  3676. if (debug_level >= DEBUG_LEVEL_INFO)
  3677. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3678. netif_stop_queue(dev);
  3679. /* shutdown adapter and release resources */
  3680. shutdown(info);
  3681. hdlc_close(dev);
  3682. spin_lock_irqsave(&info->netlock, flags);
  3683. info->netcount=0;
  3684. spin_unlock_irqrestore(&info->netlock, flags);
  3685. return 0;
  3686. }
  3687. /**
  3688. * called by network layer to process IOCTL call to network device
  3689. *
  3690. * dev pointer to network device structure
  3691. * ifr pointer to network interface request structure
  3692. * cmd IOCTL command code
  3693. *
  3694. * returns 0 if success, otherwise error code
  3695. */
  3696. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3697. {
  3698. const size_t size = sizeof(sync_serial_settings);
  3699. sync_serial_settings new_line;
  3700. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3701. MGSLPC_INFO *info = dev_to_port(dev);
  3702. unsigned int flags;
  3703. if (debug_level >= DEBUG_LEVEL_INFO)
  3704. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3705. /* return error if TTY interface open */
  3706. if (info->count)
  3707. return -EBUSY;
  3708. if (cmd != SIOCWANDEV)
  3709. return hdlc_ioctl(dev, ifr, cmd);
  3710. switch(ifr->ifr_settings.type) {
  3711. case IF_GET_IFACE: /* return current sync_serial_settings */
  3712. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3713. if (ifr->ifr_settings.size < size) {
  3714. ifr->ifr_settings.size = size; /* data size wanted */
  3715. return -ENOBUFS;
  3716. }
  3717. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3718. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3719. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3720. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3721. switch (flags){
  3722. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3723. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3724. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3725. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3726. default: new_line.clock_type = CLOCK_DEFAULT;
  3727. }
  3728. new_line.clock_rate = info->params.clock_speed;
  3729. new_line.loopback = info->params.loopback ? 1:0;
  3730. if (copy_to_user(line, &new_line, size))
  3731. return -EFAULT;
  3732. return 0;
  3733. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3734. if(!capable(CAP_NET_ADMIN))
  3735. return -EPERM;
  3736. if (copy_from_user(&new_line, line, size))
  3737. return -EFAULT;
  3738. switch (new_line.clock_type)
  3739. {
  3740. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3741. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3742. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3743. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3744. case CLOCK_DEFAULT: flags = info->params.flags &
  3745. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3746. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3747. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3748. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3749. default: return -EINVAL;
  3750. }
  3751. if (new_line.loopback != 0 && new_line.loopback != 1)
  3752. return -EINVAL;
  3753. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3754. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3755. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3756. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3757. info->params.flags |= flags;
  3758. info->params.loopback = new_line.loopback;
  3759. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3760. info->params.clock_speed = new_line.clock_rate;
  3761. else
  3762. info->params.clock_speed = 0;
  3763. /* if network interface up, reprogram hardware */
  3764. if (info->netcount)
  3765. mgslpc_program_hw(info);
  3766. return 0;
  3767. default:
  3768. return hdlc_ioctl(dev, ifr, cmd);
  3769. }
  3770. }
  3771. /**
  3772. * called by network layer when transmit timeout is detected
  3773. *
  3774. * dev pointer to network device structure
  3775. */
  3776. static void hdlcdev_tx_timeout(struct net_device *dev)
  3777. {
  3778. MGSLPC_INFO *info = dev_to_port(dev);
  3779. struct net_device_stats *stats = hdlc_stats(dev);
  3780. unsigned long flags;
  3781. if (debug_level >= DEBUG_LEVEL_INFO)
  3782. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3783. stats->tx_errors++;
  3784. stats->tx_aborted_errors++;
  3785. spin_lock_irqsave(&info->lock,flags);
  3786. tx_stop(info);
  3787. spin_unlock_irqrestore(&info->lock,flags);
  3788. netif_wake_queue(dev);
  3789. }
  3790. /**
  3791. * called by device driver when transmit completes
  3792. * reenable network layer transmit if stopped
  3793. *
  3794. * info pointer to device instance information
  3795. */
  3796. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3797. {
  3798. if (netif_queue_stopped(info->netdev))
  3799. netif_wake_queue(info->netdev);
  3800. }
  3801. /**
  3802. * called by device driver when frame received
  3803. * pass frame to network layer
  3804. *
  3805. * info pointer to device instance information
  3806. * buf pointer to buffer contianing frame data
  3807. * size count of data bytes in buf
  3808. */
  3809. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3810. {
  3811. struct sk_buff *skb = dev_alloc_skb(size);
  3812. struct net_device *dev = info->netdev;
  3813. struct net_device_stats *stats = hdlc_stats(dev);
  3814. if (debug_level >= DEBUG_LEVEL_INFO)
  3815. printk("hdlcdev_rx(%s)\n",dev->name);
  3816. if (skb == NULL) {
  3817. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3818. stats->rx_dropped++;
  3819. return;
  3820. }
  3821. memcpy(skb_put(skb, size),buf,size);
  3822. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3823. stats->rx_packets++;
  3824. stats->rx_bytes += size;
  3825. netif_rx(skb);
  3826. info->netdev->last_rx = jiffies;
  3827. }
  3828. /**
  3829. * called by device driver when adding device instance
  3830. * do generic HDLC initialization
  3831. *
  3832. * info pointer to device instance information
  3833. *
  3834. * returns 0 if success, otherwise error code
  3835. */
  3836. static int hdlcdev_init(MGSLPC_INFO *info)
  3837. {
  3838. int rc;
  3839. struct net_device *dev;
  3840. hdlc_device *hdlc;
  3841. /* allocate and initialize network and HDLC layer objects */
  3842. if (!(dev = alloc_hdlcdev(info))) {
  3843. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3844. return -ENOMEM;
  3845. }
  3846. /* for network layer reporting purposes only */
  3847. dev->base_addr = info->io_base;
  3848. dev->irq = info->irq_level;
  3849. /* network layer callbacks and settings */
  3850. dev->do_ioctl = hdlcdev_ioctl;
  3851. dev->open = hdlcdev_open;
  3852. dev->stop = hdlcdev_close;
  3853. dev->tx_timeout = hdlcdev_tx_timeout;
  3854. dev->watchdog_timeo = 10*HZ;
  3855. dev->tx_queue_len = 50;
  3856. /* generic HDLC layer callbacks and settings */
  3857. hdlc = dev_to_hdlc(dev);
  3858. hdlc->attach = hdlcdev_attach;
  3859. hdlc->xmit = hdlcdev_xmit;
  3860. /* register objects with HDLC layer */
  3861. if ((rc = register_hdlc_device(dev))) {
  3862. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3863. free_netdev(dev);
  3864. return rc;
  3865. }
  3866. info->netdev = dev;
  3867. return 0;
  3868. }
  3869. /**
  3870. * called by device driver when removing device instance
  3871. * do generic HDLC cleanup
  3872. *
  3873. * info pointer to device instance information
  3874. */
  3875. static void hdlcdev_exit(MGSLPC_INFO *info)
  3876. {
  3877. unregister_hdlc_device(info->netdev);
  3878. free_netdev(info->netdev);
  3879. info->netdev = NULL;
  3880. }
  3881. #endif /* CONFIG_HDLC */