mpc866ads.dts 3.4 KB

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  1. /*
  2. * MPC866 ADS Device Tree Source
  3. *
  4. * Copyright 2006 MontaVista Software, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC866ADS";
  13. compatible = "mpc8xx";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. linux,phandle = <100>;
  17. cpus {
  18. #cpus = <1>;
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. linux,phandle = <200>;
  22. PowerPC,866@0 {
  23. device_type = "cpu";
  24. reg = <0>;
  25. d-cache-line-size = <20>; // 32 bytes
  26. i-cache-line-size = <20>; // 32 bytes
  27. d-cache-size = <2000>; // L1, 8K
  28. i-cache-size = <4000>; // L1, 16K
  29. timebase-frequency = <0>;
  30. bus-frequency = <0>;
  31. clock-frequency = <0>;
  32. 32-bit;
  33. interrupts = <f 2>; // decrementer interrupt
  34. interrupt-parent = <ff000000>;
  35. linux,phandle = <201>;
  36. };
  37. };
  38. memory {
  39. device_type = "memory";
  40. linux,phandle = <300>;
  41. reg = <00000000 800000>;
  42. };
  43. soc866@ff000000 {
  44. #address-cells = <1>;
  45. #size-cells = <1>;
  46. #interrupt-cells = <2>;
  47. device_type = "soc";
  48. ranges = <0 ff000000 00100000>;
  49. reg = <ff000000 00000200>;
  50. bus-frequency = <0>;
  51. mdio@e80 {
  52. device_type = "mdio";
  53. compatible = "fs_enet";
  54. reg = <e80 8>;
  55. linux,phandle = <e80>;
  56. #address-cells = <1>;
  57. #size-cells = <0>;
  58. ethernet-phy@f {
  59. linux,phandle = <e800f>;
  60. reg = <f>;
  61. device_type = "ethernet-phy";
  62. };
  63. };
  64. fec@e00 {
  65. device_type = "network";
  66. compatible = "fs_enet";
  67. model = "FEC";
  68. device-id = <1>;
  69. reg = <e00 188>;
  70. mac-address = [ 00 00 0C 00 01 FD ];
  71. interrupts = <3 1>;
  72. interrupt-parent = <ff000000>;
  73. phy-handle = <e800f>;
  74. };
  75. pic@ff000000 {
  76. linux,phandle = <ff000000>;
  77. interrupt-controller;
  78. #address-cells = <0>;
  79. #interrupt-cells = <2>;
  80. reg = <0 24>;
  81. built-in;
  82. device_type = "mpc8xx-pic";
  83. compatible = "CPM";
  84. };
  85. cpm@ff000000 {
  86. linux,phandle = <ff000000>;
  87. #address-cells = <1>;
  88. #size-cells = <1>;
  89. #interrupt-cells = <2>;
  90. device_type = "cpm";
  91. model = "CPM";
  92. ranges = <0 0 4000>;
  93. reg = <860 f0>;
  94. command-proc = <9c0>;
  95. brg-frequency = <0>;
  96. interrupts = <0 2>; // cpm error interrupt
  97. interrupt-parent = <930>;
  98. pic@930 {
  99. linux,phandle = <930>;
  100. interrupt-controller;
  101. #address-cells = <0>;
  102. #interrupt-cells = <2>;
  103. interrupts = <5 2 0 2>;
  104. interrupt-parent = <ff000000>;
  105. reg = <930 20>;
  106. built-in;
  107. device_type = "cpm-pic";
  108. compatible = "CPM";
  109. };
  110. smc@a80 {
  111. device_type = "serial";
  112. compatible = "cpm_uart";
  113. model = "SMC";
  114. device-id = <1>;
  115. reg = <a80 10 3e80 40>;
  116. clock-setup = <00ffffff 0>;
  117. rx-clock = <1>;
  118. tx-clock = <1>;
  119. current-speed = <0>;
  120. interrupts = <4 3>;
  121. interrupt-parent = <930>;
  122. };
  123. smc@a90 {
  124. device_type = "serial";
  125. compatible = "cpm_uart";
  126. model = "SMC";
  127. device-id = <2>;
  128. reg = <a90 20 3f80 40>;
  129. clock-setup = <ff00ffff 90000>;
  130. rx-clock = <2>;
  131. tx-clock = <2>;
  132. current-speed = <0>;
  133. interrupts = <3 3>;
  134. interrupt-parent = <930>;
  135. };
  136. scc@a00 {
  137. device_type = "network";
  138. compatible = "fs_enet";
  139. model = "SCC";
  140. device-id = <1>;
  141. reg = <a00 18 3c00 80>;
  142. mac-address = [ 00 00 0C 00 03 FD ];
  143. interrupts = <1e 3>;
  144. interrupt-parent = <930>;
  145. };
  146. };
  147. };
  148. };