mpc8349emitxgp.dts 4.0 KB

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  1. /*
  2. * MPC8349E-mITX-GP Device Tree Source
  3. *
  4. * Copyright 2007 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8349EMITXGP";
  13. compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. cpus {
  17. #cpus = <1>;
  18. #address-cells = <1>;
  19. #size-cells = <0>;
  20. PowerPC,8349@0 {
  21. device_type = "cpu";
  22. reg = <0>;
  23. d-cache-line-size = <20>;
  24. i-cache-line-size = <20>;
  25. d-cache-size = <8000>;
  26. i-cache-size = <8000>;
  27. timebase-frequency = <0>; // from bootloader
  28. bus-frequency = <0>; // from bootloader
  29. clock-frequency = <0>; // from bootloader
  30. 32-bit;
  31. };
  32. };
  33. memory {
  34. device_type = "memory";
  35. reg = <00000000 10000000>;
  36. };
  37. soc8349@e0000000 {
  38. #address-cells = <1>;
  39. #size-cells = <1>;
  40. #interrupt-cells = <2>;
  41. device_type = "soc";
  42. ranges = <0 e0000000 00100000>;
  43. reg = <e0000000 00000200>;
  44. bus-frequency = <0>; // from bootloader
  45. wdt@200 {
  46. device_type = "watchdog";
  47. compatible = "mpc83xx_wdt";
  48. reg = <200 100>;
  49. };
  50. i2c@3000 {
  51. device_type = "i2c";
  52. compatible = "fsl-i2c";
  53. reg = <3000 100>;
  54. interrupts = <e 8>;
  55. interrupt-parent = < &ipic >;
  56. dfsrr;
  57. };
  58. i2c@3100 {
  59. device_type = "i2c";
  60. compatible = "fsl-i2c";
  61. reg = <3100 100>;
  62. interrupts = <f 8>;
  63. interrupt-parent = < &ipic >;
  64. dfsrr;
  65. };
  66. spi@7000 {
  67. device_type = "spi";
  68. compatible = "mpc83xx_spi";
  69. reg = <7000 1000>;
  70. interrupts = <10 8>;
  71. interrupt-parent = < &ipic >;
  72. mode = <0>;
  73. };
  74. usb@23000 {
  75. device_type = "usb";
  76. compatible = "fsl-usb2-dr";
  77. reg = <23000 1000>;
  78. #address-cells = <1>;
  79. #size-cells = <0>;
  80. interrupt-parent = < &ipic >;
  81. interrupts = <26 8>;
  82. dr_mode = "otg";
  83. phy_type = "ulpi";
  84. };
  85. mdio@24520 {
  86. device_type = "mdio";
  87. compatible = "gianfar";
  88. reg = <24520 20>;
  89. #address-cells = <1>;
  90. #size-cells = <0>;
  91. /* Vitesse 8201 */
  92. phy1c: ethernet-phy@1c {
  93. interrupt-parent = < &ipic >;
  94. interrupts = <12 8>;
  95. reg = <1c>;
  96. device_type = "ethernet-phy";
  97. };
  98. };
  99. ethernet@24000 {
  100. device_type = "network";
  101. model = "TSEC";
  102. compatible = "gianfar";
  103. reg = <24000 1000>;
  104. local-mac-address = [ 00 00 00 00 00 00 ];
  105. interrupts = <20 8 21 8 22 8>;
  106. interrupt-parent = < &ipic >;
  107. phy-handle = < &phy1c >;
  108. };
  109. serial@4500 {
  110. device_type = "serial";
  111. compatible = "ns16550";
  112. reg = <4500 100>;
  113. clock-frequency = <0>; // from bootloader
  114. interrupts = <9 8>;
  115. interrupt-parent = < &ipic >;
  116. };
  117. serial@4600 {
  118. device_type = "serial";
  119. compatible = "ns16550";
  120. reg = <4600 100>;
  121. clock-frequency = <0>; // from bootloader
  122. interrupts = <a 8>;
  123. interrupt-parent = < &ipic >;
  124. };
  125. pci@8600 {
  126. interrupt-map-mask = <f800 0 0 7>;
  127. interrupt-map = <
  128. /* IDSEL 0x0F - PCI Slot */
  129. 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
  130. 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
  131. >;
  132. interrupt-parent = < &ipic >;
  133. interrupts = <43 8>;
  134. bus-range = <1 1>;
  135. ranges = <42000000 0 a0000000 a0000000 0 10000000
  136. 02000000 0 b0000000 b0000000 0 10000000
  137. 01000000 0 00000000 e3000000 0 01000000>;
  138. clock-frequency = <3f940aa>;
  139. #interrupt-cells = <1>;
  140. #size-cells = <2>;
  141. #address-cells = <3>;
  142. reg = <8600 100>;
  143. compatible = "83xx";
  144. device_type = "pci";
  145. };
  146. crypto@30000 {
  147. device_type = "crypto";
  148. model = "SEC2";
  149. compatible = "talitos";
  150. reg = <30000 10000>;
  151. interrupts = <b 8>;
  152. interrupt-parent = < &ipic >;
  153. num-channels = <4>;
  154. channel-fifo-len = <18>;
  155. exec-units-mask = <0000007e>;
  156. descriptor-types-mask = <01010ebf>;
  157. };
  158. ipic: pic@700 {
  159. interrupt-controller;
  160. #address-cells = <0>;
  161. #interrupt-cells = <2>;
  162. reg = <700 100>;
  163. built-in;
  164. device_type = "ipic";
  165. };
  166. };
  167. };