mpc8313erdb.dts 4.7 KB

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  1. /*
  2. * MPC8313E RDB Device Tree Source
  3. *
  4. * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8313ERDB";
  13. compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. cpus {
  17. #cpus = <1>;
  18. #address-cells = <1>;
  19. #size-cells = <0>;
  20. PowerPC,8313@0 {
  21. device_type = "cpu";
  22. reg = <0>;
  23. d-cache-line-size = <20>; // 32 bytes
  24. i-cache-line-size = <20>; // 32 bytes
  25. d-cache-size = <4000>; // L1, 16K
  26. i-cache-size = <4000>; // L1, 16K
  27. timebase-frequency = <0>; // from bootloader
  28. bus-frequency = <0>; // from bootloader
  29. clock-frequency = <0>; // from bootloader
  30. 32-bit;
  31. };
  32. };
  33. memory {
  34. device_type = "memory";
  35. reg = <00000000 08000000>; // 128MB at 0
  36. };
  37. soc8313@e0000000 {
  38. #address-cells = <1>;
  39. #size-cells = <1>;
  40. #interrupt-cells = <2>;
  41. device_type = "soc";
  42. ranges = <0 e0000000 00100000>;
  43. reg = <e0000000 00000200>;
  44. bus-frequency = <0>;
  45. wdt@200 {
  46. device_type = "watchdog";
  47. compatible = "mpc83xx_wdt";
  48. reg = <200 100>;
  49. };
  50. i2c@3000 {
  51. device_type = "i2c";
  52. compatible = "fsl-i2c";
  53. reg = <3000 100>;
  54. interrupts = <e 8>;
  55. interrupt-parent = < &ipic >;
  56. dfsrr;
  57. };
  58. i2c@3100 {
  59. device_type = "i2c";
  60. compatible = "fsl-i2c";
  61. reg = <3100 100>;
  62. interrupts = <f 8>;
  63. interrupt-parent = < &ipic >;
  64. dfsrr;
  65. };
  66. spi@7000 {
  67. device_type = "spi";
  68. compatible = "mpc83xx_spi";
  69. reg = <7000 1000>;
  70. interrupts = <10 8>;
  71. interrupt-parent = < &ipic >;
  72. mode = <0>;
  73. };
  74. /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
  75. usb@23000 {
  76. device_type = "usb";
  77. compatible = "fsl-usb2-dr";
  78. reg = <23000 1000>;
  79. #address-cells = <1>;
  80. #size-cells = <0>;
  81. interrupt-parent = < &ipic >;
  82. interrupts = <26 8>;
  83. phy_type = "utmi_wide";
  84. };
  85. mdio@24520 {
  86. device_type = "mdio";
  87. compatible = "gianfar";
  88. reg = <24520 20>;
  89. #address-cells = <1>;
  90. #size-cells = <0>;
  91. phy1: ethernet-phy@1 {
  92. interrupt-parent = < &ipic >;
  93. interrupts = <13 8>;
  94. reg = <1>;
  95. device_type = "ethernet-phy";
  96. };
  97. phy4: ethernet-phy@4 {
  98. interrupt-parent = < &ipic >;
  99. interrupts = <14 8>;
  100. reg = <4>;
  101. device_type = "ethernet-phy";
  102. };
  103. };
  104. ethernet@24000 {
  105. device_type = "network";
  106. model = "eTSEC";
  107. compatible = "gianfar";
  108. reg = <24000 1000>;
  109. local-mac-address = [ 00 00 00 00 00 00 ];
  110. interrupts = <25 8 24 8 23 8>;
  111. interrupt-parent = < &ipic >;
  112. phy-handle = < &phy1 >;
  113. };
  114. ethernet@25000 {
  115. device_type = "network";
  116. model = "eTSEC";
  117. compatible = "gianfar";
  118. reg = <25000 1000>;
  119. local-mac-address = [ 00 00 00 00 00 00 ];
  120. interrupts = <22 8 21 8 20 8>;
  121. interrupt-parent = < &ipic >;
  122. phy-handle = < &phy4 >;
  123. };
  124. serial@4500 {
  125. device_type = "serial";
  126. compatible = "ns16550";
  127. reg = <4500 100>;
  128. clock-frequency = <0>;
  129. interrupts = <9 8>;
  130. interrupt-parent = < &ipic >;
  131. };
  132. serial@4600 {
  133. device_type = "serial";
  134. compatible = "ns16550";
  135. reg = <4600 100>;
  136. clock-frequency = <0>;
  137. interrupts = <a 8>;
  138. interrupt-parent = < &ipic >;
  139. };
  140. pci@8500 {
  141. interrupt-map-mask = <f800 0 0 7>;
  142. interrupt-map = <
  143. /* IDSEL 0x0E -mini PCI */
  144. 7000 0 0 1 &ipic 12 8
  145. 7000 0 0 2 &ipic 12 8
  146. 7000 0 0 3 &ipic 12 8
  147. 7000 0 0 4 &ipic 12 8
  148. /* IDSEL 0x0F - PCI slot */
  149. 7800 0 0 1 &ipic 11 8
  150. 7800 0 0 2 &ipic 12 8
  151. 7800 0 0 3 &ipic 11 8
  152. 7800 0 0 4 &ipic 12 8>;
  153. interrupt-parent = < &ipic >;
  154. interrupts = <42 8>;
  155. bus-range = <0 0>;
  156. ranges = <02000000 0 90000000 90000000 0 10000000
  157. 42000000 0 80000000 80000000 0 10000000
  158. 01000000 0 00000000 e2000000 0 00100000>;
  159. clock-frequency = <3f940aa>;
  160. #interrupt-cells = <1>;
  161. #size-cells = <2>;
  162. #address-cells = <3>;
  163. reg = <8500 100>;
  164. compatible = "83xx";
  165. device_type = "pci";
  166. };
  167. crypto@30000 {
  168. device_type = "crypto";
  169. model = "SEC2";
  170. compatible = "talitos";
  171. reg = <30000 7000>;
  172. interrupts = <b 8>;
  173. interrupt-parent = < &ipic >;
  174. /* Rev. 2.2 */
  175. num-channels = <1>;
  176. channel-fifo-len = <18>;
  177. exec-units-mask = <0000004c>;
  178. descriptor-types-mask = <0122003f>;
  179. };
  180. /* IPIC
  181. * interrupts cell = <intr #, sense>
  182. * sense values match linux IORESOURCE_IRQ_* defines:
  183. * sense == 8: Level, low assertion
  184. * sense == 2: Edge, high-to-low change
  185. */
  186. ipic: pic@700 {
  187. interrupt-controller;
  188. #address-cells = <0>;
  189. #interrupt-cells = <2>;
  190. reg = <700 100>;
  191. built-in;
  192. device_type = "ipic";
  193. };
  194. };
  195. };