mpc8272ads.dts 9.0 KB

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  1. /*
  2. * MPC8272 ADS Device Tree Source
  3. *
  4. * Copyright 2005 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8272ADS";
  13. compatible = "MPC8260ADS";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. linux,phandle = <100>;
  17. cpus {
  18. #cpus = <1>;
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. linux,phandle = <200>;
  22. PowerPC,8272@0 {
  23. device_type = "cpu";
  24. reg = <0>;
  25. d-cache-line-size = <20>; // 32 bytes
  26. i-cache-line-size = <20>; // 32 bytes
  27. d-cache-size = <4000>; // L1, 16K
  28. i-cache-size = <4000>; // L1, 16K
  29. timebase-frequency = <0>;
  30. bus-frequency = <0>;
  31. clock-frequency = <0>;
  32. 32-bit;
  33. linux,phandle = <201>;
  34. };
  35. };
  36. interrupt-controller@f8200000 {
  37. linux,phandle = <f8200000>;
  38. #address-cells = <0>;
  39. #interrupt-cells = <2>;
  40. interrupt-controller;
  41. reg = <f8200000 f8200004>;
  42. built-in;
  43. device_type = "pci-pic";
  44. };
  45. memory {
  46. device_type = "memory";
  47. linux,phandle = <300>;
  48. reg = <00000000 4000000 f4500000 00000020>;
  49. };
  50. chosen {
  51. name = "chosen";
  52. linux,platform = <0>;
  53. interrupt-controller = <10c00>;
  54. linux,phandle = <400>;
  55. };
  56. soc8272@f0000000 {
  57. #address-cells = <1>;
  58. #size-cells = <1>;
  59. #interrupt-cells = <2>;
  60. device_type = "soc";
  61. ranges = <00000000 f0000000 00053000>;
  62. reg = <f0000000 10000>;
  63. mdio@0 {
  64. device_type = "mdio";
  65. compatible = "fs_enet";
  66. reg = <0 0>;
  67. linux,phandle = <24520>;
  68. #address-cells = <1>;
  69. #size-cells = <0>;
  70. ethernet-phy@0 {
  71. linux,phandle = <2452000>;
  72. interrupt-parent = <10c00>;
  73. interrupts = <17 4>;
  74. reg = <0>;
  75. bitbang = [ 12 12 13 02 02 01 ];
  76. device_type = "ethernet-phy";
  77. };
  78. ethernet-phy@1 {
  79. linux,phandle = <2452001>;
  80. interrupt-parent = <10c00>;
  81. interrupts = <17 4>;
  82. bitbang = [ 12 12 13 02 02 01 ];
  83. reg = <3>;
  84. device_type = "ethernet-phy";
  85. };
  86. };
  87. ethernet@24000 {
  88. #address-cells = <1>;
  89. #size-cells = <0>;
  90. device_type = "network";
  91. device-id = <1>;
  92. compatible = "fs_enet";
  93. model = "FCC";
  94. reg = <11300 20 8400 100 11380 30>;
  95. mac-address = [ 00 11 2F 99 43 54 ];
  96. interrupts = <20 2>;
  97. interrupt-parent = <10c00>;
  98. phy-handle = <2452000>;
  99. rx-clock = <13>;
  100. tx-clock = <12>;
  101. };
  102. ethernet@25000 {
  103. device_type = "network";
  104. device-id = <2>;
  105. compatible = "fs_enet";
  106. model = "FCC";
  107. reg = <11320 20 8500 100 113b0 30>;
  108. mac-address = [ 00 11 2F 99 44 54 ];
  109. interrupts = <21 2>;
  110. interrupt-parent = <10c00>;
  111. phy-handle = <2452001>;
  112. rx-clock = <17>;
  113. tx-clock = <18>;
  114. };
  115. cpm@f0000000 {
  116. linux,phandle = <f0000000>;
  117. #address-cells = <1>;
  118. #size-cells = <1>;
  119. #interrupt-cells = <2>;
  120. device_type = "cpm";
  121. model = "CPM2";
  122. ranges = <00000000 00000000 20000>;
  123. reg = <0 20000>;
  124. command-proc = <119c0>;
  125. brg-frequency = <17D7840>;
  126. cpm_clk = <BEBC200>;
  127. scc@11a00 {
  128. device_type = "serial";
  129. compatible = "cpm_uart";
  130. model = "SCC";
  131. device-id = <1>;
  132. reg = <11a00 20 8000 100>;
  133. current-speed = <1c200>;
  134. interrupts = <28 2>;
  135. interrupt-parent = <10c00>;
  136. clock-setup = <0 00ffffff>;
  137. rx-clock = <1>;
  138. tx-clock = <1>;
  139. };
  140. scc@11a60 {
  141. device_type = "serial";
  142. compatible = "cpm_uart";
  143. model = "SCC";
  144. device-id = <4>;
  145. reg = <11a60 20 8300 100>;
  146. current-speed = <1c200>;
  147. interrupts = <2b 2>;
  148. interrupt-parent = <10c00>;
  149. clock-setup = <1b ffffff00>;
  150. rx-clock = <4>;
  151. tx-clock = <4>;
  152. };
  153. };
  154. interrupt-controller@10c00 {
  155. linux,phandle = <10c00>;
  156. #address-cells = <0>;
  157. #interrupt-cells = <2>;
  158. interrupt-controller;
  159. reg = <10c00 80>;
  160. built-in;
  161. device_type = "cpm-pic";
  162. compatible = "CPM2";
  163. };
  164. pci@0500 {
  165. linux,phandle = <0500>;
  166. #interrupt-cells = <1>;
  167. #size-cells = <2>;
  168. #address-cells = <3>;
  169. compatible = "8272";
  170. device_type = "pci";
  171. reg = <10430 4dc>;
  172. clock-frequency = <3f940aa>;
  173. interrupt-map-mask = <f800 0 0 7>;
  174. interrupt-map = <
  175. /* IDSEL 0x16 */
  176. b000 0 0 1 f8200000 40 8
  177. b000 0 0 2 f8200000 41 8
  178. b000 0 0 3 f8200000 42 8
  179. b000 0 0 4 f8200000 43 8
  180. /* IDSEL 0x17 */
  181. b800 0 0 1 f8200000 43 8
  182. b800 0 0 2 f8200000 40 8
  183. b800 0 0 3 f8200000 41 8
  184. b800 0 0 4 f8200000 42 8
  185. /* IDSEL 0x18 */
  186. c000 0 0 1 f8200000 42 8
  187. c000 0 0 2 f8200000 43 8
  188. c000 0 0 3 f8200000 40 8
  189. c000 0 0 4 f8200000 41 8>;
  190. interrupt-parent = <10c00>;
  191. interrupts = <14 8>;
  192. bus-range = <0 0>;
  193. ranges = <02000000 0 80000000 80000000 0 40000000
  194. 01000000 0 00000000 f6000000 0 02000000>;
  195. };
  196. /* May need to remove if on a part without crypto engine */
  197. crypto@30000 {
  198. device_type = "crypto";
  199. model = "SEC2";
  200. compatible = "talitos";
  201. reg = <30000 10000>;
  202. interrupts = <b 2>;
  203. interrupt-parent = <10c00>;
  204. num-channels = <4>;
  205. channel-fifo-len = <18>;
  206. exec-units-mask = <0000007e>;
  207. /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
  208. descriptor-types-mask = <01010ebf>;
  209. };
  210. };
  211. };