msr.c 6.5 KB

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  1. /* ----------------------------------------------------------------------- *
  2. *
  3. * Copyright 2000 H. Peter Anvin - All Rights Reserved
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
  8. * USA; either version 2 of the License, or (at your option) any later
  9. * version; incorporated herein by reference.
  10. *
  11. * ----------------------------------------------------------------------- */
  12. /*
  13. * msr.c
  14. *
  15. * x86 MSR access device
  16. *
  17. * This device is accessed by lseek() to the appropriate register number
  18. * and then read/write in chunks of 8 bytes. A larger size means multiple
  19. * reads or writes of the same register.
  20. *
  21. * This driver uses /dev/cpu/%d/msr where %d is the minor number, and on
  22. * an SMP box will direct the access to CPU %d.
  23. */
  24. #include <linux/module.h>
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/fcntl.h>
  28. #include <linux/init.h>
  29. #include <linux/poll.h>
  30. #include <linux/smp.h>
  31. #include <linux/smp_lock.h>
  32. #include <linux/major.h>
  33. #include <linux/fs.h>
  34. #include <linux/device.h>
  35. #include <linux/cpu.h>
  36. #include <linux/notifier.h>
  37. #include <asm/processor.h>
  38. #include <asm/msr.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/system.h>
  41. static struct class *msr_class;
  42. static inline int wrmsr_eio(u32 reg, u32 eax, u32 edx)
  43. {
  44. int err;
  45. err = wrmsr_safe(reg, eax, edx);
  46. if (err)
  47. err = -EIO;
  48. return err;
  49. }
  50. static inline int rdmsr_eio(u32 reg, u32 *eax, u32 *edx)
  51. {
  52. int err;
  53. err = rdmsr_safe(reg, eax, edx);
  54. if (err)
  55. err = -EIO;
  56. return err;
  57. }
  58. #ifdef CONFIG_SMP
  59. struct msr_command {
  60. int err;
  61. u32 reg;
  62. u32 data[2];
  63. };
  64. static void msr_smp_wrmsr(void *cmd_block)
  65. {
  66. struct msr_command *cmd = (struct msr_command *)cmd_block;
  67. cmd->err = wrmsr_eio(cmd->reg, cmd->data[0], cmd->data[1]);
  68. }
  69. static void msr_smp_rdmsr(void *cmd_block)
  70. {
  71. struct msr_command *cmd = (struct msr_command *)cmd_block;
  72. cmd->err = rdmsr_eio(cmd->reg, &cmd->data[0], &cmd->data[1]);
  73. }
  74. static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx)
  75. {
  76. struct msr_command cmd;
  77. int ret;
  78. preempt_disable();
  79. if (cpu == smp_processor_id()) {
  80. ret = wrmsr_eio(reg, eax, edx);
  81. } else {
  82. cmd.reg = reg;
  83. cmd.data[0] = eax;
  84. cmd.data[1] = edx;
  85. smp_call_function_single(cpu, msr_smp_wrmsr, &cmd, 1, 1);
  86. ret = cmd.err;
  87. }
  88. preempt_enable();
  89. return ret;
  90. }
  91. static inline int do_rdmsr(int cpu, u32 reg, u32 * eax, u32 * edx)
  92. {
  93. struct msr_command cmd;
  94. int ret;
  95. preempt_disable();
  96. if (cpu == smp_processor_id()) {
  97. ret = rdmsr_eio(reg, eax, edx);
  98. } else {
  99. cmd.reg = reg;
  100. smp_call_function_single(cpu, msr_smp_rdmsr, &cmd, 1, 1);
  101. *eax = cmd.data[0];
  102. *edx = cmd.data[1];
  103. ret = cmd.err;
  104. }
  105. preempt_enable();
  106. return ret;
  107. }
  108. #else /* ! CONFIG_SMP */
  109. static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx)
  110. {
  111. return wrmsr_eio(reg, eax, edx);
  112. }
  113. static inline int do_rdmsr(int cpu, u32 reg, u32 *eax, u32 *edx)
  114. {
  115. return rdmsr_eio(reg, eax, edx);
  116. }
  117. #endif /* ! CONFIG_SMP */
  118. static loff_t msr_seek(struct file *file, loff_t offset, int orig)
  119. {
  120. loff_t ret = -EINVAL;
  121. lock_kernel();
  122. switch (orig) {
  123. case 0:
  124. file->f_pos = offset;
  125. ret = file->f_pos;
  126. break;
  127. case 1:
  128. file->f_pos += offset;
  129. ret = file->f_pos;
  130. }
  131. unlock_kernel();
  132. return ret;
  133. }
  134. static ssize_t msr_read(struct file *file, char __user * buf,
  135. size_t count, loff_t * ppos)
  136. {
  137. u32 __user *tmp = (u32 __user *) buf;
  138. u32 data[2];
  139. u32 reg = *ppos;
  140. int cpu = iminor(file->f_path.dentry->d_inode);
  141. int err;
  142. if (count % 8)
  143. return -EINVAL; /* Invalid chunk size */
  144. for (; count; count -= 8) {
  145. err = do_rdmsr(cpu, reg, &data[0], &data[1]);
  146. if (err)
  147. return err;
  148. if (copy_to_user(tmp, &data, 8))
  149. return -EFAULT;
  150. tmp += 2;
  151. }
  152. return ((char __user *)tmp) - buf;
  153. }
  154. static ssize_t msr_write(struct file *file, const char __user *buf,
  155. size_t count, loff_t *ppos)
  156. {
  157. const u32 __user *tmp = (const u32 __user *)buf;
  158. u32 data[2];
  159. u32 reg = *ppos;
  160. int cpu = iminor(file->f_path.dentry->d_inode);
  161. int err;
  162. if (count % 8)
  163. return -EINVAL; /* Invalid chunk size */
  164. for (; count; count -= 8) {
  165. if (copy_from_user(&data, tmp, 8))
  166. return -EFAULT;
  167. err = do_wrmsr(cpu, reg, data[0], data[1]);
  168. if (err)
  169. return err;
  170. tmp += 2;
  171. }
  172. return ((char __user *)tmp) - buf;
  173. }
  174. static int msr_open(struct inode *inode, struct file *file)
  175. {
  176. unsigned int cpu = iminor(file->f_path.dentry->d_inode);
  177. struct cpuinfo_x86 *c = &(cpu_data)[cpu];
  178. if (cpu >= NR_CPUS || !cpu_online(cpu))
  179. return -ENXIO; /* No such CPU */
  180. if (!cpu_has(c, X86_FEATURE_MSR))
  181. return -EIO; /* MSR not supported */
  182. return 0;
  183. }
  184. /*
  185. * File operations we support
  186. */
  187. static const struct file_operations msr_fops = {
  188. .owner = THIS_MODULE,
  189. .llseek = msr_seek,
  190. .read = msr_read,
  191. .write = msr_write,
  192. .open = msr_open,
  193. };
  194. static int msr_device_create(int i)
  195. {
  196. int err = 0;
  197. struct device *dev;
  198. dev = device_create(msr_class, NULL, MKDEV(MSR_MAJOR, i), "msr%d",i);
  199. if (IS_ERR(dev))
  200. err = PTR_ERR(dev);
  201. return err;
  202. }
  203. static int msr_class_cpu_callback(struct notifier_block *nfb,
  204. unsigned long action, void *hcpu)
  205. {
  206. unsigned int cpu = (unsigned long)hcpu;
  207. switch (action) {
  208. case CPU_ONLINE:
  209. msr_device_create(cpu);
  210. break;
  211. case CPU_DEAD:
  212. device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
  213. break;
  214. }
  215. return NOTIFY_OK;
  216. }
  217. static struct notifier_block __cpuinitdata msr_class_cpu_notifier =
  218. {
  219. .notifier_call = msr_class_cpu_callback,
  220. };
  221. static int __init msr_init(void)
  222. {
  223. int i, err = 0;
  224. i = 0;
  225. if (register_chrdev(MSR_MAJOR, "cpu/msr", &msr_fops)) {
  226. printk(KERN_ERR "msr: unable to get major %d for msr\n",
  227. MSR_MAJOR);
  228. err = -EBUSY;
  229. goto out;
  230. }
  231. msr_class = class_create(THIS_MODULE, "msr");
  232. if (IS_ERR(msr_class)) {
  233. err = PTR_ERR(msr_class);
  234. goto out_chrdev;
  235. }
  236. for_each_online_cpu(i) {
  237. err = msr_device_create(i);
  238. if (err != 0)
  239. goto out_class;
  240. }
  241. register_hotcpu_notifier(&msr_class_cpu_notifier);
  242. err = 0;
  243. goto out;
  244. out_class:
  245. i = 0;
  246. for_each_online_cpu(i)
  247. device_destroy(msr_class, MKDEV(MSR_MAJOR, i));
  248. class_destroy(msr_class);
  249. out_chrdev:
  250. unregister_chrdev(MSR_MAJOR, "cpu/msr");
  251. out:
  252. return err;
  253. }
  254. static void __exit msr_exit(void)
  255. {
  256. int cpu = 0;
  257. for_each_online_cpu(cpu)
  258. device_destroy(msr_class, MKDEV(MSR_MAJOR, cpu));
  259. class_destroy(msr_class);
  260. unregister_chrdev(MSR_MAJOR, "cpu/msr");
  261. unregister_hotcpu_notifier(&msr_class_cpu_notifier);
  262. }
  263. module_init(msr_init);
  264. module_exit(msr_exit)
  265. MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>");
  266. MODULE_DESCRIPTION("x86 generic MSR driver");
  267. MODULE_LICENSE("GPL");