devs.c 12 KB

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  1. /* linux/arch/arm/plat-s3c24xx/devs.c
  2. *
  3. * Copyright (c) 2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Base S3C24XX platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/platform_device.h>
  21. #include <asm/mach/arch.h>
  22. #include <asm/mach/map.h>
  23. #include <asm/mach/irq.h>
  24. #include <asm/arch/fb.h>
  25. #include <asm/hardware.h>
  26. #include <asm/io.h>
  27. #include <asm/irq.h>
  28. #include <asm/arch/regs-serial.h>
  29. #include <asm/arch/udc.h>
  30. #include <asm/plat-s3c24xx/devs.h>
  31. #include <asm/plat-s3c24xx/cpu.h>
  32. /* Serial port registrations */
  33. static struct resource s3c2410_uart0_resource[] = {
  34. [0] = {
  35. .start = S3C2410_PA_UART0,
  36. .end = S3C2410_PA_UART0 + 0x3fff,
  37. .flags = IORESOURCE_MEM,
  38. },
  39. [1] = {
  40. .start = IRQ_S3CUART_RX0,
  41. .end = IRQ_S3CUART_ERR0,
  42. .flags = IORESOURCE_IRQ,
  43. }
  44. };
  45. static struct resource s3c2410_uart1_resource[] = {
  46. [0] = {
  47. .start = S3C2410_PA_UART1,
  48. .end = S3C2410_PA_UART1 + 0x3fff,
  49. .flags = IORESOURCE_MEM,
  50. },
  51. [1] = {
  52. .start = IRQ_S3CUART_RX1,
  53. .end = IRQ_S3CUART_ERR1,
  54. .flags = IORESOURCE_IRQ,
  55. }
  56. };
  57. static struct resource s3c2410_uart2_resource[] = {
  58. [0] = {
  59. .start = S3C2410_PA_UART2,
  60. .end = S3C2410_PA_UART2 + 0x3fff,
  61. .flags = IORESOURCE_MEM,
  62. },
  63. [1] = {
  64. .start = IRQ_S3CUART_RX2,
  65. .end = IRQ_S3CUART_ERR2,
  66. .flags = IORESOURCE_IRQ,
  67. }
  68. };
  69. struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
  70. [0] = {
  71. .resources = s3c2410_uart0_resource,
  72. .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
  73. },
  74. [1] = {
  75. .resources = s3c2410_uart1_resource,
  76. .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
  77. },
  78. [2] = {
  79. .resources = s3c2410_uart2_resource,
  80. .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
  81. },
  82. };
  83. /* yart devices */
  84. static struct platform_device s3c24xx_uart_device0 = {
  85. .id = 0,
  86. };
  87. static struct platform_device s3c24xx_uart_device1 = {
  88. .id = 1,
  89. };
  90. static struct platform_device s3c24xx_uart_device2 = {
  91. .id = 2,
  92. };
  93. struct platform_device *s3c24xx_uart_src[3] = {
  94. &s3c24xx_uart_device0,
  95. &s3c24xx_uart_device1,
  96. &s3c24xx_uart_device2,
  97. };
  98. struct platform_device *s3c24xx_uart_devs[3] = {
  99. };
  100. /* USB Host Controller */
  101. static struct resource s3c_usb_resource[] = {
  102. [0] = {
  103. .start = S3C24XX_PA_USBHOST,
  104. .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
  105. .flags = IORESOURCE_MEM,
  106. },
  107. [1] = {
  108. .start = IRQ_USBH,
  109. .end = IRQ_USBH,
  110. .flags = IORESOURCE_IRQ,
  111. }
  112. };
  113. static u64 s3c_device_usb_dmamask = 0xffffffffUL;
  114. struct platform_device s3c_device_usb = {
  115. .name = "s3c2410-ohci",
  116. .id = -1,
  117. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  118. .resource = s3c_usb_resource,
  119. .dev = {
  120. .dma_mask = &s3c_device_usb_dmamask,
  121. .coherent_dma_mask = 0xffffffffUL
  122. }
  123. };
  124. EXPORT_SYMBOL(s3c_device_usb);
  125. /* LCD Controller */
  126. static struct resource s3c_lcd_resource[] = {
  127. [0] = {
  128. .start = S3C24XX_PA_LCD,
  129. .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
  130. .flags = IORESOURCE_MEM,
  131. },
  132. [1] = {
  133. .start = IRQ_LCD,
  134. .end = IRQ_LCD,
  135. .flags = IORESOURCE_IRQ,
  136. }
  137. };
  138. static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
  139. struct platform_device s3c_device_lcd = {
  140. .name = "s3c2410-lcd",
  141. .id = -1,
  142. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  143. .resource = s3c_lcd_resource,
  144. .dev = {
  145. .dma_mask = &s3c_device_lcd_dmamask,
  146. .coherent_dma_mask = 0xffffffffUL
  147. }
  148. };
  149. EXPORT_SYMBOL(s3c_device_lcd);
  150. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  151. {
  152. struct s3c2410fb_mach_info *npd;
  153. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  154. if (npd) {
  155. memcpy(npd, pd, sizeof(*npd));
  156. s3c_device_lcd.dev.platform_data = npd;
  157. } else {
  158. printk(KERN_ERR "no memory for LCD platform data\n");
  159. }
  160. }
  161. /* NAND Controller */
  162. static struct resource s3c_nand_resource[] = {
  163. [0] = {
  164. .start = S3C2410_PA_NAND,
  165. .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
  166. .flags = IORESOURCE_MEM,
  167. }
  168. };
  169. struct platform_device s3c_device_nand = {
  170. .name = "s3c2410-nand",
  171. .id = -1,
  172. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  173. .resource = s3c_nand_resource,
  174. };
  175. EXPORT_SYMBOL(s3c_device_nand);
  176. /* USB Device (Gadget)*/
  177. static struct resource s3c_usbgadget_resource[] = {
  178. [0] = {
  179. .start = S3C24XX_PA_USBDEV,
  180. .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
  181. .flags = IORESOURCE_MEM,
  182. },
  183. [1] = {
  184. .start = IRQ_USBD,
  185. .end = IRQ_USBD,
  186. .flags = IORESOURCE_IRQ,
  187. }
  188. };
  189. struct platform_device s3c_device_usbgadget = {
  190. .name = "s3c2410-usbgadget",
  191. .id = -1,
  192. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  193. .resource = s3c_usbgadget_resource,
  194. };
  195. EXPORT_SYMBOL(s3c_device_usbgadget);
  196. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  197. {
  198. struct s3c2410_udc_mach_info *npd;
  199. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  200. if (npd) {
  201. memcpy(npd, pd, sizeof(*npd));
  202. s3c_device_usbgadget.dev.platform_data = npd;
  203. } else {
  204. printk(KERN_ERR "no memory for udc platform data\n");
  205. }
  206. }
  207. /* Watchdog */
  208. static struct resource s3c_wdt_resource[] = {
  209. [0] = {
  210. .start = S3C24XX_PA_WATCHDOG,
  211. .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
  212. .flags = IORESOURCE_MEM,
  213. },
  214. [1] = {
  215. .start = IRQ_WDT,
  216. .end = IRQ_WDT,
  217. .flags = IORESOURCE_IRQ,
  218. }
  219. };
  220. struct platform_device s3c_device_wdt = {
  221. .name = "s3c2410-wdt",
  222. .id = -1,
  223. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  224. .resource = s3c_wdt_resource,
  225. };
  226. EXPORT_SYMBOL(s3c_device_wdt);
  227. /* I2C */
  228. static struct resource s3c_i2c_resource[] = {
  229. [0] = {
  230. .start = S3C24XX_PA_IIC,
  231. .end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
  232. .flags = IORESOURCE_MEM,
  233. },
  234. [1] = {
  235. .start = IRQ_IIC,
  236. .end = IRQ_IIC,
  237. .flags = IORESOURCE_IRQ,
  238. }
  239. };
  240. struct platform_device s3c_device_i2c = {
  241. .name = "s3c2410-i2c",
  242. .id = -1,
  243. .num_resources = ARRAY_SIZE(s3c_i2c_resource),
  244. .resource = s3c_i2c_resource,
  245. };
  246. EXPORT_SYMBOL(s3c_device_i2c);
  247. /* IIS */
  248. static struct resource s3c_iis_resource[] = {
  249. [0] = {
  250. .start = S3C24XX_PA_IIS,
  251. .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
  252. .flags = IORESOURCE_MEM,
  253. }
  254. };
  255. static u64 s3c_device_iis_dmamask = 0xffffffffUL;
  256. struct platform_device s3c_device_iis = {
  257. .name = "s3c2410-iis",
  258. .id = -1,
  259. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  260. .resource = s3c_iis_resource,
  261. .dev = {
  262. .dma_mask = &s3c_device_iis_dmamask,
  263. .coherent_dma_mask = 0xffffffffUL
  264. }
  265. };
  266. EXPORT_SYMBOL(s3c_device_iis);
  267. /* RTC */
  268. static struct resource s3c_rtc_resource[] = {
  269. [0] = {
  270. .start = S3C24XX_PA_RTC,
  271. .end = S3C24XX_PA_RTC + 0xff,
  272. .flags = IORESOURCE_MEM,
  273. },
  274. [1] = {
  275. .start = IRQ_RTC,
  276. .end = IRQ_RTC,
  277. .flags = IORESOURCE_IRQ,
  278. },
  279. [2] = {
  280. .start = IRQ_TICK,
  281. .end = IRQ_TICK,
  282. .flags = IORESOURCE_IRQ
  283. }
  284. };
  285. struct platform_device s3c_device_rtc = {
  286. .name = "s3c2410-rtc",
  287. .id = -1,
  288. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  289. .resource = s3c_rtc_resource,
  290. };
  291. EXPORT_SYMBOL(s3c_device_rtc);
  292. /* ADC */
  293. static struct resource s3c_adc_resource[] = {
  294. [0] = {
  295. .start = S3C24XX_PA_ADC,
  296. .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
  297. .flags = IORESOURCE_MEM,
  298. },
  299. [1] = {
  300. .start = IRQ_TC,
  301. .end = IRQ_TC,
  302. .flags = IORESOURCE_IRQ,
  303. },
  304. [2] = {
  305. .start = IRQ_ADC,
  306. .end = IRQ_ADC,
  307. .flags = IORESOURCE_IRQ,
  308. }
  309. };
  310. struct platform_device s3c_device_adc = {
  311. .name = "s3c2410-adc",
  312. .id = -1,
  313. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  314. .resource = s3c_adc_resource,
  315. };
  316. /* SDI */
  317. static struct resource s3c_sdi_resource[] = {
  318. [0] = {
  319. .start = S3C2410_PA_SDI,
  320. .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
  321. .flags = IORESOURCE_MEM,
  322. },
  323. [1] = {
  324. .start = IRQ_SDI,
  325. .end = IRQ_SDI,
  326. .flags = IORESOURCE_IRQ,
  327. }
  328. };
  329. struct platform_device s3c_device_sdi = {
  330. .name = "s3c2410-sdi",
  331. .id = -1,
  332. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  333. .resource = s3c_sdi_resource,
  334. };
  335. EXPORT_SYMBOL(s3c_device_sdi);
  336. /* SPI (0) */
  337. static struct resource s3c_spi0_resource[] = {
  338. [0] = {
  339. .start = S3C24XX_PA_SPI,
  340. .end = S3C24XX_PA_SPI + 0x1f,
  341. .flags = IORESOURCE_MEM,
  342. },
  343. [1] = {
  344. .start = IRQ_SPI0,
  345. .end = IRQ_SPI0,
  346. .flags = IORESOURCE_IRQ,
  347. }
  348. };
  349. static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
  350. struct platform_device s3c_device_spi0 = {
  351. .name = "s3c2410-spi",
  352. .id = 0,
  353. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  354. .resource = s3c_spi0_resource,
  355. .dev = {
  356. .dma_mask = &s3c_device_spi0_dmamask,
  357. .coherent_dma_mask = 0xffffffffUL
  358. }
  359. };
  360. EXPORT_SYMBOL(s3c_device_spi0);
  361. /* SPI (1) */
  362. static struct resource s3c_spi1_resource[] = {
  363. [0] = {
  364. .start = S3C24XX_PA_SPI + 0x20,
  365. .end = S3C24XX_PA_SPI + 0x20 + 0x1f,
  366. .flags = IORESOURCE_MEM,
  367. },
  368. [1] = {
  369. .start = IRQ_SPI1,
  370. .end = IRQ_SPI1,
  371. .flags = IORESOURCE_IRQ,
  372. }
  373. };
  374. static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
  375. struct platform_device s3c_device_spi1 = {
  376. .name = "s3c2410-spi",
  377. .id = 1,
  378. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  379. .resource = s3c_spi1_resource,
  380. .dev = {
  381. .dma_mask = &s3c_device_spi1_dmamask,
  382. .coherent_dma_mask = 0xffffffffUL
  383. }
  384. };
  385. EXPORT_SYMBOL(s3c_device_spi1);
  386. /* pwm timer blocks */
  387. static struct resource s3c_timer0_resource[] = {
  388. [0] = {
  389. .start = S3C24XX_PA_TIMER + 0x0C,
  390. .end = S3C24XX_PA_TIMER + 0x0C + 0xB,
  391. .flags = IORESOURCE_MEM,
  392. },
  393. [1] = {
  394. .start = IRQ_TIMER0,
  395. .end = IRQ_TIMER0,
  396. .flags = IORESOURCE_IRQ,
  397. }
  398. };
  399. struct platform_device s3c_device_timer0 = {
  400. .name = "s3c2410-timer",
  401. .id = 0,
  402. .num_resources = ARRAY_SIZE(s3c_timer0_resource),
  403. .resource = s3c_timer0_resource,
  404. };
  405. EXPORT_SYMBOL(s3c_device_timer0);
  406. /* timer 1 */
  407. static struct resource s3c_timer1_resource[] = {
  408. [0] = {
  409. .start = S3C24XX_PA_TIMER + 0x18,
  410. .end = S3C24XX_PA_TIMER + 0x23,
  411. .flags = IORESOURCE_MEM,
  412. },
  413. [1] = {
  414. .start = IRQ_TIMER1,
  415. .end = IRQ_TIMER1,
  416. .flags = IORESOURCE_IRQ,
  417. }
  418. };
  419. struct platform_device s3c_device_timer1 = {
  420. .name = "s3c2410-timer",
  421. .id = 1,
  422. .num_resources = ARRAY_SIZE(s3c_timer1_resource),
  423. .resource = s3c_timer1_resource,
  424. };
  425. EXPORT_SYMBOL(s3c_device_timer1);
  426. /* timer 2 */
  427. static struct resource s3c_timer2_resource[] = {
  428. [0] = {
  429. .start = S3C24XX_PA_TIMER + 0x24,
  430. .end = S3C24XX_PA_TIMER + 0x2F,
  431. .flags = IORESOURCE_MEM,
  432. },
  433. [1] = {
  434. .start = IRQ_TIMER2,
  435. .end = IRQ_TIMER2,
  436. .flags = IORESOURCE_IRQ,
  437. }
  438. };
  439. struct platform_device s3c_device_timer2 = {
  440. .name = "s3c2410-timer",
  441. .id = 2,
  442. .num_resources = ARRAY_SIZE(s3c_timer2_resource),
  443. .resource = s3c_timer2_resource,
  444. };
  445. EXPORT_SYMBOL(s3c_device_timer2);
  446. /* timer 3 */
  447. static struct resource s3c_timer3_resource[] = {
  448. [0] = {
  449. .start = S3C24XX_PA_TIMER + 0x30,
  450. .end = S3C24XX_PA_TIMER + 0x3B,
  451. .flags = IORESOURCE_MEM,
  452. },
  453. [1] = {
  454. .start = IRQ_TIMER3,
  455. .end = IRQ_TIMER3,
  456. .flags = IORESOURCE_IRQ,
  457. }
  458. };
  459. struct platform_device s3c_device_timer3 = {
  460. .name = "s3c2410-timer",
  461. .id = 3,
  462. .num_resources = ARRAY_SIZE(s3c_timer3_resource),
  463. .resource = s3c_timer3_resource,
  464. };
  465. EXPORT_SYMBOL(s3c_device_timer3);
  466. #ifdef CONFIG_CPU_S3C2440
  467. /* Camif Controller */
  468. static struct resource s3c_camif_resource[] = {
  469. [0] = {
  470. .start = S3C2440_PA_CAMIF,
  471. .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
  472. .flags = IORESOURCE_MEM,
  473. },
  474. [1] = {
  475. .start = IRQ_CAM,
  476. .end = IRQ_CAM,
  477. .flags = IORESOURCE_IRQ,
  478. }
  479. };
  480. static u64 s3c_device_camif_dmamask = 0xffffffffUL;
  481. struct platform_device s3c_device_camif = {
  482. .name = "s3c2440-camif",
  483. .id = -1,
  484. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  485. .resource = s3c_camif_resource,
  486. .dev = {
  487. .dma_mask = &s3c_device_camif_dmamask,
  488. .coherent_dma_mask = 0xffffffffUL
  489. }
  490. };
  491. EXPORT_SYMBOL(s3c_device_camif);
  492. #endif // CONFIG_CPU_S32440