smp.c 27 KB

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  1. /*
  2. * arch/s390/kernel/smp.c
  3. *
  4. * Copyright IBM Corp. 1999, 2009
  5. * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
  6. * Martin Schwidefsky (schwidefsky@de.ibm.com)
  7. * Heiko Carstens (heiko.carstens@de.ibm.com)
  8. *
  9. * based on other smp stuff by
  10. * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
  11. * (c) 1998 Ingo Molnar
  12. *
  13. * We work with logical cpu numbering everywhere we can. The only
  14. * functions using the real cpu address (got from STAP) are the sigp
  15. * functions. For all other functions we use the identity mapping.
  16. * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is
  17. * used e.g. to find the idle task belonging to a logical cpu. Every array
  18. * in the kernel is sorted by the logical cpu number and not by the physical
  19. * one which is causing all the confusion with __cpu_logical_map and
  20. * cpu_number_map in other architectures.
  21. */
  22. #define KMSG_COMPONENT "cpu"
  23. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  24. #include <linux/workqueue.h>
  25. #include <linux/module.h>
  26. #include <linux/init.h>
  27. #include <linux/mm.h>
  28. #include <linux/err.h>
  29. #include <linux/spinlock.h>
  30. #include <linux/kernel_stat.h>
  31. #include <linux/delay.h>
  32. #include <linux/cache.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/irqflags.h>
  35. #include <linux/cpu.h>
  36. #include <linux/timex.h>
  37. #include <linux/bootmem.h>
  38. #include <linux/slab.h>
  39. #include <asm/asm-offsets.h>
  40. #include <asm/ipl.h>
  41. #include <asm/setup.h>
  42. #include <asm/sigp.h>
  43. #include <asm/pgalloc.h>
  44. #include <asm/irq.h>
  45. #include <asm/cpcmd.h>
  46. #include <asm/tlbflush.h>
  47. #include <asm/timer.h>
  48. #include <asm/lowcore.h>
  49. #include <asm/sclp.h>
  50. #include <asm/cputime.h>
  51. #include <asm/vdso.h>
  52. #include <asm/cpu.h>
  53. #include "entry.h"
  54. /* logical cpu to cpu address */
  55. unsigned short __cpu_logical_map[NR_CPUS];
  56. static struct task_struct *current_set[NR_CPUS];
  57. static u8 smp_cpu_type;
  58. static int smp_use_sigp_detection;
  59. enum s390_cpu_state {
  60. CPU_STATE_STANDBY,
  61. CPU_STATE_CONFIGURED,
  62. };
  63. DEFINE_MUTEX(smp_cpu_state_mutex);
  64. int smp_cpu_polarization[NR_CPUS];
  65. static int smp_cpu_state[NR_CPUS];
  66. static int cpu_management;
  67. static DEFINE_PER_CPU(struct cpu, cpu_devices);
  68. static void smp_ext_bitcall(int, int);
  69. static int raw_cpu_stopped(int cpu)
  70. {
  71. u32 status;
  72. switch (raw_sigp_ps(&status, 0, cpu, sigp_sense)) {
  73. case sigp_status_stored:
  74. /* Check for stopped and check stop state */
  75. if (status & 0x50)
  76. return 1;
  77. break;
  78. default:
  79. break;
  80. }
  81. return 0;
  82. }
  83. static inline int cpu_stopped(int cpu)
  84. {
  85. return raw_cpu_stopped(cpu_logical_map(cpu));
  86. }
  87. void smp_switch_to_ipl_cpu(void (*func)(void *), void *data)
  88. {
  89. struct _lowcore *lc, *current_lc;
  90. struct stack_frame *sf;
  91. struct pt_regs *regs;
  92. unsigned long sp;
  93. if (smp_processor_id() == 0)
  94. func(data);
  95. __load_psw_mask(PSW_BASE_BITS | PSW_DEFAULT_KEY);
  96. /* Disable lowcore protection */
  97. __ctl_clear_bit(0, 28);
  98. current_lc = lowcore_ptr[smp_processor_id()];
  99. lc = lowcore_ptr[0];
  100. if (!lc)
  101. lc = current_lc;
  102. lc->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
  103. lc->restart_psw.addr = PSW_ADDR_AMODE | (unsigned long) smp_restart_cpu;
  104. if (!cpu_online(0))
  105. smp_switch_to_cpu(func, data, 0, stap(), __cpu_logical_map[0]);
  106. while (sigp(0, sigp_stop_and_store_status) == sigp_busy)
  107. cpu_relax();
  108. sp = lc->panic_stack;
  109. sp -= sizeof(struct pt_regs);
  110. regs = (struct pt_regs *) sp;
  111. memcpy(&regs->gprs, &current_lc->gpregs_save_area, sizeof(regs->gprs));
  112. regs->psw = lc->psw_save_area;
  113. sp -= STACK_FRAME_OVERHEAD;
  114. sf = (struct stack_frame *) sp;
  115. sf->back_chain = regs->gprs[15];
  116. smp_switch_to_cpu(func, data, sp, stap(), __cpu_logical_map[0]);
  117. }
  118. void smp_send_stop(void)
  119. {
  120. int cpu, rc;
  121. /* Disable all interrupts/machine checks */
  122. __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
  123. trace_hardirqs_off();
  124. /* stop all processors */
  125. for_each_online_cpu(cpu) {
  126. if (cpu == smp_processor_id())
  127. continue;
  128. do {
  129. rc = sigp(cpu, sigp_stop);
  130. } while (rc == sigp_busy);
  131. while (!cpu_stopped(cpu))
  132. cpu_relax();
  133. }
  134. }
  135. /*
  136. * This is the main routine where commands issued by other
  137. * cpus are handled.
  138. */
  139. static void do_ext_call_interrupt(unsigned int ext_int_code,
  140. unsigned int param32, unsigned long param64)
  141. {
  142. unsigned long bits;
  143. kstat_cpu(smp_processor_id()).irqs[EXTINT_IPI]++;
  144. /*
  145. * handle bit signal external calls
  146. */
  147. bits = xchg(&S390_lowcore.ext_call_fast, 0);
  148. if (test_bit(ec_schedule, &bits))
  149. scheduler_ipi();
  150. if (test_bit(ec_call_function, &bits))
  151. generic_smp_call_function_interrupt();
  152. if (test_bit(ec_call_function_single, &bits))
  153. generic_smp_call_function_single_interrupt();
  154. }
  155. /*
  156. * Send an external call sigp to another cpu and return without waiting
  157. * for its completion.
  158. */
  159. static void smp_ext_bitcall(int cpu, int sig)
  160. {
  161. /*
  162. * Set signaling bit in lowcore of target cpu and kick it
  163. */
  164. set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
  165. while (sigp(cpu, sigp_emergency_signal) == sigp_busy)
  166. udelay(10);
  167. }
  168. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  169. {
  170. int cpu;
  171. for_each_cpu(cpu, mask)
  172. smp_ext_bitcall(cpu, ec_call_function);
  173. }
  174. void arch_send_call_function_single_ipi(int cpu)
  175. {
  176. smp_ext_bitcall(cpu, ec_call_function_single);
  177. }
  178. #ifndef CONFIG_64BIT
  179. /*
  180. * this function sends a 'purge tlb' signal to another CPU.
  181. */
  182. static void smp_ptlb_callback(void *info)
  183. {
  184. __tlb_flush_local();
  185. }
  186. void smp_ptlb_all(void)
  187. {
  188. on_each_cpu(smp_ptlb_callback, NULL, 1);
  189. }
  190. EXPORT_SYMBOL(smp_ptlb_all);
  191. #endif /* ! CONFIG_64BIT */
  192. /*
  193. * this function sends a 'reschedule' IPI to another CPU.
  194. * it goes straight through and wastes no time serializing
  195. * anything. Worst case is that we lose a reschedule ...
  196. */
  197. void smp_send_reschedule(int cpu)
  198. {
  199. smp_ext_bitcall(cpu, ec_schedule);
  200. }
  201. /*
  202. * parameter area for the set/clear control bit callbacks
  203. */
  204. struct ec_creg_mask_parms {
  205. unsigned long orvals[16];
  206. unsigned long andvals[16];
  207. };
  208. /*
  209. * callback for setting/clearing control bits
  210. */
  211. static void smp_ctl_bit_callback(void *info)
  212. {
  213. struct ec_creg_mask_parms *pp = info;
  214. unsigned long cregs[16];
  215. int i;
  216. __ctl_store(cregs, 0, 15);
  217. for (i = 0; i <= 15; i++)
  218. cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i];
  219. __ctl_load(cregs, 0, 15);
  220. }
  221. /*
  222. * Set a bit in a control register of all cpus
  223. */
  224. void smp_ctl_set_bit(int cr, int bit)
  225. {
  226. struct ec_creg_mask_parms parms;
  227. memset(&parms.orvals, 0, sizeof(parms.orvals));
  228. memset(&parms.andvals, 0xff, sizeof(parms.andvals));
  229. parms.orvals[cr] = 1UL << bit;
  230. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  231. }
  232. EXPORT_SYMBOL(smp_ctl_set_bit);
  233. /*
  234. * Clear a bit in a control register of all cpus
  235. */
  236. void smp_ctl_clear_bit(int cr, int bit)
  237. {
  238. struct ec_creg_mask_parms parms;
  239. memset(&parms.orvals, 0, sizeof(parms.orvals));
  240. memset(&parms.andvals, 0xff, sizeof(parms.andvals));
  241. parms.andvals[cr] = ~(1UL << bit);
  242. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  243. }
  244. EXPORT_SYMBOL(smp_ctl_clear_bit);
  245. #ifdef CONFIG_ZFCPDUMP
  246. static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
  247. {
  248. if (ipl_info.type != IPL_TYPE_FCP_DUMP)
  249. return;
  250. if (cpu >= NR_CPUS) {
  251. pr_warning("CPU %i exceeds the maximum %i and is excluded from "
  252. "the dump\n", cpu, NR_CPUS - 1);
  253. return;
  254. }
  255. zfcpdump_save_areas[cpu] = kmalloc(sizeof(struct save_area), GFP_KERNEL);
  256. while (raw_sigp(phy_cpu, sigp_stop_and_store_status) == sigp_busy)
  257. cpu_relax();
  258. memcpy_real(zfcpdump_save_areas[cpu],
  259. (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
  260. sizeof(struct save_area));
  261. }
  262. struct save_area *zfcpdump_save_areas[NR_CPUS + 1];
  263. EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
  264. #else
  265. static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
  266. #endif /* CONFIG_ZFCPDUMP */
  267. static int cpu_known(int cpu_id)
  268. {
  269. int cpu;
  270. for_each_present_cpu(cpu) {
  271. if (__cpu_logical_map[cpu] == cpu_id)
  272. return 1;
  273. }
  274. return 0;
  275. }
  276. static int smp_rescan_cpus_sigp(cpumask_t avail)
  277. {
  278. int cpu_id, logical_cpu;
  279. logical_cpu = cpumask_first(&avail);
  280. if (logical_cpu >= nr_cpu_ids)
  281. return 0;
  282. for (cpu_id = 0; cpu_id <= MAX_CPU_ADDRESS; cpu_id++) {
  283. if (cpu_known(cpu_id))
  284. continue;
  285. __cpu_logical_map[logical_cpu] = cpu_id;
  286. smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
  287. if (!cpu_stopped(logical_cpu))
  288. continue;
  289. set_cpu_present(logical_cpu, true);
  290. smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
  291. logical_cpu = cpumask_next(logical_cpu, &avail);
  292. if (logical_cpu >= nr_cpu_ids)
  293. break;
  294. }
  295. return 0;
  296. }
  297. static int smp_rescan_cpus_sclp(cpumask_t avail)
  298. {
  299. struct sclp_cpu_info *info;
  300. int cpu_id, logical_cpu, cpu;
  301. int rc;
  302. logical_cpu = cpumask_first(&avail);
  303. if (logical_cpu >= nr_cpu_ids)
  304. return 0;
  305. info = kmalloc(sizeof(*info), GFP_KERNEL);
  306. if (!info)
  307. return -ENOMEM;
  308. rc = sclp_get_cpu_info(info);
  309. if (rc)
  310. goto out;
  311. for (cpu = 0; cpu < info->combined; cpu++) {
  312. if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
  313. continue;
  314. cpu_id = info->cpu[cpu].address;
  315. if (cpu_known(cpu_id))
  316. continue;
  317. __cpu_logical_map[logical_cpu] = cpu_id;
  318. smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
  319. set_cpu_present(logical_cpu, true);
  320. if (cpu >= info->configured)
  321. smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
  322. else
  323. smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
  324. logical_cpu = cpumask_next(logical_cpu, &avail);
  325. if (logical_cpu >= nr_cpu_ids)
  326. break;
  327. }
  328. out:
  329. kfree(info);
  330. return rc;
  331. }
  332. static int __smp_rescan_cpus(void)
  333. {
  334. cpumask_t avail;
  335. cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
  336. if (smp_use_sigp_detection)
  337. return smp_rescan_cpus_sigp(avail);
  338. else
  339. return smp_rescan_cpus_sclp(avail);
  340. }
  341. static void __init smp_detect_cpus(void)
  342. {
  343. unsigned int cpu, c_cpus, s_cpus;
  344. struct sclp_cpu_info *info;
  345. u16 boot_cpu_addr, cpu_addr;
  346. c_cpus = 1;
  347. s_cpus = 0;
  348. boot_cpu_addr = __cpu_logical_map[0];
  349. info = kmalloc(sizeof(*info), GFP_KERNEL);
  350. if (!info)
  351. panic("smp_detect_cpus failed to allocate memory\n");
  352. /* Use sigp detection algorithm if sclp doesn't work. */
  353. if (sclp_get_cpu_info(info)) {
  354. smp_use_sigp_detection = 1;
  355. for (cpu = 0; cpu <= MAX_CPU_ADDRESS; cpu++) {
  356. if (cpu == boot_cpu_addr)
  357. continue;
  358. if (!raw_cpu_stopped(cpu))
  359. continue;
  360. smp_get_save_area(c_cpus, cpu);
  361. c_cpus++;
  362. }
  363. goto out;
  364. }
  365. if (info->has_cpu_type) {
  366. for (cpu = 0; cpu < info->combined; cpu++) {
  367. if (info->cpu[cpu].address == boot_cpu_addr) {
  368. smp_cpu_type = info->cpu[cpu].type;
  369. break;
  370. }
  371. }
  372. }
  373. for (cpu = 0; cpu < info->combined; cpu++) {
  374. if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
  375. continue;
  376. cpu_addr = info->cpu[cpu].address;
  377. if (cpu_addr == boot_cpu_addr)
  378. continue;
  379. if (!raw_cpu_stopped(cpu_addr)) {
  380. s_cpus++;
  381. continue;
  382. }
  383. smp_get_save_area(c_cpus, cpu_addr);
  384. c_cpus++;
  385. }
  386. out:
  387. kfree(info);
  388. pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
  389. get_online_cpus();
  390. __smp_rescan_cpus();
  391. put_online_cpus();
  392. }
  393. /*
  394. * Activate a secondary processor.
  395. */
  396. int __cpuinit start_secondary(void *cpuvoid)
  397. {
  398. /* Setup the cpu */
  399. cpu_init();
  400. preempt_disable();
  401. /* Enable TOD clock interrupts on the secondary cpu. */
  402. init_cpu_timer();
  403. /* Enable cpu timer interrupts on the secondary cpu. */
  404. init_cpu_vtimer();
  405. /* Enable pfault pseudo page faults on this cpu. */
  406. pfault_init();
  407. /* call cpu notifiers */
  408. notify_cpu_starting(smp_processor_id());
  409. /* Mark this cpu as online */
  410. ipi_call_lock();
  411. set_cpu_online(smp_processor_id(), true);
  412. ipi_call_unlock();
  413. __ctl_clear_bit(0, 28); /* Disable lowcore protection */
  414. S390_lowcore.restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
  415. S390_lowcore.restart_psw.addr =
  416. PSW_ADDR_AMODE | (unsigned long) psw_restart_int_handler;
  417. __ctl_set_bit(0, 28); /* Enable lowcore protection */
  418. /*
  419. * Wait until the cpu which brought this one up marked it
  420. * active before enabling interrupts.
  421. */
  422. while (!cpumask_test_cpu(smp_processor_id(), cpu_active_mask))
  423. cpu_relax();
  424. local_irq_enable();
  425. /* cpu_idle will call schedule for us */
  426. cpu_idle();
  427. return 0;
  428. }
  429. struct create_idle {
  430. struct work_struct work;
  431. struct task_struct *idle;
  432. struct completion done;
  433. int cpu;
  434. };
  435. static void __cpuinit smp_fork_idle(struct work_struct *work)
  436. {
  437. struct create_idle *c_idle;
  438. c_idle = container_of(work, struct create_idle, work);
  439. c_idle->idle = fork_idle(c_idle->cpu);
  440. complete(&c_idle->done);
  441. }
  442. static int __cpuinit smp_alloc_lowcore(int cpu)
  443. {
  444. unsigned long async_stack, panic_stack;
  445. struct _lowcore *lowcore;
  446. lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
  447. if (!lowcore)
  448. return -ENOMEM;
  449. async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
  450. panic_stack = __get_free_page(GFP_KERNEL);
  451. if (!panic_stack || !async_stack)
  452. goto out;
  453. memcpy(lowcore, &S390_lowcore, 512);
  454. memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512);
  455. lowcore->async_stack = async_stack + ASYNC_SIZE;
  456. lowcore->panic_stack = panic_stack + PAGE_SIZE;
  457. lowcore->restart_psw.mask = PSW_BASE_BITS | PSW_DEFAULT_KEY;
  458. lowcore->restart_psw.addr =
  459. PSW_ADDR_AMODE | (unsigned long) restart_int_handler;
  460. if (user_mode != HOME_SPACE_MODE)
  461. lowcore->restart_psw.mask |= PSW_ASC_HOME;
  462. #ifndef CONFIG_64BIT
  463. if (MACHINE_HAS_IEEE) {
  464. unsigned long save_area;
  465. save_area = get_zeroed_page(GFP_KERNEL);
  466. if (!save_area)
  467. goto out;
  468. lowcore->extended_save_area_addr = (u32) save_area;
  469. }
  470. #else
  471. if (vdso_alloc_per_cpu(cpu, lowcore))
  472. goto out;
  473. #endif
  474. lowcore_ptr[cpu] = lowcore;
  475. return 0;
  476. out:
  477. free_page(panic_stack);
  478. free_pages(async_stack, ASYNC_ORDER);
  479. free_pages((unsigned long) lowcore, LC_ORDER);
  480. return -ENOMEM;
  481. }
  482. static void smp_free_lowcore(int cpu)
  483. {
  484. struct _lowcore *lowcore;
  485. lowcore = lowcore_ptr[cpu];
  486. #ifndef CONFIG_64BIT
  487. if (MACHINE_HAS_IEEE)
  488. free_page((unsigned long) lowcore->extended_save_area_addr);
  489. #else
  490. vdso_free_per_cpu(cpu, lowcore);
  491. #endif
  492. free_page(lowcore->panic_stack - PAGE_SIZE);
  493. free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER);
  494. free_pages((unsigned long) lowcore, LC_ORDER);
  495. lowcore_ptr[cpu] = NULL;
  496. }
  497. /* Upping and downing of CPUs */
  498. int __cpuinit __cpu_up(unsigned int cpu)
  499. {
  500. struct _lowcore *cpu_lowcore;
  501. struct create_idle c_idle;
  502. struct task_struct *idle;
  503. struct stack_frame *sf;
  504. u32 lowcore;
  505. int ccode;
  506. if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED)
  507. return -EIO;
  508. idle = current_set[cpu];
  509. if (!idle) {
  510. c_idle.done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done);
  511. INIT_WORK_ONSTACK(&c_idle.work, smp_fork_idle);
  512. c_idle.cpu = cpu;
  513. schedule_work(&c_idle.work);
  514. wait_for_completion(&c_idle.done);
  515. if (IS_ERR(c_idle.idle))
  516. return PTR_ERR(c_idle.idle);
  517. idle = c_idle.idle;
  518. current_set[cpu] = c_idle.idle;
  519. }
  520. init_idle(idle, cpu);
  521. if (smp_alloc_lowcore(cpu))
  522. return -ENOMEM;
  523. do {
  524. ccode = sigp(cpu, sigp_initial_cpu_reset);
  525. if (ccode == sigp_busy)
  526. udelay(10);
  527. if (ccode == sigp_not_operational)
  528. goto err_out;
  529. } while (ccode == sigp_busy);
  530. lowcore = (u32)(unsigned long)lowcore_ptr[cpu];
  531. while (sigp_p(lowcore, cpu, sigp_set_prefix) == sigp_busy)
  532. udelay(10);
  533. cpu_lowcore = lowcore_ptr[cpu];
  534. cpu_lowcore->kernel_stack = (unsigned long)
  535. task_stack_page(idle) + THREAD_SIZE;
  536. cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle);
  537. sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
  538. - sizeof(struct pt_regs)
  539. - sizeof(struct stack_frame));
  540. memset(sf, 0, sizeof(struct stack_frame));
  541. sf->gprs[9] = (unsigned long) sf;
  542. cpu_lowcore->save_area[15] = (unsigned long) sf;
  543. __ctl_store(cpu_lowcore->cregs_save_area, 0, 15);
  544. atomic_inc(&init_mm.context.attach_count);
  545. asm volatile(
  546. " stam 0,15,0(%0)"
  547. : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
  548. cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
  549. cpu_lowcore->current_task = (unsigned long) idle;
  550. cpu_lowcore->cpu_nr = cpu;
  551. cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
  552. cpu_lowcore->machine_flags = S390_lowcore.machine_flags;
  553. cpu_lowcore->ftrace_func = S390_lowcore.ftrace_func;
  554. memcpy(cpu_lowcore->stfle_fac_list, S390_lowcore.stfle_fac_list,
  555. MAX_FACILITY_BIT/8);
  556. eieio();
  557. while (sigp(cpu, sigp_restart) == sigp_busy)
  558. udelay(10);
  559. while (!cpu_online(cpu))
  560. cpu_relax();
  561. return 0;
  562. err_out:
  563. smp_free_lowcore(cpu);
  564. return -EIO;
  565. }
  566. static int __init setup_possible_cpus(char *s)
  567. {
  568. int pcpus, cpu;
  569. pcpus = simple_strtoul(s, NULL, 0);
  570. init_cpu_possible(cpumask_of(0));
  571. for (cpu = 1; cpu < pcpus && cpu < nr_cpu_ids; cpu++)
  572. set_cpu_possible(cpu, true);
  573. return 0;
  574. }
  575. early_param("possible_cpus", setup_possible_cpus);
  576. #ifdef CONFIG_HOTPLUG_CPU
  577. int __cpu_disable(void)
  578. {
  579. struct ec_creg_mask_parms cr_parms;
  580. int cpu = smp_processor_id();
  581. set_cpu_online(cpu, false);
  582. /* Disable pfault pseudo page faults on this cpu. */
  583. pfault_fini();
  584. memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals));
  585. memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals));
  586. /* disable all external interrupts */
  587. cr_parms.orvals[0] = 0;
  588. cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 11 |
  589. 1 << 10 | 1 << 9 | 1 << 6 | 1 << 5 |
  590. 1 << 4);
  591. /* disable all I/O interrupts */
  592. cr_parms.orvals[6] = 0;
  593. cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 |
  594. 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24);
  595. /* disable most machine checks */
  596. cr_parms.orvals[14] = 0;
  597. cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 |
  598. 1 << 25 | 1 << 24);
  599. smp_ctl_bit_callback(&cr_parms);
  600. return 0;
  601. }
  602. void __cpu_die(unsigned int cpu)
  603. {
  604. /* Wait until target cpu is down */
  605. while (!cpu_stopped(cpu))
  606. cpu_relax();
  607. while (sigp_p(0, cpu, sigp_set_prefix) == sigp_busy)
  608. udelay(10);
  609. smp_free_lowcore(cpu);
  610. atomic_dec(&init_mm.context.attach_count);
  611. }
  612. void __noreturn cpu_die(void)
  613. {
  614. idle_task_exit();
  615. while (sigp(smp_processor_id(), sigp_stop) == sigp_busy)
  616. cpu_relax();
  617. for (;;);
  618. }
  619. #endif /* CONFIG_HOTPLUG_CPU */
  620. void __init smp_prepare_cpus(unsigned int max_cpus)
  621. {
  622. #ifndef CONFIG_64BIT
  623. unsigned long save_area = 0;
  624. #endif
  625. unsigned long async_stack, panic_stack;
  626. struct _lowcore *lowcore;
  627. smp_detect_cpus();
  628. /* request the 0x1201 emergency signal external interrupt */
  629. if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
  630. panic("Couldn't request external interrupt 0x1201");
  631. /* Reallocate current lowcore, but keep its contents. */
  632. lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
  633. panic_stack = __get_free_page(GFP_KERNEL);
  634. async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
  635. BUG_ON(!lowcore || !panic_stack || !async_stack);
  636. #ifndef CONFIG_64BIT
  637. if (MACHINE_HAS_IEEE)
  638. save_area = get_zeroed_page(GFP_KERNEL);
  639. #endif
  640. local_irq_disable();
  641. local_mcck_disable();
  642. lowcore_ptr[smp_processor_id()] = lowcore;
  643. *lowcore = S390_lowcore;
  644. lowcore->panic_stack = panic_stack + PAGE_SIZE;
  645. lowcore->async_stack = async_stack + ASYNC_SIZE;
  646. #ifndef CONFIG_64BIT
  647. if (MACHINE_HAS_IEEE)
  648. lowcore->extended_save_area_addr = (u32) save_area;
  649. #endif
  650. set_prefix((u32)(unsigned long) lowcore);
  651. local_mcck_enable();
  652. local_irq_enable();
  653. #ifdef CONFIG_64BIT
  654. if (vdso_alloc_per_cpu(smp_processor_id(), &S390_lowcore))
  655. BUG();
  656. #endif
  657. }
  658. void __init smp_prepare_boot_cpu(void)
  659. {
  660. BUG_ON(smp_processor_id() != 0);
  661. current_thread_info()->cpu = 0;
  662. set_cpu_present(0, true);
  663. set_cpu_online(0, true);
  664. S390_lowcore.percpu_offset = __per_cpu_offset[0];
  665. current_set[0] = current;
  666. smp_cpu_state[0] = CPU_STATE_CONFIGURED;
  667. smp_cpu_polarization[0] = POLARIZATION_UNKNWN;
  668. }
  669. void __init smp_cpus_done(unsigned int max_cpus)
  670. {
  671. }
  672. void __init smp_setup_processor_id(void)
  673. {
  674. S390_lowcore.cpu_nr = 0;
  675. __cpu_logical_map[0] = stap();
  676. }
  677. /*
  678. * the frequency of the profiling timer can be changed
  679. * by writing a multiplier value into /proc/profile.
  680. *
  681. * usually you want to run this on all CPUs ;)
  682. */
  683. int setup_profiling_timer(unsigned int multiplier)
  684. {
  685. return 0;
  686. }
  687. #ifdef CONFIG_HOTPLUG_CPU
  688. static ssize_t cpu_configure_show(struct sys_device *dev,
  689. struct sysdev_attribute *attr, char *buf)
  690. {
  691. ssize_t count;
  692. mutex_lock(&smp_cpu_state_mutex);
  693. count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]);
  694. mutex_unlock(&smp_cpu_state_mutex);
  695. return count;
  696. }
  697. static ssize_t cpu_configure_store(struct sys_device *dev,
  698. struct sysdev_attribute *attr,
  699. const char *buf, size_t count)
  700. {
  701. int cpu = dev->id;
  702. int val, rc;
  703. char delim;
  704. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  705. return -EINVAL;
  706. if (val != 0 && val != 1)
  707. return -EINVAL;
  708. get_online_cpus();
  709. mutex_lock(&smp_cpu_state_mutex);
  710. rc = -EBUSY;
  711. /* disallow configuration changes of online cpus and cpu 0 */
  712. if (cpu_online(cpu) || cpu == 0)
  713. goto out;
  714. rc = 0;
  715. switch (val) {
  716. case 0:
  717. if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) {
  718. rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]);
  719. if (!rc) {
  720. smp_cpu_state[cpu] = CPU_STATE_STANDBY;
  721. smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
  722. }
  723. }
  724. break;
  725. case 1:
  726. if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) {
  727. rc = sclp_cpu_configure(__cpu_logical_map[cpu]);
  728. if (!rc) {
  729. smp_cpu_state[cpu] = CPU_STATE_CONFIGURED;
  730. smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
  731. }
  732. }
  733. break;
  734. default:
  735. break;
  736. }
  737. out:
  738. mutex_unlock(&smp_cpu_state_mutex);
  739. put_online_cpus();
  740. return rc ? rc : count;
  741. }
  742. static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
  743. #endif /* CONFIG_HOTPLUG_CPU */
  744. static ssize_t cpu_polarization_show(struct sys_device *dev,
  745. struct sysdev_attribute *attr, char *buf)
  746. {
  747. int cpu = dev->id;
  748. ssize_t count;
  749. mutex_lock(&smp_cpu_state_mutex);
  750. switch (smp_cpu_polarization[cpu]) {
  751. case POLARIZATION_HRZ:
  752. count = sprintf(buf, "horizontal\n");
  753. break;
  754. case POLARIZATION_VL:
  755. count = sprintf(buf, "vertical:low\n");
  756. break;
  757. case POLARIZATION_VM:
  758. count = sprintf(buf, "vertical:medium\n");
  759. break;
  760. case POLARIZATION_VH:
  761. count = sprintf(buf, "vertical:high\n");
  762. break;
  763. default:
  764. count = sprintf(buf, "unknown\n");
  765. break;
  766. }
  767. mutex_unlock(&smp_cpu_state_mutex);
  768. return count;
  769. }
  770. static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL);
  771. static ssize_t show_cpu_address(struct sys_device *dev,
  772. struct sysdev_attribute *attr, char *buf)
  773. {
  774. return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]);
  775. }
  776. static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL);
  777. static struct attribute *cpu_common_attrs[] = {
  778. #ifdef CONFIG_HOTPLUG_CPU
  779. &attr_configure.attr,
  780. #endif
  781. &attr_address.attr,
  782. &attr_polarization.attr,
  783. NULL,
  784. };
  785. static struct attribute_group cpu_common_attr_group = {
  786. .attrs = cpu_common_attrs,
  787. };
  788. static ssize_t show_capability(struct sys_device *dev,
  789. struct sysdev_attribute *attr, char *buf)
  790. {
  791. unsigned int capability;
  792. int rc;
  793. rc = get_cpu_capability(&capability);
  794. if (rc)
  795. return rc;
  796. return sprintf(buf, "%u\n", capability);
  797. }
  798. static SYSDEV_ATTR(capability, 0444, show_capability, NULL);
  799. static ssize_t show_idle_count(struct sys_device *dev,
  800. struct sysdev_attribute *attr, char *buf)
  801. {
  802. struct s390_idle_data *idle;
  803. unsigned long long idle_count;
  804. unsigned int sequence;
  805. idle = &per_cpu(s390_idle, dev->id);
  806. repeat:
  807. sequence = idle->sequence;
  808. smp_rmb();
  809. if (sequence & 1)
  810. goto repeat;
  811. idle_count = idle->idle_count;
  812. if (idle->idle_enter)
  813. idle_count++;
  814. smp_rmb();
  815. if (idle->sequence != sequence)
  816. goto repeat;
  817. return sprintf(buf, "%llu\n", idle_count);
  818. }
  819. static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL);
  820. static ssize_t show_idle_time(struct sys_device *dev,
  821. struct sysdev_attribute *attr, char *buf)
  822. {
  823. struct s390_idle_data *idle;
  824. unsigned long long now, idle_time, idle_enter;
  825. unsigned int sequence;
  826. idle = &per_cpu(s390_idle, dev->id);
  827. now = get_clock();
  828. repeat:
  829. sequence = idle->sequence;
  830. smp_rmb();
  831. if (sequence & 1)
  832. goto repeat;
  833. idle_time = idle->idle_time;
  834. idle_enter = idle->idle_enter;
  835. if (idle_enter != 0ULL && idle_enter < now)
  836. idle_time += now - idle_enter;
  837. smp_rmb();
  838. if (idle->sequence != sequence)
  839. goto repeat;
  840. return sprintf(buf, "%llu\n", idle_time >> 12);
  841. }
  842. static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL);
  843. static struct attribute *cpu_online_attrs[] = {
  844. &attr_capability.attr,
  845. &attr_idle_count.attr,
  846. &attr_idle_time_us.attr,
  847. NULL,
  848. };
  849. static struct attribute_group cpu_online_attr_group = {
  850. .attrs = cpu_online_attrs,
  851. };
  852. static int __cpuinit smp_cpu_notify(struct notifier_block *self,
  853. unsigned long action, void *hcpu)
  854. {
  855. unsigned int cpu = (unsigned int)(long)hcpu;
  856. struct cpu *c = &per_cpu(cpu_devices, cpu);
  857. struct sys_device *s = &c->sysdev;
  858. struct s390_idle_data *idle;
  859. int err = 0;
  860. switch (action) {
  861. case CPU_ONLINE:
  862. case CPU_ONLINE_FROZEN:
  863. idle = &per_cpu(s390_idle, cpu);
  864. memset(idle, 0, sizeof(struct s390_idle_data));
  865. err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  866. break;
  867. case CPU_DEAD:
  868. case CPU_DEAD_FROZEN:
  869. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  870. break;
  871. }
  872. return notifier_from_errno(err);
  873. }
  874. static struct notifier_block __cpuinitdata smp_cpu_nb = {
  875. .notifier_call = smp_cpu_notify,
  876. };
  877. static int __devinit smp_add_present_cpu(int cpu)
  878. {
  879. struct cpu *c = &per_cpu(cpu_devices, cpu);
  880. struct sys_device *s = &c->sysdev;
  881. int rc;
  882. c->hotpluggable = 1;
  883. rc = register_cpu(c, cpu);
  884. if (rc)
  885. goto out;
  886. rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
  887. if (rc)
  888. goto out_cpu;
  889. if (!cpu_online(cpu))
  890. goto out;
  891. rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  892. if (!rc)
  893. return 0;
  894. sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
  895. out_cpu:
  896. #ifdef CONFIG_HOTPLUG_CPU
  897. unregister_cpu(c);
  898. #endif
  899. out:
  900. return rc;
  901. }
  902. #ifdef CONFIG_HOTPLUG_CPU
  903. int __ref smp_rescan_cpus(void)
  904. {
  905. cpumask_t newcpus;
  906. int cpu;
  907. int rc;
  908. get_online_cpus();
  909. mutex_lock(&smp_cpu_state_mutex);
  910. cpumask_copy(&newcpus, cpu_present_mask);
  911. rc = __smp_rescan_cpus();
  912. if (rc)
  913. goto out;
  914. cpumask_andnot(&newcpus, cpu_present_mask, &newcpus);
  915. for_each_cpu(cpu, &newcpus) {
  916. rc = smp_add_present_cpu(cpu);
  917. if (rc)
  918. set_cpu_present(cpu, false);
  919. }
  920. rc = 0;
  921. out:
  922. mutex_unlock(&smp_cpu_state_mutex);
  923. put_online_cpus();
  924. if (!cpumask_empty(&newcpus))
  925. topology_schedule_update();
  926. return rc;
  927. }
  928. static ssize_t __ref rescan_store(struct sysdev_class *class,
  929. struct sysdev_class_attribute *attr,
  930. const char *buf,
  931. size_t count)
  932. {
  933. int rc;
  934. rc = smp_rescan_cpus();
  935. return rc ? rc : count;
  936. }
  937. static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
  938. #endif /* CONFIG_HOTPLUG_CPU */
  939. static ssize_t dispatching_show(struct sysdev_class *class,
  940. struct sysdev_class_attribute *attr,
  941. char *buf)
  942. {
  943. ssize_t count;
  944. mutex_lock(&smp_cpu_state_mutex);
  945. count = sprintf(buf, "%d\n", cpu_management);
  946. mutex_unlock(&smp_cpu_state_mutex);
  947. return count;
  948. }
  949. static ssize_t dispatching_store(struct sysdev_class *dev,
  950. struct sysdev_class_attribute *attr,
  951. const char *buf,
  952. size_t count)
  953. {
  954. int val, rc;
  955. char delim;
  956. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  957. return -EINVAL;
  958. if (val != 0 && val != 1)
  959. return -EINVAL;
  960. rc = 0;
  961. get_online_cpus();
  962. mutex_lock(&smp_cpu_state_mutex);
  963. if (cpu_management == val)
  964. goto out;
  965. rc = topology_set_cpu_management(val);
  966. if (!rc)
  967. cpu_management = val;
  968. out:
  969. mutex_unlock(&smp_cpu_state_mutex);
  970. put_online_cpus();
  971. return rc ? rc : count;
  972. }
  973. static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show,
  974. dispatching_store);
  975. static int __init topology_init(void)
  976. {
  977. int cpu;
  978. int rc;
  979. register_cpu_notifier(&smp_cpu_nb);
  980. #ifdef CONFIG_HOTPLUG_CPU
  981. rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan);
  982. if (rc)
  983. return rc;
  984. #endif
  985. rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching);
  986. if (rc)
  987. return rc;
  988. for_each_present_cpu(cpu) {
  989. rc = smp_add_present_cpu(cpu);
  990. if (rc)
  991. return rc;
  992. }
  993. return 0;
  994. }
  995. subsys_initcall(topology_init);