board-dt.c 4.6 KB

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  1. /*
  2. * nVidia Tegra device tree board support
  3. *
  4. * Copyright (C) 2010 Secret Lab Technologies, Ltd.
  5. * Copyright (C) 2010 Google, Inc.
  6. *
  7. * This software is licensed under the terms of the GNU General Public
  8. * License version 2, as published by the Free Software Foundation, and
  9. * may be copied, distributed, and modified under those terms.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/serial_8250.h>
  21. #include <linux/clk.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/irqdomain.h>
  24. #include <linux/of.h>
  25. #include <linux/of_address.h>
  26. #include <linux/of_fdt.h>
  27. #include <linux/of_irq.h>
  28. #include <linux/of_platform.h>
  29. #include <linux/pda_power.h>
  30. #include <linux/io.h>
  31. #include <linux/i2c.h>
  32. #include <linux/i2c-tegra.h>
  33. #include <asm/mach-types.h>
  34. #include <asm/mach/arch.h>
  35. #include <asm/mach/time.h>
  36. #include <asm/setup.h>
  37. #include <mach/iomap.h>
  38. #include <mach/irqs.h>
  39. #include "board.h"
  40. #include "board-harmony.h"
  41. #include "clock.h"
  42. #include "devices.h"
  43. void harmony_pinmux_init(void);
  44. void paz00_pinmux_init(void);
  45. void seaboard_pinmux_init(void);
  46. void trimslice_pinmux_init(void);
  47. void ventana_pinmux_init(void);
  48. struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
  49. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
  50. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
  51. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
  52. OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
  53. OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
  54. OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
  55. OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
  56. OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
  57. OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
  58. OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.1", NULL),
  59. OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
  60. OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",
  61. &tegra_ehci1_device.dev.platform_data),
  62. OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",
  63. &tegra_ehci2_device.dev.platform_data),
  64. OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
  65. &tegra_ehci3_device.dev.platform_data),
  66. {}
  67. };
  68. static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
  69. /* name parent rate enabled */
  70. { "uartd", "pll_p", 216000000, true },
  71. { "usbd", "clk_m", 12000000, false },
  72. { "usb2", "clk_m", 12000000, false },
  73. { "usb3", "clk_m", 12000000, false },
  74. { NULL, NULL, 0, 0},
  75. };
  76. static struct of_device_id tegra_dt_match_table[] __initdata = {
  77. { .compatible = "simple-bus", },
  78. {}
  79. };
  80. static struct of_device_id tegra_dt_gic_match[] __initdata = {
  81. { .compatible = "nvidia,tegra20-gic", },
  82. {}
  83. };
  84. static struct {
  85. char *machine;
  86. void (*init)(void);
  87. } pinmux_configs[] = {
  88. { "compulab,trimslice", trimslice_pinmux_init },
  89. { "nvidia,harmony", harmony_pinmux_init },
  90. { "compal,paz00", paz00_pinmux_init },
  91. { "nvidia,seaboard", seaboard_pinmux_init },
  92. { "nvidia,ventana", ventana_pinmux_init },
  93. };
  94. static void __init tegra_dt_init(void)
  95. {
  96. struct device_node *node;
  97. int i;
  98. node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match,
  99. TEGRA_ARM_INT_DIST_BASE);
  100. if (node)
  101. irq_domain_add_simple(node, INT_GIC_BASE);
  102. tegra_clk_init_from_table(tegra_dt_clk_init_table);
  103. /*
  104. * Finished with the static registrations now; fill in the missing
  105. * devices
  106. */
  107. of_platform_populate(NULL, tegra_dt_match_table,
  108. tegra20_auxdata_lookup, NULL);
  109. for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
  110. if (of_machine_is_compatible(pinmux_configs[i].machine)) {
  111. pinmux_configs[i].init();
  112. break;
  113. }
  114. }
  115. WARN(i == ARRAY_SIZE(pinmux_configs),
  116. "Unknown platform! Pinmuxing not initialized\n");
  117. }
  118. static const char * tegra_dt_board_compat[] = {
  119. "compulab,trimslice",
  120. "nvidia,harmony",
  121. "compal,paz00",
  122. "nvidia,seaboard",
  123. "nvidia,ventana",
  124. NULL
  125. };
  126. DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
  127. .map_io = tegra_map_common_io,
  128. .init_early = tegra_init_early,
  129. .init_irq = tegra_init_irq,
  130. .timer = &tegra_timer,
  131. .init_machine = tegra_dt_init,
  132. .dt_compat = tegra_dt_board_compat,
  133. MACHINE_END