traps.c 30 KB

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  1. /*
  2. * linux/arch/i386/traps.c
  3. *
  4. * Copyright (C) 1991, 1992 Linus Torvalds
  5. *
  6. * Pentium III FXSR, SSE support
  7. * Gareth Hughes <gareth@valinux.com>, May 2000
  8. */
  9. /*
  10. * 'Traps.c' handles hardware traps and faults after we have saved some
  11. * state in 'asm.s'.
  12. */
  13. #include <linux/config.h>
  14. #include <linux/sched.h>
  15. #include <linux/kernel.h>
  16. #include <linux/string.h>
  17. #include <linux/errno.h>
  18. #include <linux/timer.h>
  19. #include <linux/mm.h>
  20. #include <linux/init.h>
  21. #include <linux/delay.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/highmem.h>
  25. #include <linux/kallsyms.h>
  26. #include <linux/ptrace.h>
  27. #include <linux/utsname.h>
  28. #include <linux/kprobes.h>
  29. #include <linux/kexec.h>
  30. #ifdef CONFIG_EISA
  31. #include <linux/ioport.h>
  32. #include <linux/eisa.h>
  33. #endif
  34. #ifdef CONFIG_MCA
  35. #include <linux/mca.h>
  36. #endif
  37. #include <asm/processor.h>
  38. #include <asm/system.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/io.h>
  41. #include <asm/atomic.h>
  42. #include <asm/debugreg.h>
  43. #include <asm/desc.h>
  44. #include <asm/i387.h>
  45. #include <asm/nmi.h>
  46. #include <asm/smp.h>
  47. #include <asm/arch_hooks.h>
  48. #include <asm/kdebug.h>
  49. #include <linux/module.h>
  50. #include "mach_traps.h"
  51. asmlinkage int system_call(void);
  52. struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
  53. { 0, 0 }, { 0, 0 } };
  54. /* Do we ignore FPU interrupts ? */
  55. char ignore_fpu_irq = 0;
  56. /*
  57. * The IDT has to be page-aligned to simplify the Pentium
  58. * F0 0F bug workaround.. We have a special link segment
  59. * for this.
  60. */
  61. struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
  62. asmlinkage void divide_error(void);
  63. asmlinkage void debug(void);
  64. asmlinkage void nmi(void);
  65. asmlinkage void int3(void);
  66. asmlinkage void overflow(void);
  67. asmlinkage void bounds(void);
  68. asmlinkage void invalid_op(void);
  69. asmlinkage void device_not_available(void);
  70. asmlinkage void coprocessor_segment_overrun(void);
  71. asmlinkage void invalid_TSS(void);
  72. asmlinkage void segment_not_present(void);
  73. asmlinkage void stack_segment(void);
  74. asmlinkage void general_protection(void);
  75. asmlinkage void page_fault(void);
  76. asmlinkage void coprocessor_error(void);
  77. asmlinkage void simd_coprocessor_error(void);
  78. asmlinkage void alignment_check(void);
  79. asmlinkage void spurious_interrupt_bug(void);
  80. asmlinkage void machine_check(void);
  81. static int kstack_depth_to_print = 24;
  82. struct notifier_block *i386die_chain;
  83. static DEFINE_SPINLOCK(die_notifier_lock);
  84. int register_die_notifier(struct notifier_block *nb)
  85. {
  86. int err = 0;
  87. unsigned long flags;
  88. spin_lock_irqsave(&die_notifier_lock, flags);
  89. err = notifier_chain_register(&i386die_chain, nb);
  90. spin_unlock_irqrestore(&die_notifier_lock, flags);
  91. return err;
  92. }
  93. EXPORT_SYMBOL(register_die_notifier);
  94. static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
  95. {
  96. return p > (void *)tinfo &&
  97. p < (void *)tinfo + THREAD_SIZE - 3;
  98. }
  99. /*
  100. * Print CONFIG_STACK_BACKTRACE_COLS address/symbol entries per line.
  101. */
  102. static inline int print_addr_and_symbol(unsigned long addr, char *log_lvl,
  103. int printed)
  104. {
  105. if (!printed)
  106. printk(log_lvl);
  107. #if CONFIG_STACK_BACKTRACE_COLS == 1
  108. printk(" [<%08lx>] ", addr);
  109. #else
  110. printk(" <%08lx> ", addr);
  111. #endif
  112. print_symbol("%s", addr);
  113. printed = (printed + 1) % CONFIG_STACK_BACKTRACE_COLS;
  114. if (printed)
  115. printk(" ");
  116. else
  117. printk("\n");
  118. return printed;
  119. }
  120. static inline unsigned long print_context_stack(struct thread_info *tinfo,
  121. unsigned long *stack, unsigned long ebp,
  122. char *log_lvl)
  123. {
  124. unsigned long addr;
  125. int printed = 0; /* nr of entries already printed on current line */
  126. #ifdef CONFIG_FRAME_POINTER
  127. while (valid_stack_ptr(tinfo, (void *)ebp)) {
  128. addr = *(unsigned long *)(ebp + 4);
  129. printed = print_addr_and_symbol(addr, log_lvl, printed);
  130. ebp = *(unsigned long *)ebp;
  131. }
  132. #else
  133. while (valid_stack_ptr(tinfo, stack)) {
  134. addr = *stack++;
  135. if (__kernel_text_address(addr))
  136. printed = print_addr_and_symbol(addr, log_lvl, printed);
  137. }
  138. #endif
  139. if (printed)
  140. printk("\n");
  141. return ebp;
  142. }
  143. static void show_trace_log_lvl(struct task_struct *task,
  144. unsigned long *stack, char *log_lvl)
  145. {
  146. unsigned long ebp;
  147. if (!task)
  148. task = current;
  149. if (task == current) {
  150. /* Grab ebp right from our regs */
  151. asm ("movl %%ebp, %0" : "=r" (ebp) : );
  152. } else {
  153. /* ebp is the last reg pushed by switch_to */
  154. ebp = *(unsigned long *) task->thread.esp;
  155. }
  156. while (1) {
  157. struct thread_info *context;
  158. context = (struct thread_info *)
  159. ((unsigned long)stack & (~(THREAD_SIZE - 1)));
  160. ebp = print_context_stack(context, stack, ebp, log_lvl);
  161. stack = (unsigned long*)context->previous_esp;
  162. if (!stack)
  163. break;
  164. printk("%s =======================\n", log_lvl);
  165. }
  166. }
  167. void show_trace(struct task_struct *task, unsigned long * stack)
  168. {
  169. show_trace_log_lvl(task, stack, "");
  170. }
  171. static void show_stack_log_lvl(struct task_struct *task, unsigned long *esp,
  172. char *log_lvl)
  173. {
  174. unsigned long *stack;
  175. int i;
  176. if (esp == NULL) {
  177. if (task)
  178. esp = (unsigned long*)task->thread.esp;
  179. else
  180. esp = (unsigned long *)&esp;
  181. }
  182. stack = esp;
  183. printk(log_lvl);
  184. for(i = 0; i < kstack_depth_to_print; i++) {
  185. if (kstack_end(stack))
  186. break;
  187. if (i && ((i % 8) == 0)) {
  188. printk("\n");
  189. printk("%s ", log_lvl);
  190. }
  191. printk("%08lx ", *stack++);
  192. }
  193. printk("\n");
  194. printk("%sCall Trace:\n", log_lvl);
  195. show_trace_log_lvl(task, esp, log_lvl);
  196. }
  197. void show_stack(struct task_struct *task, unsigned long *esp)
  198. {
  199. show_stack_log_lvl(task, esp, "");
  200. }
  201. /*
  202. * The architecture-independent dump_stack generator
  203. */
  204. void dump_stack(void)
  205. {
  206. unsigned long stack;
  207. show_trace(current, &stack);
  208. }
  209. EXPORT_SYMBOL(dump_stack);
  210. void show_registers(struct pt_regs *regs)
  211. {
  212. int i;
  213. int in_kernel = 1;
  214. unsigned long esp;
  215. unsigned short ss;
  216. esp = (unsigned long) (&regs->esp);
  217. savesegment(ss, ss);
  218. if (user_mode(regs)) {
  219. in_kernel = 0;
  220. esp = regs->esp;
  221. ss = regs->xss & 0xffff;
  222. }
  223. print_modules();
  224. printk(KERN_EMERG "CPU: %d\nEIP: %04x:[<%08lx>] %s VLI\n"
  225. "EFLAGS: %08lx (%s %.*s) \n",
  226. smp_processor_id(), 0xffff & regs->xcs, regs->eip,
  227. print_tainted(), regs->eflags, system_utsname.release,
  228. (int)strcspn(system_utsname.version, " "),
  229. system_utsname.version);
  230. print_symbol(KERN_EMERG "EIP is at %s\n", regs->eip);
  231. printk(KERN_EMERG "eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
  232. regs->eax, regs->ebx, regs->ecx, regs->edx);
  233. printk(KERN_EMERG "esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
  234. regs->esi, regs->edi, regs->ebp, esp);
  235. printk(KERN_EMERG "ds: %04x es: %04x ss: %04x\n",
  236. regs->xds & 0xffff, regs->xes & 0xffff, ss);
  237. printk(KERN_EMERG "Process %s (pid: %d, threadinfo=%p task=%p)",
  238. current->comm, current->pid, current_thread_info(), current);
  239. /*
  240. * When in-kernel, we also print out the stack and code at the
  241. * time of the fault..
  242. */
  243. if (in_kernel) {
  244. u8 __user *eip;
  245. printk("\n" KERN_EMERG "Stack: ");
  246. show_stack_log_lvl(NULL, (unsigned long *)esp, KERN_EMERG);
  247. printk(KERN_EMERG "Code: ");
  248. eip = (u8 __user *)regs->eip - 43;
  249. for (i = 0; i < 64; i++, eip++) {
  250. unsigned char c;
  251. if (eip < (u8 __user *)PAGE_OFFSET || __get_user(c, eip)) {
  252. printk(" Bad EIP value.");
  253. break;
  254. }
  255. if (eip == (u8 __user *)regs->eip)
  256. printk("<%02x> ", c);
  257. else
  258. printk("%02x ", c);
  259. }
  260. }
  261. printk("\n");
  262. }
  263. static void handle_BUG(struct pt_regs *regs)
  264. {
  265. unsigned short ud2;
  266. unsigned short line;
  267. char *file;
  268. char c;
  269. unsigned long eip;
  270. eip = regs->eip;
  271. if (eip < PAGE_OFFSET)
  272. goto no_bug;
  273. if (__get_user(ud2, (unsigned short __user *)eip))
  274. goto no_bug;
  275. if (ud2 != 0x0b0f)
  276. goto no_bug;
  277. if (__get_user(line, (unsigned short __user *)(eip + 2)))
  278. goto bug;
  279. if (__get_user(file, (char * __user *)(eip + 4)) ||
  280. (unsigned long)file < PAGE_OFFSET || __get_user(c, file))
  281. file = "<bad filename>";
  282. printk(KERN_EMERG "------------[ cut here ]------------\n");
  283. printk(KERN_EMERG "kernel BUG at %s:%d!\n", file, line);
  284. no_bug:
  285. return;
  286. /* Here we know it was a BUG but file-n-line is unavailable */
  287. bug:
  288. printk(KERN_EMERG "Kernel BUG\n");
  289. }
  290. /* This is gone through when something in the kernel
  291. * has done something bad and is about to be terminated.
  292. */
  293. void die(const char * str, struct pt_regs * regs, long err)
  294. {
  295. static struct {
  296. spinlock_t lock;
  297. u32 lock_owner;
  298. int lock_owner_depth;
  299. } die = {
  300. .lock = SPIN_LOCK_UNLOCKED,
  301. .lock_owner = -1,
  302. .lock_owner_depth = 0
  303. };
  304. static int die_counter;
  305. unsigned long flags;
  306. if (die.lock_owner != raw_smp_processor_id()) {
  307. console_verbose();
  308. spin_lock_irqsave(&die.lock, flags);
  309. die.lock_owner = smp_processor_id();
  310. die.lock_owner_depth = 0;
  311. bust_spinlocks(1);
  312. }
  313. else
  314. local_save_flags(flags);
  315. if (++die.lock_owner_depth < 3) {
  316. int nl = 0;
  317. handle_BUG(regs);
  318. printk(KERN_EMERG "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
  319. #ifdef CONFIG_PREEMPT
  320. printk(KERN_EMERG "PREEMPT ");
  321. nl = 1;
  322. #endif
  323. #ifdef CONFIG_SMP
  324. if (!nl)
  325. printk(KERN_EMERG);
  326. printk("SMP ");
  327. nl = 1;
  328. #endif
  329. #ifdef CONFIG_DEBUG_PAGEALLOC
  330. if (!nl)
  331. printk(KERN_EMERG);
  332. printk("DEBUG_PAGEALLOC");
  333. nl = 1;
  334. #endif
  335. if (nl)
  336. printk("\n");
  337. notify_die(DIE_OOPS, (char *)str, regs, err, 255, SIGSEGV);
  338. show_registers(regs);
  339. } else
  340. printk(KERN_EMERG "Recursive die() failure, output suppressed\n");
  341. bust_spinlocks(0);
  342. die.lock_owner = -1;
  343. spin_unlock_irqrestore(&die.lock, flags);
  344. if (kexec_should_crash(current))
  345. crash_kexec(regs);
  346. if (in_interrupt())
  347. panic("Fatal exception in interrupt");
  348. if (panic_on_oops) {
  349. printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
  350. ssleep(5);
  351. panic("Fatal exception");
  352. }
  353. do_exit(SIGSEGV);
  354. }
  355. static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
  356. {
  357. if (!user_mode_vm(regs))
  358. die(str, regs, err);
  359. }
  360. static void __kprobes do_trap(int trapnr, int signr, char *str, int vm86,
  361. struct pt_regs * regs, long error_code,
  362. siginfo_t *info)
  363. {
  364. struct task_struct *tsk = current;
  365. tsk->thread.error_code = error_code;
  366. tsk->thread.trap_no = trapnr;
  367. if (regs->eflags & VM_MASK) {
  368. if (vm86)
  369. goto vm86_trap;
  370. goto trap_signal;
  371. }
  372. if (!user_mode(regs))
  373. goto kernel_trap;
  374. trap_signal: {
  375. if (info)
  376. force_sig_info(signr, info, tsk);
  377. else
  378. force_sig(signr, tsk);
  379. return;
  380. }
  381. kernel_trap: {
  382. if (!fixup_exception(regs))
  383. die(str, regs, error_code);
  384. return;
  385. }
  386. vm86_trap: {
  387. int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr);
  388. if (ret) goto trap_signal;
  389. return;
  390. }
  391. }
  392. #define DO_ERROR(trapnr, signr, str, name) \
  393. fastcall void do_##name(struct pt_regs * regs, long error_code) \
  394. { \
  395. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
  396. == NOTIFY_STOP) \
  397. return; \
  398. do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
  399. }
  400. #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
  401. fastcall void do_##name(struct pt_regs * regs, long error_code) \
  402. { \
  403. siginfo_t info; \
  404. info.si_signo = signr; \
  405. info.si_errno = 0; \
  406. info.si_code = sicode; \
  407. info.si_addr = (void __user *)siaddr; \
  408. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
  409. == NOTIFY_STOP) \
  410. return; \
  411. do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
  412. }
  413. #define DO_VM86_ERROR(trapnr, signr, str, name) \
  414. fastcall void do_##name(struct pt_regs * regs, long error_code) \
  415. { \
  416. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
  417. == NOTIFY_STOP) \
  418. return; \
  419. do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
  420. }
  421. #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
  422. fastcall void do_##name(struct pt_regs * regs, long error_code) \
  423. { \
  424. siginfo_t info; \
  425. info.si_signo = signr; \
  426. info.si_errno = 0; \
  427. info.si_code = sicode; \
  428. info.si_addr = (void __user *)siaddr; \
  429. if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
  430. == NOTIFY_STOP) \
  431. return; \
  432. do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
  433. }
  434. DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip)
  435. #ifndef CONFIG_KPROBES
  436. DO_VM86_ERROR( 3, SIGTRAP, "int3", int3)
  437. #endif
  438. DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
  439. DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
  440. DO_ERROR_INFO( 6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->eip)
  441. DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
  442. DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
  443. DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
  444. DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
  445. DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
  446. DO_ERROR_INFO(32, SIGSEGV, "iret exception", iret_error, ILL_BADSTK, 0)
  447. fastcall void __kprobes do_general_protection(struct pt_regs * regs,
  448. long error_code)
  449. {
  450. int cpu = get_cpu();
  451. struct tss_struct *tss = &per_cpu(init_tss, cpu);
  452. struct thread_struct *thread = &current->thread;
  453. /*
  454. * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
  455. * invalid offset set (the LAZY one) and the faulting thread has
  456. * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS
  457. * and we set the offset field correctly. Then we let the CPU to
  458. * restart the faulting instruction.
  459. */
  460. if (tss->io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
  461. thread->io_bitmap_ptr) {
  462. memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
  463. thread->io_bitmap_max);
  464. /*
  465. * If the previously set map was extending to higher ports
  466. * than the current one, pad extra space with 0xff (no access).
  467. */
  468. if (thread->io_bitmap_max < tss->io_bitmap_max)
  469. memset((char *) tss->io_bitmap +
  470. thread->io_bitmap_max, 0xff,
  471. tss->io_bitmap_max - thread->io_bitmap_max);
  472. tss->io_bitmap_max = thread->io_bitmap_max;
  473. tss->io_bitmap_base = IO_BITMAP_OFFSET;
  474. tss->io_bitmap_owner = thread;
  475. put_cpu();
  476. return;
  477. }
  478. put_cpu();
  479. current->thread.error_code = error_code;
  480. current->thread.trap_no = 13;
  481. if (regs->eflags & VM_MASK)
  482. goto gp_in_vm86;
  483. if (!user_mode(regs))
  484. goto gp_in_kernel;
  485. current->thread.error_code = error_code;
  486. current->thread.trap_no = 13;
  487. force_sig(SIGSEGV, current);
  488. return;
  489. gp_in_vm86:
  490. local_irq_enable();
  491. handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
  492. return;
  493. gp_in_kernel:
  494. if (!fixup_exception(regs)) {
  495. if (notify_die(DIE_GPF, "general protection fault", regs,
  496. error_code, 13, SIGSEGV) == NOTIFY_STOP)
  497. return;
  498. die("general protection fault", regs, error_code);
  499. }
  500. }
  501. static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
  502. {
  503. printk(KERN_EMERG "Uhhuh. NMI received. Dazed and confused, but trying "
  504. "to continue\n");
  505. printk(KERN_EMERG "You probably have a hardware problem with your RAM "
  506. "chips\n");
  507. /* Clear and disable the memory parity error line. */
  508. clear_mem_error(reason);
  509. }
  510. static void io_check_error(unsigned char reason, struct pt_regs * regs)
  511. {
  512. unsigned long i;
  513. printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n");
  514. show_registers(regs);
  515. /* Re-enable the IOCK line, wait for a few seconds */
  516. reason = (reason & 0xf) | 8;
  517. outb(reason, 0x61);
  518. i = 2000;
  519. while (--i) udelay(1000);
  520. reason &= ~8;
  521. outb(reason, 0x61);
  522. }
  523. static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
  524. {
  525. #ifdef CONFIG_MCA
  526. /* Might actually be able to figure out what the guilty party
  527. * is. */
  528. if( MCA_bus ) {
  529. mca_handle_nmi();
  530. return;
  531. }
  532. #endif
  533. printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
  534. reason, smp_processor_id());
  535. printk("Dazed and confused, but trying to continue\n");
  536. printk("Do you have a strange power saving mode enabled?\n");
  537. }
  538. static DEFINE_SPINLOCK(nmi_print_lock);
  539. void die_nmi (struct pt_regs *regs, const char *msg)
  540. {
  541. if (notify_die(DIE_NMIWATCHDOG, msg, regs, 0, 0, SIGINT) ==
  542. NOTIFY_STOP)
  543. return;
  544. spin_lock(&nmi_print_lock);
  545. /*
  546. * We are in trouble anyway, lets at least try
  547. * to get a message out.
  548. */
  549. bust_spinlocks(1);
  550. printk(KERN_EMERG "%s", msg);
  551. printk(" on CPU%d, eip %08lx, registers:\n",
  552. smp_processor_id(), regs->eip);
  553. show_registers(regs);
  554. printk(KERN_EMERG "console shuts up ...\n");
  555. console_silent();
  556. spin_unlock(&nmi_print_lock);
  557. bust_spinlocks(0);
  558. /* If we are in kernel we are probably nested up pretty bad
  559. * and might aswell get out now while we still can.
  560. */
  561. if (!user_mode(regs)) {
  562. current->thread.trap_no = 2;
  563. crash_kexec(regs);
  564. }
  565. do_exit(SIGSEGV);
  566. }
  567. static void default_do_nmi(struct pt_regs * regs)
  568. {
  569. unsigned char reason = 0;
  570. /* Only the BSP gets external NMIs from the system. */
  571. if (!smp_processor_id())
  572. reason = get_nmi_reason();
  573. if (!(reason & 0xc0)) {
  574. if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 0, SIGINT)
  575. == NOTIFY_STOP)
  576. return;
  577. #ifdef CONFIG_X86_LOCAL_APIC
  578. /*
  579. * Ok, so this is none of the documented NMI sources,
  580. * so it must be the NMI watchdog.
  581. */
  582. if (nmi_watchdog) {
  583. nmi_watchdog_tick(regs);
  584. return;
  585. }
  586. #endif
  587. unknown_nmi_error(reason, regs);
  588. return;
  589. }
  590. if (notify_die(DIE_NMI, "nmi", regs, reason, 0, SIGINT) == NOTIFY_STOP)
  591. return;
  592. if (reason & 0x80)
  593. mem_parity_error(reason, regs);
  594. if (reason & 0x40)
  595. io_check_error(reason, regs);
  596. /*
  597. * Reassert NMI in case it became active meanwhile
  598. * as it's edge-triggered.
  599. */
  600. reassert_nmi();
  601. }
  602. static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
  603. {
  604. return 0;
  605. }
  606. static nmi_callback_t nmi_callback = dummy_nmi_callback;
  607. fastcall void do_nmi(struct pt_regs * regs, long error_code)
  608. {
  609. int cpu;
  610. nmi_enter();
  611. cpu = smp_processor_id();
  612. ++nmi_count(cpu);
  613. if (!rcu_dereference(nmi_callback)(regs, cpu))
  614. default_do_nmi(regs);
  615. nmi_exit();
  616. }
  617. void set_nmi_callback(nmi_callback_t callback)
  618. {
  619. rcu_assign_pointer(nmi_callback, callback);
  620. }
  621. EXPORT_SYMBOL_GPL(set_nmi_callback);
  622. void unset_nmi_callback(void)
  623. {
  624. nmi_callback = dummy_nmi_callback;
  625. }
  626. EXPORT_SYMBOL_GPL(unset_nmi_callback);
  627. #ifdef CONFIG_KPROBES
  628. fastcall void __kprobes do_int3(struct pt_regs *regs, long error_code)
  629. {
  630. if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
  631. == NOTIFY_STOP)
  632. return;
  633. /* This is an interrupt gate, because kprobes wants interrupts
  634. disabled. Normal trap handlers don't. */
  635. restore_interrupts(regs);
  636. do_trap(3, SIGTRAP, "int3", 1, regs, error_code, NULL);
  637. }
  638. #endif
  639. /*
  640. * Our handling of the processor debug registers is non-trivial.
  641. * We do not clear them on entry and exit from the kernel. Therefore
  642. * it is possible to get a watchpoint trap here from inside the kernel.
  643. * However, the code in ./ptrace.c has ensured that the user can
  644. * only set watchpoints on userspace addresses. Therefore the in-kernel
  645. * watchpoint trap can only occur in code which is reading/writing
  646. * from user space. Such code must not hold kernel locks (since it
  647. * can equally take a page fault), therefore it is safe to call
  648. * force_sig_info even though that claims and releases locks.
  649. *
  650. * Code in ./signal.c ensures that the debug control register
  651. * is restored before we deliver any signal, and therefore that
  652. * user code runs with the correct debug control register even though
  653. * we clear it here.
  654. *
  655. * Being careful here means that we don't have to be as careful in a
  656. * lot of more complicated places (task switching can be a bit lazy
  657. * about restoring all the debug state, and ptrace doesn't have to
  658. * find every occurrence of the TF bit that could be saved away even
  659. * by user code)
  660. */
  661. fastcall void __kprobes do_debug(struct pt_regs * regs, long error_code)
  662. {
  663. unsigned int condition;
  664. struct task_struct *tsk = current;
  665. get_debugreg(condition, 6);
  666. if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code,
  667. SIGTRAP) == NOTIFY_STOP)
  668. return;
  669. /* It's safe to allow irq's after DR6 has been saved */
  670. if (regs->eflags & X86_EFLAGS_IF)
  671. local_irq_enable();
  672. /* Mask out spurious debug traps due to lazy DR7 setting */
  673. if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
  674. if (!tsk->thread.debugreg[7])
  675. goto clear_dr7;
  676. }
  677. if (regs->eflags & VM_MASK)
  678. goto debug_vm86;
  679. /* Save debug status register where ptrace can see it */
  680. tsk->thread.debugreg[6] = condition;
  681. /*
  682. * Single-stepping through TF: make sure we ignore any events in
  683. * kernel space (but re-enable TF when returning to user mode).
  684. */
  685. if (condition & DR_STEP) {
  686. /*
  687. * We already checked v86 mode above, so we can
  688. * check for kernel mode by just checking the CPL
  689. * of CS.
  690. */
  691. if (!user_mode(regs))
  692. goto clear_TF_reenable;
  693. }
  694. /* Ok, finally something we can handle */
  695. send_sigtrap(tsk, regs, error_code);
  696. /* Disable additional traps. They'll be re-enabled when
  697. * the signal is delivered.
  698. */
  699. clear_dr7:
  700. set_debugreg(0, 7);
  701. return;
  702. debug_vm86:
  703. handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
  704. return;
  705. clear_TF_reenable:
  706. set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
  707. regs->eflags &= ~TF_MASK;
  708. return;
  709. }
  710. /*
  711. * Note that we play around with the 'TS' bit in an attempt to get
  712. * the correct behaviour even in the presence of the asynchronous
  713. * IRQ13 behaviour
  714. */
  715. void math_error(void __user *eip)
  716. {
  717. struct task_struct * task;
  718. siginfo_t info;
  719. unsigned short cwd, swd;
  720. /*
  721. * Save the info for the exception handler and clear the error.
  722. */
  723. task = current;
  724. save_init_fpu(task);
  725. task->thread.trap_no = 16;
  726. task->thread.error_code = 0;
  727. info.si_signo = SIGFPE;
  728. info.si_errno = 0;
  729. info.si_code = __SI_FAULT;
  730. info.si_addr = eip;
  731. /*
  732. * (~cwd & swd) will mask out exceptions that are not set to unmasked
  733. * status. 0x3f is the exception bits in these regs, 0x200 is the
  734. * C1 reg you need in case of a stack fault, 0x040 is the stack
  735. * fault bit. We should only be taking one exception at a time,
  736. * so if this combination doesn't produce any single exception,
  737. * then we have a bad program that isn't syncronizing its FPU usage
  738. * and it will suffer the consequences since we won't be able to
  739. * fully reproduce the context of the exception
  740. */
  741. cwd = get_fpu_cwd(task);
  742. swd = get_fpu_swd(task);
  743. switch (swd & ~cwd & 0x3f) {
  744. case 0x000: /* No unmasked exception */
  745. return;
  746. default: /* Multiple exceptions */
  747. break;
  748. case 0x001: /* Invalid Op */
  749. /*
  750. * swd & 0x240 == 0x040: Stack Underflow
  751. * swd & 0x240 == 0x240: Stack Overflow
  752. * User must clear the SF bit (0x40) if set
  753. */
  754. info.si_code = FPE_FLTINV;
  755. break;
  756. case 0x002: /* Denormalize */
  757. case 0x010: /* Underflow */
  758. info.si_code = FPE_FLTUND;
  759. break;
  760. case 0x004: /* Zero Divide */
  761. info.si_code = FPE_FLTDIV;
  762. break;
  763. case 0x008: /* Overflow */
  764. info.si_code = FPE_FLTOVF;
  765. break;
  766. case 0x020: /* Precision */
  767. info.si_code = FPE_FLTRES;
  768. break;
  769. }
  770. force_sig_info(SIGFPE, &info, task);
  771. }
  772. fastcall void do_coprocessor_error(struct pt_regs * regs, long error_code)
  773. {
  774. ignore_fpu_irq = 1;
  775. math_error((void __user *)regs->eip);
  776. }
  777. static void simd_math_error(void __user *eip)
  778. {
  779. struct task_struct * task;
  780. siginfo_t info;
  781. unsigned short mxcsr;
  782. /*
  783. * Save the info for the exception handler and clear the error.
  784. */
  785. task = current;
  786. save_init_fpu(task);
  787. task->thread.trap_no = 19;
  788. task->thread.error_code = 0;
  789. info.si_signo = SIGFPE;
  790. info.si_errno = 0;
  791. info.si_code = __SI_FAULT;
  792. info.si_addr = eip;
  793. /*
  794. * The SIMD FPU exceptions are handled a little differently, as there
  795. * is only a single status/control register. Thus, to determine which
  796. * unmasked exception was caught we must mask the exception mask bits
  797. * at 0x1f80, and then use these to mask the exception bits at 0x3f.
  798. */
  799. mxcsr = get_fpu_mxcsr(task);
  800. switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
  801. case 0x000:
  802. default:
  803. break;
  804. case 0x001: /* Invalid Op */
  805. info.si_code = FPE_FLTINV;
  806. break;
  807. case 0x002: /* Denormalize */
  808. case 0x010: /* Underflow */
  809. info.si_code = FPE_FLTUND;
  810. break;
  811. case 0x004: /* Zero Divide */
  812. info.si_code = FPE_FLTDIV;
  813. break;
  814. case 0x008: /* Overflow */
  815. info.si_code = FPE_FLTOVF;
  816. break;
  817. case 0x020: /* Precision */
  818. info.si_code = FPE_FLTRES;
  819. break;
  820. }
  821. force_sig_info(SIGFPE, &info, task);
  822. }
  823. fastcall void do_simd_coprocessor_error(struct pt_regs * regs,
  824. long error_code)
  825. {
  826. if (cpu_has_xmm) {
  827. /* Handle SIMD FPU exceptions on PIII+ processors. */
  828. ignore_fpu_irq = 1;
  829. simd_math_error((void __user *)regs->eip);
  830. } else {
  831. /*
  832. * Handle strange cache flush from user space exception
  833. * in all other cases. This is undocumented behaviour.
  834. */
  835. if (regs->eflags & VM_MASK) {
  836. handle_vm86_fault((struct kernel_vm86_regs *)regs,
  837. error_code);
  838. return;
  839. }
  840. current->thread.trap_no = 19;
  841. current->thread.error_code = error_code;
  842. die_if_kernel("cache flush denied", regs, error_code);
  843. force_sig(SIGSEGV, current);
  844. }
  845. }
  846. fastcall void do_spurious_interrupt_bug(struct pt_regs * regs,
  847. long error_code)
  848. {
  849. #if 0
  850. /* No need to warn about this any longer. */
  851. printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
  852. #endif
  853. }
  854. fastcall void setup_x86_bogus_stack(unsigned char * stk)
  855. {
  856. unsigned long *switch16_ptr, *switch32_ptr;
  857. struct pt_regs *regs;
  858. unsigned long stack_top, stack_bot;
  859. unsigned short iret_frame16_off;
  860. int cpu = smp_processor_id();
  861. /* reserve the space on 32bit stack for the magic switch16 pointer */
  862. memmove(stk, stk + 8, sizeof(struct pt_regs));
  863. switch16_ptr = (unsigned long *)(stk + sizeof(struct pt_regs));
  864. regs = (struct pt_regs *)stk;
  865. /* now the switch32 on 16bit stack */
  866. stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
  867. stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
  868. switch32_ptr = (unsigned long *)(stack_top - 8);
  869. iret_frame16_off = CPU_16BIT_STACK_SIZE - 8 - 20;
  870. /* copy iret frame on 16bit stack */
  871. memcpy((void *)(stack_bot + iret_frame16_off), &regs->eip, 20);
  872. /* fill in the switch pointers */
  873. switch16_ptr[0] = (regs->esp & 0xffff0000) | iret_frame16_off;
  874. switch16_ptr[1] = __ESPFIX_SS;
  875. switch32_ptr[0] = (unsigned long)stk + sizeof(struct pt_regs) +
  876. 8 - CPU_16BIT_STACK_SIZE;
  877. switch32_ptr[1] = __KERNEL_DS;
  878. }
  879. fastcall unsigned char * fixup_x86_bogus_stack(unsigned short sp)
  880. {
  881. unsigned long *switch32_ptr;
  882. unsigned char *stack16, *stack32;
  883. unsigned long stack_top, stack_bot;
  884. int len;
  885. int cpu = smp_processor_id();
  886. stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
  887. stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
  888. switch32_ptr = (unsigned long *)(stack_top - 8);
  889. /* copy the data from 16bit stack to 32bit stack */
  890. len = CPU_16BIT_STACK_SIZE - 8 - sp;
  891. stack16 = (unsigned char *)(stack_bot + sp);
  892. stack32 = (unsigned char *)
  893. (switch32_ptr[0] + CPU_16BIT_STACK_SIZE - 8 - len);
  894. memcpy(stack32, stack16, len);
  895. return stack32;
  896. }
  897. /*
  898. * 'math_state_restore()' saves the current math information in the
  899. * old math state array, and gets the new ones from the current task
  900. *
  901. * Careful.. There are problems with IBM-designed IRQ13 behaviour.
  902. * Don't touch unless you *really* know how it works.
  903. *
  904. * Must be called with kernel preemption disabled (in this case,
  905. * local interrupts are disabled at the call-site in entry.S).
  906. */
  907. asmlinkage void math_state_restore(struct pt_regs regs)
  908. {
  909. struct thread_info *thread = current_thread_info();
  910. struct task_struct *tsk = thread->task;
  911. clts(); /* Allow maths ops (or we recurse) */
  912. if (!tsk_used_math(tsk))
  913. init_fpu(tsk);
  914. restore_fpu(tsk);
  915. thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
  916. }
  917. #ifndef CONFIG_MATH_EMULATION
  918. asmlinkage void math_emulate(long arg)
  919. {
  920. printk(KERN_EMERG "math-emulation not enabled and no coprocessor found.\n");
  921. printk(KERN_EMERG "killing %s.\n",current->comm);
  922. force_sig(SIGFPE,current);
  923. schedule();
  924. }
  925. #endif /* CONFIG_MATH_EMULATION */
  926. #ifdef CONFIG_X86_F00F_BUG
  927. void __init trap_init_f00f_bug(void)
  928. {
  929. __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
  930. /*
  931. * Update the IDT descriptor and reload the IDT so that
  932. * it uses the read-only mapped virtual address.
  933. */
  934. idt_descr.address = fix_to_virt(FIX_F00F_IDT);
  935. load_idt(&idt_descr);
  936. }
  937. #endif
  938. #define _set_gate(gate_addr,type,dpl,addr,seg) \
  939. do { \
  940. int __d0, __d1; \
  941. __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
  942. "movw %4,%%dx\n\t" \
  943. "movl %%eax,%0\n\t" \
  944. "movl %%edx,%1" \
  945. :"=m" (*((long *) (gate_addr))), \
  946. "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
  947. :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
  948. "3" ((char *) (addr)),"2" ((seg) << 16)); \
  949. } while (0)
  950. /*
  951. * This needs to use 'idt_table' rather than 'idt', and
  952. * thus use the _nonmapped_ version of the IDT, as the
  953. * Pentium F0 0F bugfix can have resulted in the mapped
  954. * IDT being write-protected.
  955. */
  956. void set_intr_gate(unsigned int n, void *addr)
  957. {
  958. _set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
  959. }
  960. /*
  961. * This routine sets up an interrupt gate at directory privilege level 3.
  962. */
  963. static inline void set_system_intr_gate(unsigned int n, void *addr)
  964. {
  965. _set_gate(idt_table+n, 14, 3, addr, __KERNEL_CS);
  966. }
  967. static void __init set_trap_gate(unsigned int n, void *addr)
  968. {
  969. _set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
  970. }
  971. static void __init set_system_gate(unsigned int n, void *addr)
  972. {
  973. _set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
  974. }
  975. static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
  976. {
  977. _set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
  978. }
  979. void __init trap_init(void)
  980. {
  981. #ifdef CONFIG_EISA
  982. void __iomem *p = ioremap(0x0FFFD9, 4);
  983. if (readl(p) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
  984. EISA_bus = 1;
  985. }
  986. iounmap(p);
  987. #endif
  988. #ifdef CONFIG_X86_LOCAL_APIC
  989. init_apic_mappings();
  990. #endif
  991. set_trap_gate(0,&divide_error);
  992. set_intr_gate(1,&debug);
  993. set_intr_gate(2,&nmi);
  994. set_system_intr_gate(3, &int3); /* int3/4 can be called from all */
  995. set_system_gate(4,&overflow);
  996. set_trap_gate(5,&bounds);
  997. set_trap_gate(6,&invalid_op);
  998. set_trap_gate(7,&device_not_available);
  999. set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
  1000. set_trap_gate(9,&coprocessor_segment_overrun);
  1001. set_trap_gate(10,&invalid_TSS);
  1002. set_trap_gate(11,&segment_not_present);
  1003. set_trap_gate(12,&stack_segment);
  1004. set_trap_gate(13,&general_protection);
  1005. set_intr_gate(14,&page_fault);
  1006. set_trap_gate(15,&spurious_interrupt_bug);
  1007. set_trap_gate(16,&coprocessor_error);
  1008. set_trap_gate(17,&alignment_check);
  1009. #ifdef CONFIG_X86_MCE
  1010. set_trap_gate(18,&machine_check);
  1011. #endif
  1012. set_trap_gate(19,&simd_coprocessor_error);
  1013. if (cpu_has_fxsr) {
  1014. /*
  1015. * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
  1016. * Generates a compile-time "error: zero width for bit-field" if
  1017. * the alignment is wrong.
  1018. */
  1019. struct fxsrAlignAssert {
  1020. int _:!(offsetof(struct task_struct,
  1021. thread.i387.fxsave) & 15);
  1022. };
  1023. printk(KERN_INFO "Enabling fast FPU save and restore... ");
  1024. set_in_cr4(X86_CR4_OSFXSR);
  1025. printk("done.\n");
  1026. }
  1027. if (cpu_has_xmm) {
  1028. printk(KERN_INFO "Enabling unmasked SIMD FPU exception "
  1029. "support... ");
  1030. set_in_cr4(X86_CR4_OSXMMEXCPT);
  1031. printk("done.\n");
  1032. }
  1033. set_system_gate(SYSCALL_VECTOR,&system_call);
  1034. /*
  1035. * Should be a barrier for any external CPU state.
  1036. */
  1037. cpu_init();
  1038. trap_init_hook();
  1039. }
  1040. static int __init kstack_setup(char *s)
  1041. {
  1042. kstack_depth_to_print = simple_strtoul(s, NULL, 0);
  1043. return 0;
  1044. }
  1045. __setup("kstack=", kstack_setup);