phy_lcn.c 7.0 KB

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  1. /*
  2. Broadcom B43 wireless driver
  3. IEEE 802.11n LCN-PHY support
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; see the file COPYING. If not, write to
  14. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  15. Boston, MA 02110-1301, USA.
  16. */
  17. #include <linux/slab.h>
  18. #include "b43.h"
  19. #include "phy_lcn.h"
  20. #include "tables_phy_lcn.h"
  21. #include "main.h"
  22. /**************************************************
  23. * Radio 2064.
  24. **************************************************/
  25. static void b43_radio_2064_init(struct b43_wldev *dev)
  26. {
  27. b43_radio_write(dev, 0x09c, 0x0020);
  28. b43_radio_write(dev, 0x105, 0x0008);
  29. b43_radio_write(dev, 0x032, 0x0062);
  30. b43_radio_write(dev, 0x033, 0x0019);
  31. b43_radio_write(dev, 0x090, 0x0010);
  32. b43_radio_write(dev, 0x010, 0x0000);
  33. b43_radio_write(dev, 0x060, 0x007f);
  34. b43_radio_write(dev, 0x061, 0x0072);
  35. b43_radio_write(dev, 0x062, 0x007f);
  36. b43_radio_write(dev, 0x01d, 0x0002);
  37. b43_radio_write(dev, 0x01e, 0x0006);
  38. b43_phy_write(dev, 0x4ea, 0x4688);
  39. b43_phy_maskset(dev, 0x4eb, ~0x7, 0x2);
  40. b43_phy_mask(dev, 0x4eb, ~0x01c0);
  41. b43_phy_maskset(dev, 0x4eb, 0xff00, 0x19);
  42. b43_lcntab_write(dev, B43_LCNTAB16(0x00, 0x55), 0);
  43. b43_radio_mask(dev, 0x05b, (u16) ~0xff02);
  44. b43_radio_set(dev, 0x004, 0x40);
  45. b43_radio_set(dev, 0x120, 0x10);
  46. b43_radio_set(dev, 0x078, 0x80);
  47. b43_radio_set(dev, 0x129, 0x2);
  48. b43_radio_set(dev, 0x057, 0x1);
  49. b43_radio_set(dev, 0x05b, 0x2);
  50. /* TODO: wait for some bit to be set */
  51. b43_radio_read(dev, 0x05c);
  52. b43_radio_mask(dev, 0x05b, (u16) ~0xff02);
  53. b43_radio_mask(dev, 0x057, (u16) ~0xff01);
  54. b43_phy_write(dev, 0x933, 0x2d6b);
  55. b43_phy_write(dev, 0x934, 0x2d6b);
  56. b43_phy_write(dev, 0x935, 0x2d6b);
  57. b43_phy_write(dev, 0x936, 0x2d6b);
  58. b43_phy_write(dev, 0x937, 0x016b);
  59. b43_radio_mask(dev, 0x057, (u16) ~0xff02);
  60. b43_radio_write(dev, 0x0c2, 0x006f);
  61. }
  62. /**************************************************
  63. * Various PHY ops
  64. **************************************************/
  65. static void b43_phy_lcn_afe_set_unset(struct b43_wldev *dev)
  66. {
  67. u16 afe_ctl2 = b43_phy_read(dev, B43_PHY_LCN_AFE_CTL2);
  68. u16 afe_ctl1 = b43_phy_read(dev, B43_PHY_LCN_AFE_CTL1);
  69. b43_phy_write(dev, B43_PHY_LCN_AFE_CTL2, afe_ctl2 | 0x1);
  70. b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1 | 0x1);
  71. b43_phy_write(dev, B43_PHY_LCN_AFE_CTL2, afe_ctl2 & ~0x1);
  72. b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1 & ~0x1);
  73. b43_phy_write(dev, B43_PHY_LCN_AFE_CTL2, afe_ctl2);
  74. b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1);
  75. }
  76. static void b43_phy_lcn_clean_0x18_table(struct b43_wldev *dev)
  77. {
  78. u8 i;
  79. for (i = 0; i < 0x80; i++)
  80. b43_lcntab_write(dev, B43_LCNTAB32(0x18, i), 0x80000);
  81. }
  82. static void b43_phy_lcn_clear_0x07_table(struct b43_wldev *dev)
  83. {
  84. u8 i;
  85. b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, (0x7 << 10) | 0x340);
  86. for (i = 0; i < 30; i++) {
  87. b43_phy_write(dev, B43_PHY_LCN_TABLE_DATAHI, 0);
  88. b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, 0);
  89. }
  90. b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, (0x7 << 10) | 0x80);
  91. for (i = 0; i < 64; i++) {
  92. b43_phy_write(dev, B43_PHY_LCN_TABLE_DATAHI, 0);
  93. b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, 0);
  94. }
  95. }
  96. /**************************************************
  97. * Basic PHY ops.
  98. **************************************************/
  99. static int b43_phy_lcn_op_allocate(struct b43_wldev *dev)
  100. {
  101. struct b43_phy_lcn *phy_lcn;
  102. phy_lcn = kzalloc(sizeof(*phy_lcn), GFP_KERNEL);
  103. if (!phy_lcn)
  104. return -ENOMEM;
  105. dev->phy.lcn = phy_lcn;
  106. return 0;
  107. }
  108. static void b43_phy_lcn_op_free(struct b43_wldev *dev)
  109. {
  110. struct b43_phy *phy = &dev->phy;
  111. struct b43_phy_lcn *phy_lcn = phy->lcn;
  112. kfree(phy_lcn);
  113. phy->lcn = NULL;
  114. }
  115. static void b43_phy_lcn_op_prepare_structs(struct b43_wldev *dev)
  116. {
  117. struct b43_phy *phy = &dev->phy;
  118. struct b43_phy_lcn *phy_lcn = phy->lcn;
  119. memset(phy_lcn, 0, sizeof(*phy_lcn));
  120. }
  121. static int b43_phy_lcn_op_init(struct b43_wldev *dev)
  122. {
  123. b43_phy_set(dev, 0x44a, 0x80);
  124. b43_phy_mask(dev, 0x44a, 0x7f);
  125. b43_phy_set(dev, 0x6d1, 0x80);
  126. b43_phy_write(dev, 0x6d0, 0x7);
  127. b43_phy_lcn_afe_set_unset(dev);
  128. b43_phy_write(dev, 0x60a, 0xa0);
  129. b43_phy_write(dev, 0x46a, 0x19);
  130. b43_phy_maskset(dev, 0x663, 0xFF00, 0x64);
  131. b43_phy_lcn_tables_init(dev);
  132. /* TODO: various tables ops here */
  133. b43_phy_lcn_clean_0x18_table(dev);
  134. /* TODO: some ops here */
  135. b43_phy_lcn_clear_0x07_table(dev);
  136. if (dev->phy.radio_ver == 0x2064)
  137. b43_radio_2064_init(dev);
  138. else
  139. B43_WARN_ON(1);
  140. return 0;
  141. }
  142. static void b43_phy_lcn_op_software_rfkill(struct b43_wldev *dev,
  143. bool blocked)
  144. {
  145. if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED)
  146. b43err(dev->wl, "MAC not suspended\n");
  147. if (blocked) {
  148. b43_phy_mask(dev, B43_PHY_LCN_RF_CTL2, ~0x7c00);
  149. b43_phy_set(dev, B43_PHY_LCN_RF_CTL1, 0x1f00);
  150. b43_phy_mask(dev, B43_PHY_LCN_RF_CTL5, ~0x7f00);
  151. b43_phy_mask(dev, B43_PHY_LCN_RF_CTL4, ~0x2);
  152. b43_phy_set(dev, B43_PHY_LCN_RF_CTL3, 0x808);
  153. b43_phy_mask(dev, B43_PHY_LCN_RF_CTL7, ~0x8);
  154. b43_phy_set(dev, B43_PHY_LCN_RF_CTL6, 0x8);
  155. } else {
  156. b43_phy_mask(dev, B43_PHY_LCN_RF_CTL1, ~0x1f00);
  157. b43_phy_mask(dev, B43_PHY_LCN_RF_CTL3, ~0x808);
  158. b43_phy_mask(dev, B43_PHY_LCN_RF_CTL6, ~0x8);
  159. }
  160. }
  161. static void b43_phy_lcn_op_switch_analog(struct b43_wldev *dev, bool on)
  162. {
  163. if (on) {
  164. b43_phy_mask(dev, B43_PHY_LCN_AFE_CTL1, ~0x7);
  165. } else {
  166. b43_phy_set(dev, B43_PHY_LCN_AFE_CTL2, 0x7);
  167. b43_phy_set(dev, B43_PHY_LCN_AFE_CTL1, 0x7);
  168. }
  169. }
  170. static unsigned int b43_phy_lcn_op_get_default_chan(struct b43_wldev *dev)
  171. {
  172. if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
  173. return 1;
  174. return 36;
  175. }
  176. static enum b43_txpwr_result
  177. b43_phy_lcn_op_recalc_txpower(struct b43_wldev *dev, bool ignore_tssi)
  178. {
  179. return B43_TXPWR_RES_DONE;
  180. }
  181. static void b43_phy_lcn_op_adjust_txpower(struct b43_wldev *dev)
  182. {
  183. }
  184. /**************************************************
  185. * PHY ops struct.
  186. **************************************************/
  187. const struct b43_phy_operations b43_phyops_lcn = {
  188. .allocate = b43_phy_lcn_op_allocate,
  189. .free = b43_phy_lcn_op_free,
  190. .prepare_structs = b43_phy_lcn_op_prepare_structs,
  191. .init = b43_phy_lcn_op_init,
  192. /*
  193. .phy_read = b43_phy_lcn_op_read,
  194. .phy_write = b43_phy_lcn_op_write,
  195. .phy_maskset = b43_phy_lcn_op_maskset,
  196. .radio_read = b43_phy_lcn_op_radio_read,
  197. .radio_write = b43_phy_lcn_op_radio_write,
  198. */
  199. .software_rfkill = b43_phy_lcn_op_software_rfkill,
  200. .switch_analog = b43_phy_lcn_op_switch_analog,
  201. /*
  202. .switch_channel = b43_phy_lcn_op_switch_channel,
  203. */
  204. .get_default_chan = b43_phy_lcn_op_get_default_chan,
  205. .recalc_txpower = b43_phy_lcn_op_recalc_txpower,
  206. .adjust_txpower = b43_phy_lcn_op_adjust_txpower,
  207. };