recv.c 53 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/dma-mapping.h>
  17. #include "ath9k.h"
  18. #include "ar9003_mac.h"
  19. #define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
  20. static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
  21. int mindelta, int main_rssi_avg,
  22. int alt_rssi_avg, int pkt_count)
  23. {
  24. return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
  25. (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
  26. (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
  27. }
  28. static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
  29. int curr_main_set, int curr_alt_set,
  30. int alt_rssi_avg, int main_rssi_avg)
  31. {
  32. bool result = false;
  33. switch (div_group) {
  34. case 0:
  35. if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
  36. result = true;
  37. break;
  38. case 1:
  39. case 2:
  40. if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
  41. (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
  42. (alt_rssi_avg >= (main_rssi_avg - 5))) ||
  43. ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
  44. (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
  45. (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
  46. (alt_rssi_avg >= 4))
  47. result = true;
  48. else
  49. result = false;
  50. break;
  51. }
  52. return result;
  53. }
  54. static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
  55. {
  56. return sc->ps_enabled &&
  57. (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
  58. }
  59. /*
  60. * Setup and link descriptors.
  61. *
  62. * 11N: we can no longer afford to self link the last descriptor.
  63. * MAC acknowledges BA status as long as it copies frames to host
  64. * buffer (or rx fifo). This can incorrectly acknowledge packets
  65. * to a sender if last desc is self-linked.
  66. */
  67. static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  68. {
  69. struct ath_hw *ah = sc->sc_ah;
  70. struct ath_common *common = ath9k_hw_common(ah);
  71. struct ath_desc *ds;
  72. struct sk_buff *skb;
  73. ATH_RXBUF_RESET(bf);
  74. ds = bf->bf_desc;
  75. ds->ds_link = 0; /* link to null */
  76. ds->ds_data = bf->bf_buf_addr;
  77. /* virtual addr of the beginning of the buffer. */
  78. skb = bf->bf_mpdu;
  79. BUG_ON(skb == NULL);
  80. ds->ds_vdata = skb->data;
  81. /*
  82. * setup rx descriptors. The rx_bufsize here tells the hardware
  83. * how much data it can DMA to us and that we are prepared
  84. * to process
  85. */
  86. ath9k_hw_setuprxdesc(ah, ds,
  87. common->rx_bufsize,
  88. 0);
  89. if (sc->rx.rxlink == NULL)
  90. ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  91. else
  92. *sc->rx.rxlink = bf->bf_daddr;
  93. sc->rx.rxlink = &ds->ds_link;
  94. }
  95. static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
  96. {
  97. /* XXX block beacon interrupts */
  98. ath9k_hw_setantenna(sc->sc_ah, antenna);
  99. sc->rx.defant = antenna;
  100. sc->rx.rxotherant = 0;
  101. }
  102. static void ath_opmode_init(struct ath_softc *sc)
  103. {
  104. struct ath_hw *ah = sc->sc_ah;
  105. struct ath_common *common = ath9k_hw_common(ah);
  106. u32 rfilt, mfilt[2];
  107. /* configure rx filter */
  108. rfilt = ath_calcrxfilter(sc);
  109. ath9k_hw_setrxfilter(ah, rfilt);
  110. /* configure bssid mask */
  111. ath_hw_setbssidmask(common);
  112. /* configure operational mode */
  113. ath9k_hw_setopmode(ah);
  114. /* calculate and install multicast filter */
  115. mfilt[0] = mfilt[1] = ~0;
  116. ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
  117. }
  118. static bool ath_rx_edma_buf_link(struct ath_softc *sc,
  119. enum ath9k_rx_qtype qtype)
  120. {
  121. struct ath_hw *ah = sc->sc_ah;
  122. struct ath_rx_edma *rx_edma;
  123. struct sk_buff *skb;
  124. struct ath_buf *bf;
  125. rx_edma = &sc->rx.rx_edma[qtype];
  126. if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
  127. return false;
  128. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  129. list_del_init(&bf->list);
  130. skb = bf->bf_mpdu;
  131. ATH_RXBUF_RESET(bf);
  132. memset(skb->data, 0, ah->caps.rx_status_len);
  133. dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
  134. ah->caps.rx_status_len, DMA_TO_DEVICE);
  135. SKB_CB_ATHBUF(skb) = bf;
  136. ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
  137. skb_queue_tail(&rx_edma->rx_fifo, skb);
  138. return true;
  139. }
  140. static void ath_rx_addbuffer_edma(struct ath_softc *sc,
  141. enum ath9k_rx_qtype qtype, int size)
  142. {
  143. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  144. u32 nbuf = 0;
  145. if (list_empty(&sc->rx.rxbuf)) {
  146. ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
  147. return;
  148. }
  149. while (!list_empty(&sc->rx.rxbuf)) {
  150. nbuf++;
  151. if (!ath_rx_edma_buf_link(sc, qtype))
  152. break;
  153. if (nbuf >= size)
  154. break;
  155. }
  156. }
  157. static void ath_rx_remove_buffer(struct ath_softc *sc,
  158. enum ath9k_rx_qtype qtype)
  159. {
  160. struct ath_buf *bf;
  161. struct ath_rx_edma *rx_edma;
  162. struct sk_buff *skb;
  163. rx_edma = &sc->rx.rx_edma[qtype];
  164. while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
  165. bf = SKB_CB_ATHBUF(skb);
  166. BUG_ON(!bf);
  167. list_add_tail(&bf->list, &sc->rx.rxbuf);
  168. }
  169. }
  170. static void ath_rx_edma_cleanup(struct ath_softc *sc)
  171. {
  172. struct ath_buf *bf;
  173. ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
  174. ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
  175. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  176. if (bf->bf_mpdu)
  177. dev_kfree_skb_any(bf->bf_mpdu);
  178. }
  179. INIT_LIST_HEAD(&sc->rx.rxbuf);
  180. kfree(sc->rx.rx_bufptr);
  181. sc->rx.rx_bufptr = NULL;
  182. }
  183. static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
  184. {
  185. skb_queue_head_init(&rx_edma->rx_fifo);
  186. skb_queue_head_init(&rx_edma->rx_buffers);
  187. rx_edma->rx_fifo_hwsize = size;
  188. }
  189. static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
  190. {
  191. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  192. struct ath_hw *ah = sc->sc_ah;
  193. struct sk_buff *skb;
  194. struct ath_buf *bf;
  195. int error = 0, i;
  196. u32 size;
  197. ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
  198. ah->caps.rx_status_len);
  199. ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
  200. ah->caps.rx_lp_qdepth);
  201. ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
  202. ah->caps.rx_hp_qdepth);
  203. size = sizeof(struct ath_buf) * nbufs;
  204. bf = kzalloc(size, GFP_KERNEL);
  205. if (!bf)
  206. return -ENOMEM;
  207. INIT_LIST_HEAD(&sc->rx.rxbuf);
  208. sc->rx.rx_bufptr = bf;
  209. for (i = 0; i < nbufs; i++, bf++) {
  210. skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
  211. if (!skb) {
  212. error = -ENOMEM;
  213. goto rx_init_fail;
  214. }
  215. memset(skb->data, 0, common->rx_bufsize);
  216. bf->bf_mpdu = skb;
  217. bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
  218. common->rx_bufsize,
  219. DMA_BIDIRECTIONAL);
  220. if (unlikely(dma_mapping_error(sc->dev,
  221. bf->bf_buf_addr))) {
  222. dev_kfree_skb_any(skb);
  223. bf->bf_mpdu = NULL;
  224. bf->bf_buf_addr = 0;
  225. ath_err(common,
  226. "dma_mapping_error() on RX init\n");
  227. error = -ENOMEM;
  228. goto rx_init_fail;
  229. }
  230. list_add_tail(&bf->list, &sc->rx.rxbuf);
  231. }
  232. return 0;
  233. rx_init_fail:
  234. ath_rx_edma_cleanup(sc);
  235. return error;
  236. }
  237. static void ath_edma_start_recv(struct ath_softc *sc)
  238. {
  239. spin_lock_bh(&sc->rx.rxbuflock);
  240. ath9k_hw_rxena(sc->sc_ah);
  241. ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
  242. sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
  243. ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
  244. sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
  245. ath_opmode_init(sc);
  246. ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
  247. spin_unlock_bh(&sc->rx.rxbuflock);
  248. }
  249. static void ath_edma_stop_recv(struct ath_softc *sc)
  250. {
  251. ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
  252. ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
  253. }
  254. int ath_rx_init(struct ath_softc *sc, int nbufs)
  255. {
  256. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  257. struct sk_buff *skb;
  258. struct ath_buf *bf;
  259. int error = 0;
  260. spin_lock_init(&sc->sc_pcu_lock);
  261. sc->sc_flags &= ~SC_OP_RXFLUSH;
  262. spin_lock_init(&sc->rx.rxbuflock);
  263. common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
  264. sc->sc_ah->caps.rx_status_len;
  265. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  266. return ath_rx_edma_init(sc, nbufs);
  267. } else {
  268. ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
  269. common->cachelsz, common->rx_bufsize);
  270. /* Initialize rx descriptors */
  271. error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
  272. "rx", nbufs, 1, 0);
  273. if (error != 0) {
  274. ath_err(common,
  275. "failed to allocate rx descriptors: %d\n",
  276. error);
  277. goto err;
  278. }
  279. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  280. skb = ath_rxbuf_alloc(common, common->rx_bufsize,
  281. GFP_KERNEL);
  282. if (skb == NULL) {
  283. error = -ENOMEM;
  284. goto err;
  285. }
  286. bf->bf_mpdu = skb;
  287. bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
  288. common->rx_bufsize,
  289. DMA_FROM_DEVICE);
  290. if (unlikely(dma_mapping_error(sc->dev,
  291. bf->bf_buf_addr))) {
  292. dev_kfree_skb_any(skb);
  293. bf->bf_mpdu = NULL;
  294. bf->bf_buf_addr = 0;
  295. ath_err(common,
  296. "dma_mapping_error() on RX init\n");
  297. error = -ENOMEM;
  298. goto err;
  299. }
  300. }
  301. sc->rx.rxlink = NULL;
  302. }
  303. err:
  304. if (error)
  305. ath_rx_cleanup(sc);
  306. return error;
  307. }
  308. void ath_rx_cleanup(struct ath_softc *sc)
  309. {
  310. struct ath_hw *ah = sc->sc_ah;
  311. struct ath_common *common = ath9k_hw_common(ah);
  312. struct sk_buff *skb;
  313. struct ath_buf *bf;
  314. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  315. ath_rx_edma_cleanup(sc);
  316. return;
  317. } else {
  318. list_for_each_entry(bf, &sc->rx.rxbuf, list) {
  319. skb = bf->bf_mpdu;
  320. if (skb) {
  321. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  322. common->rx_bufsize,
  323. DMA_FROM_DEVICE);
  324. dev_kfree_skb(skb);
  325. bf->bf_buf_addr = 0;
  326. bf->bf_mpdu = NULL;
  327. }
  328. }
  329. if (sc->rx.rxdma.dd_desc_len != 0)
  330. ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
  331. }
  332. }
  333. /*
  334. * Calculate the receive filter according to the
  335. * operating mode and state:
  336. *
  337. * o always accept unicast, broadcast, and multicast traffic
  338. * o maintain current state of phy error reception (the hal
  339. * may enable phy error frames for noise immunity work)
  340. * o probe request frames are accepted only when operating in
  341. * hostap, adhoc, or monitor modes
  342. * o enable promiscuous mode according to the interface state
  343. * o accept beacons:
  344. * - when operating in adhoc mode so the 802.11 layer creates
  345. * node table entries for peers,
  346. * - when operating in station mode for collecting rssi data when
  347. * the station is otherwise quiet, or
  348. * - when operating as a repeater so we see repeater-sta beacons
  349. * - when scanning
  350. */
  351. u32 ath_calcrxfilter(struct ath_softc *sc)
  352. {
  353. #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
  354. u32 rfilt;
  355. rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
  356. | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
  357. | ATH9K_RX_FILTER_MCAST;
  358. if (sc->rx.rxfilter & FIF_PROBE_REQ)
  359. rfilt |= ATH9K_RX_FILTER_PROBEREQ;
  360. /*
  361. * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
  362. * mode interface or when in monitor mode. AP mode does not need this
  363. * since it receives all in-BSS frames anyway.
  364. */
  365. if (sc->sc_ah->is_monitoring)
  366. rfilt |= ATH9K_RX_FILTER_PROM;
  367. if (sc->rx.rxfilter & FIF_CONTROL)
  368. rfilt |= ATH9K_RX_FILTER_CONTROL;
  369. if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
  370. (sc->nvifs <= 1) &&
  371. !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
  372. rfilt |= ATH9K_RX_FILTER_MYBEACON;
  373. else
  374. rfilt |= ATH9K_RX_FILTER_BEACON;
  375. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  376. (sc->rx.rxfilter & FIF_PSPOLL))
  377. rfilt |= ATH9K_RX_FILTER_PSPOLL;
  378. if (conf_is_ht(&sc->hw->conf))
  379. rfilt |= ATH9K_RX_FILTER_COMP_BAR;
  380. if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
  381. /* The following may also be needed for other older chips */
  382. if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
  383. rfilt |= ATH9K_RX_FILTER_PROM;
  384. rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
  385. }
  386. return rfilt;
  387. #undef RX_FILTER_PRESERVE
  388. }
  389. int ath_startrecv(struct ath_softc *sc)
  390. {
  391. struct ath_hw *ah = sc->sc_ah;
  392. struct ath_buf *bf, *tbf;
  393. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  394. ath_edma_start_recv(sc);
  395. return 0;
  396. }
  397. spin_lock_bh(&sc->rx.rxbuflock);
  398. if (list_empty(&sc->rx.rxbuf))
  399. goto start_recv;
  400. sc->rx.rxlink = NULL;
  401. list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
  402. ath_rx_buf_link(sc, bf);
  403. }
  404. /* We could have deleted elements so the list may be empty now */
  405. if (list_empty(&sc->rx.rxbuf))
  406. goto start_recv;
  407. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  408. ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  409. ath9k_hw_rxena(ah);
  410. start_recv:
  411. ath_opmode_init(sc);
  412. ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
  413. spin_unlock_bh(&sc->rx.rxbuflock);
  414. return 0;
  415. }
  416. bool ath_stoprecv(struct ath_softc *sc)
  417. {
  418. struct ath_hw *ah = sc->sc_ah;
  419. bool stopped, reset = false;
  420. spin_lock_bh(&sc->rx.rxbuflock);
  421. ath9k_hw_abortpcurecv(ah);
  422. ath9k_hw_setrxfilter(ah, 0);
  423. stopped = ath9k_hw_stopdmarecv(ah, &reset);
  424. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  425. ath_edma_stop_recv(sc);
  426. else
  427. sc->rx.rxlink = NULL;
  428. spin_unlock_bh(&sc->rx.rxbuflock);
  429. if (!(ah->ah_flags & AH_UNPLUGGED) &&
  430. unlikely(!stopped)) {
  431. ath_err(ath9k_hw_common(sc->sc_ah),
  432. "Could not stop RX, we could be "
  433. "confusing the DMA engine when we start RX up\n");
  434. ATH_DBG_WARN_ON_ONCE(!stopped);
  435. }
  436. return stopped && !reset;
  437. }
  438. void ath_flushrecv(struct ath_softc *sc)
  439. {
  440. sc->sc_flags |= SC_OP_RXFLUSH;
  441. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  442. ath_rx_tasklet(sc, 1, true);
  443. ath_rx_tasklet(sc, 1, false);
  444. sc->sc_flags &= ~SC_OP_RXFLUSH;
  445. }
  446. static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
  447. {
  448. /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
  449. struct ieee80211_mgmt *mgmt;
  450. u8 *pos, *end, id, elen;
  451. struct ieee80211_tim_ie *tim;
  452. mgmt = (struct ieee80211_mgmt *)skb->data;
  453. pos = mgmt->u.beacon.variable;
  454. end = skb->data + skb->len;
  455. while (pos + 2 < end) {
  456. id = *pos++;
  457. elen = *pos++;
  458. if (pos + elen > end)
  459. break;
  460. if (id == WLAN_EID_TIM) {
  461. if (elen < sizeof(*tim))
  462. break;
  463. tim = (struct ieee80211_tim_ie *) pos;
  464. if (tim->dtim_count != 0)
  465. break;
  466. return tim->bitmap_ctrl & 0x01;
  467. }
  468. pos += elen;
  469. }
  470. return false;
  471. }
  472. static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
  473. {
  474. struct ieee80211_mgmt *mgmt;
  475. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  476. if (skb->len < 24 + 8 + 2 + 2)
  477. return;
  478. mgmt = (struct ieee80211_mgmt *)skb->data;
  479. if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) {
  480. /* TODO: This doesn't work well if you have stations
  481. * associated to two different APs because curbssid
  482. * is just the last AP that any of the stations associated
  483. * with.
  484. */
  485. return; /* not from our current AP */
  486. }
  487. sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
  488. if (sc->ps_flags & PS_BEACON_SYNC) {
  489. sc->ps_flags &= ~PS_BEACON_SYNC;
  490. ath_dbg(common, ATH_DBG_PS,
  491. "Reconfigure Beacon timers based on timestamp from the AP\n");
  492. ath_set_beacon(sc);
  493. }
  494. if (ath_beacon_dtim_pending_cab(skb)) {
  495. /*
  496. * Remain awake waiting for buffered broadcast/multicast
  497. * frames. If the last broadcast/multicast frame is not
  498. * received properly, the next beacon frame will work as
  499. * a backup trigger for returning into NETWORK SLEEP state,
  500. * so we are waiting for it as well.
  501. */
  502. ath_dbg(common, ATH_DBG_PS,
  503. "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
  504. sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
  505. return;
  506. }
  507. if (sc->ps_flags & PS_WAIT_FOR_CAB) {
  508. /*
  509. * This can happen if a broadcast frame is dropped or the AP
  510. * fails to send a frame indicating that all CAB frames have
  511. * been delivered.
  512. */
  513. sc->ps_flags &= ~PS_WAIT_FOR_CAB;
  514. ath_dbg(common, ATH_DBG_PS,
  515. "PS wait for CAB frames timed out\n");
  516. }
  517. }
  518. static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
  519. {
  520. struct ieee80211_hdr *hdr;
  521. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  522. hdr = (struct ieee80211_hdr *)skb->data;
  523. /* Process Beacon and CAB receive in PS state */
  524. if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
  525. && ieee80211_is_beacon(hdr->frame_control))
  526. ath_rx_ps_beacon(sc, skb);
  527. else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
  528. (ieee80211_is_data(hdr->frame_control) ||
  529. ieee80211_is_action(hdr->frame_control)) &&
  530. is_multicast_ether_addr(hdr->addr1) &&
  531. !ieee80211_has_moredata(hdr->frame_control)) {
  532. /*
  533. * No more broadcast/multicast frames to be received at this
  534. * point.
  535. */
  536. sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
  537. ath_dbg(common, ATH_DBG_PS,
  538. "All PS CAB frames received, back to sleep\n");
  539. } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
  540. !is_multicast_ether_addr(hdr->addr1) &&
  541. !ieee80211_has_morefrags(hdr->frame_control)) {
  542. sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
  543. ath_dbg(common, ATH_DBG_PS,
  544. "Going back to sleep after having received PS-Poll data (0x%lx)\n",
  545. sc->ps_flags & (PS_WAIT_FOR_BEACON |
  546. PS_WAIT_FOR_CAB |
  547. PS_WAIT_FOR_PSPOLL_DATA |
  548. PS_WAIT_FOR_TX_ACK));
  549. }
  550. }
  551. static bool ath_edma_get_buffers(struct ath_softc *sc,
  552. enum ath9k_rx_qtype qtype)
  553. {
  554. struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
  555. struct ath_hw *ah = sc->sc_ah;
  556. struct ath_common *common = ath9k_hw_common(ah);
  557. struct sk_buff *skb;
  558. struct ath_buf *bf;
  559. int ret;
  560. skb = skb_peek(&rx_edma->rx_fifo);
  561. if (!skb)
  562. return false;
  563. bf = SKB_CB_ATHBUF(skb);
  564. BUG_ON(!bf);
  565. dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
  566. common->rx_bufsize, DMA_FROM_DEVICE);
  567. ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
  568. if (ret == -EINPROGRESS) {
  569. /*let device gain the buffer again*/
  570. dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
  571. common->rx_bufsize, DMA_FROM_DEVICE);
  572. return false;
  573. }
  574. __skb_unlink(skb, &rx_edma->rx_fifo);
  575. if (ret == -EINVAL) {
  576. /* corrupt descriptor, skip this one and the following one */
  577. list_add_tail(&bf->list, &sc->rx.rxbuf);
  578. ath_rx_edma_buf_link(sc, qtype);
  579. skb = skb_peek(&rx_edma->rx_fifo);
  580. if (!skb)
  581. return true;
  582. bf = SKB_CB_ATHBUF(skb);
  583. BUG_ON(!bf);
  584. __skb_unlink(skb, &rx_edma->rx_fifo);
  585. list_add_tail(&bf->list, &sc->rx.rxbuf);
  586. ath_rx_edma_buf_link(sc, qtype);
  587. return true;
  588. }
  589. skb_queue_tail(&rx_edma->rx_buffers, skb);
  590. return true;
  591. }
  592. static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
  593. struct ath_rx_status *rs,
  594. enum ath9k_rx_qtype qtype)
  595. {
  596. struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
  597. struct sk_buff *skb;
  598. struct ath_buf *bf;
  599. while (ath_edma_get_buffers(sc, qtype));
  600. skb = __skb_dequeue(&rx_edma->rx_buffers);
  601. if (!skb)
  602. return NULL;
  603. bf = SKB_CB_ATHBUF(skb);
  604. ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
  605. return bf;
  606. }
  607. static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
  608. struct ath_rx_status *rs)
  609. {
  610. struct ath_hw *ah = sc->sc_ah;
  611. struct ath_common *common = ath9k_hw_common(ah);
  612. struct ath_desc *ds;
  613. struct ath_buf *bf;
  614. int ret;
  615. if (list_empty(&sc->rx.rxbuf)) {
  616. sc->rx.rxlink = NULL;
  617. return NULL;
  618. }
  619. bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
  620. ds = bf->bf_desc;
  621. /*
  622. * Must provide the virtual address of the current
  623. * descriptor, the physical address, and the virtual
  624. * address of the next descriptor in the h/w chain.
  625. * This allows the HAL to look ahead to see if the
  626. * hardware is done with a descriptor by checking the
  627. * done bit in the following descriptor and the address
  628. * of the current descriptor the DMA engine is working
  629. * on. All this is necessary because of our use of
  630. * a self-linked list to avoid rx overruns.
  631. */
  632. ret = ath9k_hw_rxprocdesc(ah, ds, rs);
  633. if (ret == -EINPROGRESS) {
  634. struct ath_rx_status trs;
  635. struct ath_buf *tbf;
  636. struct ath_desc *tds;
  637. memset(&trs, 0, sizeof(trs));
  638. if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
  639. sc->rx.rxlink = NULL;
  640. return NULL;
  641. }
  642. tbf = list_entry(bf->list.next, struct ath_buf, list);
  643. /*
  644. * On some hardware the descriptor status words could
  645. * get corrupted, including the done bit. Because of
  646. * this, check if the next descriptor's done bit is
  647. * set or not.
  648. *
  649. * If the next descriptor's done bit is set, the current
  650. * descriptor has been corrupted. Force s/w to discard
  651. * this descriptor and continue...
  652. */
  653. tds = tbf->bf_desc;
  654. ret = ath9k_hw_rxprocdesc(ah, tds, &trs);
  655. if (ret == -EINPROGRESS)
  656. return NULL;
  657. }
  658. if (!bf->bf_mpdu)
  659. return bf;
  660. /*
  661. * Synchronize the DMA transfer with CPU before
  662. * 1. accessing the frame
  663. * 2. requeueing the same buffer to h/w
  664. */
  665. dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
  666. common->rx_bufsize,
  667. DMA_FROM_DEVICE);
  668. return bf;
  669. }
  670. /* Assumes you've already done the endian to CPU conversion */
  671. static bool ath9k_rx_accept(struct ath_common *common,
  672. struct ieee80211_hdr *hdr,
  673. struct ieee80211_rx_status *rxs,
  674. struct ath_rx_status *rx_stats,
  675. bool *decrypt_error)
  676. {
  677. bool is_mc, is_valid_tkip, strip_mic, mic_error;
  678. struct ath_hw *ah = common->ah;
  679. __le16 fc;
  680. u8 rx_status_len = ah->caps.rx_status_len;
  681. fc = hdr->frame_control;
  682. is_mc = !!is_multicast_ether_addr(hdr->addr1);
  683. is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID &&
  684. test_bit(rx_stats->rs_keyix, common->tkip_keymap);
  685. strip_mic = is_valid_tkip && !(rx_stats->rs_status &
  686. (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC));
  687. if (!rx_stats->rs_datalen)
  688. return false;
  689. /*
  690. * rs_status follows rs_datalen so if rs_datalen is too large
  691. * we can take a hint that hardware corrupted it, so ignore
  692. * those frames.
  693. */
  694. if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
  695. return false;
  696. /* Only use error bits from the last fragment */
  697. if (rx_stats->rs_more)
  698. return true;
  699. mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) &&
  700. !ieee80211_has_morefrags(fc) &&
  701. !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
  702. (rx_stats->rs_status & ATH9K_RXERR_MIC);
  703. /*
  704. * The rx_stats->rs_status will not be set until the end of the
  705. * chained descriptors so it can be ignored if rs_more is set. The
  706. * rs_more will be false at the last element of the chained
  707. * descriptors.
  708. */
  709. if (rx_stats->rs_status != 0) {
  710. if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
  711. rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
  712. mic_error = false;
  713. }
  714. if (rx_stats->rs_status & ATH9K_RXERR_PHY)
  715. return false;
  716. if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
  717. *decrypt_error = true;
  718. mic_error = false;
  719. }
  720. /*
  721. * Reject error frames with the exception of
  722. * decryption and MIC failures. For monitor mode,
  723. * we also ignore the CRC error.
  724. */
  725. if (ah->is_monitoring) {
  726. if (rx_stats->rs_status &
  727. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
  728. ATH9K_RXERR_CRC))
  729. return false;
  730. } else {
  731. if (rx_stats->rs_status &
  732. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
  733. return false;
  734. }
  735. }
  736. }
  737. /*
  738. * For unicast frames the MIC error bit can have false positives,
  739. * so all MIC error reports need to be validated in software.
  740. * False negatives are not common, so skip software verification
  741. * if the hardware considers the MIC valid.
  742. */
  743. if (strip_mic)
  744. rxs->flag |= RX_FLAG_MMIC_STRIPPED;
  745. else if (is_mc && mic_error)
  746. rxs->flag |= RX_FLAG_MMIC_ERROR;
  747. return true;
  748. }
  749. static int ath9k_process_rate(struct ath_common *common,
  750. struct ieee80211_hw *hw,
  751. struct ath_rx_status *rx_stats,
  752. struct ieee80211_rx_status *rxs)
  753. {
  754. struct ieee80211_supported_band *sband;
  755. enum ieee80211_band band;
  756. unsigned int i = 0;
  757. band = hw->conf.channel->band;
  758. sband = hw->wiphy->bands[band];
  759. if (rx_stats->rs_rate & 0x80) {
  760. /* HT rate */
  761. rxs->flag |= RX_FLAG_HT;
  762. if (rx_stats->rs_flags & ATH9K_RX_2040)
  763. rxs->flag |= RX_FLAG_40MHZ;
  764. if (rx_stats->rs_flags & ATH9K_RX_GI)
  765. rxs->flag |= RX_FLAG_SHORT_GI;
  766. rxs->rate_idx = rx_stats->rs_rate & 0x7f;
  767. return 0;
  768. }
  769. for (i = 0; i < sband->n_bitrates; i++) {
  770. if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
  771. rxs->rate_idx = i;
  772. return 0;
  773. }
  774. if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
  775. rxs->flag |= RX_FLAG_SHORTPRE;
  776. rxs->rate_idx = i;
  777. return 0;
  778. }
  779. }
  780. /*
  781. * No valid hardware bitrate found -- we should not get here
  782. * because hardware has already validated this frame as OK.
  783. */
  784. ath_dbg(common, ATH_DBG_XMIT,
  785. "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
  786. rx_stats->rs_rate);
  787. return -EINVAL;
  788. }
  789. static void ath9k_process_rssi(struct ath_common *common,
  790. struct ieee80211_hw *hw,
  791. struct ieee80211_hdr *hdr,
  792. struct ath_rx_status *rx_stats)
  793. {
  794. struct ath_softc *sc = hw->priv;
  795. struct ath_hw *ah = common->ah;
  796. int last_rssi;
  797. __le16 fc;
  798. if ((ah->opmode != NL80211_IFTYPE_STATION) &&
  799. (ah->opmode != NL80211_IFTYPE_ADHOC))
  800. return;
  801. fc = hdr->frame_control;
  802. if (!ieee80211_is_beacon(fc) ||
  803. compare_ether_addr(hdr->addr3, common->curbssid)) {
  804. /* TODO: This doesn't work well if you have stations
  805. * associated to two different APs because curbssid
  806. * is just the last AP that any of the stations associated
  807. * with.
  808. */
  809. return;
  810. }
  811. if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
  812. ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
  813. last_rssi = sc->last_rssi;
  814. if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
  815. rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
  816. ATH_RSSI_EP_MULTIPLIER);
  817. if (rx_stats->rs_rssi < 0)
  818. rx_stats->rs_rssi = 0;
  819. /* Update Beacon RSSI, this is used by ANI. */
  820. ah->stats.avgbrssi = rx_stats->rs_rssi;
  821. }
  822. /*
  823. * For Decrypt or Demic errors, we only mark packet status here and always push
  824. * up the frame up to let mac80211 handle the actual error case, be it no
  825. * decryption key or real decryption error. This let us keep statistics there.
  826. */
  827. static int ath9k_rx_skb_preprocess(struct ath_common *common,
  828. struct ieee80211_hw *hw,
  829. struct ieee80211_hdr *hdr,
  830. struct ath_rx_status *rx_stats,
  831. struct ieee80211_rx_status *rx_status,
  832. bool *decrypt_error)
  833. {
  834. struct ath_hw *ah = common->ah;
  835. memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
  836. /*
  837. * everything but the rate is checked here, the rate check is done
  838. * separately to avoid doing two lookups for a rate for each frame.
  839. */
  840. if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
  841. return -EINVAL;
  842. /* Only use status info from the last fragment */
  843. if (rx_stats->rs_more)
  844. return 0;
  845. ath9k_process_rssi(common, hw, hdr, rx_stats);
  846. if (ath9k_process_rate(common, hw, rx_stats, rx_status))
  847. return -EINVAL;
  848. rx_status->band = hw->conf.channel->band;
  849. rx_status->freq = hw->conf.channel->center_freq;
  850. rx_status->signal = ah->noise + rx_stats->rs_rssi;
  851. rx_status->antenna = rx_stats->rs_antenna;
  852. rx_status->flag |= RX_FLAG_MACTIME_MPDU;
  853. return 0;
  854. }
  855. static void ath9k_rx_skb_postprocess(struct ath_common *common,
  856. struct sk_buff *skb,
  857. struct ath_rx_status *rx_stats,
  858. struct ieee80211_rx_status *rxs,
  859. bool decrypt_error)
  860. {
  861. struct ath_hw *ah = common->ah;
  862. struct ieee80211_hdr *hdr;
  863. int hdrlen, padpos, padsize;
  864. u8 keyix;
  865. __le16 fc;
  866. /* see if any padding is done by the hw and remove it */
  867. hdr = (struct ieee80211_hdr *) skb->data;
  868. hdrlen = ieee80211_get_hdrlen_from_skb(skb);
  869. fc = hdr->frame_control;
  870. padpos = ath9k_cmn_padpos(hdr->frame_control);
  871. /* The MAC header is padded to have 32-bit boundary if the
  872. * packet payload is non-zero. The general calculation for
  873. * padsize would take into account odd header lengths:
  874. * padsize = (4 - padpos % 4) % 4; However, since only
  875. * even-length headers are used, padding can only be 0 or 2
  876. * bytes and we can optimize this a bit. In addition, we must
  877. * not try to remove padding from short control frames that do
  878. * not have payload. */
  879. padsize = padpos & 3;
  880. if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
  881. memmove(skb->data + padsize, skb->data, padpos);
  882. skb_pull(skb, padsize);
  883. }
  884. keyix = rx_stats->rs_keyix;
  885. if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
  886. ieee80211_has_protected(fc)) {
  887. rxs->flag |= RX_FLAG_DECRYPTED;
  888. } else if (ieee80211_has_protected(fc)
  889. && !decrypt_error && skb->len >= hdrlen + 4) {
  890. keyix = skb->data[hdrlen + 3] >> 6;
  891. if (test_bit(keyix, common->keymap))
  892. rxs->flag |= RX_FLAG_DECRYPTED;
  893. }
  894. if (ah->sw_mgmt_crypto &&
  895. (rxs->flag & RX_FLAG_DECRYPTED) &&
  896. ieee80211_is_mgmt(fc))
  897. /* Use software decrypt for management frames. */
  898. rxs->flag &= ~RX_FLAG_DECRYPTED;
  899. }
  900. static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
  901. struct ath_hw_antcomb_conf ant_conf,
  902. int main_rssi_avg)
  903. {
  904. antcomb->quick_scan_cnt = 0;
  905. if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
  906. antcomb->rssi_lna2 = main_rssi_avg;
  907. else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
  908. antcomb->rssi_lna1 = main_rssi_avg;
  909. switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
  910. case 0x10: /* LNA2 A-B */
  911. antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  912. antcomb->first_quick_scan_conf =
  913. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  914. antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
  915. break;
  916. case 0x20: /* LNA1 A-B */
  917. antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  918. antcomb->first_quick_scan_conf =
  919. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  920. antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
  921. break;
  922. case 0x21: /* LNA1 LNA2 */
  923. antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
  924. antcomb->first_quick_scan_conf =
  925. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  926. antcomb->second_quick_scan_conf =
  927. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  928. break;
  929. case 0x12: /* LNA2 LNA1 */
  930. antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
  931. antcomb->first_quick_scan_conf =
  932. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  933. antcomb->second_quick_scan_conf =
  934. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  935. break;
  936. case 0x13: /* LNA2 A+B */
  937. antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  938. antcomb->first_quick_scan_conf =
  939. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  940. antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
  941. break;
  942. case 0x23: /* LNA1 A+B */
  943. antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  944. antcomb->first_quick_scan_conf =
  945. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  946. antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
  947. break;
  948. default:
  949. break;
  950. }
  951. }
  952. static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
  953. struct ath_hw_antcomb_conf *div_ant_conf,
  954. int main_rssi_avg, int alt_rssi_avg,
  955. int alt_ratio)
  956. {
  957. /* alt_good */
  958. switch (antcomb->quick_scan_cnt) {
  959. case 0:
  960. /* set alt to main, and alt to first conf */
  961. div_ant_conf->main_lna_conf = antcomb->main_conf;
  962. div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
  963. break;
  964. case 1:
  965. /* set alt to main, and alt to first conf */
  966. div_ant_conf->main_lna_conf = antcomb->main_conf;
  967. div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
  968. antcomb->rssi_first = main_rssi_avg;
  969. antcomb->rssi_second = alt_rssi_avg;
  970. if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
  971. /* main is LNA1 */
  972. if (ath_is_alt_ant_ratio_better(alt_ratio,
  973. ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
  974. ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
  975. main_rssi_avg, alt_rssi_avg,
  976. antcomb->total_pkt_count))
  977. antcomb->first_ratio = true;
  978. else
  979. antcomb->first_ratio = false;
  980. } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
  981. if (ath_is_alt_ant_ratio_better(alt_ratio,
  982. ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
  983. ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
  984. main_rssi_avg, alt_rssi_avg,
  985. antcomb->total_pkt_count))
  986. antcomb->first_ratio = true;
  987. else
  988. antcomb->first_ratio = false;
  989. } else {
  990. if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
  991. (alt_rssi_avg > main_rssi_avg +
  992. ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
  993. (alt_rssi_avg > main_rssi_avg)) &&
  994. (antcomb->total_pkt_count > 50))
  995. antcomb->first_ratio = true;
  996. else
  997. antcomb->first_ratio = false;
  998. }
  999. break;
  1000. case 2:
  1001. antcomb->alt_good = false;
  1002. antcomb->scan_not_start = false;
  1003. antcomb->scan = false;
  1004. antcomb->rssi_first = main_rssi_avg;
  1005. antcomb->rssi_third = alt_rssi_avg;
  1006. if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
  1007. antcomb->rssi_lna1 = alt_rssi_avg;
  1008. else if (antcomb->second_quick_scan_conf ==
  1009. ATH_ANT_DIV_COMB_LNA2)
  1010. antcomb->rssi_lna2 = alt_rssi_avg;
  1011. else if (antcomb->second_quick_scan_conf ==
  1012. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
  1013. if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
  1014. antcomb->rssi_lna2 = main_rssi_avg;
  1015. else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
  1016. antcomb->rssi_lna1 = main_rssi_avg;
  1017. }
  1018. if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
  1019. ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
  1020. div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
  1021. else
  1022. div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
  1023. if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
  1024. if (ath_is_alt_ant_ratio_better(alt_ratio,
  1025. ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
  1026. ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
  1027. main_rssi_avg, alt_rssi_avg,
  1028. antcomb->total_pkt_count))
  1029. antcomb->second_ratio = true;
  1030. else
  1031. antcomb->second_ratio = false;
  1032. } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
  1033. if (ath_is_alt_ant_ratio_better(alt_ratio,
  1034. ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
  1035. ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
  1036. main_rssi_avg, alt_rssi_avg,
  1037. antcomb->total_pkt_count))
  1038. antcomb->second_ratio = true;
  1039. else
  1040. antcomb->second_ratio = false;
  1041. } else {
  1042. if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
  1043. (alt_rssi_avg > main_rssi_avg +
  1044. ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
  1045. (alt_rssi_avg > main_rssi_avg)) &&
  1046. (antcomb->total_pkt_count > 50))
  1047. antcomb->second_ratio = true;
  1048. else
  1049. antcomb->second_ratio = false;
  1050. }
  1051. /* set alt to the conf with maximun ratio */
  1052. if (antcomb->first_ratio && antcomb->second_ratio) {
  1053. if (antcomb->rssi_second > antcomb->rssi_third) {
  1054. /* first alt*/
  1055. if ((antcomb->first_quick_scan_conf ==
  1056. ATH_ANT_DIV_COMB_LNA1) ||
  1057. (antcomb->first_quick_scan_conf ==
  1058. ATH_ANT_DIV_COMB_LNA2))
  1059. /* Set alt LNA1 or LNA2*/
  1060. if (div_ant_conf->main_lna_conf ==
  1061. ATH_ANT_DIV_COMB_LNA2)
  1062. div_ant_conf->alt_lna_conf =
  1063. ATH_ANT_DIV_COMB_LNA1;
  1064. else
  1065. div_ant_conf->alt_lna_conf =
  1066. ATH_ANT_DIV_COMB_LNA2;
  1067. else
  1068. /* Set alt to A+B or A-B */
  1069. div_ant_conf->alt_lna_conf =
  1070. antcomb->first_quick_scan_conf;
  1071. } else if ((antcomb->second_quick_scan_conf ==
  1072. ATH_ANT_DIV_COMB_LNA1) ||
  1073. (antcomb->second_quick_scan_conf ==
  1074. ATH_ANT_DIV_COMB_LNA2)) {
  1075. /* Set alt LNA1 or LNA2 */
  1076. if (div_ant_conf->main_lna_conf ==
  1077. ATH_ANT_DIV_COMB_LNA2)
  1078. div_ant_conf->alt_lna_conf =
  1079. ATH_ANT_DIV_COMB_LNA1;
  1080. else
  1081. div_ant_conf->alt_lna_conf =
  1082. ATH_ANT_DIV_COMB_LNA2;
  1083. } else {
  1084. /* Set alt to A+B or A-B */
  1085. div_ant_conf->alt_lna_conf =
  1086. antcomb->second_quick_scan_conf;
  1087. }
  1088. } else if (antcomb->first_ratio) {
  1089. /* first alt */
  1090. if ((antcomb->first_quick_scan_conf ==
  1091. ATH_ANT_DIV_COMB_LNA1) ||
  1092. (antcomb->first_quick_scan_conf ==
  1093. ATH_ANT_DIV_COMB_LNA2))
  1094. /* Set alt LNA1 or LNA2 */
  1095. if (div_ant_conf->main_lna_conf ==
  1096. ATH_ANT_DIV_COMB_LNA2)
  1097. div_ant_conf->alt_lna_conf =
  1098. ATH_ANT_DIV_COMB_LNA1;
  1099. else
  1100. div_ant_conf->alt_lna_conf =
  1101. ATH_ANT_DIV_COMB_LNA2;
  1102. else
  1103. /* Set alt to A+B or A-B */
  1104. div_ant_conf->alt_lna_conf =
  1105. antcomb->first_quick_scan_conf;
  1106. } else if (antcomb->second_ratio) {
  1107. /* second alt */
  1108. if ((antcomb->second_quick_scan_conf ==
  1109. ATH_ANT_DIV_COMB_LNA1) ||
  1110. (antcomb->second_quick_scan_conf ==
  1111. ATH_ANT_DIV_COMB_LNA2))
  1112. /* Set alt LNA1 or LNA2 */
  1113. if (div_ant_conf->main_lna_conf ==
  1114. ATH_ANT_DIV_COMB_LNA2)
  1115. div_ant_conf->alt_lna_conf =
  1116. ATH_ANT_DIV_COMB_LNA1;
  1117. else
  1118. div_ant_conf->alt_lna_conf =
  1119. ATH_ANT_DIV_COMB_LNA2;
  1120. else
  1121. /* Set alt to A+B or A-B */
  1122. div_ant_conf->alt_lna_conf =
  1123. antcomb->second_quick_scan_conf;
  1124. } else {
  1125. /* main is largest */
  1126. if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
  1127. (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
  1128. /* Set alt LNA1 or LNA2 */
  1129. if (div_ant_conf->main_lna_conf ==
  1130. ATH_ANT_DIV_COMB_LNA2)
  1131. div_ant_conf->alt_lna_conf =
  1132. ATH_ANT_DIV_COMB_LNA1;
  1133. else
  1134. div_ant_conf->alt_lna_conf =
  1135. ATH_ANT_DIV_COMB_LNA2;
  1136. else
  1137. /* Set alt to A+B or A-B */
  1138. div_ant_conf->alt_lna_conf = antcomb->main_conf;
  1139. }
  1140. break;
  1141. default:
  1142. break;
  1143. }
  1144. }
  1145. static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
  1146. struct ath_ant_comb *antcomb, int alt_ratio)
  1147. {
  1148. if (ant_conf->div_group == 0) {
  1149. /* Adjust the fast_div_bias based on main and alt lna conf */
  1150. switch ((ant_conf->main_lna_conf << 4) |
  1151. ant_conf->alt_lna_conf) {
  1152. case 0x01: /* A-B LNA2 */
  1153. ant_conf->fast_div_bias = 0x3b;
  1154. break;
  1155. case 0x02: /* A-B LNA1 */
  1156. ant_conf->fast_div_bias = 0x3d;
  1157. break;
  1158. case 0x03: /* A-B A+B */
  1159. ant_conf->fast_div_bias = 0x1;
  1160. break;
  1161. case 0x10: /* LNA2 A-B */
  1162. ant_conf->fast_div_bias = 0x7;
  1163. break;
  1164. case 0x12: /* LNA2 LNA1 */
  1165. ant_conf->fast_div_bias = 0x2;
  1166. break;
  1167. case 0x13: /* LNA2 A+B */
  1168. ant_conf->fast_div_bias = 0x7;
  1169. break;
  1170. case 0x20: /* LNA1 A-B */
  1171. ant_conf->fast_div_bias = 0x6;
  1172. break;
  1173. case 0x21: /* LNA1 LNA2 */
  1174. ant_conf->fast_div_bias = 0x0;
  1175. break;
  1176. case 0x23: /* LNA1 A+B */
  1177. ant_conf->fast_div_bias = 0x6;
  1178. break;
  1179. case 0x30: /* A+B A-B */
  1180. ant_conf->fast_div_bias = 0x1;
  1181. break;
  1182. case 0x31: /* A+B LNA2 */
  1183. ant_conf->fast_div_bias = 0x3b;
  1184. break;
  1185. case 0x32: /* A+B LNA1 */
  1186. ant_conf->fast_div_bias = 0x3d;
  1187. break;
  1188. default:
  1189. break;
  1190. }
  1191. } else if (ant_conf->div_group == 1) {
  1192. /* Adjust the fast_div_bias based on main and alt_lna_conf */
  1193. switch ((ant_conf->main_lna_conf << 4) |
  1194. ant_conf->alt_lna_conf) {
  1195. case 0x01: /* A-B LNA2 */
  1196. ant_conf->fast_div_bias = 0x1;
  1197. ant_conf->main_gaintb = 0;
  1198. ant_conf->alt_gaintb = 0;
  1199. break;
  1200. case 0x02: /* A-B LNA1 */
  1201. ant_conf->fast_div_bias = 0x1;
  1202. ant_conf->main_gaintb = 0;
  1203. ant_conf->alt_gaintb = 0;
  1204. break;
  1205. case 0x03: /* A-B A+B */
  1206. ant_conf->fast_div_bias = 0x1;
  1207. ant_conf->main_gaintb = 0;
  1208. ant_conf->alt_gaintb = 0;
  1209. break;
  1210. case 0x10: /* LNA2 A-B */
  1211. if (!(antcomb->scan) &&
  1212. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1213. ant_conf->fast_div_bias = 0x3f;
  1214. else
  1215. ant_conf->fast_div_bias = 0x1;
  1216. ant_conf->main_gaintb = 0;
  1217. ant_conf->alt_gaintb = 0;
  1218. break;
  1219. case 0x12: /* LNA2 LNA1 */
  1220. ant_conf->fast_div_bias = 0x1;
  1221. ant_conf->main_gaintb = 0;
  1222. ant_conf->alt_gaintb = 0;
  1223. break;
  1224. case 0x13: /* LNA2 A+B */
  1225. if (!(antcomb->scan) &&
  1226. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1227. ant_conf->fast_div_bias = 0x3f;
  1228. else
  1229. ant_conf->fast_div_bias = 0x1;
  1230. ant_conf->main_gaintb = 0;
  1231. ant_conf->alt_gaintb = 0;
  1232. break;
  1233. case 0x20: /* LNA1 A-B */
  1234. if (!(antcomb->scan) &&
  1235. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1236. ant_conf->fast_div_bias = 0x3f;
  1237. else
  1238. ant_conf->fast_div_bias = 0x1;
  1239. ant_conf->main_gaintb = 0;
  1240. ant_conf->alt_gaintb = 0;
  1241. break;
  1242. case 0x21: /* LNA1 LNA2 */
  1243. ant_conf->fast_div_bias = 0x1;
  1244. ant_conf->main_gaintb = 0;
  1245. ant_conf->alt_gaintb = 0;
  1246. break;
  1247. case 0x23: /* LNA1 A+B */
  1248. if (!(antcomb->scan) &&
  1249. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1250. ant_conf->fast_div_bias = 0x3f;
  1251. else
  1252. ant_conf->fast_div_bias = 0x1;
  1253. ant_conf->main_gaintb = 0;
  1254. ant_conf->alt_gaintb = 0;
  1255. break;
  1256. case 0x30: /* A+B A-B */
  1257. ant_conf->fast_div_bias = 0x1;
  1258. ant_conf->main_gaintb = 0;
  1259. ant_conf->alt_gaintb = 0;
  1260. break;
  1261. case 0x31: /* A+B LNA2 */
  1262. ant_conf->fast_div_bias = 0x1;
  1263. ant_conf->main_gaintb = 0;
  1264. ant_conf->alt_gaintb = 0;
  1265. break;
  1266. case 0x32: /* A+B LNA1 */
  1267. ant_conf->fast_div_bias = 0x1;
  1268. ant_conf->main_gaintb = 0;
  1269. ant_conf->alt_gaintb = 0;
  1270. break;
  1271. default:
  1272. break;
  1273. }
  1274. } else if (ant_conf->div_group == 2) {
  1275. /* Adjust the fast_div_bias based on main and alt_lna_conf */
  1276. switch ((ant_conf->main_lna_conf << 4) |
  1277. ant_conf->alt_lna_conf) {
  1278. case 0x01: /* A-B LNA2 */
  1279. ant_conf->fast_div_bias = 0x1;
  1280. ant_conf->main_gaintb = 0;
  1281. ant_conf->alt_gaintb = 0;
  1282. break;
  1283. case 0x02: /* A-B LNA1 */
  1284. ant_conf->fast_div_bias = 0x1;
  1285. ant_conf->main_gaintb = 0;
  1286. ant_conf->alt_gaintb = 0;
  1287. break;
  1288. case 0x03: /* A-B A+B */
  1289. ant_conf->fast_div_bias = 0x1;
  1290. ant_conf->main_gaintb = 0;
  1291. ant_conf->alt_gaintb = 0;
  1292. break;
  1293. case 0x10: /* LNA2 A-B */
  1294. if (!(antcomb->scan) &&
  1295. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1296. ant_conf->fast_div_bias = 0x1;
  1297. else
  1298. ant_conf->fast_div_bias = 0x2;
  1299. ant_conf->main_gaintb = 0;
  1300. ant_conf->alt_gaintb = 0;
  1301. break;
  1302. case 0x12: /* LNA2 LNA1 */
  1303. ant_conf->fast_div_bias = 0x1;
  1304. ant_conf->main_gaintb = 0;
  1305. ant_conf->alt_gaintb = 0;
  1306. break;
  1307. case 0x13: /* LNA2 A+B */
  1308. if (!(antcomb->scan) &&
  1309. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1310. ant_conf->fast_div_bias = 0x1;
  1311. else
  1312. ant_conf->fast_div_bias = 0x2;
  1313. ant_conf->main_gaintb = 0;
  1314. ant_conf->alt_gaintb = 0;
  1315. break;
  1316. case 0x20: /* LNA1 A-B */
  1317. if (!(antcomb->scan) &&
  1318. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1319. ant_conf->fast_div_bias = 0x1;
  1320. else
  1321. ant_conf->fast_div_bias = 0x2;
  1322. ant_conf->main_gaintb = 0;
  1323. ant_conf->alt_gaintb = 0;
  1324. break;
  1325. case 0x21: /* LNA1 LNA2 */
  1326. ant_conf->fast_div_bias = 0x1;
  1327. ant_conf->main_gaintb = 0;
  1328. ant_conf->alt_gaintb = 0;
  1329. break;
  1330. case 0x23: /* LNA1 A+B */
  1331. if (!(antcomb->scan) &&
  1332. (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
  1333. ant_conf->fast_div_bias = 0x1;
  1334. else
  1335. ant_conf->fast_div_bias = 0x2;
  1336. ant_conf->main_gaintb = 0;
  1337. ant_conf->alt_gaintb = 0;
  1338. break;
  1339. case 0x30: /* A+B A-B */
  1340. ant_conf->fast_div_bias = 0x1;
  1341. ant_conf->main_gaintb = 0;
  1342. ant_conf->alt_gaintb = 0;
  1343. break;
  1344. case 0x31: /* A+B LNA2 */
  1345. ant_conf->fast_div_bias = 0x1;
  1346. ant_conf->main_gaintb = 0;
  1347. ant_conf->alt_gaintb = 0;
  1348. break;
  1349. case 0x32: /* A+B LNA1 */
  1350. ant_conf->fast_div_bias = 0x1;
  1351. ant_conf->main_gaintb = 0;
  1352. ant_conf->alt_gaintb = 0;
  1353. break;
  1354. default:
  1355. break;
  1356. }
  1357. }
  1358. }
  1359. /* Antenna diversity and combining */
  1360. static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
  1361. {
  1362. struct ath_hw_antcomb_conf div_ant_conf;
  1363. struct ath_ant_comb *antcomb = &sc->ant_comb;
  1364. int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
  1365. int curr_main_set;
  1366. int main_rssi = rs->rs_rssi_ctl0;
  1367. int alt_rssi = rs->rs_rssi_ctl1;
  1368. int rx_ant_conf, main_ant_conf;
  1369. bool short_scan = false;
  1370. rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
  1371. ATH_ANT_RX_MASK;
  1372. main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
  1373. ATH_ANT_RX_MASK;
  1374. /* Record packet only when both main_rssi and alt_rssi is positive */
  1375. if (main_rssi > 0 && alt_rssi > 0) {
  1376. antcomb->total_pkt_count++;
  1377. antcomb->main_total_rssi += main_rssi;
  1378. antcomb->alt_total_rssi += alt_rssi;
  1379. if (main_ant_conf == rx_ant_conf)
  1380. antcomb->main_recv_cnt++;
  1381. else
  1382. antcomb->alt_recv_cnt++;
  1383. }
  1384. /* Short scan check */
  1385. if (antcomb->scan && antcomb->alt_good) {
  1386. if (time_after(jiffies, antcomb->scan_start_time +
  1387. msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
  1388. short_scan = true;
  1389. else
  1390. if (antcomb->total_pkt_count ==
  1391. ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
  1392. alt_ratio = ((antcomb->alt_recv_cnt * 100) /
  1393. antcomb->total_pkt_count);
  1394. if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
  1395. short_scan = true;
  1396. }
  1397. }
  1398. if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
  1399. rs->rs_moreaggr) && !short_scan)
  1400. return;
  1401. if (antcomb->total_pkt_count) {
  1402. alt_ratio = ((antcomb->alt_recv_cnt * 100) /
  1403. antcomb->total_pkt_count);
  1404. main_rssi_avg = (antcomb->main_total_rssi /
  1405. antcomb->total_pkt_count);
  1406. alt_rssi_avg = (antcomb->alt_total_rssi /
  1407. antcomb->total_pkt_count);
  1408. }
  1409. ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
  1410. curr_alt_set = div_ant_conf.alt_lna_conf;
  1411. curr_main_set = div_ant_conf.main_lna_conf;
  1412. antcomb->count++;
  1413. if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
  1414. if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
  1415. ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
  1416. main_rssi_avg);
  1417. antcomb->alt_good = true;
  1418. } else {
  1419. antcomb->alt_good = false;
  1420. }
  1421. antcomb->count = 0;
  1422. antcomb->scan = true;
  1423. antcomb->scan_not_start = true;
  1424. }
  1425. if (!antcomb->scan) {
  1426. if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
  1427. alt_ratio, curr_main_set, curr_alt_set,
  1428. alt_rssi_avg, main_rssi_avg)) {
  1429. if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
  1430. /* Switch main and alt LNA */
  1431. div_ant_conf.main_lna_conf =
  1432. ATH_ANT_DIV_COMB_LNA2;
  1433. div_ant_conf.alt_lna_conf =
  1434. ATH_ANT_DIV_COMB_LNA1;
  1435. } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
  1436. div_ant_conf.main_lna_conf =
  1437. ATH_ANT_DIV_COMB_LNA1;
  1438. div_ant_conf.alt_lna_conf =
  1439. ATH_ANT_DIV_COMB_LNA2;
  1440. }
  1441. goto div_comb_done;
  1442. } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
  1443. (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
  1444. /* Set alt to another LNA */
  1445. if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
  1446. div_ant_conf.alt_lna_conf =
  1447. ATH_ANT_DIV_COMB_LNA1;
  1448. else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
  1449. div_ant_conf.alt_lna_conf =
  1450. ATH_ANT_DIV_COMB_LNA2;
  1451. goto div_comb_done;
  1452. }
  1453. if ((alt_rssi_avg < (main_rssi_avg +
  1454. div_ant_conf.lna1_lna2_delta)))
  1455. goto div_comb_done;
  1456. }
  1457. if (!antcomb->scan_not_start) {
  1458. switch (curr_alt_set) {
  1459. case ATH_ANT_DIV_COMB_LNA2:
  1460. antcomb->rssi_lna2 = alt_rssi_avg;
  1461. antcomb->rssi_lna1 = main_rssi_avg;
  1462. antcomb->scan = true;
  1463. /* set to A+B */
  1464. div_ant_conf.main_lna_conf =
  1465. ATH_ANT_DIV_COMB_LNA1;
  1466. div_ant_conf.alt_lna_conf =
  1467. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  1468. break;
  1469. case ATH_ANT_DIV_COMB_LNA1:
  1470. antcomb->rssi_lna1 = alt_rssi_avg;
  1471. antcomb->rssi_lna2 = main_rssi_avg;
  1472. antcomb->scan = true;
  1473. /* set to A+B */
  1474. div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
  1475. div_ant_conf.alt_lna_conf =
  1476. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  1477. break;
  1478. case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
  1479. antcomb->rssi_add = alt_rssi_avg;
  1480. antcomb->scan = true;
  1481. /* set to A-B */
  1482. div_ant_conf.alt_lna_conf =
  1483. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  1484. break;
  1485. case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
  1486. antcomb->rssi_sub = alt_rssi_avg;
  1487. antcomb->scan = false;
  1488. if (antcomb->rssi_lna2 >
  1489. (antcomb->rssi_lna1 +
  1490. ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
  1491. /* use LNA2 as main LNA */
  1492. if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
  1493. (antcomb->rssi_add > antcomb->rssi_sub)) {
  1494. /* set to A+B */
  1495. div_ant_conf.main_lna_conf =
  1496. ATH_ANT_DIV_COMB_LNA2;
  1497. div_ant_conf.alt_lna_conf =
  1498. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  1499. } else if (antcomb->rssi_sub >
  1500. antcomb->rssi_lna1) {
  1501. /* set to A-B */
  1502. div_ant_conf.main_lna_conf =
  1503. ATH_ANT_DIV_COMB_LNA2;
  1504. div_ant_conf.alt_lna_conf =
  1505. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  1506. } else {
  1507. /* set to LNA1 */
  1508. div_ant_conf.main_lna_conf =
  1509. ATH_ANT_DIV_COMB_LNA2;
  1510. div_ant_conf.alt_lna_conf =
  1511. ATH_ANT_DIV_COMB_LNA1;
  1512. }
  1513. } else {
  1514. /* use LNA1 as main LNA */
  1515. if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
  1516. (antcomb->rssi_add > antcomb->rssi_sub)) {
  1517. /* set to A+B */
  1518. div_ant_conf.main_lna_conf =
  1519. ATH_ANT_DIV_COMB_LNA1;
  1520. div_ant_conf.alt_lna_conf =
  1521. ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
  1522. } else if (antcomb->rssi_sub >
  1523. antcomb->rssi_lna1) {
  1524. /* set to A-B */
  1525. div_ant_conf.main_lna_conf =
  1526. ATH_ANT_DIV_COMB_LNA1;
  1527. div_ant_conf.alt_lna_conf =
  1528. ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
  1529. } else {
  1530. /* set to LNA2 */
  1531. div_ant_conf.main_lna_conf =
  1532. ATH_ANT_DIV_COMB_LNA1;
  1533. div_ant_conf.alt_lna_conf =
  1534. ATH_ANT_DIV_COMB_LNA2;
  1535. }
  1536. }
  1537. break;
  1538. default:
  1539. break;
  1540. }
  1541. } else {
  1542. if (!antcomb->alt_good) {
  1543. antcomb->scan_not_start = false;
  1544. /* Set alt to another LNA */
  1545. if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
  1546. div_ant_conf.main_lna_conf =
  1547. ATH_ANT_DIV_COMB_LNA2;
  1548. div_ant_conf.alt_lna_conf =
  1549. ATH_ANT_DIV_COMB_LNA1;
  1550. } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
  1551. div_ant_conf.main_lna_conf =
  1552. ATH_ANT_DIV_COMB_LNA1;
  1553. div_ant_conf.alt_lna_conf =
  1554. ATH_ANT_DIV_COMB_LNA2;
  1555. }
  1556. goto div_comb_done;
  1557. }
  1558. }
  1559. ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
  1560. main_rssi_avg, alt_rssi_avg,
  1561. alt_ratio);
  1562. antcomb->quick_scan_cnt++;
  1563. div_comb_done:
  1564. ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
  1565. ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
  1566. antcomb->scan_start_time = jiffies;
  1567. antcomb->total_pkt_count = 0;
  1568. antcomb->main_total_rssi = 0;
  1569. antcomb->alt_total_rssi = 0;
  1570. antcomb->main_recv_cnt = 0;
  1571. antcomb->alt_recv_cnt = 0;
  1572. }
  1573. int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
  1574. {
  1575. struct ath_buf *bf;
  1576. struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
  1577. struct ieee80211_rx_status *rxs;
  1578. struct ath_hw *ah = sc->sc_ah;
  1579. struct ath_common *common = ath9k_hw_common(ah);
  1580. struct ieee80211_hw *hw = sc->hw;
  1581. struct ieee80211_hdr *hdr;
  1582. int retval;
  1583. bool decrypt_error = false;
  1584. struct ath_rx_status rs;
  1585. enum ath9k_rx_qtype qtype;
  1586. bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
  1587. int dma_type;
  1588. u8 rx_status_len = ah->caps.rx_status_len;
  1589. u64 tsf = 0;
  1590. u32 tsf_lower = 0;
  1591. unsigned long flags;
  1592. if (edma)
  1593. dma_type = DMA_BIDIRECTIONAL;
  1594. else
  1595. dma_type = DMA_FROM_DEVICE;
  1596. qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
  1597. spin_lock_bh(&sc->rx.rxbuflock);
  1598. tsf = ath9k_hw_gettsf64(ah);
  1599. tsf_lower = tsf & 0xffffffff;
  1600. do {
  1601. /* If handling rx interrupt and flush is in progress => exit */
  1602. if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
  1603. break;
  1604. memset(&rs, 0, sizeof(rs));
  1605. if (edma)
  1606. bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
  1607. else
  1608. bf = ath_get_next_rx_buf(sc, &rs);
  1609. if (!bf)
  1610. break;
  1611. skb = bf->bf_mpdu;
  1612. if (!skb)
  1613. continue;
  1614. /*
  1615. * Take frame header from the first fragment and RX status from
  1616. * the last one.
  1617. */
  1618. if (sc->rx.frag)
  1619. hdr_skb = sc->rx.frag;
  1620. else
  1621. hdr_skb = skb;
  1622. hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
  1623. rxs = IEEE80211_SKB_RXCB(hdr_skb);
  1624. ath_debug_stat_rx(sc, &rs);
  1625. /*
  1626. * If we're asked to flush receive queue, directly
  1627. * chain it back at the queue without processing it.
  1628. */
  1629. if (flush)
  1630. goto requeue_drop_frag;
  1631. retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
  1632. rxs, &decrypt_error);
  1633. if (retval)
  1634. goto requeue_drop_frag;
  1635. rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
  1636. if (rs.rs_tstamp > tsf_lower &&
  1637. unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
  1638. rxs->mactime -= 0x100000000ULL;
  1639. if (rs.rs_tstamp < tsf_lower &&
  1640. unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
  1641. rxs->mactime += 0x100000000ULL;
  1642. /* Ensure we always have an skb to requeue once we are done
  1643. * processing the current buffer's skb */
  1644. requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
  1645. /* If there is no memory we ignore the current RX'd frame,
  1646. * tell hardware it can give us a new frame using the old
  1647. * skb and put it at the tail of the sc->rx.rxbuf list for
  1648. * processing. */
  1649. if (!requeue_skb)
  1650. goto requeue_drop_frag;
  1651. /* Unmap the frame */
  1652. dma_unmap_single(sc->dev, bf->bf_buf_addr,
  1653. common->rx_bufsize,
  1654. dma_type);
  1655. skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
  1656. if (ah->caps.rx_status_len)
  1657. skb_pull(skb, ah->caps.rx_status_len);
  1658. if (!rs.rs_more)
  1659. ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
  1660. rxs, decrypt_error);
  1661. /* We will now give hardware our shiny new allocated skb */
  1662. bf->bf_mpdu = requeue_skb;
  1663. bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
  1664. common->rx_bufsize,
  1665. dma_type);
  1666. if (unlikely(dma_mapping_error(sc->dev,
  1667. bf->bf_buf_addr))) {
  1668. dev_kfree_skb_any(requeue_skb);
  1669. bf->bf_mpdu = NULL;
  1670. bf->bf_buf_addr = 0;
  1671. ath_err(common, "dma_mapping_error() on RX\n");
  1672. ieee80211_rx(hw, skb);
  1673. break;
  1674. }
  1675. if (rs.rs_more) {
  1676. /*
  1677. * rs_more indicates chained descriptors which can be
  1678. * used to link buffers together for a sort of
  1679. * scatter-gather operation.
  1680. */
  1681. if (sc->rx.frag) {
  1682. /* too many fragments - cannot handle frame */
  1683. dev_kfree_skb_any(sc->rx.frag);
  1684. dev_kfree_skb_any(skb);
  1685. skb = NULL;
  1686. }
  1687. sc->rx.frag = skb;
  1688. goto requeue;
  1689. }
  1690. if (sc->rx.frag) {
  1691. int space = skb->len - skb_tailroom(hdr_skb);
  1692. sc->rx.frag = NULL;
  1693. if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
  1694. dev_kfree_skb(skb);
  1695. goto requeue_drop_frag;
  1696. }
  1697. skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
  1698. skb->len);
  1699. dev_kfree_skb_any(skb);
  1700. skb = hdr_skb;
  1701. }
  1702. /*
  1703. * change the default rx antenna if rx diversity chooses the
  1704. * other antenna 3 times in a row.
  1705. */
  1706. if (sc->rx.defant != rs.rs_antenna) {
  1707. if (++sc->rx.rxotherant >= 3)
  1708. ath_setdefantenna(sc, rs.rs_antenna);
  1709. } else {
  1710. sc->rx.rxotherant = 0;
  1711. }
  1712. if (rxs->flag & RX_FLAG_MMIC_STRIPPED)
  1713. skb_trim(skb, skb->len - 8);
  1714. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1715. if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
  1716. PS_WAIT_FOR_CAB |
  1717. PS_WAIT_FOR_PSPOLL_DATA)) ||
  1718. ath9k_check_auto_sleep(sc))
  1719. ath_rx_ps(sc, skb);
  1720. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1721. if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
  1722. ath_ant_comb_scan(sc, &rs);
  1723. ieee80211_rx(hw, skb);
  1724. requeue_drop_frag:
  1725. if (sc->rx.frag) {
  1726. dev_kfree_skb_any(sc->rx.frag);
  1727. sc->rx.frag = NULL;
  1728. }
  1729. requeue:
  1730. if (edma) {
  1731. list_add_tail(&bf->list, &sc->rx.rxbuf);
  1732. ath_rx_edma_buf_link(sc, qtype);
  1733. } else {
  1734. list_move_tail(&bf->list, &sc->rx.rxbuf);
  1735. ath_rx_buf_link(sc, bf);
  1736. ath9k_hw_rxena(ah);
  1737. }
  1738. } while (1);
  1739. spin_unlock_bh(&sc->rx.rxbuflock);
  1740. if (!(ah->imask & ATH9K_INT_RXEOL)) {
  1741. ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  1742. ath9k_hw_set_interrupts(ah, ah->imask);
  1743. }
  1744. return 0;
  1745. }