main.c 60 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. unsigned long flags;
  100. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  101. if (--sc->ps_usecount != 0)
  102. goto unlock;
  103. spin_lock(&common->cc_lock);
  104. ath_hw_cycle_counters_update(common);
  105. spin_unlock(&common->cc_lock);
  106. if (sc->ps_idle)
  107. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  108. else if (sc->ps_enabled &&
  109. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  110. PS_WAIT_FOR_CAB |
  111. PS_WAIT_FOR_PSPOLL_DATA |
  112. PS_WAIT_FOR_TX_ACK)))
  113. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  114. unlock:
  115. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  116. }
  117. void ath_start_ani(struct ath_common *common)
  118. {
  119. struct ath_hw *ah = common->ah;
  120. unsigned long timestamp = jiffies_to_msecs(jiffies);
  121. struct ath_softc *sc = (struct ath_softc *) common->priv;
  122. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  123. return;
  124. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  125. return;
  126. common->ani.longcal_timer = timestamp;
  127. common->ani.shortcal_timer = timestamp;
  128. common->ani.checkani_timer = timestamp;
  129. mod_timer(&common->ani.timer,
  130. jiffies +
  131. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  132. }
  133. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  134. {
  135. struct ath_hw *ah = sc->sc_ah;
  136. struct ath9k_channel *chan = &ah->channels[channel];
  137. struct survey_info *survey = &sc->survey[channel];
  138. if (chan->noisefloor) {
  139. survey->filled |= SURVEY_INFO_NOISE_DBM;
  140. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  141. }
  142. }
  143. /*
  144. * Updates the survey statistics and returns the busy time since last
  145. * update in %, if the measurement duration was long enough for the
  146. * result to be useful, -1 otherwise.
  147. */
  148. static int ath_update_survey_stats(struct ath_softc *sc)
  149. {
  150. struct ath_hw *ah = sc->sc_ah;
  151. struct ath_common *common = ath9k_hw_common(ah);
  152. int pos = ah->curchan - &ah->channels[0];
  153. struct survey_info *survey = &sc->survey[pos];
  154. struct ath_cycle_counters *cc = &common->cc_survey;
  155. unsigned int div = common->clockrate * 1000;
  156. int ret = 0;
  157. if (!ah->curchan)
  158. return -1;
  159. if (ah->power_mode == ATH9K_PM_AWAKE)
  160. ath_hw_cycle_counters_update(common);
  161. if (cc->cycles > 0) {
  162. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  163. SURVEY_INFO_CHANNEL_TIME_BUSY |
  164. SURVEY_INFO_CHANNEL_TIME_RX |
  165. SURVEY_INFO_CHANNEL_TIME_TX;
  166. survey->channel_time += cc->cycles / div;
  167. survey->channel_time_busy += cc->rx_busy / div;
  168. survey->channel_time_rx += cc->rx_frame / div;
  169. survey->channel_time_tx += cc->tx_frame / div;
  170. }
  171. if (cc->cycles < div)
  172. return -1;
  173. if (cc->cycles > 0)
  174. ret = cc->rx_busy * 100 / cc->cycles;
  175. memset(cc, 0, sizeof(*cc));
  176. ath_update_survey_nf(sc, pos);
  177. return ret;
  178. }
  179. /*
  180. * Set/change channels. If the channel is really being changed, it's done
  181. * by reseting the chip. To accomplish this we must first cleanup any pending
  182. * DMA, then restart stuff.
  183. */
  184. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  185. struct ath9k_channel *hchan)
  186. {
  187. struct ath_hw *ah = sc->sc_ah;
  188. struct ath_common *common = ath9k_hw_common(ah);
  189. struct ieee80211_conf *conf = &common->hw->conf;
  190. bool fastcc = true, stopped;
  191. struct ieee80211_channel *channel = hw->conf.channel;
  192. struct ath9k_hw_cal_data *caldata = NULL;
  193. int r;
  194. if (sc->sc_flags & SC_OP_INVALID)
  195. return -EIO;
  196. sc->hw_busy_count = 0;
  197. del_timer_sync(&common->ani.timer);
  198. cancel_work_sync(&sc->paprd_work);
  199. cancel_work_sync(&sc->hw_check_work);
  200. cancel_delayed_work_sync(&sc->tx_complete_work);
  201. cancel_delayed_work_sync(&sc->hw_pll_work);
  202. ath9k_ps_wakeup(sc);
  203. spin_lock_bh(&sc->sc_pcu_lock);
  204. /*
  205. * This is only performed if the channel settings have
  206. * actually changed.
  207. *
  208. * To switch channels clear any pending DMA operations;
  209. * wait long enough for the RX fifo to drain, reset the
  210. * hardware at the new frequency, and then re-enable
  211. * the relevant bits of the h/w.
  212. */
  213. ath9k_hw_disable_interrupts(ah);
  214. stopped = ath_drain_all_txq(sc, false);
  215. if (!ath_stoprecv(sc))
  216. stopped = false;
  217. if (!ath9k_hw_check_alive(ah))
  218. stopped = false;
  219. /* XXX: do not flush receive queue here. We don't want
  220. * to flush data frames already in queue because of
  221. * changing channel. */
  222. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  223. fastcc = false;
  224. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  225. caldata = &sc->caldata;
  226. ath_dbg(common, ATH_DBG_CONFIG,
  227. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  228. sc->sc_ah->curchan->channel,
  229. channel->center_freq, conf_is_ht40(conf),
  230. fastcc);
  231. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  232. if (r) {
  233. ath_err(common,
  234. "Unable to reset channel (%u MHz), reset status %d\n",
  235. channel->center_freq, r);
  236. goto ps_restore;
  237. }
  238. if (ath_startrecv(sc) != 0) {
  239. ath_err(common, "Unable to restart recv logic\n");
  240. r = -EIO;
  241. goto ps_restore;
  242. }
  243. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  244. sc->config.txpowlimit, &sc->curtxpow);
  245. ath9k_hw_set_interrupts(ah, ah->imask);
  246. ath9k_hw_enable_interrupts(ah);
  247. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  248. if (sc->sc_flags & SC_OP_BEACONS)
  249. ath_set_beacon(sc);
  250. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  251. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  252. if (!common->disable_ani)
  253. ath_start_ani(common);
  254. }
  255. ps_restore:
  256. ieee80211_wake_queues(hw);
  257. spin_unlock_bh(&sc->sc_pcu_lock);
  258. ath9k_ps_restore(sc);
  259. return r;
  260. }
  261. static void ath_paprd_activate(struct ath_softc *sc)
  262. {
  263. struct ath_hw *ah = sc->sc_ah;
  264. struct ath9k_hw_cal_data *caldata = ah->caldata;
  265. struct ath_common *common = ath9k_hw_common(ah);
  266. int chain;
  267. if (!caldata || !caldata->paprd_done)
  268. return;
  269. ath9k_ps_wakeup(sc);
  270. ar9003_paprd_enable(ah, false);
  271. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  272. if (!(common->tx_chainmask & BIT(chain)))
  273. continue;
  274. ar9003_paprd_populate_single_table(ah, caldata, chain);
  275. }
  276. ar9003_paprd_enable(ah, true);
  277. ath9k_ps_restore(sc);
  278. }
  279. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  280. {
  281. struct ieee80211_hw *hw = sc->hw;
  282. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  283. struct ath_hw *ah = sc->sc_ah;
  284. struct ath_common *common = ath9k_hw_common(ah);
  285. struct ath_tx_control txctl;
  286. int time_left;
  287. memset(&txctl, 0, sizeof(txctl));
  288. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  289. memset(tx_info, 0, sizeof(*tx_info));
  290. tx_info->band = hw->conf.channel->band;
  291. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  292. tx_info->control.rates[0].idx = 0;
  293. tx_info->control.rates[0].count = 1;
  294. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  295. tx_info->control.rates[1].idx = -1;
  296. init_completion(&sc->paprd_complete);
  297. txctl.paprd = BIT(chain);
  298. if (ath_tx_start(hw, skb, &txctl) != 0) {
  299. ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
  300. dev_kfree_skb_any(skb);
  301. return false;
  302. }
  303. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  304. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  305. if (!time_left)
  306. ath_dbg(common, ATH_DBG_CALIBRATE,
  307. "Timeout waiting for paprd training on TX chain %d\n",
  308. chain);
  309. return !!time_left;
  310. }
  311. void ath_paprd_calibrate(struct work_struct *work)
  312. {
  313. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  314. struct ieee80211_hw *hw = sc->hw;
  315. struct ath_hw *ah = sc->sc_ah;
  316. struct ieee80211_hdr *hdr;
  317. struct sk_buff *skb = NULL;
  318. struct ath9k_hw_cal_data *caldata = ah->caldata;
  319. struct ath_common *common = ath9k_hw_common(ah);
  320. int ftype;
  321. int chain_ok = 0;
  322. int chain;
  323. int len = 1800;
  324. if (!caldata)
  325. return;
  326. ath9k_ps_wakeup(sc);
  327. if (ar9003_paprd_init_table(ah) < 0)
  328. goto fail_paprd;
  329. skb = alloc_skb(len, GFP_KERNEL);
  330. if (!skb)
  331. goto fail_paprd;
  332. skb_put(skb, len);
  333. memset(skb->data, 0, len);
  334. hdr = (struct ieee80211_hdr *)skb->data;
  335. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  336. hdr->frame_control = cpu_to_le16(ftype);
  337. hdr->duration_id = cpu_to_le16(10);
  338. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  339. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  340. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  341. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  342. if (!(common->tx_chainmask & BIT(chain)))
  343. continue;
  344. chain_ok = 0;
  345. ath_dbg(common, ATH_DBG_CALIBRATE,
  346. "Sending PAPRD frame for thermal measurement "
  347. "on chain %d\n", chain);
  348. if (!ath_paprd_send_frame(sc, skb, chain))
  349. goto fail_paprd;
  350. ar9003_paprd_setup_gain_table(ah, chain);
  351. ath_dbg(common, ATH_DBG_CALIBRATE,
  352. "Sending PAPRD training frame on chain %d\n", chain);
  353. if (!ath_paprd_send_frame(sc, skb, chain))
  354. goto fail_paprd;
  355. if (!ar9003_paprd_is_done(ah)) {
  356. ath_dbg(common, ATH_DBG_CALIBRATE,
  357. "PAPRD not yet done on chain %d\n", chain);
  358. break;
  359. }
  360. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  361. ath_dbg(common, ATH_DBG_CALIBRATE,
  362. "PAPRD create curve failed on chain %d\n",
  363. chain);
  364. break;
  365. }
  366. chain_ok = 1;
  367. }
  368. kfree_skb(skb);
  369. if (chain_ok) {
  370. caldata->paprd_done = true;
  371. ath_paprd_activate(sc);
  372. }
  373. fail_paprd:
  374. ath9k_ps_restore(sc);
  375. }
  376. /*
  377. * This routine performs the periodic noise floor calibration function
  378. * that is used to adjust and optimize the chip performance. This
  379. * takes environmental changes (location, temperature) into account.
  380. * When the task is complete, it reschedules itself depending on the
  381. * appropriate interval that was calculated.
  382. */
  383. void ath_ani_calibrate(unsigned long data)
  384. {
  385. struct ath_softc *sc = (struct ath_softc *)data;
  386. struct ath_hw *ah = sc->sc_ah;
  387. struct ath_common *common = ath9k_hw_common(ah);
  388. bool longcal = false;
  389. bool shortcal = false;
  390. bool aniflag = false;
  391. unsigned int timestamp = jiffies_to_msecs(jiffies);
  392. u32 cal_interval, short_cal_interval, long_cal_interval;
  393. unsigned long flags;
  394. if (ah->caldata && ah->caldata->nfcal_interference)
  395. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  396. else
  397. long_cal_interval = ATH_LONG_CALINTERVAL;
  398. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  399. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  400. /* Only calibrate if awake */
  401. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  402. goto set_timer;
  403. ath9k_ps_wakeup(sc);
  404. /* Long calibration runs independently of short calibration. */
  405. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  406. longcal = true;
  407. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  408. common->ani.longcal_timer = timestamp;
  409. }
  410. /* Short calibration applies only while caldone is false */
  411. if (!common->ani.caldone) {
  412. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  413. shortcal = true;
  414. ath_dbg(common, ATH_DBG_ANI,
  415. "shortcal @%lu\n", jiffies);
  416. common->ani.shortcal_timer = timestamp;
  417. common->ani.resetcal_timer = timestamp;
  418. }
  419. } else {
  420. if ((timestamp - common->ani.resetcal_timer) >=
  421. ATH_RESTART_CALINTERVAL) {
  422. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  423. if (common->ani.caldone)
  424. common->ani.resetcal_timer = timestamp;
  425. }
  426. }
  427. /* Verify whether we must check ANI */
  428. if ((timestamp - common->ani.checkani_timer) >=
  429. ah->config.ani_poll_interval) {
  430. aniflag = true;
  431. common->ani.checkani_timer = timestamp;
  432. }
  433. /* Call ANI routine if necessary */
  434. if (aniflag) {
  435. spin_lock_irqsave(&common->cc_lock, flags);
  436. ath9k_hw_ani_monitor(ah, ah->curchan);
  437. ath_update_survey_stats(sc);
  438. spin_unlock_irqrestore(&common->cc_lock, flags);
  439. }
  440. /* Perform calibration if necessary */
  441. if (longcal || shortcal) {
  442. common->ani.caldone =
  443. ath9k_hw_calibrate(ah, ah->curchan,
  444. common->rx_chainmask, longcal);
  445. }
  446. ath9k_ps_restore(sc);
  447. set_timer:
  448. /*
  449. * Set timer interval based on previous results.
  450. * The interval must be the shortest necessary to satisfy ANI,
  451. * short calibration and long calibration.
  452. */
  453. cal_interval = ATH_LONG_CALINTERVAL;
  454. if (sc->sc_ah->config.enable_ani)
  455. cal_interval = min(cal_interval,
  456. (u32)ah->config.ani_poll_interval);
  457. if (!common->ani.caldone)
  458. cal_interval = min(cal_interval, (u32)short_cal_interval);
  459. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  460. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  461. if (!ah->caldata->paprd_done)
  462. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  463. else if (!ah->paprd_table_write_done)
  464. ath_paprd_activate(sc);
  465. }
  466. }
  467. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  468. {
  469. struct ath_node *an;
  470. an = (struct ath_node *)sta->drv_priv;
  471. #ifdef CONFIG_ATH9K_DEBUGFS
  472. spin_lock(&sc->nodes_lock);
  473. list_add(&an->list, &sc->nodes);
  474. spin_unlock(&sc->nodes_lock);
  475. an->sta = sta;
  476. #endif
  477. if (sc->sc_flags & SC_OP_TXAGGR) {
  478. ath_tx_node_init(sc, an);
  479. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  480. sta->ht_cap.ampdu_factor);
  481. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  482. }
  483. }
  484. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  485. {
  486. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  487. #ifdef CONFIG_ATH9K_DEBUGFS
  488. spin_lock(&sc->nodes_lock);
  489. list_del(&an->list);
  490. spin_unlock(&sc->nodes_lock);
  491. an->sta = NULL;
  492. #endif
  493. if (sc->sc_flags & SC_OP_TXAGGR)
  494. ath_tx_node_cleanup(sc, an);
  495. }
  496. void ath_hw_check(struct work_struct *work)
  497. {
  498. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  499. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  500. unsigned long flags;
  501. int busy;
  502. ath9k_ps_wakeup(sc);
  503. if (ath9k_hw_check_alive(sc->sc_ah))
  504. goto out;
  505. spin_lock_irqsave(&common->cc_lock, flags);
  506. busy = ath_update_survey_stats(sc);
  507. spin_unlock_irqrestore(&common->cc_lock, flags);
  508. ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
  509. "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
  510. if (busy >= 99) {
  511. if (++sc->hw_busy_count >= 3) {
  512. spin_lock_bh(&sc->sc_pcu_lock);
  513. ath_reset(sc, true);
  514. spin_unlock_bh(&sc->sc_pcu_lock);
  515. }
  516. } else if (busy >= 0)
  517. sc->hw_busy_count = 0;
  518. out:
  519. ath9k_ps_restore(sc);
  520. }
  521. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  522. {
  523. static int count;
  524. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  525. if (pll_sqsum >= 0x40000) {
  526. count++;
  527. if (count == 3) {
  528. /* Rx is hung for more than 500ms. Reset it */
  529. ath_dbg(common, ATH_DBG_RESET,
  530. "Possible RX hang, resetting");
  531. spin_lock_bh(&sc->sc_pcu_lock);
  532. ath_reset(sc, true);
  533. spin_unlock_bh(&sc->sc_pcu_lock);
  534. count = 0;
  535. }
  536. } else
  537. count = 0;
  538. }
  539. void ath_hw_pll_work(struct work_struct *work)
  540. {
  541. struct ath_softc *sc = container_of(work, struct ath_softc,
  542. hw_pll_work.work);
  543. u32 pll_sqsum;
  544. if (AR_SREV_9485(sc->sc_ah)) {
  545. ath9k_ps_wakeup(sc);
  546. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  547. ath9k_ps_restore(sc);
  548. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  549. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  550. }
  551. }
  552. void ath9k_tasklet(unsigned long data)
  553. {
  554. struct ath_softc *sc = (struct ath_softc *)data;
  555. struct ath_hw *ah = sc->sc_ah;
  556. struct ath_common *common = ath9k_hw_common(ah);
  557. u32 status = sc->intrstatus;
  558. u32 rxmask;
  559. if ((status & ATH9K_INT_FATAL) ||
  560. (status & ATH9K_INT_BB_WATCHDOG)) {
  561. spin_lock(&sc->sc_pcu_lock);
  562. ath_reset(sc, true);
  563. spin_unlock(&sc->sc_pcu_lock);
  564. return;
  565. }
  566. ath9k_ps_wakeup(sc);
  567. spin_lock(&sc->sc_pcu_lock);
  568. /*
  569. * Only run the baseband hang check if beacons stop working in AP or
  570. * IBSS mode, because it has a high false positive rate. For station
  571. * mode it should not be necessary, since the upper layers will detect
  572. * this through a beacon miss automatically and the following channel
  573. * change will trigger a hardware reset anyway
  574. */
  575. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  576. !ath9k_hw_check_alive(ah))
  577. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  578. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  579. /*
  580. * TSF sync does not look correct; remain awake to sync with
  581. * the next Beacon.
  582. */
  583. ath_dbg(common, ATH_DBG_PS,
  584. "TSFOOR - Sync with next Beacon\n");
  585. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  586. }
  587. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  588. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  589. ATH9K_INT_RXORN);
  590. else
  591. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  592. if (status & rxmask) {
  593. /* Check for high priority Rx first */
  594. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  595. (status & ATH9K_INT_RXHP))
  596. ath_rx_tasklet(sc, 0, true);
  597. ath_rx_tasklet(sc, 0, false);
  598. }
  599. if (status & ATH9K_INT_TX) {
  600. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  601. ath_tx_edma_tasklet(sc);
  602. else
  603. ath_tx_tasklet(sc);
  604. }
  605. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  606. if (status & ATH9K_INT_GENTIMER)
  607. ath_gen_timer_isr(sc->sc_ah);
  608. /* re-enable hardware interrupt */
  609. ath9k_hw_enable_interrupts(ah);
  610. spin_unlock(&sc->sc_pcu_lock);
  611. ath9k_ps_restore(sc);
  612. }
  613. irqreturn_t ath_isr(int irq, void *dev)
  614. {
  615. #define SCHED_INTR ( \
  616. ATH9K_INT_FATAL | \
  617. ATH9K_INT_BB_WATCHDOG | \
  618. ATH9K_INT_RXORN | \
  619. ATH9K_INT_RXEOL | \
  620. ATH9K_INT_RX | \
  621. ATH9K_INT_RXLP | \
  622. ATH9K_INT_RXHP | \
  623. ATH9K_INT_TX | \
  624. ATH9K_INT_BMISS | \
  625. ATH9K_INT_CST | \
  626. ATH9K_INT_TSFOOR | \
  627. ATH9K_INT_GENTIMER)
  628. struct ath_softc *sc = dev;
  629. struct ath_hw *ah = sc->sc_ah;
  630. struct ath_common *common = ath9k_hw_common(ah);
  631. enum ath9k_int status;
  632. bool sched = false;
  633. /*
  634. * The hardware is not ready/present, don't
  635. * touch anything. Note this can happen early
  636. * on if the IRQ is shared.
  637. */
  638. if (sc->sc_flags & SC_OP_INVALID)
  639. return IRQ_NONE;
  640. /* shared irq, not for us */
  641. if (!ath9k_hw_intrpend(ah))
  642. return IRQ_NONE;
  643. /*
  644. * Figure out the reason(s) for the interrupt. Note
  645. * that the hal returns a pseudo-ISR that may include
  646. * bits we haven't explicitly enabled so we mask the
  647. * value to insure we only process bits we requested.
  648. */
  649. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  650. status &= ah->imask; /* discard unasked-for bits */
  651. /*
  652. * If there are no status bits set, then this interrupt was not
  653. * for me (should have been caught above).
  654. */
  655. if (!status)
  656. return IRQ_NONE;
  657. /* Cache the status */
  658. sc->intrstatus = status;
  659. if (status & SCHED_INTR)
  660. sched = true;
  661. /*
  662. * If a FATAL or RXORN interrupt is received, we have to reset the
  663. * chip immediately.
  664. */
  665. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  666. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  667. goto chip_reset;
  668. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  669. (status & ATH9K_INT_BB_WATCHDOG)) {
  670. spin_lock(&common->cc_lock);
  671. ath_hw_cycle_counters_update(common);
  672. ar9003_hw_bb_watchdog_dbg_info(ah);
  673. spin_unlock(&common->cc_lock);
  674. goto chip_reset;
  675. }
  676. if (status & ATH9K_INT_SWBA)
  677. tasklet_schedule(&sc->bcon_tasklet);
  678. if (status & ATH9K_INT_TXURN)
  679. ath9k_hw_updatetxtriglevel(ah, true);
  680. if (status & ATH9K_INT_RXEOL) {
  681. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  682. ath9k_hw_set_interrupts(ah, ah->imask);
  683. }
  684. if (status & ATH9K_INT_MIB) {
  685. /*
  686. * Disable interrupts until we service the MIB
  687. * interrupt; otherwise it will continue to
  688. * fire.
  689. */
  690. ath9k_hw_disable_interrupts(ah);
  691. /*
  692. * Let the hal handle the event. We assume
  693. * it will clear whatever condition caused
  694. * the interrupt.
  695. */
  696. spin_lock(&common->cc_lock);
  697. ath9k_hw_proc_mib_event(ah);
  698. spin_unlock(&common->cc_lock);
  699. ath9k_hw_enable_interrupts(ah);
  700. }
  701. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  702. if (status & ATH9K_INT_TIM_TIMER) {
  703. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  704. goto chip_reset;
  705. /* Clear RxAbort bit so that we can
  706. * receive frames */
  707. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  708. ath9k_hw_setrxabort(sc->sc_ah, 0);
  709. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  710. }
  711. chip_reset:
  712. ath_debug_stat_interrupt(sc, status);
  713. if (sched) {
  714. /* turn off every interrupt */
  715. ath9k_hw_disable_interrupts(ah);
  716. tasklet_schedule(&sc->intr_tq);
  717. }
  718. return IRQ_HANDLED;
  719. #undef SCHED_INTR
  720. }
  721. static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  722. {
  723. struct ath_hw *ah = sc->sc_ah;
  724. struct ath_common *common = ath9k_hw_common(ah);
  725. struct ieee80211_channel *channel = hw->conf.channel;
  726. int r;
  727. ath9k_ps_wakeup(sc);
  728. spin_lock_bh(&sc->sc_pcu_lock);
  729. atomic_set(&ah->intr_ref_cnt, -1);
  730. ath9k_hw_configpcipowersave(ah, false);
  731. if (!ah->curchan)
  732. ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
  733. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  734. if (r) {
  735. ath_err(common,
  736. "Unable to reset channel (%u MHz), reset status %d\n",
  737. channel->center_freq, r);
  738. }
  739. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  740. sc->config.txpowlimit, &sc->curtxpow);
  741. if (ath_startrecv(sc) != 0) {
  742. ath_err(common, "Unable to restart recv logic\n");
  743. goto out;
  744. }
  745. if (sc->sc_flags & SC_OP_BEACONS)
  746. ath_set_beacon(sc); /* restart beacons */
  747. /* Re-Enable interrupts */
  748. ath9k_hw_set_interrupts(ah, ah->imask);
  749. ath9k_hw_enable_interrupts(ah);
  750. /* Enable LED */
  751. ath9k_hw_cfg_output(ah, ah->led_pin,
  752. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  753. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  754. ieee80211_wake_queues(hw);
  755. ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
  756. out:
  757. spin_unlock_bh(&sc->sc_pcu_lock);
  758. ath9k_ps_restore(sc);
  759. }
  760. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  761. {
  762. struct ath_hw *ah = sc->sc_ah;
  763. struct ieee80211_channel *channel = hw->conf.channel;
  764. int r;
  765. ath9k_ps_wakeup(sc);
  766. cancel_delayed_work_sync(&sc->hw_pll_work);
  767. spin_lock_bh(&sc->sc_pcu_lock);
  768. ieee80211_stop_queues(hw);
  769. /*
  770. * Keep the LED on when the radio is disabled
  771. * during idle unassociated state.
  772. */
  773. if (!sc->ps_idle) {
  774. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  775. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  776. }
  777. /* Disable interrupts */
  778. ath9k_hw_disable_interrupts(ah);
  779. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  780. ath_stoprecv(sc); /* turn off frame recv */
  781. ath_flushrecv(sc); /* flush recv queue */
  782. if (!ah->curchan)
  783. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  784. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  785. if (r) {
  786. ath_err(ath9k_hw_common(sc->sc_ah),
  787. "Unable to reset channel (%u MHz), reset status %d\n",
  788. channel->center_freq, r);
  789. }
  790. ath9k_hw_phy_disable(ah);
  791. ath9k_hw_configpcipowersave(ah, true);
  792. spin_unlock_bh(&sc->sc_pcu_lock);
  793. ath9k_ps_restore(sc);
  794. }
  795. int ath_reset(struct ath_softc *sc, bool retry_tx)
  796. {
  797. struct ath_hw *ah = sc->sc_ah;
  798. struct ath_common *common = ath9k_hw_common(ah);
  799. struct ieee80211_hw *hw = sc->hw;
  800. int r;
  801. sc->hw_busy_count = 0;
  802. /* Stop ANI */
  803. del_timer_sync(&common->ani.timer);
  804. ath9k_ps_wakeup(sc);
  805. ieee80211_stop_queues(hw);
  806. ath9k_hw_disable_interrupts(ah);
  807. ath_drain_all_txq(sc, retry_tx);
  808. ath_stoprecv(sc);
  809. ath_flushrecv(sc);
  810. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  811. if (r)
  812. ath_err(common,
  813. "Unable to reset hardware; reset status %d\n", r);
  814. if (ath_startrecv(sc) != 0)
  815. ath_err(common, "Unable to start recv logic\n");
  816. /*
  817. * We may be doing a reset in response to a request
  818. * that changes the channel so update any state that
  819. * might change as a result.
  820. */
  821. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  822. sc->config.txpowlimit, &sc->curtxpow);
  823. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  824. ath_set_beacon(sc); /* restart beacons */
  825. ath9k_hw_set_interrupts(ah, ah->imask);
  826. ath9k_hw_enable_interrupts(ah);
  827. if (retry_tx) {
  828. int i;
  829. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  830. if (ATH_TXQ_SETUP(sc, i)) {
  831. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  832. ath_txq_schedule(sc, &sc->tx.txq[i]);
  833. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  834. }
  835. }
  836. }
  837. ieee80211_wake_queues(hw);
  838. /* Start ANI */
  839. if (!common->disable_ani)
  840. ath_start_ani(common);
  841. ath9k_ps_restore(sc);
  842. return r;
  843. }
  844. /**********************/
  845. /* mac80211 callbacks */
  846. /**********************/
  847. static int ath9k_start(struct ieee80211_hw *hw)
  848. {
  849. struct ath_softc *sc = hw->priv;
  850. struct ath_hw *ah = sc->sc_ah;
  851. struct ath_common *common = ath9k_hw_common(ah);
  852. struct ieee80211_channel *curchan = hw->conf.channel;
  853. struct ath9k_channel *init_channel;
  854. int r;
  855. ath_dbg(common, ATH_DBG_CONFIG,
  856. "Starting driver with initial channel: %d MHz\n",
  857. curchan->center_freq);
  858. ath9k_ps_wakeup(sc);
  859. mutex_lock(&sc->mutex);
  860. /* setup initial channel */
  861. sc->chan_idx = curchan->hw_value;
  862. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  863. /* Reset SERDES registers */
  864. ath9k_hw_configpcipowersave(ah, false);
  865. /*
  866. * The basic interface to setting the hardware in a good
  867. * state is ``reset''. On return the hardware is known to
  868. * be powered up and with interrupts disabled. This must
  869. * be followed by initialization of the appropriate bits
  870. * and then setup of the interrupt mask.
  871. */
  872. spin_lock_bh(&sc->sc_pcu_lock);
  873. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  874. if (r) {
  875. ath_err(common,
  876. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  877. r, curchan->center_freq);
  878. spin_unlock_bh(&sc->sc_pcu_lock);
  879. goto mutex_unlock;
  880. }
  881. /*
  882. * This is needed only to setup initial state
  883. * but it's best done after a reset.
  884. */
  885. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  886. sc->config.txpowlimit, &sc->curtxpow);
  887. /*
  888. * Setup the hardware after reset:
  889. * The receive engine is set going.
  890. * Frame transmit is handled entirely
  891. * in the frame output path; there's nothing to do
  892. * here except setup the interrupt mask.
  893. */
  894. if (ath_startrecv(sc) != 0) {
  895. ath_err(common, "Unable to start recv logic\n");
  896. r = -EIO;
  897. spin_unlock_bh(&sc->sc_pcu_lock);
  898. goto mutex_unlock;
  899. }
  900. spin_unlock_bh(&sc->sc_pcu_lock);
  901. /* Setup our intr mask. */
  902. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  903. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  904. ATH9K_INT_GLOBAL;
  905. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  906. ah->imask |= ATH9K_INT_RXHP |
  907. ATH9K_INT_RXLP |
  908. ATH9K_INT_BB_WATCHDOG;
  909. else
  910. ah->imask |= ATH9K_INT_RX;
  911. ah->imask |= ATH9K_INT_GTT;
  912. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  913. ah->imask |= ATH9K_INT_CST;
  914. sc->sc_flags &= ~SC_OP_INVALID;
  915. sc->sc_ah->is_monitoring = false;
  916. /* Disable BMISS interrupt when we're not associated */
  917. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  918. ath9k_hw_set_interrupts(ah, ah->imask);
  919. ath9k_hw_enable_interrupts(ah);
  920. ieee80211_wake_queues(hw);
  921. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  922. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  923. !ah->btcoex_hw.enabled) {
  924. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  925. AR_STOMP_LOW_WLAN_WGHT);
  926. ath9k_hw_btcoex_enable(ah);
  927. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  928. ath9k_btcoex_timer_resume(sc);
  929. }
  930. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  931. common->bus_ops->extn_synch_en(common);
  932. mutex_unlock:
  933. mutex_unlock(&sc->mutex);
  934. ath9k_ps_restore(sc);
  935. return r;
  936. }
  937. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  938. {
  939. struct ath_softc *sc = hw->priv;
  940. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  941. struct ath_tx_control txctl;
  942. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  943. if (sc->ps_enabled) {
  944. /*
  945. * mac80211 does not set PM field for normal data frames, so we
  946. * need to update that based on the current PS mode.
  947. */
  948. if (ieee80211_is_data(hdr->frame_control) &&
  949. !ieee80211_is_nullfunc(hdr->frame_control) &&
  950. !ieee80211_has_pm(hdr->frame_control)) {
  951. ath_dbg(common, ATH_DBG_PS,
  952. "Add PM=1 for a TX frame while in PS mode\n");
  953. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  954. }
  955. }
  956. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  957. /*
  958. * We are using PS-Poll and mac80211 can request TX while in
  959. * power save mode. Need to wake up hardware for the TX to be
  960. * completed and if needed, also for RX of buffered frames.
  961. */
  962. ath9k_ps_wakeup(sc);
  963. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  964. ath9k_hw_setrxabort(sc->sc_ah, 0);
  965. if (ieee80211_is_pspoll(hdr->frame_control)) {
  966. ath_dbg(common, ATH_DBG_PS,
  967. "Sending PS-Poll to pick a buffered frame\n");
  968. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  969. } else {
  970. ath_dbg(common, ATH_DBG_PS,
  971. "Wake up to complete TX\n");
  972. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  973. }
  974. /*
  975. * The actual restore operation will happen only after
  976. * the sc_flags bit is cleared. We are just dropping
  977. * the ps_usecount here.
  978. */
  979. ath9k_ps_restore(sc);
  980. }
  981. memset(&txctl, 0, sizeof(struct ath_tx_control));
  982. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  983. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  984. if (ath_tx_start(hw, skb, &txctl) != 0) {
  985. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  986. goto exit;
  987. }
  988. return;
  989. exit:
  990. dev_kfree_skb_any(skb);
  991. }
  992. static void ath9k_stop(struct ieee80211_hw *hw)
  993. {
  994. struct ath_softc *sc = hw->priv;
  995. struct ath_hw *ah = sc->sc_ah;
  996. struct ath_common *common = ath9k_hw_common(ah);
  997. mutex_lock(&sc->mutex);
  998. cancel_delayed_work_sync(&sc->tx_complete_work);
  999. cancel_delayed_work_sync(&sc->hw_pll_work);
  1000. cancel_work_sync(&sc->paprd_work);
  1001. cancel_work_sync(&sc->hw_check_work);
  1002. if (sc->sc_flags & SC_OP_INVALID) {
  1003. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1004. mutex_unlock(&sc->mutex);
  1005. return;
  1006. }
  1007. /* Ensure HW is awake when we try to shut it down. */
  1008. ath9k_ps_wakeup(sc);
  1009. if (ah->btcoex_hw.enabled) {
  1010. ath9k_hw_btcoex_disable(ah);
  1011. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1012. ath9k_btcoex_timer_pause(sc);
  1013. }
  1014. spin_lock_bh(&sc->sc_pcu_lock);
  1015. /* prevent tasklets to enable interrupts once we disable them */
  1016. ah->imask &= ~ATH9K_INT_GLOBAL;
  1017. /* make sure h/w will not generate any interrupt
  1018. * before setting the invalid flag. */
  1019. ath9k_hw_disable_interrupts(ah);
  1020. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1021. ath_drain_all_txq(sc, false);
  1022. ath_stoprecv(sc);
  1023. ath9k_hw_phy_disable(ah);
  1024. } else
  1025. sc->rx.rxlink = NULL;
  1026. if (sc->rx.frag) {
  1027. dev_kfree_skb_any(sc->rx.frag);
  1028. sc->rx.frag = NULL;
  1029. }
  1030. /* disable HAL and put h/w to sleep */
  1031. ath9k_hw_disable(ah);
  1032. spin_unlock_bh(&sc->sc_pcu_lock);
  1033. /* we can now sync irq and kill any running tasklets, since we already
  1034. * disabled interrupts and not holding a spin lock */
  1035. synchronize_irq(sc->irq);
  1036. tasklet_kill(&sc->intr_tq);
  1037. tasklet_kill(&sc->bcon_tasklet);
  1038. ath9k_ps_restore(sc);
  1039. sc->ps_idle = true;
  1040. ath_radio_disable(sc, hw);
  1041. sc->sc_flags |= SC_OP_INVALID;
  1042. mutex_unlock(&sc->mutex);
  1043. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1044. }
  1045. bool ath9k_uses_beacons(int type)
  1046. {
  1047. switch (type) {
  1048. case NL80211_IFTYPE_AP:
  1049. case NL80211_IFTYPE_ADHOC:
  1050. case NL80211_IFTYPE_MESH_POINT:
  1051. return true;
  1052. default:
  1053. return false;
  1054. }
  1055. }
  1056. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1057. struct ieee80211_vif *vif)
  1058. {
  1059. struct ath_vif *avp = (void *)vif->drv_priv;
  1060. ath9k_set_beaconing_status(sc, false);
  1061. ath_beacon_return(sc, avp);
  1062. ath9k_set_beaconing_status(sc, true);
  1063. sc->sc_flags &= ~SC_OP_BEACONS;
  1064. }
  1065. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1066. {
  1067. struct ath9k_vif_iter_data *iter_data = data;
  1068. int i;
  1069. if (iter_data->hw_macaddr)
  1070. for (i = 0; i < ETH_ALEN; i++)
  1071. iter_data->mask[i] &=
  1072. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1073. switch (vif->type) {
  1074. case NL80211_IFTYPE_AP:
  1075. iter_data->naps++;
  1076. break;
  1077. case NL80211_IFTYPE_STATION:
  1078. iter_data->nstations++;
  1079. break;
  1080. case NL80211_IFTYPE_ADHOC:
  1081. iter_data->nadhocs++;
  1082. break;
  1083. case NL80211_IFTYPE_MESH_POINT:
  1084. iter_data->nmeshes++;
  1085. break;
  1086. case NL80211_IFTYPE_WDS:
  1087. iter_data->nwds++;
  1088. break;
  1089. default:
  1090. iter_data->nothers++;
  1091. break;
  1092. }
  1093. }
  1094. /* Called with sc->mutex held. */
  1095. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1096. struct ieee80211_vif *vif,
  1097. struct ath9k_vif_iter_data *iter_data)
  1098. {
  1099. struct ath_softc *sc = hw->priv;
  1100. struct ath_hw *ah = sc->sc_ah;
  1101. struct ath_common *common = ath9k_hw_common(ah);
  1102. /*
  1103. * Use the hardware MAC address as reference, the hardware uses it
  1104. * together with the BSSID mask when matching addresses.
  1105. */
  1106. memset(iter_data, 0, sizeof(*iter_data));
  1107. iter_data->hw_macaddr = common->macaddr;
  1108. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1109. if (vif)
  1110. ath9k_vif_iter(iter_data, vif->addr, vif);
  1111. /* Get list of all active MAC addresses */
  1112. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1113. iter_data);
  1114. }
  1115. /* Called with sc->mutex held. */
  1116. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1117. struct ieee80211_vif *vif)
  1118. {
  1119. struct ath_softc *sc = hw->priv;
  1120. struct ath_hw *ah = sc->sc_ah;
  1121. struct ath_common *common = ath9k_hw_common(ah);
  1122. struct ath9k_vif_iter_data iter_data;
  1123. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1124. /* Set BSSID mask. */
  1125. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1126. ath_hw_setbssidmask(common);
  1127. /* Set op-mode & TSF */
  1128. if (iter_data.naps > 0) {
  1129. ath9k_hw_set_tsfadjust(ah, 1);
  1130. sc->sc_flags |= SC_OP_TSF_RESET;
  1131. ah->opmode = NL80211_IFTYPE_AP;
  1132. } else {
  1133. ath9k_hw_set_tsfadjust(ah, 0);
  1134. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1135. if (iter_data.nmeshes)
  1136. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1137. else if (iter_data.nwds)
  1138. ah->opmode = NL80211_IFTYPE_AP;
  1139. else if (iter_data.nadhocs)
  1140. ah->opmode = NL80211_IFTYPE_ADHOC;
  1141. else
  1142. ah->opmode = NL80211_IFTYPE_STATION;
  1143. }
  1144. /*
  1145. * Enable MIB interrupts when there are hardware phy counters.
  1146. */
  1147. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1148. if (ah->config.enable_ani)
  1149. ah->imask |= ATH9K_INT_MIB;
  1150. ah->imask |= ATH9K_INT_TSFOOR;
  1151. } else {
  1152. ah->imask &= ~ATH9K_INT_MIB;
  1153. ah->imask &= ~ATH9K_INT_TSFOOR;
  1154. }
  1155. ath9k_hw_set_interrupts(ah, ah->imask);
  1156. /* Set up ANI */
  1157. if (iter_data.naps > 0) {
  1158. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1159. if (!common->disable_ani) {
  1160. sc->sc_flags |= SC_OP_ANI_RUN;
  1161. ath_start_ani(common);
  1162. }
  1163. } else {
  1164. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1165. del_timer_sync(&common->ani.timer);
  1166. }
  1167. }
  1168. /* Called with sc->mutex held, vif counts set up properly. */
  1169. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1170. struct ieee80211_vif *vif)
  1171. {
  1172. struct ath_softc *sc = hw->priv;
  1173. ath9k_calculate_summary_state(hw, vif);
  1174. if (ath9k_uses_beacons(vif->type)) {
  1175. int error;
  1176. /* This may fail because upper levels do not have beacons
  1177. * properly configured yet. That's OK, we assume it
  1178. * will be properly configured and then we will be notified
  1179. * in the info_changed method and set up beacons properly
  1180. * there.
  1181. */
  1182. ath9k_set_beaconing_status(sc, false);
  1183. error = ath_beacon_alloc(sc, vif);
  1184. if (!error)
  1185. ath_beacon_config(sc, vif);
  1186. ath9k_set_beaconing_status(sc, true);
  1187. }
  1188. }
  1189. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1190. struct ieee80211_vif *vif)
  1191. {
  1192. struct ath_softc *sc = hw->priv;
  1193. struct ath_hw *ah = sc->sc_ah;
  1194. struct ath_common *common = ath9k_hw_common(ah);
  1195. int ret = 0;
  1196. ath9k_ps_wakeup(sc);
  1197. mutex_lock(&sc->mutex);
  1198. switch (vif->type) {
  1199. case NL80211_IFTYPE_STATION:
  1200. case NL80211_IFTYPE_WDS:
  1201. case NL80211_IFTYPE_ADHOC:
  1202. case NL80211_IFTYPE_AP:
  1203. case NL80211_IFTYPE_MESH_POINT:
  1204. break;
  1205. default:
  1206. ath_err(common, "Interface type %d not yet supported\n",
  1207. vif->type);
  1208. ret = -EOPNOTSUPP;
  1209. goto out;
  1210. }
  1211. if (ath9k_uses_beacons(vif->type)) {
  1212. if (sc->nbcnvifs >= ATH_BCBUF) {
  1213. ath_err(common, "Not enough beacon buffers when adding"
  1214. " new interface of type: %i\n",
  1215. vif->type);
  1216. ret = -ENOBUFS;
  1217. goto out;
  1218. }
  1219. }
  1220. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1221. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1222. sc->nvifs > 0)) {
  1223. ath_err(common, "Cannot create ADHOC interface when other"
  1224. " interfaces already exist.\n");
  1225. ret = -EINVAL;
  1226. goto out;
  1227. }
  1228. ath_dbg(common, ATH_DBG_CONFIG,
  1229. "Attach a VIF of type: %d\n", vif->type);
  1230. sc->nvifs++;
  1231. ath9k_do_vif_add_setup(hw, vif);
  1232. out:
  1233. mutex_unlock(&sc->mutex);
  1234. ath9k_ps_restore(sc);
  1235. return ret;
  1236. }
  1237. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1238. struct ieee80211_vif *vif,
  1239. enum nl80211_iftype new_type,
  1240. bool p2p)
  1241. {
  1242. struct ath_softc *sc = hw->priv;
  1243. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1244. int ret = 0;
  1245. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1246. mutex_lock(&sc->mutex);
  1247. ath9k_ps_wakeup(sc);
  1248. /* See if new interface type is valid. */
  1249. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1250. (sc->nvifs > 1)) {
  1251. ath_err(common, "When using ADHOC, it must be the only"
  1252. " interface.\n");
  1253. ret = -EINVAL;
  1254. goto out;
  1255. }
  1256. if (ath9k_uses_beacons(new_type) &&
  1257. !ath9k_uses_beacons(vif->type)) {
  1258. if (sc->nbcnvifs >= ATH_BCBUF) {
  1259. ath_err(common, "No beacon slot available\n");
  1260. ret = -ENOBUFS;
  1261. goto out;
  1262. }
  1263. }
  1264. /* Clean up old vif stuff */
  1265. if (ath9k_uses_beacons(vif->type))
  1266. ath9k_reclaim_beacon(sc, vif);
  1267. /* Add new settings */
  1268. vif->type = new_type;
  1269. vif->p2p = p2p;
  1270. ath9k_do_vif_add_setup(hw, vif);
  1271. out:
  1272. ath9k_ps_restore(sc);
  1273. mutex_unlock(&sc->mutex);
  1274. return ret;
  1275. }
  1276. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1277. struct ieee80211_vif *vif)
  1278. {
  1279. struct ath_softc *sc = hw->priv;
  1280. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1281. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1282. ath9k_ps_wakeup(sc);
  1283. mutex_lock(&sc->mutex);
  1284. sc->nvifs--;
  1285. /* Reclaim beacon resources */
  1286. if (ath9k_uses_beacons(vif->type))
  1287. ath9k_reclaim_beacon(sc, vif);
  1288. ath9k_calculate_summary_state(hw, NULL);
  1289. mutex_unlock(&sc->mutex);
  1290. ath9k_ps_restore(sc);
  1291. }
  1292. static void ath9k_enable_ps(struct ath_softc *sc)
  1293. {
  1294. struct ath_hw *ah = sc->sc_ah;
  1295. sc->ps_enabled = true;
  1296. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1297. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1298. ah->imask |= ATH9K_INT_TIM_TIMER;
  1299. ath9k_hw_set_interrupts(ah, ah->imask);
  1300. }
  1301. ath9k_hw_setrxabort(ah, 1);
  1302. }
  1303. }
  1304. static void ath9k_disable_ps(struct ath_softc *sc)
  1305. {
  1306. struct ath_hw *ah = sc->sc_ah;
  1307. sc->ps_enabled = false;
  1308. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1309. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1310. ath9k_hw_setrxabort(ah, 0);
  1311. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1312. PS_WAIT_FOR_CAB |
  1313. PS_WAIT_FOR_PSPOLL_DATA |
  1314. PS_WAIT_FOR_TX_ACK);
  1315. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1316. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1317. ath9k_hw_set_interrupts(ah, ah->imask);
  1318. }
  1319. }
  1320. }
  1321. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1322. {
  1323. struct ath_softc *sc = hw->priv;
  1324. struct ath_hw *ah = sc->sc_ah;
  1325. struct ath_common *common = ath9k_hw_common(ah);
  1326. struct ieee80211_conf *conf = &hw->conf;
  1327. bool disable_radio = false;
  1328. mutex_lock(&sc->mutex);
  1329. /*
  1330. * Leave this as the first check because we need to turn on the
  1331. * radio if it was disabled before prior to processing the rest
  1332. * of the changes. Likewise we must only disable the radio towards
  1333. * the end.
  1334. */
  1335. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1336. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1337. if (!sc->ps_idle) {
  1338. ath_radio_enable(sc, hw);
  1339. ath_dbg(common, ATH_DBG_CONFIG,
  1340. "not-idle: enabling radio\n");
  1341. } else {
  1342. disable_radio = true;
  1343. }
  1344. }
  1345. /*
  1346. * We just prepare to enable PS. We have to wait until our AP has
  1347. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1348. * those ACKs and end up retransmitting the same null data frames.
  1349. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1350. */
  1351. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1352. unsigned long flags;
  1353. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1354. if (conf->flags & IEEE80211_CONF_PS)
  1355. ath9k_enable_ps(sc);
  1356. else
  1357. ath9k_disable_ps(sc);
  1358. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1359. }
  1360. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1361. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1362. ath_dbg(common, ATH_DBG_CONFIG,
  1363. "Monitor mode is enabled\n");
  1364. sc->sc_ah->is_monitoring = true;
  1365. } else {
  1366. ath_dbg(common, ATH_DBG_CONFIG,
  1367. "Monitor mode is disabled\n");
  1368. sc->sc_ah->is_monitoring = false;
  1369. }
  1370. }
  1371. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1372. struct ieee80211_channel *curchan = hw->conf.channel;
  1373. struct ath9k_channel old_chan;
  1374. int pos = curchan->hw_value;
  1375. int old_pos = -1;
  1376. unsigned long flags;
  1377. if (ah->curchan)
  1378. old_pos = ah->curchan - &ah->channels[0];
  1379. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1380. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1381. else
  1382. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1383. ath_dbg(common, ATH_DBG_CONFIG,
  1384. "Set channel: %d MHz type: %d\n",
  1385. curchan->center_freq, conf->channel_type);
  1386. /* update survey stats for the old channel before switching */
  1387. spin_lock_irqsave(&common->cc_lock, flags);
  1388. ath_update_survey_stats(sc);
  1389. spin_unlock_irqrestore(&common->cc_lock, flags);
  1390. /*
  1391. * Preserve the current channel values, before updating
  1392. * the same channel
  1393. */
  1394. if (old_pos == pos) {
  1395. memcpy(&old_chan, &sc->sc_ah->channels[pos],
  1396. sizeof(struct ath9k_channel));
  1397. ah->curchan = &old_chan;
  1398. }
  1399. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1400. curchan, conf->channel_type);
  1401. /*
  1402. * If the operating channel changes, change the survey in-use flags
  1403. * along with it.
  1404. * Reset the survey data for the new channel, unless we're switching
  1405. * back to the operating channel from an off-channel operation.
  1406. */
  1407. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1408. sc->cur_survey != &sc->survey[pos]) {
  1409. if (sc->cur_survey)
  1410. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1411. sc->cur_survey = &sc->survey[pos];
  1412. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1413. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1414. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1415. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1416. }
  1417. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1418. ath_err(common, "Unable to set channel\n");
  1419. mutex_unlock(&sc->mutex);
  1420. return -EINVAL;
  1421. }
  1422. /*
  1423. * The most recent snapshot of channel->noisefloor for the old
  1424. * channel is only available after the hardware reset. Copy it to
  1425. * the survey stats now.
  1426. */
  1427. if (old_pos >= 0)
  1428. ath_update_survey_nf(sc, old_pos);
  1429. }
  1430. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1431. ath_dbg(common, ATH_DBG_CONFIG,
  1432. "Set power: %d\n", conf->power_level);
  1433. sc->config.txpowlimit = 2 * conf->power_level;
  1434. ath9k_ps_wakeup(sc);
  1435. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1436. sc->config.txpowlimit, &sc->curtxpow);
  1437. ath9k_ps_restore(sc);
  1438. }
  1439. if (disable_radio) {
  1440. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1441. ath_radio_disable(sc, hw);
  1442. }
  1443. mutex_unlock(&sc->mutex);
  1444. return 0;
  1445. }
  1446. #define SUPPORTED_FILTERS \
  1447. (FIF_PROMISC_IN_BSS | \
  1448. FIF_ALLMULTI | \
  1449. FIF_CONTROL | \
  1450. FIF_PSPOLL | \
  1451. FIF_OTHER_BSS | \
  1452. FIF_BCN_PRBRESP_PROMISC | \
  1453. FIF_PROBE_REQ | \
  1454. FIF_FCSFAIL)
  1455. /* FIXME: sc->sc_full_reset ? */
  1456. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1457. unsigned int changed_flags,
  1458. unsigned int *total_flags,
  1459. u64 multicast)
  1460. {
  1461. struct ath_softc *sc = hw->priv;
  1462. u32 rfilt;
  1463. changed_flags &= SUPPORTED_FILTERS;
  1464. *total_flags &= SUPPORTED_FILTERS;
  1465. sc->rx.rxfilter = *total_flags;
  1466. ath9k_ps_wakeup(sc);
  1467. rfilt = ath_calcrxfilter(sc);
  1468. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1469. ath9k_ps_restore(sc);
  1470. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1471. "Set HW RX filter: 0x%x\n", rfilt);
  1472. }
  1473. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1474. struct ieee80211_vif *vif,
  1475. struct ieee80211_sta *sta)
  1476. {
  1477. struct ath_softc *sc = hw->priv;
  1478. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1479. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1480. struct ieee80211_key_conf ps_key = { };
  1481. ath_node_attach(sc, sta);
  1482. if (vif->type != NL80211_IFTYPE_AP &&
  1483. vif->type != NL80211_IFTYPE_AP_VLAN)
  1484. return 0;
  1485. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1486. return 0;
  1487. }
  1488. static void ath9k_del_ps_key(struct ath_softc *sc,
  1489. struct ieee80211_vif *vif,
  1490. struct ieee80211_sta *sta)
  1491. {
  1492. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1493. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1494. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1495. if (!an->ps_key)
  1496. return;
  1497. ath_key_delete(common, &ps_key);
  1498. }
  1499. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1500. struct ieee80211_vif *vif,
  1501. struct ieee80211_sta *sta)
  1502. {
  1503. struct ath_softc *sc = hw->priv;
  1504. ath9k_del_ps_key(sc, vif, sta);
  1505. ath_node_detach(sc, sta);
  1506. return 0;
  1507. }
  1508. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1509. struct ieee80211_vif *vif,
  1510. enum sta_notify_cmd cmd,
  1511. struct ieee80211_sta *sta)
  1512. {
  1513. struct ath_softc *sc = hw->priv;
  1514. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1515. switch (cmd) {
  1516. case STA_NOTIFY_SLEEP:
  1517. an->sleeping = true;
  1518. if (ath_tx_aggr_sleep(sc, an))
  1519. ieee80211_sta_set_tim(sta);
  1520. break;
  1521. case STA_NOTIFY_AWAKE:
  1522. an->sleeping = false;
  1523. ath_tx_aggr_wakeup(sc, an);
  1524. break;
  1525. }
  1526. }
  1527. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1528. const struct ieee80211_tx_queue_params *params)
  1529. {
  1530. struct ath_softc *sc = hw->priv;
  1531. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1532. struct ath_txq *txq;
  1533. struct ath9k_tx_queue_info qi;
  1534. int ret = 0;
  1535. if (queue >= WME_NUM_AC)
  1536. return 0;
  1537. txq = sc->tx.txq_map[queue];
  1538. ath9k_ps_wakeup(sc);
  1539. mutex_lock(&sc->mutex);
  1540. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1541. qi.tqi_aifs = params->aifs;
  1542. qi.tqi_cwmin = params->cw_min;
  1543. qi.tqi_cwmax = params->cw_max;
  1544. qi.tqi_burstTime = params->txop;
  1545. ath_dbg(common, ATH_DBG_CONFIG,
  1546. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1547. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1548. params->cw_max, params->txop);
  1549. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1550. if (ret)
  1551. ath_err(common, "TXQ Update failed\n");
  1552. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1553. if (queue == WME_AC_BE && !ret)
  1554. ath_beaconq_config(sc);
  1555. mutex_unlock(&sc->mutex);
  1556. ath9k_ps_restore(sc);
  1557. return ret;
  1558. }
  1559. static int ath9k_set_key(struct ieee80211_hw *hw,
  1560. enum set_key_cmd cmd,
  1561. struct ieee80211_vif *vif,
  1562. struct ieee80211_sta *sta,
  1563. struct ieee80211_key_conf *key)
  1564. {
  1565. struct ath_softc *sc = hw->priv;
  1566. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1567. int ret = 0;
  1568. if (ath9k_modparam_nohwcrypt)
  1569. return -ENOSPC;
  1570. if (vif->type == NL80211_IFTYPE_ADHOC &&
  1571. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1572. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1573. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1574. /*
  1575. * For now, disable hw crypto for the RSN IBSS group keys. This
  1576. * could be optimized in the future to use a modified key cache
  1577. * design to support per-STA RX GTK, but until that gets
  1578. * implemented, use of software crypto for group addressed
  1579. * frames is a acceptable to allow RSN IBSS to be used.
  1580. */
  1581. return -EOPNOTSUPP;
  1582. }
  1583. mutex_lock(&sc->mutex);
  1584. ath9k_ps_wakeup(sc);
  1585. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1586. switch (cmd) {
  1587. case SET_KEY:
  1588. if (sta)
  1589. ath9k_del_ps_key(sc, vif, sta);
  1590. ret = ath_key_config(common, vif, sta, key);
  1591. if (ret >= 0) {
  1592. key->hw_key_idx = ret;
  1593. /* push IV and Michael MIC generation to stack */
  1594. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1595. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1596. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1597. if (sc->sc_ah->sw_mgmt_crypto &&
  1598. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1599. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1600. ret = 0;
  1601. }
  1602. break;
  1603. case DISABLE_KEY:
  1604. ath_key_delete(common, key);
  1605. break;
  1606. default:
  1607. ret = -EINVAL;
  1608. }
  1609. ath9k_ps_restore(sc);
  1610. mutex_unlock(&sc->mutex);
  1611. return ret;
  1612. }
  1613. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1614. {
  1615. struct ath_softc *sc = data;
  1616. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1617. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1618. struct ath_vif *avp = (void *)vif->drv_priv;
  1619. /*
  1620. * Skip iteration if primary station vif's bss info
  1621. * was not changed
  1622. */
  1623. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1624. return;
  1625. if (bss_conf->assoc) {
  1626. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1627. avp->primary_sta_vif = true;
  1628. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1629. common->curaid = bss_conf->aid;
  1630. ath9k_hw_write_associd(sc->sc_ah);
  1631. ath_dbg(common, ATH_DBG_CONFIG,
  1632. "Bss Info ASSOC %d, bssid: %pM\n",
  1633. bss_conf->aid, common->curbssid);
  1634. ath_beacon_config(sc, vif);
  1635. /*
  1636. * Request a re-configuration of Beacon related timers
  1637. * on the receipt of the first Beacon frame (i.e.,
  1638. * after time sync with the AP).
  1639. */
  1640. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1641. /* Reset rssi stats */
  1642. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1643. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1644. if (!common->disable_ani) {
  1645. sc->sc_flags |= SC_OP_ANI_RUN;
  1646. ath_start_ani(common);
  1647. }
  1648. }
  1649. }
  1650. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1651. {
  1652. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1653. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1654. struct ath_vif *avp = (void *)vif->drv_priv;
  1655. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1656. return;
  1657. /* Reconfigure bss info */
  1658. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1659. ath_dbg(common, ATH_DBG_CONFIG,
  1660. "Bss Info DISASSOC %d, bssid %pM\n",
  1661. common->curaid, common->curbssid);
  1662. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1663. avp->primary_sta_vif = false;
  1664. memset(common->curbssid, 0, ETH_ALEN);
  1665. common->curaid = 0;
  1666. }
  1667. ieee80211_iterate_active_interfaces_atomic(
  1668. sc->hw, ath9k_bss_iter, sc);
  1669. /*
  1670. * None of station vifs are associated.
  1671. * Clear bssid & aid
  1672. */
  1673. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1674. ath9k_hw_write_associd(sc->sc_ah);
  1675. /* Stop ANI */
  1676. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1677. del_timer_sync(&common->ani.timer);
  1678. }
  1679. }
  1680. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1681. struct ieee80211_vif *vif,
  1682. struct ieee80211_bss_conf *bss_conf,
  1683. u32 changed)
  1684. {
  1685. struct ath_softc *sc = hw->priv;
  1686. struct ath_hw *ah = sc->sc_ah;
  1687. struct ath_common *common = ath9k_hw_common(ah);
  1688. struct ath_vif *avp = (void *)vif->drv_priv;
  1689. int slottime;
  1690. int error;
  1691. ath9k_ps_wakeup(sc);
  1692. mutex_lock(&sc->mutex);
  1693. if (changed & BSS_CHANGED_BSSID) {
  1694. ath9k_config_bss(sc, vif);
  1695. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1696. common->curbssid, common->curaid);
  1697. }
  1698. if (changed & BSS_CHANGED_IBSS) {
  1699. /* There can be only one vif available */
  1700. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1701. common->curaid = bss_conf->aid;
  1702. ath9k_hw_write_associd(sc->sc_ah);
  1703. if (bss_conf->ibss_joined) {
  1704. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1705. if (!common->disable_ani) {
  1706. sc->sc_flags |= SC_OP_ANI_RUN;
  1707. ath_start_ani(common);
  1708. }
  1709. } else {
  1710. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1711. del_timer_sync(&common->ani.timer);
  1712. }
  1713. }
  1714. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1715. if ((changed & BSS_CHANGED_BEACON) ||
  1716. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1717. ath9k_set_beaconing_status(sc, false);
  1718. error = ath_beacon_alloc(sc, vif);
  1719. if (!error)
  1720. ath_beacon_config(sc, vif);
  1721. ath9k_set_beaconing_status(sc, true);
  1722. }
  1723. if (changed & BSS_CHANGED_ERP_SLOT) {
  1724. if (bss_conf->use_short_slot)
  1725. slottime = 9;
  1726. else
  1727. slottime = 20;
  1728. if (vif->type == NL80211_IFTYPE_AP) {
  1729. /*
  1730. * Defer update, so that connected stations can adjust
  1731. * their settings at the same time.
  1732. * See beacon.c for more details
  1733. */
  1734. sc->beacon.slottime = slottime;
  1735. sc->beacon.updateslot = UPDATE;
  1736. } else {
  1737. ah->slottime = slottime;
  1738. ath9k_hw_init_global_settings(ah);
  1739. }
  1740. }
  1741. /* Disable transmission of beacons */
  1742. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1743. !bss_conf->enable_beacon) {
  1744. ath9k_set_beaconing_status(sc, false);
  1745. avp->is_bslot_active = false;
  1746. ath9k_set_beaconing_status(sc, true);
  1747. }
  1748. if (changed & BSS_CHANGED_BEACON_INT) {
  1749. /*
  1750. * In case of AP mode, the HW TSF has to be reset
  1751. * when the beacon interval changes.
  1752. */
  1753. if (vif->type == NL80211_IFTYPE_AP) {
  1754. sc->sc_flags |= SC_OP_TSF_RESET;
  1755. ath9k_set_beaconing_status(sc, false);
  1756. error = ath_beacon_alloc(sc, vif);
  1757. if (!error)
  1758. ath_beacon_config(sc, vif);
  1759. ath9k_set_beaconing_status(sc, true);
  1760. } else
  1761. ath_beacon_config(sc, vif);
  1762. }
  1763. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1764. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1765. bss_conf->use_short_preamble);
  1766. if (bss_conf->use_short_preamble)
  1767. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1768. else
  1769. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1770. }
  1771. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1772. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1773. bss_conf->use_cts_prot);
  1774. if (bss_conf->use_cts_prot &&
  1775. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1776. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1777. else
  1778. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1779. }
  1780. mutex_unlock(&sc->mutex);
  1781. ath9k_ps_restore(sc);
  1782. }
  1783. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1784. {
  1785. struct ath_softc *sc = hw->priv;
  1786. u64 tsf;
  1787. mutex_lock(&sc->mutex);
  1788. ath9k_ps_wakeup(sc);
  1789. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1790. ath9k_ps_restore(sc);
  1791. mutex_unlock(&sc->mutex);
  1792. return tsf;
  1793. }
  1794. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1795. {
  1796. struct ath_softc *sc = hw->priv;
  1797. mutex_lock(&sc->mutex);
  1798. ath9k_ps_wakeup(sc);
  1799. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1800. ath9k_ps_restore(sc);
  1801. mutex_unlock(&sc->mutex);
  1802. }
  1803. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1804. {
  1805. struct ath_softc *sc = hw->priv;
  1806. mutex_lock(&sc->mutex);
  1807. ath9k_ps_wakeup(sc);
  1808. ath9k_hw_reset_tsf(sc->sc_ah);
  1809. ath9k_ps_restore(sc);
  1810. mutex_unlock(&sc->mutex);
  1811. }
  1812. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1813. struct ieee80211_vif *vif,
  1814. enum ieee80211_ampdu_mlme_action action,
  1815. struct ieee80211_sta *sta,
  1816. u16 tid, u16 *ssn, u8 buf_size)
  1817. {
  1818. struct ath_softc *sc = hw->priv;
  1819. int ret = 0;
  1820. local_bh_disable();
  1821. switch (action) {
  1822. case IEEE80211_AMPDU_RX_START:
  1823. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1824. ret = -ENOTSUPP;
  1825. break;
  1826. case IEEE80211_AMPDU_RX_STOP:
  1827. break;
  1828. case IEEE80211_AMPDU_TX_START:
  1829. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1830. return -EOPNOTSUPP;
  1831. ath9k_ps_wakeup(sc);
  1832. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1833. if (!ret)
  1834. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1835. ath9k_ps_restore(sc);
  1836. break;
  1837. case IEEE80211_AMPDU_TX_STOP:
  1838. ath9k_ps_wakeup(sc);
  1839. ath_tx_aggr_stop(sc, sta, tid);
  1840. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1841. ath9k_ps_restore(sc);
  1842. break;
  1843. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1844. ath9k_ps_wakeup(sc);
  1845. ath_tx_aggr_resume(sc, sta, tid);
  1846. ath9k_ps_restore(sc);
  1847. break;
  1848. default:
  1849. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1850. }
  1851. local_bh_enable();
  1852. return ret;
  1853. }
  1854. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1855. struct survey_info *survey)
  1856. {
  1857. struct ath_softc *sc = hw->priv;
  1858. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1859. struct ieee80211_supported_band *sband;
  1860. struct ieee80211_channel *chan;
  1861. unsigned long flags;
  1862. int pos;
  1863. spin_lock_irqsave(&common->cc_lock, flags);
  1864. if (idx == 0)
  1865. ath_update_survey_stats(sc);
  1866. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1867. if (sband && idx >= sband->n_channels) {
  1868. idx -= sband->n_channels;
  1869. sband = NULL;
  1870. }
  1871. if (!sband)
  1872. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1873. if (!sband || idx >= sband->n_channels) {
  1874. spin_unlock_irqrestore(&common->cc_lock, flags);
  1875. return -ENOENT;
  1876. }
  1877. chan = &sband->channels[idx];
  1878. pos = chan->hw_value;
  1879. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1880. survey->channel = chan;
  1881. spin_unlock_irqrestore(&common->cc_lock, flags);
  1882. return 0;
  1883. }
  1884. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1885. {
  1886. struct ath_softc *sc = hw->priv;
  1887. struct ath_hw *ah = sc->sc_ah;
  1888. mutex_lock(&sc->mutex);
  1889. ah->coverage_class = coverage_class;
  1890. ath9k_hw_init_global_settings(ah);
  1891. mutex_unlock(&sc->mutex);
  1892. }
  1893. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1894. {
  1895. struct ath_softc *sc = hw->priv;
  1896. struct ath_hw *ah = sc->sc_ah;
  1897. struct ath_common *common = ath9k_hw_common(ah);
  1898. int timeout = 200; /* ms */
  1899. int i, j;
  1900. bool drain_txq;
  1901. mutex_lock(&sc->mutex);
  1902. cancel_delayed_work_sync(&sc->tx_complete_work);
  1903. if (sc->sc_flags & SC_OP_INVALID) {
  1904. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1905. mutex_unlock(&sc->mutex);
  1906. return;
  1907. }
  1908. if (drop)
  1909. timeout = 1;
  1910. for (j = 0; j < timeout; j++) {
  1911. bool npend = false;
  1912. if (j)
  1913. usleep_range(1000, 2000);
  1914. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1915. if (!ATH_TXQ_SETUP(sc, i))
  1916. continue;
  1917. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1918. if (npend)
  1919. break;
  1920. }
  1921. if (!npend)
  1922. goto out;
  1923. }
  1924. ath9k_ps_wakeup(sc);
  1925. spin_lock_bh(&sc->sc_pcu_lock);
  1926. drain_txq = ath_drain_all_txq(sc, false);
  1927. if (!drain_txq)
  1928. ath_reset(sc, false);
  1929. spin_unlock_bh(&sc->sc_pcu_lock);
  1930. ath9k_ps_restore(sc);
  1931. ieee80211_wake_queues(hw);
  1932. out:
  1933. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1934. mutex_unlock(&sc->mutex);
  1935. }
  1936. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1937. {
  1938. struct ath_softc *sc = hw->priv;
  1939. int i;
  1940. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1941. if (!ATH_TXQ_SETUP(sc, i))
  1942. continue;
  1943. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1944. return true;
  1945. }
  1946. return false;
  1947. }
  1948. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1949. {
  1950. struct ath_softc *sc = hw->priv;
  1951. struct ath_hw *ah = sc->sc_ah;
  1952. struct ieee80211_vif *vif;
  1953. struct ath_vif *avp;
  1954. struct ath_buf *bf;
  1955. struct ath_tx_status ts;
  1956. int status;
  1957. vif = sc->beacon.bslot[0];
  1958. if (!vif)
  1959. return 0;
  1960. avp = (void *)vif->drv_priv;
  1961. if (!avp->is_bslot_active)
  1962. return 0;
  1963. if (!sc->beacon.tx_processed) {
  1964. tasklet_disable(&sc->bcon_tasklet);
  1965. bf = avp->av_bcbuf;
  1966. if (!bf || !bf->bf_mpdu)
  1967. goto skip;
  1968. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1969. if (status == -EINPROGRESS)
  1970. goto skip;
  1971. sc->beacon.tx_processed = true;
  1972. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1973. skip:
  1974. tasklet_enable(&sc->bcon_tasklet);
  1975. }
  1976. return sc->beacon.tx_last;
  1977. }
  1978. struct ieee80211_ops ath9k_ops = {
  1979. .tx = ath9k_tx,
  1980. .start = ath9k_start,
  1981. .stop = ath9k_stop,
  1982. .add_interface = ath9k_add_interface,
  1983. .change_interface = ath9k_change_interface,
  1984. .remove_interface = ath9k_remove_interface,
  1985. .config = ath9k_config,
  1986. .configure_filter = ath9k_configure_filter,
  1987. .sta_add = ath9k_sta_add,
  1988. .sta_remove = ath9k_sta_remove,
  1989. .sta_notify = ath9k_sta_notify,
  1990. .conf_tx = ath9k_conf_tx,
  1991. .bss_info_changed = ath9k_bss_info_changed,
  1992. .set_key = ath9k_set_key,
  1993. .get_tsf = ath9k_get_tsf,
  1994. .set_tsf = ath9k_set_tsf,
  1995. .reset_tsf = ath9k_reset_tsf,
  1996. .ampdu_action = ath9k_ampdu_action,
  1997. .get_survey = ath9k_get_survey,
  1998. .rfkill_poll = ath9k_rfkill_poll_state,
  1999. .set_coverage_class = ath9k_set_coverage_class,
  2000. .flush = ath9k_flush,
  2001. .tx_frames_pending = ath9k_tx_frames_pending,
  2002. .tx_last_beacon = ath9k_tx_last_beacon,
  2003. };