sdio.c 23 KB

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  1. /*
  2. * Copyright (c) 2004-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/mmc/card.h>
  17. #include <linux/mmc/mmc.h>
  18. #include <linux/mmc/host.h>
  19. #include <linux/mmc/sdio_func.h>
  20. #include <linux/mmc/sdio_ids.h>
  21. #include <linux/mmc/sdio.h>
  22. #include <linux/mmc/sd.h>
  23. #include "htc_hif.h"
  24. #include "hif-ops.h"
  25. #include "target.h"
  26. #include "debug.h"
  27. struct ath6kl_sdio {
  28. struct sdio_func *func;
  29. spinlock_t lock;
  30. /* free list */
  31. struct list_head bus_req_freeq;
  32. /* available bus requests */
  33. struct bus_request bus_req[BUS_REQUEST_MAX_NUM];
  34. struct ath6kl *ar;
  35. u8 *dma_buffer;
  36. /* scatter request list head */
  37. struct list_head scat_req;
  38. spinlock_t scat_lock;
  39. bool is_disabled;
  40. atomic_t irq_handling;
  41. const struct sdio_device_id *id;
  42. struct work_struct wr_async_work;
  43. struct list_head wr_asyncq;
  44. spinlock_t wr_async_lock;
  45. };
  46. #define CMD53_ARG_READ 0
  47. #define CMD53_ARG_WRITE 1
  48. #define CMD53_ARG_BLOCK_BASIS 1
  49. #define CMD53_ARG_FIXED_ADDRESS 0
  50. #define CMD53_ARG_INCR_ADDRESS 1
  51. static inline struct ath6kl_sdio *ath6kl_sdio_priv(struct ath6kl *ar)
  52. {
  53. return ar->hif_priv;
  54. }
  55. /*
  56. * Macro to check if DMA buffer is WORD-aligned and DMA-able.
  57. * Most host controllers assume the buffer is DMA'able and will
  58. * bug-check otherwise (i.e. buffers on the stack). virt_addr_valid
  59. * check fails on stack memory.
  60. */
  61. static inline bool buf_needs_bounce(u8 *buf)
  62. {
  63. return ((unsigned long) buf & 0x3) || !virt_addr_valid(buf);
  64. }
  65. static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar)
  66. {
  67. struct ath6kl_mbox_info *mbox_info = &ar->mbox_info;
  68. /* EP1 has an extended range */
  69. mbox_info->htc_addr = HIF_MBOX_BASE_ADDR;
  70. mbox_info->htc_ext_addr = HIF_MBOX0_EXT_BASE_ADDR;
  71. mbox_info->htc_ext_sz = HIF_MBOX0_EXT_WIDTH;
  72. mbox_info->block_size = HIF_MBOX_BLOCK_SIZE;
  73. mbox_info->gmbox_addr = HIF_GMBOX_BASE_ADDR;
  74. mbox_info->gmbox_sz = HIF_GMBOX_WIDTH;
  75. }
  76. static inline void ath6kl_sdio_set_cmd53_arg(u32 *arg, u8 rw, u8 func,
  77. u8 mode, u8 opcode, u32 addr,
  78. u16 blksz)
  79. {
  80. *arg = (((rw & 1) << 31) |
  81. ((func & 0x7) << 28) |
  82. ((mode & 1) << 27) |
  83. ((opcode & 1) << 26) |
  84. ((addr & 0x1FFFF) << 9) |
  85. (blksz & 0x1FF));
  86. }
  87. static inline void ath6kl_sdio_set_cmd52_arg(u32 *arg, u8 write, u8 raw,
  88. unsigned int address,
  89. unsigned char val)
  90. {
  91. const u8 func = 0;
  92. *arg = ((write & 1) << 31) |
  93. ((func & 0x7) << 28) |
  94. ((raw & 1) << 27) |
  95. (1 << 26) |
  96. ((address & 0x1FFFF) << 9) |
  97. (1 << 8) |
  98. (val & 0xFF);
  99. }
  100. static int ath6kl_sdio_func0_cmd52_wr_byte(struct mmc_card *card,
  101. unsigned int address,
  102. unsigned char byte)
  103. {
  104. struct mmc_command io_cmd;
  105. memset(&io_cmd, 0, sizeof(io_cmd));
  106. ath6kl_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte);
  107. io_cmd.opcode = SD_IO_RW_DIRECT;
  108. io_cmd.flags = MMC_RSP_R5 | MMC_CMD_AC;
  109. return mmc_wait_for_cmd(card->host, &io_cmd, 0);
  110. }
  111. static int ath6kl_sdio_io(struct sdio_func *func, u32 request, u32 addr,
  112. u8 *buf, u32 len)
  113. {
  114. int ret = 0;
  115. if (request & HIF_WRITE) {
  116. if (addr >= HIF_MBOX_BASE_ADDR &&
  117. addr <= HIF_MBOX_END_ADDR)
  118. addr += (HIF_MBOX_WIDTH - len);
  119. if (addr == HIF_MBOX0_EXT_BASE_ADDR)
  120. addr += HIF_MBOX0_EXT_WIDTH - len;
  121. if (request & HIF_FIXED_ADDRESS)
  122. ret = sdio_writesb(func, addr, buf, len);
  123. else
  124. ret = sdio_memcpy_toio(func, addr, buf, len);
  125. } else {
  126. if (request & HIF_FIXED_ADDRESS)
  127. ret = sdio_readsb(func, buf, addr, len);
  128. else
  129. ret = sdio_memcpy_fromio(func, buf, addr, len);
  130. }
  131. return ret;
  132. }
  133. static struct bus_request *ath6kl_sdio_alloc_busreq(struct ath6kl_sdio *ar_sdio)
  134. {
  135. struct bus_request *bus_req;
  136. unsigned long flag;
  137. spin_lock_irqsave(&ar_sdio->lock, flag);
  138. if (list_empty(&ar_sdio->bus_req_freeq)) {
  139. spin_unlock_irqrestore(&ar_sdio->lock, flag);
  140. return NULL;
  141. }
  142. bus_req = list_first_entry(&ar_sdio->bus_req_freeq,
  143. struct bus_request, list);
  144. list_del(&bus_req->list);
  145. spin_unlock_irqrestore(&ar_sdio->lock, flag);
  146. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req);
  147. return bus_req;
  148. }
  149. static void ath6kl_sdio_free_bus_req(struct ath6kl_sdio *ar_sdio,
  150. struct bus_request *bus_req)
  151. {
  152. unsigned long flag;
  153. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: bus request 0x%p\n", __func__, bus_req);
  154. spin_lock_irqsave(&ar_sdio->lock, flag);
  155. list_add_tail(&bus_req->list, &ar_sdio->bus_req_freeq);
  156. spin_unlock_irqrestore(&ar_sdio->lock, flag);
  157. }
  158. static void ath6kl_sdio_setup_scat_data(struct hif_scatter_req *scat_req,
  159. struct mmc_data *data)
  160. {
  161. struct scatterlist *sg;
  162. int i;
  163. data->blksz = HIF_MBOX_BLOCK_SIZE;
  164. data->blocks = scat_req->len / HIF_MBOX_BLOCK_SIZE;
  165. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  166. "hif-scatter: (%s) addr: 0x%X, (block len: %d, block count: %d) , (tot:%d,sg:%d)\n",
  167. (scat_req->req & HIF_WRITE) ? "WR" : "RD", scat_req->addr,
  168. data->blksz, data->blocks, scat_req->len,
  169. scat_req->scat_entries);
  170. data->flags = (scat_req->req & HIF_WRITE) ? MMC_DATA_WRITE :
  171. MMC_DATA_READ;
  172. /* fill SG entries */
  173. sg = scat_req->sgentries;
  174. sg_init_table(sg, scat_req->scat_entries);
  175. /* assemble SG list */
  176. for (i = 0; i < scat_req->scat_entries; i++, sg++) {
  177. if ((unsigned long)scat_req->scat_list[i].buf & 0x3)
  178. /*
  179. * Some scatter engines can handle unaligned
  180. * buffers, print this as informational only.
  181. */
  182. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  183. "(%s) scatter buffer is unaligned 0x%p\n",
  184. scat_req->req & HIF_WRITE ? "WR" : "RD",
  185. scat_req->scat_list[i].buf);
  186. ath6kl_dbg(ATH6KL_DBG_SCATTER, "%d: addr:0x%p, len:%d\n",
  187. i, scat_req->scat_list[i].buf,
  188. scat_req->scat_list[i].len);
  189. sg_set_buf(sg, scat_req->scat_list[i].buf,
  190. scat_req->scat_list[i].len);
  191. }
  192. /* set scatter-gather table for request */
  193. data->sg = scat_req->sgentries;
  194. data->sg_len = scat_req->scat_entries;
  195. }
  196. static int ath6kl_sdio_scat_rw(struct ath6kl_sdio *ar_sdio,
  197. struct bus_request *req)
  198. {
  199. struct mmc_request mmc_req;
  200. struct mmc_command cmd;
  201. struct mmc_data data;
  202. struct hif_scatter_req *scat_req;
  203. u8 opcode, rw;
  204. int status, len;
  205. scat_req = req->scat_req;
  206. if (scat_req->virt_scat) {
  207. len = scat_req->len;
  208. if (scat_req->req & HIF_BLOCK_BASIS)
  209. len = round_down(len, HIF_MBOX_BLOCK_SIZE);
  210. status = ath6kl_sdio_io(ar_sdio->func, scat_req->req,
  211. scat_req->addr, scat_req->virt_dma_buf,
  212. len);
  213. goto scat_complete;
  214. }
  215. memset(&mmc_req, 0, sizeof(struct mmc_request));
  216. memset(&cmd, 0, sizeof(struct mmc_command));
  217. memset(&data, 0, sizeof(struct mmc_data));
  218. ath6kl_sdio_setup_scat_data(scat_req, &data);
  219. opcode = (scat_req->req & HIF_FIXED_ADDRESS) ?
  220. CMD53_ARG_FIXED_ADDRESS : CMD53_ARG_INCR_ADDRESS;
  221. rw = (scat_req->req & HIF_WRITE) ? CMD53_ARG_WRITE : CMD53_ARG_READ;
  222. /* Fixup the address so that the last byte will fall on MBOX EOM */
  223. if (scat_req->req & HIF_WRITE) {
  224. if (scat_req->addr == HIF_MBOX_BASE_ADDR)
  225. scat_req->addr += HIF_MBOX_WIDTH - scat_req->len;
  226. else
  227. /* Uses extended address range */
  228. scat_req->addr += HIF_MBOX0_EXT_WIDTH - scat_req->len;
  229. }
  230. /* set command argument */
  231. ath6kl_sdio_set_cmd53_arg(&cmd.arg, rw, ar_sdio->func->num,
  232. CMD53_ARG_BLOCK_BASIS, opcode, scat_req->addr,
  233. data.blocks);
  234. cmd.opcode = SD_IO_RW_EXTENDED;
  235. cmd.flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_ADTC;
  236. mmc_req.cmd = &cmd;
  237. mmc_req.data = &data;
  238. mmc_set_data_timeout(&data, ar_sdio->func->card);
  239. /* synchronous call to process request */
  240. mmc_wait_for_req(ar_sdio->func->card->host, &mmc_req);
  241. status = cmd.error ? cmd.error : data.error;
  242. scat_complete:
  243. scat_req->status = status;
  244. if (scat_req->status)
  245. ath6kl_err("Scatter write request failed:%d\n",
  246. scat_req->status);
  247. if (scat_req->req & HIF_ASYNCHRONOUS)
  248. scat_req->complete(ar_sdio->ar->htc_target, scat_req);
  249. return status;
  250. }
  251. static int ath6kl_sdio_alloc_prep_scat_req(struct ath6kl_sdio *ar_sdio,
  252. int n_scat_entry, int n_scat_req,
  253. bool virt_scat)
  254. {
  255. struct hif_scatter_req *s_req;
  256. struct bus_request *bus_req;
  257. int i, scat_req_sz, scat_list_sz, sg_sz, buf_sz;
  258. u8 *virt_buf;
  259. scat_list_sz = (n_scat_entry - 1) * sizeof(struct hif_scatter_item);
  260. scat_req_sz = sizeof(*s_req) + scat_list_sz;
  261. if (!virt_scat)
  262. sg_sz = sizeof(struct scatterlist) * n_scat_entry;
  263. else
  264. buf_sz = 2 * L1_CACHE_BYTES +
  265. ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER;
  266. for (i = 0; i < n_scat_req; i++) {
  267. /* allocate the scatter request */
  268. s_req = kzalloc(scat_req_sz, GFP_KERNEL);
  269. if (!s_req)
  270. return -ENOMEM;
  271. if (virt_scat) {
  272. virt_buf = kzalloc(buf_sz, GFP_KERNEL);
  273. if (!virt_buf) {
  274. kfree(s_req);
  275. return -ENOMEM;
  276. }
  277. s_req->virt_dma_buf =
  278. (u8 *)L1_CACHE_ALIGN((unsigned long)virt_buf);
  279. } else {
  280. /* allocate sglist */
  281. s_req->sgentries = kzalloc(sg_sz, GFP_KERNEL);
  282. if (!s_req->sgentries) {
  283. kfree(s_req);
  284. return -ENOMEM;
  285. }
  286. }
  287. /* allocate a bus request for this scatter request */
  288. bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
  289. if (!bus_req) {
  290. kfree(s_req->sgentries);
  291. kfree(s_req->virt_dma_buf);
  292. kfree(s_req);
  293. return -ENOMEM;
  294. }
  295. /* assign the scatter request to this bus request */
  296. bus_req->scat_req = s_req;
  297. s_req->busrequest = bus_req;
  298. s_req->virt_scat = virt_scat;
  299. /* add it to the scatter pool */
  300. hif_scatter_req_add(ar_sdio->ar, s_req);
  301. }
  302. return 0;
  303. }
  304. static int ath6kl_sdio_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf,
  305. u32 len, u32 request)
  306. {
  307. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  308. u8 *tbuf = NULL;
  309. int ret;
  310. bool bounced = false;
  311. if (request & HIF_BLOCK_BASIS)
  312. len = round_down(len, HIF_MBOX_BLOCK_SIZE);
  313. if (buf_needs_bounce(buf)) {
  314. if (!ar_sdio->dma_buffer)
  315. return -ENOMEM;
  316. tbuf = ar_sdio->dma_buffer;
  317. memcpy(tbuf, buf, len);
  318. bounced = true;
  319. } else
  320. tbuf = buf;
  321. sdio_claim_host(ar_sdio->func);
  322. ret = ath6kl_sdio_io(ar_sdio->func, request, addr, tbuf, len);
  323. if ((request & HIF_READ) && bounced)
  324. memcpy(buf, tbuf, len);
  325. sdio_release_host(ar_sdio->func);
  326. return ret;
  327. }
  328. static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio,
  329. struct bus_request *req)
  330. {
  331. if (req->scat_req)
  332. ath6kl_sdio_scat_rw(ar_sdio, req);
  333. else {
  334. void *context;
  335. int status;
  336. status = ath6kl_sdio_read_write_sync(ar_sdio->ar, req->address,
  337. req->buffer, req->length,
  338. req->request);
  339. context = req->packet;
  340. ath6kl_sdio_free_bus_req(ar_sdio, req);
  341. ath6kldev_rw_comp_handler(context, status);
  342. }
  343. }
  344. static void ath6kl_sdio_write_async_work(struct work_struct *work)
  345. {
  346. struct ath6kl_sdio *ar_sdio;
  347. unsigned long flags;
  348. struct bus_request *req, *tmp_req;
  349. ar_sdio = container_of(work, struct ath6kl_sdio, wr_async_work);
  350. sdio_claim_host(ar_sdio->func);
  351. spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
  352. list_for_each_entry_safe(req, tmp_req, &ar_sdio->wr_asyncq, list) {
  353. list_del(&req->list);
  354. spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
  355. __ath6kl_sdio_write_async(ar_sdio, req);
  356. spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
  357. }
  358. spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
  359. sdio_release_host(ar_sdio->func);
  360. }
  361. static void ath6kl_sdio_irq_handler(struct sdio_func *func)
  362. {
  363. int status;
  364. struct ath6kl_sdio *ar_sdio;
  365. ar_sdio = sdio_get_drvdata(func);
  366. atomic_set(&ar_sdio->irq_handling, 1);
  367. /*
  368. * Release the host during interrups so we can pick it back up when
  369. * we process commands.
  370. */
  371. sdio_release_host(ar_sdio->func);
  372. status = ath6kldev_intr_bh_handler(ar_sdio->ar);
  373. sdio_claim_host(ar_sdio->func);
  374. atomic_set(&ar_sdio->irq_handling, 0);
  375. WARN_ON(status && status != -ECANCELED);
  376. }
  377. static int ath6kl_sdio_power_on(struct ath6kl_sdio *ar_sdio)
  378. {
  379. struct sdio_func *func = ar_sdio->func;
  380. int ret = 0;
  381. if (!ar_sdio->is_disabled)
  382. return 0;
  383. sdio_claim_host(func);
  384. ret = sdio_enable_func(func);
  385. if (ret) {
  386. ath6kl_err("Unable to enable sdio func: %d)\n", ret);
  387. sdio_release_host(func);
  388. return ret;
  389. }
  390. sdio_release_host(func);
  391. /*
  392. * Wait for hardware to initialise. It should take a lot less than
  393. * 10 ms but let's be conservative here.
  394. */
  395. msleep(10);
  396. ar_sdio->is_disabled = false;
  397. return ret;
  398. }
  399. static int ath6kl_sdio_power_off(struct ath6kl_sdio *ar_sdio)
  400. {
  401. int ret;
  402. if (ar_sdio->is_disabled)
  403. return 0;
  404. /* Disable the card */
  405. sdio_claim_host(ar_sdio->func);
  406. ret = sdio_disable_func(ar_sdio->func);
  407. sdio_release_host(ar_sdio->func);
  408. if (ret)
  409. return ret;
  410. ar_sdio->is_disabled = true;
  411. return ret;
  412. }
  413. static int ath6kl_sdio_write_async(struct ath6kl *ar, u32 address, u8 *buffer,
  414. u32 length, u32 request,
  415. struct htc_packet *packet)
  416. {
  417. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  418. struct bus_request *bus_req;
  419. unsigned long flags;
  420. bus_req = ath6kl_sdio_alloc_busreq(ar_sdio);
  421. if (!bus_req)
  422. return -ENOMEM;
  423. bus_req->address = address;
  424. bus_req->buffer = buffer;
  425. bus_req->length = length;
  426. bus_req->request = request;
  427. bus_req->packet = packet;
  428. spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
  429. list_add_tail(&bus_req->list, &ar_sdio->wr_asyncq);
  430. spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
  431. queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
  432. return 0;
  433. }
  434. static void ath6kl_sdio_irq_enable(struct ath6kl *ar)
  435. {
  436. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  437. int ret;
  438. sdio_claim_host(ar_sdio->func);
  439. /* Register the isr */
  440. ret = sdio_claim_irq(ar_sdio->func, ath6kl_sdio_irq_handler);
  441. if (ret)
  442. ath6kl_err("Failed to claim sdio irq: %d\n", ret);
  443. sdio_release_host(ar_sdio->func);
  444. }
  445. static void ath6kl_sdio_irq_disable(struct ath6kl *ar)
  446. {
  447. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  448. int ret;
  449. sdio_claim_host(ar_sdio->func);
  450. /* Mask our function IRQ */
  451. while (atomic_read(&ar_sdio->irq_handling)) {
  452. sdio_release_host(ar_sdio->func);
  453. schedule_timeout(HZ / 10);
  454. sdio_claim_host(ar_sdio->func);
  455. }
  456. ret = sdio_release_irq(ar_sdio->func);
  457. if (ret)
  458. ath6kl_err("Failed to release sdio irq: %d\n", ret);
  459. sdio_release_host(ar_sdio->func);
  460. }
  461. static struct hif_scatter_req *ath6kl_sdio_scatter_req_get(struct ath6kl *ar)
  462. {
  463. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  464. struct hif_scatter_req *node = NULL;
  465. unsigned long flag;
  466. spin_lock_irqsave(&ar_sdio->scat_lock, flag);
  467. if (!list_empty(&ar_sdio->scat_req)) {
  468. node = list_first_entry(&ar_sdio->scat_req,
  469. struct hif_scatter_req, list);
  470. list_del(&node->list);
  471. }
  472. spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
  473. return node;
  474. }
  475. static void ath6kl_sdio_scatter_req_add(struct ath6kl *ar,
  476. struct hif_scatter_req *s_req)
  477. {
  478. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  479. unsigned long flag;
  480. spin_lock_irqsave(&ar_sdio->scat_lock, flag);
  481. list_add_tail(&s_req->list, &ar_sdio->scat_req);
  482. spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
  483. }
  484. /* scatter gather read write request */
  485. static int ath6kl_sdio_async_rw_scatter(struct ath6kl *ar,
  486. struct hif_scatter_req *scat_req)
  487. {
  488. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  489. u32 request = scat_req->req;
  490. int status = 0;
  491. unsigned long flags;
  492. if (!scat_req->len)
  493. return -EINVAL;
  494. ath6kl_dbg(ATH6KL_DBG_SCATTER,
  495. "hif-scatter: total len: %d scatter entries: %d\n",
  496. scat_req->len, scat_req->scat_entries);
  497. if (request & HIF_SYNCHRONOUS) {
  498. sdio_claim_host(ar_sdio->func);
  499. status = ath6kl_sdio_scat_rw(ar_sdio, scat_req->busrequest);
  500. sdio_release_host(ar_sdio->func);
  501. } else {
  502. spin_lock_irqsave(&ar_sdio->wr_async_lock, flags);
  503. list_add_tail(&scat_req->busrequest->list, &ar_sdio->wr_asyncq);
  504. spin_unlock_irqrestore(&ar_sdio->wr_async_lock, flags);
  505. queue_work(ar->ath6kl_wq, &ar_sdio->wr_async_work);
  506. }
  507. return status;
  508. }
  509. /* clean up scatter support */
  510. static void ath6kl_sdio_cleanup_scatter(struct ath6kl *ar)
  511. {
  512. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  513. struct hif_scatter_req *s_req, *tmp_req;
  514. unsigned long flag;
  515. /* empty the free list */
  516. spin_lock_irqsave(&ar_sdio->scat_lock, flag);
  517. list_for_each_entry_safe(s_req, tmp_req, &ar_sdio->scat_req, list) {
  518. list_del(&s_req->list);
  519. spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
  520. if (s_req->busrequest)
  521. ath6kl_sdio_free_bus_req(ar_sdio, s_req->busrequest);
  522. kfree(s_req->virt_dma_buf);
  523. kfree(s_req->sgentries);
  524. kfree(s_req);
  525. spin_lock_irqsave(&ar_sdio->scat_lock, flag);
  526. }
  527. spin_unlock_irqrestore(&ar_sdio->scat_lock, flag);
  528. }
  529. /* setup of HIF scatter resources */
  530. static int ath6kl_sdio_enable_scatter(struct ath6kl *ar)
  531. {
  532. struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar);
  533. struct htc_target *target = ar->htc_target;
  534. int ret;
  535. bool virt_scat = false;
  536. /* check if host supports scatter and it meets our requirements */
  537. if (ar_sdio->func->card->host->max_segs < MAX_SCATTER_ENTRIES_PER_REQ) {
  538. ath6kl_err("host only supports scatter of :%d entries, need: %d\n",
  539. ar_sdio->func->card->host->max_segs,
  540. MAX_SCATTER_ENTRIES_PER_REQ);
  541. virt_scat = true;
  542. }
  543. if (!virt_scat) {
  544. ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio,
  545. MAX_SCATTER_ENTRIES_PER_REQ,
  546. MAX_SCATTER_REQUESTS, virt_scat);
  547. if (!ret) {
  548. ath6kl_dbg(ATH6KL_DBG_ANY,
  549. "hif-scatter enabled: max scatter req : %d entries: %d\n",
  550. MAX_SCATTER_REQUESTS,
  551. MAX_SCATTER_ENTRIES_PER_REQ);
  552. target->max_scat_entries = MAX_SCATTER_ENTRIES_PER_REQ;
  553. target->max_xfer_szper_scatreq =
  554. MAX_SCATTER_REQ_TRANSFER_SIZE;
  555. } else {
  556. ath6kl_sdio_cleanup_scatter(ar);
  557. ath6kl_warn("hif scatter resource setup failed, trying virtual scatter method\n");
  558. }
  559. }
  560. if (virt_scat || ret) {
  561. ret = ath6kl_sdio_alloc_prep_scat_req(ar_sdio,
  562. ATH6KL_SCATTER_ENTRIES_PER_REQ,
  563. ATH6KL_SCATTER_REQS, virt_scat);
  564. if (ret) {
  565. ath6kl_err("failed to alloc virtual scatter resources !\n");
  566. ath6kl_sdio_cleanup_scatter(ar);
  567. return ret;
  568. }
  569. ath6kl_dbg(ATH6KL_DBG_ANY,
  570. "Vitual scatter enabled, max_scat_req:%d, entries:%d\n",
  571. ATH6KL_SCATTER_REQS, ATH6KL_SCATTER_ENTRIES_PER_REQ);
  572. target->max_scat_entries = ATH6KL_SCATTER_ENTRIES_PER_REQ;
  573. target->max_xfer_szper_scatreq =
  574. ATH6KL_MAX_TRANSFER_SIZE_PER_SCATTER;
  575. }
  576. return 0;
  577. }
  578. static const struct ath6kl_hif_ops ath6kl_sdio_ops = {
  579. .read_write_sync = ath6kl_sdio_read_write_sync,
  580. .write_async = ath6kl_sdio_write_async,
  581. .irq_enable = ath6kl_sdio_irq_enable,
  582. .irq_disable = ath6kl_sdio_irq_disable,
  583. .scatter_req_get = ath6kl_sdio_scatter_req_get,
  584. .scatter_req_add = ath6kl_sdio_scatter_req_add,
  585. .enable_scatter = ath6kl_sdio_enable_scatter,
  586. .scat_req_rw = ath6kl_sdio_async_rw_scatter,
  587. .cleanup_scatter = ath6kl_sdio_cleanup_scatter,
  588. };
  589. static int ath6kl_sdio_probe(struct sdio_func *func,
  590. const struct sdio_device_id *id)
  591. {
  592. int ret;
  593. struct ath6kl_sdio *ar_sdio;
  594. struct ath6kl *ar;
  595. int count;
  596. ath6kl_dbg(ATH6KL_DBG_TRC,
  597. "%s: func: 0x%X, vendor id: 0x%X, dev id: 0x%X, block size: 0x%X/0x%X\n",
  598. __func__, func->num, func->vendor,
  599. func->device, func->max_blksize, func->cur_blksize);
  600. ar_sdio = kzalloc(sizeof(struct ath6kl_sdio), GFP_KERNEL);
  601. if (!ar_sdio)
  602. return -ENOMEM;
  603. ar_sdio->dma_buffer = kzalloc(HIF_DMA_BUFFER_SIZE, GFP_KERNEL);
  604. if (!ar_sdio->dma_buffer) {
  605. ret = -ENOMEM;
  606. goto err_hif;
  607. }
  608. ar_sdio->func = func;
  609. sdio_set_drvdata(func, ar_sdio);
  610. ar_sdio->id = id;
  611. ar_sdio->is_disabled = true;
  612. spin_lock_init(&ar_sdio->lock);
  613. spin_lock_init(&ar_sdio->scat_lock);
  614. spin_lock_init(&ar_sdio->wr_async_lock);
  615. INIT_LIST_HEAD(&ar_sdio->scat_req);
  616. INIT_LIST_HEAD(&ar_sdio->bus_req_freeq);
  617. INIT_LIST_HEAD(&ar_sdio->wr_asyncq);
  618. INIT_WORK(&ar_sdio->wr_async_work, ath6kl_sdio_write_async_work);
  619. for (count = 0; count < BUS_REQUEST_MAX_NUM; count++)
  620. ath6kl_sdio_free_bus_req(ar_sdio, &ar_sdio->bus_req[count]);
  621. ar = ath6kl_core_alloc(&ar_sdio->func->dev);
  622. if (!ar) {
  623. ath6kl_err("Failed to alloc ath6kl core\n");
  624. ret = -ENOMEM;
  625. goto err_dma;
  626. }
  627. ar_sdio->ar = ar;
  628. ar->hif_priv = ar_sdio;
  629. ar->hif_ops = &ath6kl_sdio_ops;
  630. ath6kl_sdio_set_mbox_info(ar);
  631. sdio_claim_host(func);
  632. if ((ar_sdio->id->device & MANUFACTURER_ID_ATH6KL_BASE_MASK) >=
  633. MANUFACTURER_ID_AR6003_BASE) {
  634. /* enable 4-bit ASYNC interrupt on AR6003 or later */
  635. ret = ath6kl_sdio_func0_cmd52_wr_byte(func->card,
  636. CCCR_SDIO_IRQ_MODE_REG,
  637. SDIO_IRQ_MODE_ASYNC_4BIT_IRQ);
  638. if (ret) {
  639. ath6kl_err("Failed to enable 4-bit async irq mode %d\n",
  640. ret);
  641. sdio_release_host(func);
  642. goto err_dma;
  643. }
  644. ath6kl_dbg(ATH6KL_DBG_TRC, "4-bit async irq mode enabled\n");
  645. }
  646. /* give us some time to enable, in ms */
  647. func->enable_timeout = 100;
  648. sdio_release_host(func);
  649. ret = ath6kl_sdio_power_on(ar_sdio);
  650. if (ret)
  651. goto err_dma;
  652. sdio_claim_host(func);
  653. ret = sdio_set_block_size(func, HIF_MBOX_BLOCK_SIZE);
  654. if (ret) {
  655. ath6kl_err("Set sdio block size %d failed: %d)\n",
  656. HIF_MBOX_BLOCK_SIZE, ret);
  657. sdio_release_host(func);
  658. goto err_off;
  659. }
  660. sdio_release_host(func);
  661. ret = ath6kl_core_init(ar);
  662. if (ret) {
  663. ath6kl_err("Failed to init ath6kl core\n");
  664. goto err_off;
  665. }
  666. return ret;
  667. err_off:
  668. ath6kl_sdio_power_off(ar_sdio);
  669. err_dma:
  670. kfree(ar_sdio->dma_buffer);
  671. err_hif:
  672. kfree(ar_sdio);
  673. return ret;
  674. }
  675. static void ath6kl_sdio_remove(struct sdio_func *func)
  676. {
  677. struct ath6kl_sdio *ar_sdio;
  678. ar_sdio = sdio_get_drvdata(func);
  679. ath6kl_stop_txrx(ar_sdio->ar);
  680. cancel_work_sync(&ar_sdio->wr_async_work);
  681. ath6kl_unavail_ev(ar_sdio->ar);
  682. ath6kl_sdio_power_off(ar_sdio);
  683. kfree(ar_sdio->dma_buffer);
  684. kfree(ar_sdio);
  685. }
  686. static const struct sdio_device_id ath6kl_sdio_devices[] = {
  687. {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x0))},
  688. {SDIO_DEVICE(MANUFACTURER_CODE, (MANUFACTURER_ID_AR6003_BASE | 0x1))},
  689. {},
  690. };
  691. MODULE_DEVICE_TABLE(sdio, ath6kl_sdio_devices);
  692. static struct sdio_driver ath6kl_sdio_driver = {
  693. .name = "ath6kl_sdio",
  694. .id_table = ath6kl_sdio_devices,
  695. .probe = ath6kl_sdio_probe,
  696. .remove = ath6kl_sdio_remove,
  697. };
  698. static int __init ath6kl_sdio_init(void)
  699. {
  700. int ret;
  701. ret = sdio_register_driver(&ath6kl_sdio_driver);
  702. if (ret)
  703. ath6kl_err("sdio driver registration failed: %d\n", ret);
  704. return ret;
  705. }
  706. static void __exit ath6kl_sdio_exit(void)
  707. {
  708. sdio_unregister_driver(&ath6kl_sdio_driver);
  709. }
  710. module_init(ath6kl_sdio_init);
  711. module_exit(ath6kl_sdio_exit);
  712. MODULE_AUTHOR("Atheros Communications, Inc.");
  713. MODULE_DESCRIPTION("Driver support for Atheros AR600x SDIO devices");
  714. MODULE_LICENSE("Dual BSD/GPL");
  715. MODULE_FIRMWARE(AR6003_REV2_OTP_FILE);
  716. MODULE_FIRMWARE(AR6003_REV2_FIRMWARE_FILE);
  717. MODULE_FIRMWARE(AR6003_REV2_PATCH_FILE);
  718. MODULE_FIRMWARE(AR6003_REV2_BOARD_DATA_FILE);
  719. MODULE_FIRMWARE(AR6003_REV2_DEFAULT_BOARD_DATA_FILE);
  720. MODULE_FIRMWARE(AR6003_REV3_OTP_FILE);
  721. MODULE_FIRMWARE(AR6003_REV3_FIRMWARE_FILE);
  722. MODULE_FIRMWARE(AR6003_REV3_PATCH_FILE);
  723. MODULE_FIRMWARE(AR6003_REV3_BOARD_DATA_FILE);
  724. MODULE_FIRMWARE(AR6003_REV3_DEFAULT_BOARD_DATA_FILE);