e1000_main.c 120 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.0.58 4/20/05
  23. * o Accepted ethtool cleanup patch from Stephen Hemminger
  24. * 6.0.44+ 2/15/05
  25. * o applied Anton's patch to resolve tx hang in hardware
  26. * o Applied Andrew Mortons patch - e1000 stops working after resume
  27. */
  28. char e1000_driver_name[] = "e1000";
  29. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  30. #ifndef CONFIG_E1000_NAPI
  31. #define DRIVERNAPI
  32. #else
  33. #define DRIVERNAPI "-NAPI"
  34. #endif
  35. #define DRV_VERSION "6.1.16-k2"DRIVERNAPI
  36. char e1000_driver_version[] = DRV_VERSION;
  37. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  38. /* e1000_pci_tbl - PCI Device ID Table
  39. *
  40. * Last entry must be all 0s
  41. *
  42. * Macro expands to...
  43. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  44. */
  45. static struct pci_device_id e1000_pci_tbl[] = {
  46. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  47. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  51. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  52. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  53. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  54. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  59. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  60. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  65. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  67. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  71. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  72. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  77. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  78. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  83. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  84. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  86. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  87. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  88. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  89. /* required last entry */
  90. {0,}
  91. };
  92. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  93. int e1000_up(struct e1000_adapter *adapter);
  94. void e1000_down(struct e1000_adapter *adapter);
  95. void e1000_reset(struct e1000_adapter *adapter);
  96. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  97. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  98. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  99. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  100. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  101. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  102. struct e1000_tx_ring *txdr);
  103. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  104. struct e1000_rx_ring *rxdr);
  105. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  106. struct e1000_tx_ring *tx_ring);
  107. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  108. struct e1000_rx_ring *rx_ring);
  109. void e1000_update_stats(struct e1000_adapter *adapter);
  110. /* Local Function Prototypes */
  111. static int e1000_init_module(void);
  112. static void e1000_exit_module(void);
  113. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  114. static void __devexit e1000_remove(struct pci_dev *pdev);
  115. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  116. #ifdef CONFIG_E1000_MQ
  117. static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
  118. #endif
  119. static int e1000_sw_init(struct e1000_adapter *adapter);
  120. static int e1000_open(struct net_device *netdev);
  121. static int e1000_close(struct net_device *netdev);
  122. static void e1000_configure_tx(struct e1000_adapter *adapter);
  123. static void e1000_configure_rx(struct e1000_adapter *adapter);
  124. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  125. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  126. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  127. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  128. struct e1000_tx_ring *tx_ring);
  129. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  130. struct e1000_rx_ring *rx_ring);
  131. static void e1000_set_multi(struct net_device *netdev);
  132. static void e1000_update_phy_info(unsigned long data);
  133. static void e1000_watchdog(unsigned long data);
  134. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  135. static void e1000_82547_tx_fifo_stall(unsigned long data);
  136. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  137. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  138. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  139. static int e1000_set_mac(struct net_device *netdev, void *p);
  140. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  141. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  142. struct e1000_tx_ring *tx_ring);
  143. #ifdef CONFIG_E1000_NAPI
  144. static int e1000_clean(struct net_device *poll_dev, int *budget);
  145. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  146. struct e1000_rx_ring *rx_ring,
  147. int *work_done, int work_to_do);
  148. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  149. struct e1000_rx_ring *rx_ring,
  150. int *work_done, int work_to_do);
  151. #else
  152. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  153. struct e1000_rx_ring *rx_ring);
  154. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  155. struct e1000_rx_ring *rx_ring);
  156. #endif
  157. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  158. struct e1000_rx_ring *rx_ring);
  159. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  160. struct e1000_rx_ring *rx_ring);
  161. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  162. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  163. int cmd);
  164. void e1000_set_ethtool_ops(struct net_device *netdev);
  165. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  166. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  167. static void e1000_tx_timeout(struct net_device *dev);
  168. static void e1000_tx_timeout_task(struct net_device *dev);
  169. static void e1000_smartspeed(struct e1000_adapter *adapter);
  170. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  171. struct sk_buff *skb);
  172. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  173. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  174. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  175. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  176. #ifdef CONFIG_PM
  177. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  178. static int e1000_resume(struct pci_dev *pdev);
  179. #endif
  180. #ifdef CONFIG_NET_POLL_CONTROLLER
  181. /* for netdump / net console */
  182. static void e1000_netpoll (struct net_device *netdev);
  183. #endif
  184. #ifdef CONFIG_E1000_MQ
  185. /* for multiple Rx queues */
  186. void e1000_rx_schedule(void *data);
  187. #endif
  188. /* Exported from other modules */
  189. extern void e1000_check_options(struct e1000_adapter *adapter);
  190. static struct pci_driver e1000_driver = {
  191. .name = e1000_driver_name,
  192. .id_table = e1000_pci_tbl,
  193. .probe = e1000_probe,
  194. .remove = __devexit_p(e1000_remove),
  195. /* Power Managment Hooks */
  196. #ifdef CONFIG_PM
  197. .suspend = e1000_suspend,
  198. .resume = e1000_resume
  199. #endif
  200. };
  201. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  202. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  203. MODULE_LICENSE("GPL");
  204. MODULE_VERSION(DRV_VERSION);
  205. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  206. module_param(debug, int, 0);
  207. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  208. /**
  209. * e1000_init_module - Driver Registration Routine
  210. *
  211. * e1000_init_module is the first routine called when the driver is
  212. * loaded. All it does is register with the PCI subsystem.
  213. **/
  214. static int __init
  215. e1000_init_module(void)
  216. {
  217. int ret;
  218. printk(KERN_INFO "%s - version %s\n",
  219. e1000_driver_string, e1000_driver_version);
  220. printk(KERN_INFO "%s\n", e1000_copyright);
  221. ret = pci_module_init(&e1000_driver);
  222. return ret;
  223. }
  224. module_init(e1000_init_module);
  225. /**
  226. * e1000_exit_module - Driver Exit Cleanup Routine
  227. *
  228. * e1000_exit_module is called just before the driver is removed
  229. * from memory.
  230. **/
  231. static void __exit
  232. e1000_exit_module(void)
  233. {
  234. pci_unregister_driver(&e1000_driver);
  235. }
  236. module_exit(e1000_exit_module);
  237. /**
  238. * e1000_irq_disable - Mask off interrupt generation on the NIC
  239. * @adapter: board private structure
  240. **/
  241. static inline void
  242. e1000_irq_disable(struct e1000_adapter *adapter)
  243. {
  244. atomic_inc(&adapter->irq_sem);
  245. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  246. E1000_WRITE_FLUSH(&adapter->hw);
  247. synchronize_irq(adapter->pdev->irq);
  248. }
  249. /**
  250. * e1000_irq_enable - Enable default interrupt generation settings
  251. * @adapter: board private structure
  252. **/
  253. static inline void
  254. e1000_irq_enable(struct e1000_adapter *adapter)
  255. {
  256. if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
  257. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  258. E1000_WRITE_FLUSH(&adapter->hw);
  259. }
  260. }
  261. static void
  262. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  263. {
  264. struct net_device *netdev = adapter->netdev;
  265. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  266. uint16_t old_vid = adapter->mng_vlan_id;
  267. if(adapter->vlgrp) {
  268. if(!adapter->vlgrp->vlan_devices[vid]) {
  269. if(adapter->hw.mng_cookie.status &
  270. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  271. e1000_vlan_rx_add_vid(netdev, vid);
  272. adapter->mng_vlan_id = vid;
  273. } else
  274. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  275. if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  276. (vid != old_vid) &&
  277. !adapter->vlgrp->vlan_devices[old_vid])
  278. e1000_vlan_rx_kill_vid(netdev, old_vid);
  279. }
  280. }
  281. }
  282. int
  283. e1000_up(struct e1000_adapter *adapter)
  284. {
  285. struct net_device *netdev = adapter->netdev;
  286. int i, err;
  287. /* hardware has been reset, we need to reload some things */
  288. /* Reset the PHY if it was previously powered down */
  289. if(adapter->hw.media_type == e1000_media_type_copper) {
  290. uint16_t mii_reg;
  291. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  292. if(mii_reg & MII_CR_POWER_DOWN)
  293. e1000_phy_reset(&adapter->hw);
  294. }
  295. e1000_set_multi(netdev);
  296. e1000_restore_vlan(adapter);
  297. e1000_configure_tx(adapter);
  298. e1000_setup_rctl(adapter);
  299. e1000_configure_rx(adapter);
  300. for (i = 0; i < adapter->num_queues; i++)
  301. adapter->alloc_rx_buf(adapter, &adapter->rx_ring[i]);
  302. #ifdef CONFIG_PCI_MSI
  303. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  304. adapter->have_msi = TRUE;
  305. if((err = pci_enable_msi(adapter->pdev))) {
  306. DPRINTK(PROBE, ERR,
  307. "Unable to allocate MSI interrupt Error: %d\n", err);
  308. adapter->have_msi = FALSE;
  309. }
  310. }
  311. #endif
  312. if((err = request_irq(adapter->pdev->irq, &e1000_intr,
  313. SA_SHIRQ | SA_SAMPLE_RANDOM,
  314. netdev->name, netdev))) {
  315. DPRINTK(PROBE, ERR,
  316. "Unable to allocate interrupt Error: %d\n", err);
  317. return err;
  318. }
  319. mod_timer(&adapter->watchdog_timer, jiffies);
  320. #ifdef CONFIG_E1000_NAPI
  321. netif_poll_enable(netdev);
  322. #endif
  323. e1000_irq_enable(adapter);
  324. return 0;
  325. }
  326. void
  327. e1000_down(struct e1000_adapter *adapter)
  328. {
  329. struct net_device *netdev = adapter->netdev;
  330. e1000_irq_disable(adapter);
  331. #ifdef CONFIG_E1000_MQ
  332. while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
  333. #endif
  334. free_irq(adapter->pdev->irq, netdev);
  335. #ifdef CONFIG_PCI_MSI
  336. if(adapter->hw.mac_type > e1000_82547_rev_2 &&
  337. adapter->have_msi == TRUE)
  338. pci_disable_msi(adapter->pdev);
  339. #endif
  340. del_timer_sync(&adapter->tx_fifo_stall_timer);
  341. del_timer_sync(&adapter->watchdog_timer);
  342. del_timer_sync(&adapter->phy_info_timer);
  343. #ifdef CONFIG_E1000_NAPI
  344. netif_poll_disable(netdev);
  345. #endif
  346. adapter->link_speed = 0;
  347. adapter->link_duplex = 0;
  348. netif_carrier_off(netdev);
  349. netif_stop_queue(netdev);
  350. e1000_reset(adapter);
  351. e1000_clean_all_tx_rings(adapter);
  352. e1000_clean_all_rx_rings(adapter);
  353. /* If WoL is not enabled and management mode is not IAMT
  354. * Power down the PHY so no link is implied when interface is down */
  355. if(!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  356. adapter->hw.media_type == e1000_media_type_copper &&
  357. !e1000_check_mng_mode(&adapter->hw) &&
  358. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN)) {
  359. uint16_t mii_reg;
  360. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  361. mii_reg |= MII_CR_POWER_DOWN;
  362. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  363. mdelay(1);
  364. }
  365. }
  366. void
  367. e1000_reset(struct e1000_adapter *adapter)
  368. {
  369. struct net_device *netdev = adapter->netdev;
  370. uint32_t pba, manc;
  371. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  372. uint16_t fc_low_water_mark = E1000_FC_LOW_DIFF;
  373. /* Repartition Pba for greater than 9k mtu
  374. * To take effect CTRL.RST is required.
  375. */
  376. switch (adapter->hw.mac_type) {
  377. case e1000_82547:
  378. case e1000_82547_rev_2:
  379. pba = E1000_PBA_30K;
  380. break;
  381. case e1000_82571:
  382. case e1000_82572:
  383. pba = E1000_PBA_38K;
  384. break;
  385. case e1000_82573:
  386. pba = E1000_PBA_12K;
  387. break;
  388. default:
  389. pba = E1000_PBA_48K;
  390. break;
  391. }
  392. if((adapter->hw.mac_type != e1000_82573) &&
  393. (adapter->rx_buffer_len > E1000_RXBUFFER_8192)) {
  394. pba -= 8; /* allocate more FIFO for Tx */
  395. /* send an XOFF when there is enough space in the
  396. * Rx FIFO to hold one extra full size Rx packet
  397. */
  398. fc_high_water_mark = netdev->mtu + ENET_HEADER_SIZE +
  399. ETHERNET_FCS_SIZE + 1;
  400. fc_low_water_mark = fc_high_water_mark + 8;
  401. }
  402. if(adapter->hw.mac_type == e1000_82547) {
  403. adapter->tx_fifo_head = 0;
  404. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  405. adapter->tx_fifo_size =
  406. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  407. atomic_set(&adapter->tx_fifo_stall, 0);
  408. }
  409. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  410. /* flow control settings */
  411. adapter->hw.fc_high_water = (pba << E1000_PBA_BYTES_SHIFT) -
  412. fc_high_water_mark;
  413. adapter->hw.fc_low_water = (pba << E1000_PBA_BYTES_SHIFT) -
  414. fc_low_water_mark;
  415. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  416. adapter->hw.fc_send_xon = 1;
  417. adapter->hw.fc = adapter->hw.original_fc;
  418. /* Allow time for pending master requests to run */
  419. e1000_reset_hw(&adapter->hw);
  420. if(adapter->hw.mac_type >= e1000_82544)
  421. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  422. if(e1000_init_hw(&adapter->hw))
  423. DPRINTK(PROBE, ERR, "Hardware Error\n");
  424. e1000_update_mng_vlan(adapter);
  425. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  426. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  427. e1000_reset_adaptive(&adapter->hw);
  428. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  429. if (adapter->en_mng_pt) {
  430. manc = E1000_READ_REG(&adapter->hw, MANC);
  431. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  432. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  433. }
  434. }
  435. /**
  436. * e1000_probe - Device Initialization Routine
  437. * @pdev: PCI device information struct
  438. * @ent: entry in e1000_pci_tbl
  439. *
  440. * Returns 0 on success, negative on failure
  441. *
  442. * e1000_probe initializes an adapter identified by a pci_dev structure.
  443. * The OS initialization, configuring of the adapter private structure,
  444. * and a hardware reset occur.
  445. **/
  446. static int __devinit
  447. e1000_probe(struct pci_dev *pdev,
  448. const struct pci_device_id *ent)
  449. {
  450. struct net_device *netdev;
  451. struct e1000_adapter *adapter;
  452. unsigned long mmio_start, mmio_len;
  453. uint32_t ctrl_ext;
  454. uint32_t swsm;
  455. static int cards_found = 0;
  456. int i, err, pci_using_dac;
  457. uint16_t eeprom_data;
  458. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  459. if((err = pci_enable_device(pdev)))
  460. return err;
  461. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  462. pci_using_dac = 1;
  463. } else {
  464. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  465. E1000_ERR("No usable DMA configuration, aborting\n");
  466. return err;
  467. }
  468. pci_using_dac = 0;
  469. }
  470. if((err = pci_request_regions(pdev, e1000_driver_name)))
  471. return err;
  472. pci_set_master(pdev);
  473. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  474. if(!netdev) {
  475. err = -ENOMEM;
  476. goto err_alloc_etherdev;
  477. }
  478. SET_MODULE_OWNER(netdev);
  479. SET_NETDEV_DEV(netdev, &pdev->dev);
  480. pci_set_drvdata(pdev, netdev);
  481. adapter = netdev_priv(netdev);
  482. adapter->netdev = netdev;
  483. adapter->pdev = pdev;
  484. adapter->hw.back = adapter;
  485. adapter->msg_enable = (1 << debug) - 1;
  486. mmio_start = pci_resource_start(pdev, BAR_0);
  487. mmio_len = pci_resource_len(pdev, BAR_0);
  488. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  489. if(!adapter->hw.hw_addr) {
  490. err = -EIO;
  491. goto err_ioremap;
  492. }
  493. for(i = BAR_1; i <= BAR_5; i++) {
  494. if(pci_resource_len(pdev, i) == 0)
  495. continue;
  496. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  497. adapter->hw.io_base = pci_resource_start(pdev, i);
  498. break;
  499. }
  500. }
  501. netdev->open = &e1000_open;
  502. netdev->stop = &e1000_close;
  503. netdev->hard_start_xmit = &e1000_xmit_frame;
  504. netdev->get_stats = &e1000_get_stats;
  505. netdev->set_multicast_list = &e1000_set_multi;
  506. netdev->set_mac_address = &e1000_set_mac;
  507. netdev->change_mtu = &e1000_change_mtu;
  508. netdev->do_ioctl = &e1000_ioctl;
  509. e1000_set_ethtool_ops(netdev);
  510. netdev->tx_timeout = &e1000_tx_timeout;
  511. netdev->watchdog_timeo = 5 * HZ;
  512. #ifdef CONFIG_E1000_NAPI
  513. netdev->poll = &e1000_clean;
  514. netdev->weight = 64;
  515. #endif
  516. netdev->vlan_rx_register = e1000_vlan_rx_register;
  517. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  518. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  519. #ifdef CONFIG_NET_POLL_CONTROLLER
  520. netdev->poll_controller = e1000_netpoll;
  521. #endif
  522. strcpy(netdev->name, pci_name(pdev));
  523. netdev->mem_start = mmio_start;
  524. netdev->mem_end = mmio_start + mmio_len;
  525. netdev->base_addr = adapter->hw.io_base;
  526. adapter->bd_number = cards_found;
  527. /* setup the private structure */
  528. if((err = e1000_sw_init(adapter)))
  529. goto err_sw_init;
  530. if((err = e1000_check_phy_reset_block(&adapter->hw)))
  531. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  532. if(adapter->hw.mac_type >= e1000_82543) {
  533. netdev->features = NETIF_F_SG |
  534. NETIF_F_HW_CSUM |
  535. NETIF_F_HW_VLAN_TX |
  536. NETIF_F_HW_VLAN_RX |
  537. NETIF_F_HW_VLAN_FILTER;
  538. }
  539. #ifdef NETIF_F_TSO
  540. if((adapter->hw.mac_type >= e1000_82544) &&
  541. (adapter->hw.mac_type != e1000_82547))
  542. netdev->features |= NETIF_F_TSO;
  543. #ifdef NETIF_F_TSO_IPV6
  544. if(adapter->hw.mac_type > e1000_82547_rev_2)
  545. netdev->features |= NETIF_F_TSO_IPV6;
  546. #endif
  547. #endif
  548. if(pci_using_dac)
  549. netdev->features |= NETIF_F_HIGHDMA;
  550. /* hard_start_xmit is safe against parallel locking */
  551. netdev->features |= NETIF_F_LLTX;
  552. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  553. /* before reading the EEPROM, reset the controller to
  554. * put the device in a known good starting state */
  555. e1000_reset_hw(&adapter->hw);
  556. /* make sure the EEPROM is good */
  557. if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  558. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  559. err = -EIO;
  560. goto err_eeprom;
  561. }
  562. /* copy the MAC address out of the EEPROM */
  563. if(e1000_read_mac_addr(&adapter->hw))
  564. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  565. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  566. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  567. if(!is_valid_ether_addr(netdev->perm_addr)) {
  568. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  569. err = -EIO;
  570. goto err_eeprom;
  571. }
  572. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  573. e1000_get_bus_info(&adapter->hw);
  574. init_timer(&adapter->tx_fifo_stall_timer);
  575. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  576. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  577. init_timer(&adapter->watchdog_timer);
  578. adapter->watchdog_timer.function = &e1000_watchdog;
  579. adapter->watchdog_timer.data = (unsigned long) adapter;
  580. INIT_WORK(&adapter->watchdog_task,
  581. (void (*)(void *))e1000_watchdog_task, adapter);
  582. init_timer(&adapter->phy_info_timer);
  583. adapter->phy_info_timer.function = &e1000_update_phy_info;
  584. adapter->phy_info_timer.data = (unsigned long) adapter;
  585. INIT_WORK(&adapter->tx_timeout_task,
  586. (void (*)(void *))e1000_tx_timeout_task, netdev);
  587. /* we're going to reset, so assume we have no link for now */
  588. netif_carrier_off(netdev);
  589. netif_stop_queue(netdev);
  590. e1000_check_options(adapter);
  591. /* Initial Wake on LAN setting
  592. * If APM wake is enabled in the EEPROM,
  593. * enable the ACPI Magic Packet filter
  594. */
  595. switch(adapter->hw.mac_type) {
  596. case e1000_82542_rev2_0:
  597. case e1000_82542_rev2_1:
  598. case e1000_82543:
  599. break;
  600. case e1000_82544:
  601. e1000_read_eeprom(&adapter->hw,
  602. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  603. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  604. break;
  605. case e1000_82546:
  606. case e1000_82546_rev_3:
  607. case e1000_82571:
  608. if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
  609. && (adapter->hw.media_type == e1000_media_type_copper)) {
  610. e1000_read_eeprom(&adapter->hw,
  611. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  612. break;
  613. }
  614. /* Fall Through */
  615. default:
  616. e1000_read_eeprom(&adapter->hw,
  617. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  618. break;
  619. }
  620. if(eeprom_data & eeprom_apme_mask)
  621. adapter->wol |= E1000_WUFC_MAG;
  622. /* reset the hardware with the new settings */
  623. e1000_reset(adapter);
  624. /* Let firmware know the driver has taken over */
  625. switch(adapter->hw.mac_type) {
  626. case e1000_82571:
  627. case e1000_82572:
  628. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  629. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  630. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  631. break;
  632. case e1000_82573:
  633. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  634. E1000_WRITE_REG(&adapter->hw, SWSM,
  635. swsm | E1000_SWSM_DRV_LOAD);
  636. break;
  637. default:
  638. break;
  639. }
  640. strcpy(netdev->name, "eth%d");
  641. if((err = register_netdev(netdev)))
  642. goto err_register;
  643. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  644. cards_found++;
  645. return 0;
  646. err_register:
  647. err_sw_init:
  648. err_eeprom:
  649. iounmap(adapter->hw.hw_addr);
  650. err_ioremap:
  651. free_netdev(netdev);
  652. err_alloc_etherdev:
  653. pci_release_regions(pdev);
  654. return err;
  655. }
  656. /**
  657. * e1000_remove - Device Removal Routine
  658. * @pdev: PCI device information struct
  659. *
  660. * e1000_remove is called by the PCI subsystem to alert the driver
  661. * that it should release a PCI device. The could be caused by a
  662. * Hot-Plug event, or because the driver is going to be removed from
  663. * memory.
  664. **/
  665. static void __devexit
  666. e1000_remove(struct pci_dev *pdev)
  667. {
  668. struct net_device *netdev = pci_get_drvdata(pdev);
  669. struct e1000_adapter *adapter = netdev_priv(netdev);
  670. uint32_t ctrl_ext;
  671. uint32_t manc, swsm;
  672. #ifdef CONFIG_E1000_NAPI
  673. int i;
  674. #endif
  675. flush_scheduled_work();
  676. if(adapter->hw.mac_type >= e1000_82540 &&
  677. adapter->hw.media_type == e1000_media_type_copper) {
  678. manc = E1000_READ_REG(&adapter->hw, MANC);
  679. if(manc & E1000_MANC_SMBUS_EN) {
  680. manc |= E1000_MANC_ARP_EN;
  681. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  682. }
  683. }
  684. switch(adapter->hw.mac_type) {
  685. case e1000_82571:
  686. case e1000_82572:
  687. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  688. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  689. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  690. break;
  691. case e1000_82573:
  692. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  693. E1000_WRITE_REG(&adapter->hw, SWSM,
  694. swsm & ~E1000_SWSM_DRV_LOAD);
  695. break;
  696. default:
  697. break;
  698. }
  699. unregister_netdev(netdev);
  700. #ifdef CONFIG_E1000_NAPI
  701. for (i = 0; i < adapter->num_queues; i++)
  702. __dev_put(&adapter->polling_netdev[i]);
  703. #endif
  704. if(!e1000_check_phy_reset_block(&adapter->hw))
  705. e1000_phy_hw_reset(&adapter->hw);
  706. kfree(adapter->tx_ring);
  707. kfree(adapter->rx_ring);
  708. #ifdef CONFIG_E1000_NAPI
  709. kfree(adapter->polling_netdev);
  710. #endif
  711. iounmap(adapter->hw.hw_addr);
  712. pci_release_regions(pdev);
  713. #ifdef CONFIG_E1000_MQ
  714. free_percpu(adapter->cpu_netdev);
  715. free_percpu(adapter->cpu_tx_ring);
  716. #endif
  717. free_netdev(netdev);
  718. pci_disable_device(pdev);
  719. }
  720. /**
  721. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  722. * @adapter: board private structure to initialize
  723. *
  724. * e1000_sw_init initializes the Adapter private data structure.
  725. * Fields are initialized based on PCI device information and
  726. * OS network device settings (MTU size).
  727. **/
  728. static int __devinit
  729. e1000_sw_init(struct e1000_adapter *adapter)
  730. {
  731. struct e1000_hw *hw = &adapter->hw;
  732. struct net_device *netdev = adapter->netdev;
  733. struct pci_dev *pdev = adapter->pdev;
  734. #ifdef CONFIG_E1000_NAPI
  735. int i;
  736. #endif
  737. /* PCI config space info */
  738. hw->vendor_id = pdev->vendor;
  739. hw->device_id = pdev->device;
  740. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  741. hw->subsystem_id = pdev->subsystem_device;
  742. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  743. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  744. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  745. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  746. hw->max_frame_size = netdev->mtu +
  747. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  748. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  749. /* identify the MAC */
  750. if(e1000_set_mac_type(hw)) {
  751. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  752. return -EIO;
  753. }
  754. /* initialize eeprom parameters */
  755. if(e1000_init_eeprom_params(hw)) {
  756. E1000_ERR("EEPROM initialization failed\n");
  757. return -EIO;
  758. }
  759. switch(hw->mac_type) {
  760. default:
  761. break;
  762. case e1000_82541:
  763. case e1000_82547:
  764. case e1000_82541_rev_2:
  765. case e1000_82547_rev_2:
  766. hw->phy_init_script = 1;
  767. break;
  768. }
  769. e1000_set_media_type(hw);
  770. hw->wait_autoneg_complete = FALSE;
  771. hw->tbi_compatibility_en = TRUE;
  772. hw->adaptive_ifs = TRUE;
  773. /* Copper options */
  774. if(hw->media_type == e1000_media_type_copper) {
  775. hw->mdix = AUTO_ALL_MODES;
  776. hw->disable_polarity_correction = FALSE;
  777. hw->master_slave = E1000_MASTER_SLAVE;
  778. }
  779. #ifdef CONFIG_E1000_MQ
  780. /* Number of supported queues */
  781. switch (hw->mac_type) {
  782. case e1000_82571:
  783. case e1000_82572:
  784. adapter->num_queues = 2;
  785. break;
  786. default:
  787. adapter->num_queues = 1;
  788. break;
  789. }
  790. adapter->num_queues = min(adapter->num_queues, num_online_cpus());
  791. #else
  792. adapter->num_queues = 1;
  793. #endif
  794. if (e1000_alloc_queues(adapter)) {
  795. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  796. return -ENOMEM;
  797. }
  798. #ifdef CONFIG_E1000_NAPI
  799. for (i = 0; i < adapter->num_queues; i++) {
  800. adapter->polling_netdev[i].priv = adapter;
  801. adapter->polling_netdev[i].poll = &e1000_clean;
  802. adapter->polling_netdev[i].weight = 64;
  803. dev_hold(&adapter->polling_netdev[i]);
  804. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  805. }
  806. #endif
  807. #ifdef CONFIG_E1000_MQ
  808. e1000_setup_queue_mapping(adapter);
  809. #endif
  810. atomic_set(&adapter->irq_sem, 1);
  811. spin_lock_init(&adapter->stats_lock);
  812. return 0;
  813. }
  814. /**
  815. * e1000_alloc_queues - Allocate memory for all rings
  816. * @adapter: board private structure to initialize
  817. *
  818. * We allocate one ring per queue at run-time since we don't know the
  819. * number of queues at compile-time. The polling_netdev array is
  820. * intended for Multiqueue, but should work fine with a single queue.
  821. **/
  822. static int __devinit
  823. e1000_alloc_queues(struct e1000_adapter *adapter)
  824. {
  825. int size;
  826. size = sizeof(struct e1000_tx_ring) * adapter->num_queues;
  827. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  828. if (!adapter->tx_ring)
  829. return -ENOMEM;
  830. memset(adapter->tx_ring, 0, size);
  831. size = sizeof(struct e1000_rx_ring) * adapter->num_queues;
  832. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  833. if (!adapter->rx_ring) {
  834. kfree(adapter->tx_ring);
  835. return -ENOMEM;
  836. }
  837. memset(adapter->rx_ring, 0, size);
  838. #ifdef CONFIG_E1000_NAPI
  839. size = sizeof(struct net_device) * adapter->num_queues;
  840. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  841. if (!adapter->polling_netdev) {
  842. kfree(adapter->tx_ring);
  843. kfree(adapter->rx_ring);
  844. return -ENOMEM;
  845. }
  846. memset(adapter->polling_netdev, 0, size);
  847. #endif
  848. return E1000_SUCCESS;
  849. }
  850. #ifdef CONFIG_E1000_MQ
  851. static void __devinit
  852. e1000_setup_queue_mapping(struct e1000_adapter *adapter)
  853. {
  854. int i, cpu;
  855. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  856. adapter->rx_sched_call_data.info = adapter->netdev;
  857. cpus_clear(adapter->rx_sched_call_data.cpumask);
  858. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  859. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  860. lock_cpu_hotplug();
  861. i = 0;
  862. for_each_online_cpu(cpu) {
  863. *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_queues];
  864. /* This is incomplete because we'd like to assign separate
  865. * physical cpus to these netdev polling structures and
  866. * avoid saturating a subset of cpus.
  867. */
  868. if (i < adapter->num_queues) {
  869. *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
  870. adapter->cpu_for_queue[i] = cpu;
  871. } else
  872. *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
  873. i++;
  874. }
  875. unlock_cpu_hotplug();
  876. }
  877. #endif
  878. /**
  879. * e1000_open - Called when a network interface is made active
  880. * @netdev: network interface device structure
  881. *
  882. * Returns 0 on success, negative value on failure
  883. *
  884. * The open entry point is called when a network interface is made
  885. * active by the system (IFF_UP). At this point all resources needed
  886. * for transmit and receive operations are allocated, the interrupt
  887. * handler is registered with the OS, the watchdog timer is started,
  888. * and the stack is notified that the interface is ready.
  889. **/
  890. static int
  891. e1000_open(struct net_device *netdev)
  892. {
  893. struct e1000_adapter *adapter = netdev_priv(netdev);
  894. int err;
  895. /* allocate transmit descriptors */
  896. if ((err = e1000_setup_all_tx_resources(adapter)))
  897. goto err_setup_tx;
  898. /* allocate receive descriptors */
  899. if ((err = e1000_setup_all_rx_resources(adapter)))
  900. goto err_setup_rx;
  901. if((err = e1000_up(adapter)))
  902. goto err_up;
  903. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  904. if((adapter->hw.mng_cookie.status &
  905. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  906. e1000_update_mng_vlan(adapter);
  907. }
  908. return E1000_SUCCESS;
  909. err_up:
  910. e1000_free_all_rx_resources(adapter);
  911. err_setup_rx:
  912. e1000_free_all_tx_resources(adapter);
  913. err_setup_tx:
  914. e1000_reset(adapter);
  915. return err;
  916. }
  917. /**
  918. * e1000_close - Disables a network interface
  919. * @netdev: network interface device structure
  920. *
  921. * Returns 0, this is not allowed to fail
  922. *
  923. * The close entry point is called when an interface is de-activated
  924. * by the OS. The hardware is still under the drivers control, but
  925. * needs to be disabled. A global MAC reset is issued to stop the
  926. * hardware, and all transmit and receive resources are freed.
  927. **/
  928. static int
  929. e1000_close(struct net_device *netdev)
  930. {
  931. struct e1000_adapter *adapter = netdev_priv(netdev);
  932. e1000_down(adapter);
  933. e1000_free_all_tx_resources(adapter);
  934. e1000_free_all_rx_resources(adapter);
  935. if((adapter->hw.mng_cookie.status &
  936. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  937. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  938. }
  939. return 0;
  940. }
  941. /**
  942. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  943. * @adapter: address of board private structure
  944. * @start: address of beginning of memory
  945. * @len: length of memory
  946. **/
  947. static inline boolean_t
  948. e1000_check_64k_bound(struct e1000_adapter *adapter,
  949. void *start, unsigned long len)
  950. {
  951. unsigned long begin = (unsigned long) start;
  952. unsigned long end = begin + len;
  953. /* First rev 82545 and 82546 need to not allow any memory
  954. * write location to cross 64k boundary due to errata 23 */
  955. if (adapter->hw.mac_type == e1000_82545 ||
  956. adapter->hw.mac_type == e1000_82546) {
  957. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  958. }
  959. return TRUE;
  960. }
  961. /**
  962. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  963. * @adapter: board private structure
  964. * @txdr: tx descriptor ring (for a specific queue) to setup
  965. *
  966. * Return 0 on success, negative on failure
  967. **/
  968. static int
  969. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  970. struct e1000_tx_ring *txdr)
  971. {
  972. struct pci_dev *pdev = adapter->pdev;
  973. int size;
  974. size = sizeof(struct e1000_buffer) * txdr->count;
  975. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  976. if(!txdr->buffer_info) {
  977. DPRINTK(PROBE, ERR,
  978. "Unable to allocate memory for the transmit descriptor ring\n");
  979. return -ENOMEM;
  980. }
  981. memset(txdr->buffer_info, 0, size);
  982. /* round up to nearest 4K */
  983. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  984. E1000_ROUNDUP(txdr->size, 4096);
  985. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  986. if(!txdr->desc) {
  987. setup_tx_desc_die:
  988. vfree(txdr->buffer_info);
  989. DPRINTK(PROBE, ERR,
  990. "Unable to allocate memory for the transmit descriptor ring\n");
  991. return -ENOMEM;
  992. }
  993. /* Fix for errata 23, can't cross 64kB boundary */
  994. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  995. void *olddesc = txdr->desc;
  996. dma_addr_t olddma = txdr->dma;
  997. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  998. "at %p\n", txdr->size, txdr->desc);
  999. /* Try again, without freeing the previous */
  1000. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1001. if(!txdr->desc) {
  1002. /* Failed allocation, critical failure */
  1003. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1004. goto setup_tx_desc_die;
  1005. }
  1006. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1007. /* give up */
  1008. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1009. txdr->dma);
  1010. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1011. DPRINTK(PROBE, ERR,
  1012. "Unable to allocate aligned memory "
  1013. "for the transmit descriptor ring\n");
  1014. vfree(txdr->buffer_info);
  1015. return -ENOMEM;
  1016. } else {
  1017. /* Free old allocation, new allocation was successful */
  1018. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1019. }
  1020. }
  1021. memset(txdr->desc, 0, txdr->size);
  1022. txdr->next_to_use = 0;
  1023. txdr->next_to_clean = 0;
  1024. spin_lock_init(&txdr->tx_lock);
  1025. return 0;
  1026. }
  1027. /**
  1028. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1029. * (Descriptors) for all queues
  1030. * @adapter: board private structure
  1031. *
  1032. * If this function returns with an error, then it's possible one or
  1033. * more of the rings is populated (while the rest are not). It is the
  1034. * callers duty to clean those orphaned rings.
  1035. *
  1036. * Return 0 on success, negative on failure
  1037. **/
  1038. int
  1039. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1040. {
  1041. int i, err = 0;
  1042. for (i = 0; i < adapter->num_queues; i++) {
  1043. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1044. if (err) {
  1045. DPRINTK(PROBE, ERR,
  1046. "Allocation for Tx Queue %u failed\n", i);
  1047. break;
  1048. }
  1049. }
  1050. return err;
  1051. }
  1052. /**
  1053. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1054. * @adapter: board private structure
  1055. *
  1056. * Configure the Tx unit of the MAC after a reset.
  1057. **/
  1058. static void
  1059. e1000_configure_tx(struct e1000_adapter *adapter)
  1060. {
  1061. uint64_t tdba;
  1062. struct e1000_hw *hw = &adapter->hw;
  1063. uint32_t tdlen, tctl, tipg, tarc;
  1064. /* Setup the HW Tx Head and Tail descriptor pointers */
  1065. switch (adapter->num_queues) {
  1066. case 2:
  1067. tdba = adapter->tx_ring[1].dma;
  1068. tdlen = adapter->tx_ring[1].count *
  1069. sizeof(struct e1000_tx_desc);
  1070. E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
  1071. E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
  1072. E1000_WRITE_REG(hw, TDLEN1, tdlen);
  1073. E1000_WRITE_REG(hw, TDH1, 0);
  1074. E1000_WRITE_REG(hw, TDT1, 0);
  1075. adapter->tx_ring[1].tdh = E1000_TDH1;
  1076. adapter->tx_ring[1].tdt = E1000_TDT1;
  1077. /* Fall Through */
  1078. case 1:
  1079. default:
  1080. tdba = adapter->tx_ring[0].dma;
  1081. tdlen = adapter->tx_ring[0].count *
  1082. sizeof(struct e1000_tx_desc);
  1083. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1084. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1085. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1086. E1000_WRITE_REG(hw, TDH, 0);
  1087. E1000_WRITE_REG(hw, TDT, 0);
  1088. adapter->tx_ring[0].tdh = E1000_TDH;
  1089. adapter->tx_ring[0].tdt = E1000_TDT;
  1090. break;
  1091. }
  1092. /* Set the default values for the Tx Inter Packet Gap timer */
  1093. switch (hw->mac_type) {
  1094. case e1000_82542_rev2_0:
  1095. case e1000_82542_rev2_1:
  1096. tipg = DEFAULT_82542_TIPG_IPGT;
  1097. tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
  1098. tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
  1099. break;
  1100. default:
  1101. if (hw->media_type == e1000_media_type_fiber ||
  1102. hw->media_type == e1000_media_type_internal_serdes)
  1103. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1104. else
  1105. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1106. tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
  1107. tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
  1108. }
  1109. E1000_WRITE_REG(hw, TIPG, tipg);
  1110. /* Set the Tx Interrupt Delay register */
  1111. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1112. if (hw->mac_type >= e1000_82540)
  1113. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1114. /* Program the Transmit Control Register */
  1115. tctl = E1000_READ_REG(hw, TCTL);
  1116. tctl &= ~E1000_TCTL_CT;
  1117. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1118. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1119. E1000_WRITE_REG(hw, TCTL, tctl);
  1120. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1121. tarc = E1000_READ_REG(hw, TARC0);
  1122. tarc |= ((1 << 25) | (1 << 21));
  1123. E1000_WRITE_REG(hw, TARC0, tarc);
  1124. tarc = E1000_READ_REG(hw, TARC1);
  1125. tarc |= (1 << 25);
  1126. if (tctl & E1000_TCTL_MULR)
  1127. tarc &= ~(1 << 28);
  1128. else
  1129. tarc |= (1 << 28);
  1130. E1000_WRITE_REG(hw, TARC1, tarc);
  1131. }
  1132. e1000_config_collision_dist(hw);
  1133. /* Setup Transmit Descriptor Settings for eop descriptor */
  1134. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1135. E1000_TXD_CMD_IFCS;
  1136. if (hw->mac_type < e1000_82543)
  1137. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1138. else
  1139. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1140. /* Cache if we're 82544 running in PCI-X because we'll
  1141. * need this to apply a workaround later in the send path. */
  1142. if (hw->mac_type == e1000_82544 &&
  1143. hw->bus_type == e1000_bus_type_pcix)
  1144. adapter->pcix_82544 = 1;
  1145. }
  1146. /**
  1147. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1148. * @adapter: board private structure
  1149. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1150. *
  1151. * Returns 0 on success, negative on failure
  1152. **/
  1153. static int
  1154. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1155. struct e1000_rx_ring *rxdr)
  1156. {
  1157. struct pci_dev *pdev = adapter->pdev;
  1158. int size, desc_len;
  1159. size = sizeof(struct e1000_buffer) * rxdr->count;
  1160. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1161. if (!rxdr->buffer_info) {
  1162. DPRINTK(PROBE, ERR,
  1163. "Unable to allocate memory for the receive descriptor ring\n");
  1164. return -ENOMEM;
  1165. }
  1166. memset(rxdr->buffer_info, 0, size);
  1167. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1168. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1169. if(!rxdr->ps_page) {
  1170. vfree(rxdr->buffer_info);
  1171. DPRINTK(PROBE, ERR,
  1172. "Unable to allocate memory for the receive descriptor ring\n");
  1173. return -ENOMEM;
  1174. }
  1175. memset(rxdr->ps_page, 0, size);
  1176. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1177. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1178. if(!rxdr->ps_page_dma) {
  1179. vfree(rxdr->buffer_info);
  1180. kfree(rxdr->ps_page);
  1181. DPRINTK(PROBE, ERR,
  1182. "Unable to allocate memory for the receive descriptor ring\n");
  1183. return -ENOMEM;
  1184. }
  1185. memset(rxdr->ps_page_dma, 0, size);
  1186. if(adapter->hw.mac_type <= e1000_82547_rev_2)
  1187. desc_len = sizeof(struct e1000_rx_desc);
  1188. else
  1189. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1190. /* Round up to nearest 4K */
  1191. rxdr->size = rxdr->count * desc_len;
  1192. E1000_ROUNDUP(rxdr->size, 4096);
  1193. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1194. if (!rxdr->desc) {
  1195. DPRINTK(PROBE, ERR,
  1196. "Unable to allocate memory for the receive descriptor ring\n");
  1197. setup_rx_desc_die:
  1198. vfree(rxdr->buffer_info);
  1199. kfree(rxdr->ps_page);
  1200. kfree(rxdr->ps_page_dma);
  1201. return -ENOMEM;
  1202. }
  1203. /* Fix for errata 23, can't cross 64kB boundary */
  1204. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1205. void *olddesc = rxdr->desc;
  1206. dma_addr_t olddma = rxdr->dma;
  1207. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1208. "at %p\n", rxdr->size, rxdr->desc);
  1209. /* Try again, without freeing the previous */
  1210. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1211. /* Failed allocation, critical failure */
  1212. if (!rxdr->desc) {
  1213. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1214. DPRINTK(PROBE, ERR,
  1215. "Unable to allocate memory "
  1216. "for the receive descriptor ring\n");
  1217. goto setup_rx_desc_die;
  1218. }
  1219. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1220. /* give up */
  1221. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1222. rxdr->dma);
  1223. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1224. DPRINTK(PROBE, ERR,
  1225. "Unable to allocate aligned memory "
  1226. "for the receive descriptor ring\n");
  1227. goto setup_rx_desc_die;
  1228. } else {
  1229. /* Free old allocation, new allocation was successful */
  1230. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1231. }
  1232. }
  1233. memset(rxdr->desc, 0, rxdr->size);
  1234. rxdr->next_to_clean = 0;
  1235. rxdr->next_to_use = 0;
  1236. return 0;
  1237. }
  1238. /**
  1239. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1240. * (Descriptors) for all queues
  1241. * @adapter: board private structure
  1242. *
  1243. * If this function returns with an error, then it's possible one or
  1244. * more of the rings is populated (while the rest are not). It is the
  1245. * callers duty to clean those orphaned rings.
  1246. *
  1247. * Return 0 on success, negative on failure
  1248. **/
  1249. int
  1250. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1251. {
  1252. int i, err = 0;
  1253. for (i = 0; i < adapter->num_queues; i++) {
  1254. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1255. if (err) {
  1256. DPRINTK(PROBE, ERR,
  1257. "Allocation for Rx Queue %u failed\n", i);
  1258. break;
  1259. }
  1260. }
  1261. return err;
  1262. }
  1263. /**
  1264. * e1000_setup_rctl - configure the receive control registers
  1265. * @adapter: Board private structure
  1266. **/
  1267. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1268. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1269. static void
  1270. e1000_setup_rctl(struct e1000_adapter *adapter)
  1271. {
  1272. uint32_t rctl, rfctl;
  1273. uint32_t psrctl = 0;
  1274. #ifdef CONFIG_E1000_PACKET_SPLIT
  1275. uint32_t pages = 0;
  1276. #endif
  1277. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1278. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1279. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1280. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1281. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1282. if(adapter->hw.tbi_compatibility_on == 1)
  1283. rctl |= E1000_RCTL_SBP;
  1284. else
  1285. rctl &= ~E1000_RCTL_SBP;
  1286. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1287. rctl &= ~E1000_RCTL_LPE;
  1288. else
  1289. rctl |= E1000_RCTL_LPE;
  1290. /* Setup buffer sizes */
  1291. if(adapter->hw.mac_type >= e1000_82571) {
  1292. /* We can now specify buffers in 1K increments.
  1293. * BSIZE and BSEX are ignored in this case. */
  1294. rctl |= adapter->rx_buffer_len << 0x11;
  1295. } else {
  1296. rctl &= ~E1000_RCTL_SZ_4096;
  1297. rctl |= E1000_RCTL_BSEX;
  1298. switch (adapter->rx_buffer_len) {
  1299. case E1000_RXBUFFER_2048:
  1300. default:
  1301. rctl |= E1000_RCTL_SZ_2048;
  1302. rctl &= ~E1000_RCTL_BSEX;
  1303. break;
  1304. case E1000_RXBUFFER_4096:
  1305. rctl |= E1000_RCTL_SZ_4096;
  1306. break;
  1307. case E1000_RXBUFFER_8192:
  1308. rctl |= E1000_RCTL_SZ_8192;
  1309. break;
  1310. case E1000_RXBUFFER_16384:
  1311. rctl |= E1000_RCTL_SZ_16384;
  1312. break;
  1313. }
  1314. }
  1315. #ifdef CONFIG_E1000_PACKET_SPLIT
  1316. /* 82571 and greater support packet-split where the protocol
  1317. * header is placed in skb->data and the packet data is
  1318. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1319. * In the case of a non-split, skb->data is linearly filled,
  1320. * followed by the page buffers. Therefore, skb->data is
  1321. * sized to hold the largest protocol header.
  1322. */
  1323. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1324. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1325. PAGE_SIZE <= 16384)
  1326. adapter->rx_ps_pages = pages;
  1327. else
  1328. adapter->rx_ps_pages = 0;
  1329. #endif
  1330. if (adapter->rx_ps_pages) {
  1331. /* Configure extra packet-split registers */
  1332. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1333. rfctl |= E1000_RFCTL_EXTEN;
  1334. /* disable IPv6 packet split support */
  1335. rfctl |= E1000_RFCTL_IPV6_DIS;
  1336. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1337. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1338. psrctl |= adapter->rx_ps_bsize0 >>
  1339. E1000_PSRCTL_BSIZE0_SHIFT;
  1340. switch (adapter->rx_ps_pages) {
  1341. case 3:
  1342. psrctl |= PAGE_SIZE <<
  1343. E1000_PSRCTL_BSIZE3_SHIFT;
  1344. case 2:
  1345. psrctl |= PAGE_SIZE <<
  1346. E1000_PSRCTL_BSIZE2_SHIFT;
  1347. case 1:
  1348. psrctl |= PAGE_SIZE >>
  1349. E1000_PSRCTL_BSIZE1_SHIFT;
  1350. break;
  1351. }
  1352. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1353. }
  1354. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1355. }
  1356. /**
  1357. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1358. * @adapter: board private structure
  1359. *
  1360. * Configure the Rx unit of the MAC after a reset.
  1361. **/
  1362. static void
  1363. e1000_configure_rx(struct e1000_adapter *adapter)
  1364. {
  1365. uint64_t rdba;
  1366. struct e1000_hw *hw = &adapter->hw;
  1367. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1368. #ifdef CONFIG_E1000_MQ
  1369. uint32_t reta, mrqc;
  1370. int i;
  1371. #endif
  1372. if (adapter->rx_ps_pages) {
  1373. rdlen = adapter->rx_ring[0].count *
  1374. sizeof(union e1000_rx_desc_packet_split);
  1375. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1376. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1377. } else {
  1378. rdlen = adapter->rx_ring[0].count *
  1379. sizeof(struct e1000_rx_desc);
  1380. adapter->clean_rx = e1000_clean_rx_irq;
  1381. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1382. }
  1383. /* disable receives while setting up the descriptors */
  1384. rctl = E1000_READ_REG(hw, RCTL);
  1385. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1386. /* set the Receive Delay Timer Register */
  1387. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1388. if (hw->mac_type >= e1000_82540) {
  1389. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1390. if(adapter->itr > 1)
  1391. E1000_WRITE_REG(hw, ITR,
  1392. 1000000000 / (adapter->itr * 256));
  1393. }
  1394. if (hw->mac_type >= e1000_82571) {
  1395. /* Reset delay timers after every interrupt */
  1396. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1397. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1398. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1399. E1000_WRITE_FLUSH(hw);
  1400. }
  1401. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1402. * the Base and Length of the Rx Descriptor Ring */
  1403. switch (adapter->num_queues) {
  1404. #ifdef CONFIG_E1000_MQ
  1405. case 2:
  1406. rdba = adapter->rx_ring[1].dma;
  1407. E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
  1408. E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
  1409. E1000_WRITE_REG(hw, RDLEN1, rdlen);
  1410. E1000_WRITE_REG(hw, RDH1, 0);
  1411. E1000_WRITE_REG(hw, RDT1, 0);
  1412. adapter->rx_ring[1].rdh = E1000_RDH1;
  1413. adapter->rx_ring[1].rdt = E1000_RDT1;
  1414. /* Fall Through */
  1415. #endif
  1416. case 1:
  1417. default:
  1418. rdba = adapter->rx_ring[0].dma;
  1419. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1420. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1421. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1422. E1000_WRITE_REG(hw, RDH, 0);
  1423. E1000_WRITE_REG(hw, RDT, 0);
  1424. adapter->rx_ring[0].rdh = E1000_RDH;
  1425. adapter->rx_ring[0].rdt = E1000_RDT;
  1426. break;
  1427. }
  1428. #ifdef CONFIG_E1000_MQ
  1429. if (adapter->num_queues > 1) {
  1430. uint32_t random[10];
  1431. get_random_bytes(&random[0], 40);
  1432. if (hw->mac_type <= e1000_82572) {
  1433. E1000_WRITE_REG(hw, RSSIR, 0);
  1434. E1000_WRITE_REG(hw, RSSIM, 0);
  1435. }
  1436. switch (adapter->num_queues) {
  1437. case 2:
  1438. default:
  1439. reta = 0x00800080;
  1440. mrqc = E1000_MRQC_ENABLE_RSS_2Q;
  1441. break;
  1442. }
  1443. /* Fill out redirection table */
  1444. for (i = 0; i < 32; i++)
  1445. E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
  1446. /* Fill out hash function seeds */
  1447. for (i = 0; i < 10; i++)
  1448. E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
  1449. mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
  1450. E1000_MRQC_RSS_FIELD_IPV4_TCP);
  1451. E1000_WRITE_REG(hw, MRQC, mrqc);
  1452. }
  1453. /* Multiqueue and packet checksumming are mutually exclusive. */
  1454. if (hw->mac_type >= e1000_82571) {
  1455. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1456. rxcsum |= E1000_RXCSUM_PCSD;
  1457. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1458. }
  1459. #else
  1460. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1461. if (hw->mac_type >= e1000_82543) {
  1462. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1463. if(adapter->rx_csum == TRUE) {
  1464. rxcsum |= E1000_RXCSUM_TUOFL;
  1465. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1466. * Must be used in conjunction with packet-split. */
  1467. if ((hw->mac_type >= e1000_82571) &&
  1468. (adapter->rx_ps_pages)) {
  1469. rxcsum |= E1000_RXCSUM_IPPCSE;
  1470. }
  1471. } else {
  1472. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1473. /* don't need to clear IPPCSE as it defaults to 0 */
  1474. }
  1475. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1476. }
  1477. #endif /* CONFIG_E1000_MQ */
  1478. if (hw->mac_type == e1000_82573)
  1479. E1000_WRITE_REG(hw, ERT, 0x0100);
  1480. /* Enable Receives */
  1481. E1000_WRITE_REG(hw, RCTL, rctl);
  1482. }
  1483. /**
  1484. * e1000_free_tx_resources - Free Tx Resources per Queue
  1485. * @adapter: board private structure
  1486. * @tx_ring: Tx descriptor ring for a specific queue
  1487. *
  1488. * Free all transmit software resources
  1489. **/
  1490. static void
  1491. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1492. struct e1000_tx_ring *tx_ring)
  1493. {
  1494. struct pci_dev *pdev = adapter->pdev;
  1495. e1000_clean_tx_ring(adapter, tx_ring);
  1496. vfree(tx_ring->buffer_info);
  1497. tx_ring->buffer_info = NULL;
  1498. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1499. tx_ring->desc = NULL;
  1500. }
  1501. /**
  1502. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1503. * @adapter: board private structure
  1504. *
  1505. * Free all transmit software resources
  1506. **/
  1507. void
  1508. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1509. {
  1510. int i;
  1511. for (i = 0; i < adapter->num_queues; i++)
  1512. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1513. }
  1514. static inline void
  1515. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1516. struct e1000_buffer *buffer_info)
  1517. {
  1518. if(buffer_info->dma) {
  1519. pci_unmap_page(adapter->pdev,
  1520. buffer_info->dma,
  1521. buffer_info->length,
  1522. PCI_DMA_TODEVICE);
  1523. buffer_info->dma = 0;
  1524. }
  1525. if(buffer_info->skb) {
  1526. dev_kfree_skb_any(buffer_info->skb);
  1527. buffer_info->skb = NULL;
  1528. }
  1529. }
  1530. /**
  1531. * e1000_clean_tx_ring - Free Tx Buffers
  1532. * @adapter: board private structure
  1533. * @tx_ring: ring to be cleaned
  1534. **/
  1535. static void
  1536. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1537. struct e1000_tx_ring *tx_ring)
  1538. {
  1539. struct e1000_buffer *buffer_info;
  1540. unsigned long size;
  1541. unsigned int i;
  1542. /* Free all the Tx ring sk_buffs */
  1543. for(i = 0; i < tx_ring->count; i++) {
  1544. buffer_info = &tx_ring->buffer_info[i];
  1545. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1546. }
  1547. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1548. memset(tx_ring->buffer_info, 0, size);
  1549. /* Zero out the descriptor ring */
  1550. memset(tx_ring->desc, 0, tx_ring->size);
  1551. tx_ring->next_to_use = 0;
  1552. tx_ring->next_to_clean = 0;
  1553. tx_ring->last_tx_tso = 0;
  1554. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1555. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1556. }
  1557. /**
  1558. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1559. * @adapter: board private structure
  1560. **/
  1561. static void
  1562. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1563. {
  1564. int i;
  1565. for (i = 0; i < adapter->num_queues; i++)
  1566. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1567. }
  1568. /**
  1569. * e1000_free_rx_resources - Free Rx Resources
  1570. * @adapter: board private structure
  1571. * @rx_ring: ring to clean the resources from
  1572. *
  1573. * Free all receive software resources
  1574. **/
  1575. static void
  1576. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1577. struct e1000_rx_ring *rx_ring)
  1578. {
  1579. struct pci_dev *pdev = adapter->pdev;
  1580. e1000_clean_rx_ring(adapter, rx_ring);
  1581. vfree(rx_ring->buffer_info);
  1582. rx_ring->buffer_info = NULL;
  1583. kfree(rx_ring->ps_page);
  1584. rx_ring->ps_page = NULL;
  1585. kfree(rx_ring->ps_page_dma);
  1586. rx_ring->ps_page_dma = NULL;
  1587. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1588. rx_ring->desc = NULL;
  1589. }
  1590. /**
  1591. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1592. * @adapter: board private structure
  1593. *
  1594. * Free all receive software resources
  1595. **/
  1596. void
  1597. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1598. {
  1599. int i;
  1600. for (i = 0; i < adapter->num_queues; i++)
  1601. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1602. }
  1603. /**
  1604. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1605. * @adapter: board private structure
  1606. * @rx_ring: ring to free buffers from
  1607. **/
  1608. static void
  1609. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1610. struct e1000_rx_ring *rx_ring)
  1611. {
  1612. struct e1000_buffer *buffer_info;
  1613. struct e1000_ps_page *ps_page;
  1614. struct e1000_ps_page_dma *ps_page_dma;
  1615. struct pci_dev *pdev = adapter->pdev;
  1616. unsigned long size;
  1617. unsigned int i, j;
  1618. /* Free all the Rx ring sk_buffs */
  1619. for(i = 0; i < rx_ring->count; i++) {
  1620. buffer_info = &rx_ring->buffer_info[i];
  1621. if(buffer_info->skb) {
  1622. ps_page = &rx_ring->ps_page[i];
  1623. ps_page_dma = &rx_ring->ps_page_dma[i];
  1624. pci_unmap_single(pdev,
  1625. buffer_info->dma,
  1626. buffer_info->length,
  1627. PCI_DMA_FROMDEVICE);
  1628. dev_kfree_skb(buffer_info->skb);
  1629. buffer_info->skb = NULL;
  1630. for(j = 0; j < adapter->rx_ps_pages; j++) {
  1631. if(!ps_page->ps_page[j]) break;
  1632. pci_unmap_single(pdev,
  1633. ps_page_dma->ps_page_dma[j],
  1634. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1635. ps_page_dma->ps_page_dma[j] = 0;
  1636. put_page(ps_page->ps_page[j]);
  1637. ps_page->ps_page[j] = NULL;
  1638. }
  1639. }
  1640. }
  1641. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1642. memset(rx_ring->buffer_info, 0, size);
  1643. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1644. memset(rx_ring->ps_page, 0, size);
  1645. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1646. memset(rx_ring->ps_page_dma, 0, size);
  1647. /* Zero out the descriptor ring */
  1648. memset(rx_ring->desc, 0, rx_ring->size);
  1649. rx_ring->next_to_clean = 0;
  1650. rx_ring->next_to_use = 0;
  1651. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1652. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1653. }
  1654. /**
  1655. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1656. * @adapter: board private structure
  1657. **/
  1658. static void
  1659. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1660. {
  1661. int i;
  1662. for (i = 0; i < adapter->num_queues; i++)
  1663. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1664. }
  1665. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1666. * and memory write and invalidate disabled for certain operations
  1667. */
  1668. static void
  1669. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1670. {
  1671. struct net_device *netdev = adapter->netdev;
  1672. uint32_t rctl;
  1673. e1000_pci_clear_mwi(&adapter->hw);
  1674. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1675. rctl |= E1000_RCTL_RST;
  1676. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1677. E1000_WRITE_FLUSH(&adapter->hw);
  1678. mdelay(5);
  1679. if(netif_running(netdev))
  1680. e1000_clean_all_rx_rings(adapter);
  1681. }
  1682. static void
  1683. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1684. {
  1685. struct net_device *netdev = adapter->netdev;
  1686. uint32_t rctl;
  1687. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1688. rctl &= ~E1000_RCTL_RST;
  1689. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1690. E1000_WRITE_FLUSH(&adapter->hw);
  1691. mdelay(5);
  1692. if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1693. e1000_pci_set_mwi(&adapter->hw);
  1694. if(netif_running(netdev)) {
  1695. e1000_configure_rx(adapter);
  1696. e1000_alloc_rx_buffers(adapter, &adapter->rx_ring[0]);
  1697. }
  1698. }
  1699. /**
  1700. * e1000_set_mac - Change the Ethernet Address of the NIC
  1701. * @netdev: network interface device structure
  1702. * @p: pointer to an address structure
  1703. *
  1704. * Returns 0 on success, negative on failure
  1705. **/
  1706. static int
  1707. e1000_set_mac(struct net_device *netdev, void *p)
  1708. {
  1709. struct e1000_adapter *adapter = netdev_priv(netdev);
  1710. struct sockaddr *addr = p;
  1711. if(!is_valid_ether_addr(addr->sa_data))
  1712. return -EADDRNOTAVAIL;
  1713. /* 82542 2.0 needs to be in reset to write receive address registers */
  1714. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1715. e1000_enter_82542_rst(adapter);
  1716. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1717. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1718. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1719. /* With 82571 controllers, LAA may be overwritten (with the default)
  1720. * due to controller reset from the other port. */
  1721. if (adapter->hw.mac_type == e1000_82571) {
  1722. /* activate the work around */
  1723. adapter->hw.laa_is_present = 1;
  1724. /* Hold a copy of the LAA in RAR[14] This is done so that
  1725. * between the time RAR[0] gets clobbered and the time it
  1726. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1727. * of the RARs and no incoming packets directed to this port
  1728. * are dropped. Eventaully the LAA will be in RAR[0] and
  1729. * RAR[14] */
  1730. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1731. E1000_RAR_ENTRIES - 1);
  1732. }
  1733. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1734. e1000_leave_82542_rst(adapter);
  1735. return 0;
  1736. }
  1737. /**
  1738. * e1000_set_multi - Multicast and Promiscuous mode set
  1739. * @netdev: network interface device structure
  1740. *
  1741. * The set_multi entry point is called whenever the multicast address
  1742. * list or the network interface flags are updated. This routine is
  1743. * responsible for configuring the hardware for proper multicast,
  1744. * promiscuous mode, and all-multi behavior.
  1745. **/
  1746. static void
  1747. e1000_set_multi(struct net_device *netdev)
  1748. {
  1749. struct e1000_adapter *adapter = netdev_priv(netdev);
  1750. struct e1000_hw *hw = &adapter->hw;
  1751. struct dev_mc_list *mc_ptr;
  1752. uint32_t rctl;
  1753. uint32_t hash_value;
  1754. int i, rar_entries = E1000_RAR_ENTRIES;
  1755. /* reserve RAR[14] for LAA over-write work-around */
  1756. if (adapter->hw.mac_type == e1000_82571)
  1757. rar_entries--;
  1758. /* Check for Promiscuous and All Multicast modes */
  1759. rctl = E1000_READ_REG(hw, RCTL);
  1760. if(netdev->flags & IFF_PROMISC) {
  1761. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1762. } else if(netdev->flags & IFF_ALLMULTI) {
  1763. rctl |= E1000_RCTL_MPE;
  1764. rctl &= ~E1000_RCTL_UPE;
  1765. } else {
  1766. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1767. }
  1768. E1000_WRITE_REG(hw, RCTL, rctl);
  1769. /* 82542 2.0 needs to be in reset to write receive address registers */
  1770. if(hw->mac_type == e1000_82542_rev2_0)
  1771. e1000_enter_82542_rst(adapter);
  1772. /* load the first 14 multicast address into the exact filters 1-14
  1773. * RAR 0 is used for the station MAC adddress
  1774. * if there are not 14 addresses, go ahead and clear the filters
  1775. * -- with 82571 controllers only 0-13 entries are filled here
  1776. */
  1777. mc_ptr = netdev->mc_list;
  1778. for(i = 1; i < rar_entries; i++) {
  1779. if (mc_ptr) {
  1780. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1781. mc_ptr = mc_ptr->next;
  1782. } else {
  1783. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1784. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1785. }
  1786. }
  1787. /* clear the old settings from the multicast hash table */
  1788. for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1789. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1790. /* load any remaining addresses into the hash table */
  1791. for(; mc_ptr; mc_ptr = mc_ptr->next) {
  1792. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1793. e1000_mta_set(hw, hash_value);
  1794. }
  1795. if(hw->mac_type == e1000_82542_rev2_0)
  1796. e1000_leave_82542_rst(adapter);
  1797. }
  1798. /* Need to wait a few seconds after link up to get diagnostic information from
  1799. * the phy */
  1800. static void
  1801. e1000_update_phy_info(unsigned long data)
  1802. {
  1803. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1804. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1805. }
  1806. /**
  1807. * e1000_82547_tx_fifo_stall - Timer Call-back
  1808. * @data: pointer to adapter cast into an unsigned long
  1809. **/
  1810. static void
  1811. e1000_82547_tx_fifo_stall(unsigned long data)
  1812. {
  1813. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1814. struct net_device *netdev = adapter->netdev;
  1815. uint32_t tctl;
  1816. if(atomic_read(&adapter->tx_fifo_stall)) {
  1817. if((E1000_READ_REG(&adapter->hw, TDT) ==
  1818. E1000_READ_REG(&adapter->hw, TDH)) &&
  1819. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1820. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1821. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1822. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1823. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1824. E1000_WRITE_REG(&adapter->hw, TCTL,
  1825. tctl & ~E1000_TCTL_EN);
  1826. E1000_WRITE_REG(&adapter->hw, TDFT,
  1827. adapter->tx_head_addr);
  1828. E1000_WRITE_REG(&adapter->hw, TDFH,
  1829. adapter->tx_head_addr);
  1830. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1831. adapter->tx_head_addr);
  1832. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1833. adapter->tx_head_addr);
  1834. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1835. E1000_WRITE_FLUSH(&adapter->hw);
  1836. adapter->tx_fifo_head = 0;
  1837. atomic_set(&adapter->tx_fifo_stall, 0);
  1838. netif_wake_queue(netdev);
  1839. } else {
  1840. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1841. }
  1842. }
  1843. }
  1844. /**
  1845. * e1000_watchdog - Timer Call-back
  1846. * @data: pointer to adapter cast into an unsigned long
  1847. **/
  1848. static void
  1849. e1000_watchdog(unsigned long data)
  1850. {
  1851. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1852. /* Do the rest outside of interrupt context */
  1853. schedule_work(&adapter->watchdog_task);
  1854. }
  1855. static void
  1856. e1000_watchdog_task(struct e1000_adapter *adapter)
  1857. {
  1858. struct net_device *netdev = adapter->netdev;
  1859. struct e1000_tx_ring *txdr = &adapter->tx_ring[0];
  1860. uint32_t link;
  1861. e1000_check_for_link(&adapter->hw);
  1862. if (adapter->hw.mac_type == e1000_82573) {
  1863. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1864. if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1865. e1000_update_mng_vlan(adapter);
  1866. }
  1867. if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1868. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1869. link = !adapter->hw.serdes_link_down;
  1870. else
  1871. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1872. if(link) {
  1873. if(!netif_carrier_ok(netdev)) {
  1874. e1000_get_speed_and_duplex(&adapter->hw,
  1875. &adapter->link_speed,
  1876. &adapter->link_duplex);
  1877. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1878. adapter->link_speed,
  1879. adapter->link_duplex == FULL_DUPLEX ?
  1880. "Full Duplex" : "Half Duplex");
  1881. netif_carrier_on(netdev);
  1882. netif_wake_queue(netdev);
  1883. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1884. adapter->smartspeed = 0;
  1885. }
  1886. } else {
  1887. if(netif_carrier_ok(netdev)) {
  1888. adapter->link_speed = 0;
  1889. adapter->link_duplex = 0;
  1890. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1891. netif_carrier_off(netdev);
  1892. netif_stop_queue(netdev);
  1893. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1894. }
  1895. e1000_smartspeed(adapter);
  1896. }
  1897. e1000_update_stats(adapter);
  1898. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1899. adapter->tpt_old = adapter->stats.tpt;
  1900. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1901. adapter->colc_old = adapter->stats.colc;
  1902. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1903. adapter->gorcl_old = adapter->stats.gorcl;
  1904. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  1905. adapter->gotcl_old = adapter->stats.gotcl;
  1906. e1000_update_adaptive(&adapter->hw);
  1907. if (adapter->num_queues == 1 && !netif_carrier_ok(netdev)) {
  1908. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  1909. /* We've lost link, so the controller stops DMA,
  1910. * but we've got queued Tx work that's never going
  1911. * to get done, so reset controller to flush Tx.
  1912. * (Do the reset outside of interrupt context). */
  1913. schedule_work(&adapter->tx_timeout_task);
  1914. }
  1915. }
  1916. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  1917. if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  1918. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  1919. * asymmetrical Tx or Rx gets ITR=8000; everyone
  1920. * else is between 2000-8000. */
  1921. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  1922. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  1923. adapter->gotcl - adapter->gorcl :
  1924. adapter->gorcl - adapter->gotcl) / 10000;
  1925. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  1926. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  1927. }
  1928. /* Cause software interrupt to ensure rx ring is cleaned */
  1929. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  1930. /* Force detection of hung controller every watchdog period */
  1931. adapter->detect_tx_hung = TRUE;
  1932. /* With 82571 controllers, LAA may be overwritten due to controller
  1933. * reset from the other port. Set the appropriate LAA in RAR[0] */
  1934. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  1935. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1936. /* Reset the timer */
  1937. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1938. }
  1939. #define E1000_TX_FLAGS_CSUM 0x00000001
  1940. #define E1000_TX_FLAGS_VLAN 0x00000002
  1941. #define E1000_TX_FLAGS_TSO 0x00000004
  1942. #define E1000_TX_FLAGS_IPV4 0x00000008
  1943. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  1944. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  1945. static inline int
  1946. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  1947. struct sk_buff *skb)
  1948. {
  1949. #ifdef NETIF_F_TSO
  1950. struct e1000_context_desc *context_desc;
  1951. unsigned int i;
  1952. uint32_t cmd_length = 0;
  1953. uint16_t ipcse = 0, tucse, mss;
  1954. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  1955. int err;
  1956. if(skb_shinfo(skb)->tso_size) {
  1957. if (skb_header_cloned(skb)) {
  1958. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1959. if (err)
  1960. return err;
  1961. }
  1962. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  1963. mss = skb_shinfo(skb)->tso_size;
  1964. if(skb->protocol == ntohs(ETH_P_IP)) {
  1965. skb->nh.iph->tot_len = 0;
  1966. skb->nh.iph->check = 0;
  1967. skb->h.th->check =
  1968. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  1969. skb->nh.iph->daddr,
  1970. 0,
  1971. IPPROTO_TCP,
  1972. 0);
  1973. cmd_length = E1000_TXD_CMD_IP;
  1974. ipcse = skb->h.raw - skb->data - 1;
  1975. #ifdef NETIF_F_TSO_IPV6
  1976. } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
  1977. skb->nh.ipv6h->payload_len = 0;
  1978. skb->h.th->check =
  1979. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  1980. &skb->nh.ipv6h->daddr,
  1981. 0,
  1982. IPPROTO_TCP,
  1983. 0);
  1984. ipcse = 0;
  1985. #endif
  1986. }
  1987. ipcss = skb->nh.raw - skb->data;
  1988. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  1989. tucss = skb->h.raw - skb->data;
  1990. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  1991. tucse = 0;
  1992. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  1993. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  1994. i = tx_ring->next_to_use;
  1995. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  1996. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  1997. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  1998. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  1999. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2000. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2001. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2002. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2003. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2004. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2005. if (++i == tx_ring->count) i = 0;
  2006. tx_ring->next_to_use = i;
  2007. return 1;
  2008. }
  2009. #endif
  2010. return 0;
  2011. }
  2012. static inline boolean_t
  2013. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2014. struct sk_buff *skb)
  2015. {
  2016. struct e1000_context_desc *context_desc;
  2017. unsigned int i;
  2018. uint8_t css;
  2019. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  2020. css = skb->h.raw - skb->data;
  2021. i = tx_ring->next_to_use;
  2022. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2023. context_desc->upper_setup.tcp_fields.tucss = css;
  2024. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2025. context_desc->upper_setup.tcp_fields.tucse = 0;
  2026. context_desc->tcp_seg_setup.data = 0;
  2027. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2028. if (unlikely(++i == tx_ring->count)) i = 0;
  2029. tx_ring->next_to_use = i;
  2030. return TRUE;
  2031. }
  2032. return FALSE;
  2033. }
  2034. #define E1000_MAX_TXD_PWR 12
  2035. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2036. static inline int
  2037. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2038. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2039. unsigned int nr_frags, unsigned int mss)
  2040. {
  2041. struct e1000_buffer *buffer_info;
  2042. unsigned int len = skb->len;
  2043. unsigned int offset = 0, size, count = 0, i;
  2044. unsigned int f;
  2045. len -= skb->data_len;
  2046. i = tx_ring->next_to_use;
  2047. while(len) {
  2048. buffer_info = &tx_ring->buffer_info[i];
  2049. size = min(len, max_per_txd);
  2050. #ifdef NETIF_F_TSO
  2051. /* Workaround for Controller erratum --
  2052. * descriptor for non-tso packet in a linear SKB that follows a
  2053. * tso gets written back prematurely before the data is fully
  2054. * DMAd to the controller */
  2055. if (!skb->data_len && tx_ring->last_tx_tso &&
  2056. !skb_shinfo(skb)->tso_size) {
  2057. tx_ring->last_tx_tso = 0;
  2058. size -= 4;
  2059. }
  2060. /* Workaround for premature desc write-backs
  2061. * in TSO mode. Append 4-byte sentinel desc */
  2062. if(unlikely(mss && !nr_frags && size == len && size > 8))
  2063. size -= 4;
  2064. #endif
  2065. /* work-around for errata 10 and it applies
  2066. * to all controllers in PCI-X mode
  2067. * The fix is to make sure that the first descriptor of a
  2068. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2069. */
  2070. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2071. (size > 2015) && count == 0))
  2072. size = 2015;
  2073. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2074. * terminating buffers within evenly-aligned dwords. */
  2075. if(unlikely(adapter->pcix_82544 &&
  2076. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2077. size > 4))
  2078. size -= 4;
  2079. buffer_info->length = size;
  2080. buffer_info->dma =
  2081. pci_map_single(adapter->pdev,
  2082. skb->data + offset,
  2083. size,
  2084. PCI_DMA_TODEVICE);
  2085. buffer_info->time_stamp = jiffies;
  2086. len -= size;
  2087. offset += size;
  2088. count++;
  2089. if(unlikely(++i == tx_ring->count)) i = 0;
  2090. }
  2091. for(f = 0; f < nr_frags; f++) {
  2092. struct skb_frag_struct *frag;
  2093. frag = &skb_shinfo(skb)->frags[f];
  2094. len = frag->size;
  2095. offset = frag->page_offset;
  2096. while(len) {
  2097. buffer_info = &tx_ring->buffer_info[i];
  2098. size = min(len, max_per_txd);
  2099. #ifdef NETIF_F_TSO
  2100. /* Workaround for premature desc write-backs
  2101. * in TSO mode. Append 4-byte sentinel desc */
  2102. if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2103. size -= 4;
  2104. #endif
  2105. /* Workaround for potential 82544 hang in PCI-X.
  2106. * Avoid terminating buffers within evenly-aligned
  2107. * dwords. */
  2108. if(unlikely(adapter->pcix_82544 &&
  2109. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2110. size > 4))
  2111. size -= 4;
  2112. buffer_info->length = size;
  2113. buffer_info->dma =
  2114. pci_map_page(adapter->pdev,
  2115. frag->page,
  2116. offset,
  2117. size,
  2118. PCI_DMA_TODEVICE);
  2119. buffer_info->time_stamp = jiffies;
  2120. len -= size;
  2121. offset += size;
  2122. count++;
  2123. if(unlikely(++i == tx_ring->count)) i = 0;
  2124. }
  2125. }
  2126. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2127. tx_ring->buffer_info[i].skb = skb;
  2128. tx_ring->buffer_info[first].next_to_watch = i;
  2129. return count;
  2130. }
  2131. static inline void
  2132. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2133. int tx_flags, int count)
  2134. {
  2135. struct e1000_tx_desc *tx_desc = NULL;
  2136. struct e1000_buffer *buffer_info;
  2137. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2138. unsigned int i;
  2139. if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2140. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2141. E1000_TXD_CMD_TSE;
  2142. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2143. if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2144. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2145. }
  2146. if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2147. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2148. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2149. }
  2150. if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2151. txd_lower |= E1000_TXD_CMD_VLE;
  2152. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2153. }
  2154. i = tx_ring->next_to_use;
  2155. while(count--) {
  2156. buffer_info = &tx_ring->buffer_info[i];
  2157. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2158. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2159. tx_desc->lower.data =
  2160. cpu_to_le32(txd_lower | buffer_info->length);
  2161. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2162. if(unlikely(++i == tx_ring->count)) i = 0;
  2163. }
  2164. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2165. /* Force memory writes to complete before letting h/w
  2166. * know there are new descriptors to fetch. (Only
  2167. * applicable for weak-ordered memory model archs,
  2168. * such as IA-64). */
  2169. wmb();
  2170. tx_ring->next_to_use = i;
  2171. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2172. }
  2173. /**
  2174. * 82547 workaround to avoid controller hang in half-duplex environment.
  2175. * The workaround is to avoid queuing a large packet that would span
  2176. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2177. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2178. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2179. * to the beginning of the Tx FIFO.
  2180. **/
  2181. #define E1000_FIFO_HDR 0x10
  2182. #define E1000_82547_PAD_LEN 0x3E0
  2183. static inline int
  2184. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2185. {
  2186. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2187. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2188. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2189. if(adapter->link_duplex != HALF_DUPLEX)
  2190. goto no_fifo_stall_required;
  2191. if(atomic_read(&adapter->tx_fifo_stall))
  2192. return 1;
  2193. if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2194. atomic_set(&adapter->tx_fifo_stall, 1);
  2195. return 1;
  2196. }
  2197. no_fifo_stall_required:
  2198. adapter->tx_fifo_head += skb_fifo_len;
  2199. if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2200. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2201. return 0;
  2202. }
  2203. #define MINIMUM_DHCP_PACKET_SIZE 282
  2204. static inline int
  2205. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2206. {
  2207. struct e1000_hw *hw = &adapter->hw;
  2208. uint16_t length, offset;
  2209. if(vlan_tx_tag_present(skb)) {
  2210. if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2211. ( adapter->hw.mng_cookie.status &
  2212. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2213. return 0;
  2214. }
  2215. if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  2216. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2217. if((htons(ETH_P_IP) == eth->h_proto)) {
  2218. const struct iphdr *ip =
  2219. (struct iphdr *)((uint8_t *)skb->data+14);
  2220. if(IPPROTO_UDP == ip->protocol) {
  2221. struct udphdr *udp =
  2222. (struct udphdr *)((uint8_t *)ip +
  2223. (ip->ihl << 2));
  2224. if(ntohs(udp->dest) == 67) {
  2225. offset = (uint8_t *)udp + 8 - skb->data;
  2226. length = skb->len - offset;
  2227. return e1000_mng_write_dhcp_info(hw,
  2228. (uint8_t *)udp + 8,
  2229. length);
  2230. }
  2231. }
  2232. }
  2233. }
  2234. return 0;
  2235. }
  2236. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2237. static int
  2238. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2239. {
  2240. struct e1000_adapter *adapter = netdev_priv(netdev);
  2241. struct e1000_tx_ring *tx_ring;
  2242. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2243. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2244. unsigned int tx_flags = 0;
  2245. unsigned int len = skb->len;
  2246. unsigned long flags;
  2247. unsigned int nr_frags = 0;
  2248. unsigned int mss = 0;
  2249. int count = 0;
  2250. int tso;
  2251. unsigned int f;
  2252. len -= skb->data_len;
  2253. #ifdef CONFIG_E1000_MQ
  2254. tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2255. #else
  2256. tx_ring = adapter->tx_ring;
  2257. #endif
  2258. if (unlikely(skb->len <= 0)) {
  2259. dev_kfree_skb_any(skb);
  2260. return NETDEV_TX_OK;
  2261. }
  2262. #ifdef NETIF_F_TSO
  2263. mss = skb_shinfo(skb)->tso_size;
  2264. /* The controller does a simple calculation to
  2265. * make sure there is enough room in the FIFO before
  2266. * initiating the DMA for each buffer. The calc is:
  2267. * 4 = ceil(buffer len/mss). To make sure we don't
  2268. * overrun the FIFO, adjust the max buffer len if mss
  2269. * drops. */
  2270. if(mss) {
  2271. max_per_txd = min(mss << 2, max_per_txd);
  2272. max_txd_pwr = fls(max_per_txd) - 1;
  2273. }
  2274. if((mss) || (skb->ip_summed == CHECKSUM_HW))
  2275. count++;
  2276. count++;
  2277. #else
  2278. if(skb->ip_summed == CHECKSUM_HW)
  2279. count++;
  2280. #endif
  2281. #ifdef NETIF_F_TSO
  2282. /* Controller Erratum workaround */
  2283. if (!skb->data_len && tx_ring->last_tx_tso &&
  2284. !skb_shinfo(skb)->tso_size)
  2285. count++;
  2286. #endif
  2287. count += TXD_USE_COUNT(len, max_txd_pwr);
  2288. if(adapter->pcix_82544)
  2289. count++;
  2290. /* work-around for errata 10 and it applies to all controllers
  2291. * in PCI-X mode, so add one more descriptor to the count
  2292. */
  2293. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2294. (len > 2015)))
  2295. count++;
  2296. nr_frags = skb_shinfo(skb)->nr_frags;
  2297. for(f = 0; f < nr_frags; f++)
  2298. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2299. max_txd_pwr);
  2300. if(adapter->pcix_82544)
  2301. count += nr_frags;
  2302. #ifdef NETIF_F_TSO
  2303. /* TSO Workaround for 82571/2 Controllers -- if skb->data
  2304. * points to just header, pull a few bytes of payload from
  2305. * frags into skb->data */
  2306. if (skb_shinfo(skb)->tso_size) {
  2307. uint8_t hdr_len;
  2308. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2309. if (skb->data_len && (hdr_len < (skb->len - skb->data_len)) &&
  2310. (adapter->hw.mac_type == e1000_82571 ||
  2311. adapter->hw.mac_type == e1000_82572)) {
  2312. unsigned int pull_size;
  2313. pull_size = min((unsigned int)4, skb->data_len);
  2314. if (!__pskb_pull_tail(skb, pull_size)) {
  2315. printk(KERN_ERR "__pskb_pull_tail failed.\n");
  2316. dev_kfree_skb_any(skb);
  2317. return -EFAULT;
  2318. }
  2319. }
  2320. }
  2321. #endif
  2322. if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2323. e1000_transfer_dhcp_info(adapter, skb);
  2324. local_irq_save(flags);
  2325. if (!spin_trylock(&tx_ring->tx_lock)) {
  2326. /* Collision - tell upper layer to requeue */
  2327. local_irq_restore(flags);
  2328. return NETDEV_TX_LOCKED;
  2329. }
  2330. /* need: count + 2 desc gap to keep tail from touching
  2331. * head, otherwise try next time */
  2332. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2333. netif_stop_queue(netdev);
  2334. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2335. return NETDEV_TX_BUSY;
  2336. }
  2337. if(unlikely(adapter->hw.mac_type == e1000_82547)) {
  2338. if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2339. netif_stop_queue(netdev);
  2340. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2341. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2342. return NETDEV_TX_BUSY;
  2343. }
  2344. }
  2345. if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2346. tx_flags |= E1000_TX_FLAGS_VLAN;
  2347. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2348. }
  2349. first = tx_ring->next_to_use;
  2350. tso = e1000_tso(adapter, tx_ring, skb);
  2351. if (tso < 0) {
  2352. dev_kfree_skb_any(skb);
  2353. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2354. return NETDEV_TX_OK;
  2355. }
  2356. if (likely(tso)) {
  2357. tx_ring->last_tx_tso = 1;
  2358. tx_flags |= E1000_TX_FLAGS_TSO;
  2359. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2360. tx_flags |= E1000_TX_FLAGS_CSUM;
  2361. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2362. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2363. * no longer assume, we must. */
  2364. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2365. tx_flags |= E1000_TX_FLAGS_IPV4;
  2366. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2367. e1000_tx_map(adapter, tx_ring, skb, first,
  2368. max_per_txd, nr_frags, mss));
  2369. netdev->trans_start = jiffies;
  2370. /* Make sure there is space in the ring for the next send. */
  2371. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2372. netif_stop_queue(netdev);
  2373. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2374. return NETDEV_TX_OK;
  2375. }
  2376. /**
  2377. * e1000_tx_timeout - Respond to a Tx Hang
  2378. * @netdev: network interface device structure
  2379. **/
  2380. static void
  2381. e1000_tx_timeout(struct net_device *netdev)
  2382. {
  2383. struct e1000_adapter *adapter = netdev_priv(netdev);
  2384. /* Do the reset outside of interrupt context */
  2385. schedule_work(&adapter->tx_timeout_task);
  2386. }
  2387. static void
  2388. e1000_tx_timeout_task(struct net_device *netdev)
  2389. {
  2390. struct e1000_adapter *adapter = netdev_priv(netdev);
  2391. e1000_down(adapter);
  2392. e1000_up(adapter);
  2393. }
  2394. /**
  2395. * e1000_get_stats - Get System Network Statistics
  2396. * @netdev: network interface device structure
  2397. *
  2398. * Returns the address of the device statistics structure.
  2399. * The statistics are actually updated from the timer callback.
  2400. **/
  2401. static struct net_device_stats *
  2402. e1000_get_stats(struct net_device *netdev)
  2403. {
  2404. struct e1000_adapter *adapter = netdev_priv(netdev);
  2405. e1000_update_stats(adapter);
  2406. return &adapter->net_stats;
  2407. }
  2408. /**
  2409. * e1000_change_mtu - Change the Maximum Transfer Unit
  2410. * @netdev: network interface device structure
  2411. * @new_mtu: new value for maximum frame size
  2412. *
  2413. * Returns 0 on success, negative on failure
  2414. **/
  2415. static int
  2416. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2417. {
  2418. struct e1000_adapter *adapter = netdev_priv(netdev);
  2419. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2420. if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2421. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2422. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2423. return -EINVAL;
  2424. }
  2425. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2426. /* might want this to be bigger enum check... */
  2427. /* 82571 controllers limit jumbo frame size to 10500 bytes */
  2428. if ((adapter->hw.mac_type == e1000_82571 ||
  2429. adapter->hw.mac_type == e1000_82572) &&
  2430. max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2431. DPRINTK(PROBE, ERR, "MTU > 9216 bytes not supported "
  2432. "on 82571 and 82572 controllers.\n");
  2433. return -EINVAL;
  2434. }
  2435. if(adapter->hw.mac_type == e1000_82573 &&
  2436. max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2437. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2438. "on 82573\n");
  2439. return -EINVAL;
  2440. }
  2441. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  2442. adapter->rx_buffer_len = max_frame;
  2443. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2444. } else {
  2445. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2446. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2447. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2448. "on 82542\n");
  2449. return -EINVAL;
  2450. } else {
  2451. if(max_frame <= E1000_RXBUFFER_2048) {
  2452. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2453. } else if(max_frame <= E1000_RXBUFFER_4096) {
  2454. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2455. } else if(max_frame <= E1000_RXBUFFER_8192) {
  2456. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2457. } else if(max_frame <= E1000_RXBUFFER_16384) {
  2458. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2459. }
  2460. }
  2461. }
  2462. netdev->mtu = new_mtu;
  2463. if(netif_running(netdev)) {
  2464. e1000_down(adapter);
  2465. e1000_up(adapter);
  2466. }
  2467. adapter->hw.max_frame_size = max_frame;
  2468. return 0;
  2469. }
  2470. /**
  2471. * e1000_update_stats - Update the board statistics counters
  2472. * @adapter: board private structure
  2473. **/
  2474. void
  2475. e1000_update_stats(struct e1000_adapter *adapter)
  2476. {
  2477. struct e1000_hw *hw = &adapter->hw;
  2478. unsigned long flags;
  2479. uint16_t phy_tmp;
  2480. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2481. spin_lock_irqsave(&adapter->stats_lock, flags);
  2482. /* these counters are modified from e1000_adjust_tbi_stats,
  2483. * called from the interrupt context, so they must only
  2484. * be written while holding adapter->stats_lock
  2485. */
  2486. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2487. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2488. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2489. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2490. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2491. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2492. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2493. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2494. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2495. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2496. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2497. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2498. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2499. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2500. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2501. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2502. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2503. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2504. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2505. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2506. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2507. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2508. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2509. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2510. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2511. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2512. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2513. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2514. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2515. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2516. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2517. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2518. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2519. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2520. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2521. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2522. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2523. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2524. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2525. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2526. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2527. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2528. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2529. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2530. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2531. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2532. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2533. /* used for adaptive IFS */
  2534. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2535. adapter->stats.tpt += hw->tx_packet_delta;
  2536. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2537. adapter->stats.colc += hw->collision_delta;
  2538. if(hw->mac_type >= e1000_82543) {
  2539. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2540. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2541. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2542. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2543. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2544. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2545. }
  2546. if(hw->mac_type > e1000_82547_rev_2) {
  2547. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2548. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2549. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2550. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2551. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2552. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2553. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2554. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2555. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2556. }
  2557. /* Fill out the OS statistics structure */
  2558. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2559. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2560. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2561. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2562. adapter->net_stats.multicast = adapter->stats.mprc;
  2563. adapter->net_stats.collisions = adapter->stats.colc;
  2564. /* Rx Errors */
  2565. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2566. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2567. adapter->stats.rlec + adapter->stats.mpc +
  2568. adapter->stats.cexterr;
  2569. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2570. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2571. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2572. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  2573. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2574. /* Tx Errors */
  2575. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2576. adapter->stats.latecol;
  2577. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2578. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2579. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2580. /* Tx Dropped needs to be maintained elsewhere */
  2581. /* Phy Stats */
  2582. if(hw->media_type == e1000_media_type_copper) {
  2583. if((adapter->link_speed == SPEED_1000) &&
  2584. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2585. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2586. adapter->phy_stats.idle_errors += phy_tmp;
  2587. }
  2588. if((hw->mac_type <= e1000_82546) &&
  2589. (hw->phy_type == e1000_phy_m88) &&
  2590. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2591. adapter->phy_stats.receive_errors += phy_tmp;
  2592. }
  2593. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2594. }
  2595. #ifdef CONFIG_E1000_MQ
  2596. void
  2597. e1000_rx_schedule(void *data)
  2598. {
  2599. struct net_device *poll_dev, *netdev = data;
  2600. struct e1000_adapter *adapter = netdev->priv;
  2601. int this_cpu = get_cpu();
  2602. poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
  2603. if (poll_dev == NULL) {
  2604. put_cpu();
  2605. return;
  2606. }
  2607. if (likely(netif_rx_schedule_prep(poll_dev)))
  2608. __netif_rx_schedule(poll_dev);
  2609. else
  2610. e1000_irq_enable(adapter);
  2611. put_cpu();
  2612. }
  2613. #endif
  2614. /**
  2615. * e1000_intr - Interrupt Handler
  2616. * @irq: interrupt number
  2617. * @data: pointer to a network interface device structure
  2618. * @pt_regs: CPU registers structure
  2619. **/
  2620. static irqreturn_t
  2621. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2622. {
  2623. struct net_device *netdev = data;
  2624. struct e1000_adapter *adapter = netdev_priv(netdev);
  2625. struct e1000_hw *hw = &adapter->hw;
  2626. uint32_t icr = E1000_READ_REG(hw, ICR);
  2627. #if defined(CONFIG_E1000_NAPI) && defined(CONFIG_E1000_MQ) || !defined(CONFIG_E1000_NAPI)
  2628. int i;
  2629. #endif
  2630. if(unlikely(!icr))
  2631. return IRQ_NONE; /* Not our interrupt */
  2632. if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2633. hw->get_link_status = 1;
  2634. mod_timer(&adapter->watchdog_timer, jiffies);
  2635. }
  2636. #ifdef CONFIG_E1000_NAPI
  2637. atomic_inc(&adapter->irq_sem);
  2638. E1000_WRITE_REG(hw, IMC, ~0);
  2639. E1000_WRITE_FLUSH(hw);
  2640. #ifdef CONFIG_E1000_MQ
  2641. if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
  2642. cpu_set(adapter->cpu_for_queue[0],
  2643. adapter->rx_sched_call_data.cpumask);
  2644. for (i = 1; i < adapter->num_queues; i++) {
  2645. cpu_set(adapter->cpu_for_queue[i],
  2646. adapter->rx_sched_call_data.cpumask);
  2647. atomic_inc(&adapter->irq_sem);
  2648. }
  2649. atomic_set(&adapter->rx_sched_call_data.count, i);
  2650. smp_call_async_mask(&adapter->rx_sched_call_data);
  2651. } else {
  2652. printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
  2653. }
  2654. #else /* if !CONFIG_E1000_MQ */
  2655. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2656. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2657. else
  2658. e1000_irq_enable(adapter);
  2659. #endif /* CONFIG_E1000_MQ */
  2660. #else /* if !CONFIG_E1000_NAPI */
  2661. /* Writing IMC and IMS is needed for 82547.
  2662. Due to Hub Link bus being occupied, an interrupt
  2663. de-assertion message is not able to be sent.
  2664. When an interrupt assertion message is generated later,
  2665. two messages are re-ordered and sent out.
  2666. That causes APIC to think 82547 is in de-assertion
  2667. state, while 82547 is in assertion state, resulting
  2668. in dead lock. Writing IMC forces 82547 into
  2669. de-assertion state.
  2670. */
  2671. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
  2672. atomic_inc(&adapter->irq_sem);
  2673. E1000_WRITE_REG(hw, IMC, ~0);
  2674. }
  2675. for(i = 0; i < E1000_MAX_INTR; i++)
  2676. if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2677. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2678. break;
  2679. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2680. e1000_irq_enable(adapter);
  2681. #endif /* CONFIG_E1000_NAPI */
  2682. return IRQ_HANDLED;
  2683. }
  2684. #ifdef CONFIG_E1000_NAPI
  2685. /**
  2686. * e1000_clean - NAPI Rx polling callback
  2687. * @adapter: board private structure
  2688. **/
  2689. static int
  2690. e1000_clean(struct net_device *poll_dev, int *budget)
  2691. {
  2692. struct e1000_adapter *adapter;
  2693. int work_to_do = min(*budget, poll_dev->quota);
  2694. int tx_cleaned, i = 0, work_done = 0;
  2695. /* Must NOT use netdev_priv macro here. */
  2696. adapter = poll_dev->priv;
  2697. /* Keep link state information with original netdev */
  2698. if (!netif_carrier_ok(adapter->netdev))
  2699. goto quit_polling;
  2700. while (poll_dev != &adapter->polling_netdev[i]) {
  2701. i++;
  2702. if (unlikely(i == adapter->num_queues))
  2703. BUG();
  2704. }
  2705. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2706. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2707. &work_done, work_to_do);
  2708. *budget -= work_done;
  2709. poll_dev->quota -= work_done;
  2710. /* If no Tx and not enough Rx work done, exit the polling mode */
  2711. if((!tx_cleaned && (work_done == 0)) ||
  2712. !netif_running(adapter->netdev)) {
  2713. quit_polling:
  2714. netif_rx_complete(poll_dev);
  2715. e1000_irq_enable(adapter);
  2716. return 0;
  2717. }
  2718. return 1;
  2719. }
  2720. #endif
  2721. /**
  2722. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2723. * @adapter: board private structure
  2724. **/
  2725. static boolean_t
  2726. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2727. struct e1000_tx_ring *tx_ring)
  2728. {
  2729. struct net_device *netdev = adapter->netdev;
  2730. struct e1000_tx_desc *tx_desc, *eop_desc;
  2731. struct e1000_buffer *buffer_info;
  2732. unsigned int i, eop;
  2733. boolean_t cleaned = FALSE;
  2734. i = tx_ring->next_to_clean;
  2735. eop = tx_ring->buffer_info[i].next_to_watch;
  2736. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2737. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2738. for(cleaned = FALSE; !cleaned; ) {
  2739. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2740. buffer_info = &tx_ring->buffer_info[i];
  2741. cleaned = (i == eop);
  2742. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2743. tx_desc->buffer_addr = 0;
  2744. tx_desc->lower.data = 0;
  2745. tx_desc->upper.data = 0;
  2746. if(unlikely(++i == tx_ring->count)) i = 0;
  2747. }
  2748. tx_ring->pkt++;
  2749. eop = tx_ring->buffer_info[i].next_to_watch;
  2750. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2751. }
  2752. tx_ring->next_to_clean = i;
  2753. spin_lock(&tx_ring->tx_lock);
  2754. if(unlikely(cleaned && netif_queue_stopped(netdev) &&
  2755. netif_carrier_ok(netdev)))
  2756. netif_wake_queue(netdev);
  2757. spin_unlock(&tx_ring->tx_lock);
  2758. if (adapter->detect_tx_hung) {
  2759. /* Detect a transmit hang in hardware, this serializes the
  2760. * check with the clearing of time_stamp and movement of i */
  2761. adapter->detect_tx_hung = FALSE;
  2762. if (tx_ring->buffer_info[i].dma &&
  2763. time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
  2764. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2765. E1000_STATUS_TXOFF)) {
  2766. /* detected Tx unit hang */
  2767. i = tx_ring->next_to_clean;
  2768. eop = tx_ring->buffer_info[i].next_to_watch;
  2769. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2770. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2771. " TDH <%x>\n"
  2772. " TDT <%x>\n"
  2773. " next_to_use <%x>\n"
  2774. " next_to_clean <%x>\n"
  2775. "buffer_info[next_to_clean]\n"
  2776. " dma <%llx>\n"
  2777. " time_stamp <%lx>\n"
  2778. " next_to_watch <%x>\n"
  2779. " jiffies <%lx>\n"
  2780. " next_to_watch.status <%x>\n",
  2781. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2782. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2783. tx_ring->next_to_use,
  2784. i,
  2785. (unsigned long long)tx_ring->buffer_info[i].dma,
  2786. tx_ring->buffer_info[i].time_stamp,
  2787. eop,
  2788. jiffies,
  2789. eop_desc->upper.fields.status);
  2790. netif_stop_queue(netdev);
  2791. }
  2792. }
  2793. return cleaned;
  2794. }
  2795. /**
  2796. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2797. * @adapter: board private structure
  2798. * @status_err: receive descriptor status and error fields
  2799. * @csum: receive descriptor csum field
  2800. * @sk_buff: socket buffer with received data
  2801. **/
  2802. static inline void
  2803. e1000_rx_checksum(struct e1000_adapter *adapter,
  2804. uint32_t status_err, uint32_t csum,
  2805. struct sk_buff *skb)
  2806. {
  2807. uint16_t status = (uint16_t)status_err;
  2808. uint8_t errors = (uint8_t)(status_err >> 24);
  2809. skb->ip_summed = CHECKSUM_NONE;
  2810. /* 82543 or newer only */
  2811. if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2812. /* Ignore Checksum bit is set */
  2813. if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2814. /* TCP/UDP checksum error bit is set */
  2815. if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2816. /* let the stack verify checksum errors */
  2817. adapter->hw_csum_err++;
  2818. return;
  2819. }
  2820. /* TCP/UDP Checksum has not been calculated */
  2821. if(adapter->hw.mac_type <= e1000_82547_rev_2) {
  2822. if(!(status & E1000_RXD_STAT_TCPCS))
  2823. return;
  2824. } else {
  2825. if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2826. return;
  2827. }
  2828. /* It must be a TCP or UDP packet with a valid checksum */
  2829. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2830. /* TCP checksum is good */
  2831. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2832. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2833. /* IP fragment with UDP payload */
  2834. /* Hardware complements the payload checksum, so we undo it
  2835. * and then put the value in host order for further stack use.
  2836. */
  2837. csum = ntohl(csum ^ 0xFFFF);
  2838. skb->csum = csum;
  2839. skb->ip_summed = CHECKSUM_HW;
  2840. }
  2841. adapter->hw_csum_good++;
  2842. }
  2843. /**
  2844. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2845. * @adapter: board private structure
  2846. **/
  2847. static boolean_t
  2848. #ifdef CONFIG_E1000_NAPI
  2849. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2850. struct e1000_rx_ring *rx_ring,
  2851. int *work_done, int work_to_do)
  2852. #else
  2853. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2854. struct e1000_rx_ring *rx_ring)
  2855. #endif
  2856. {
  2857. struct net_device *netdev = adapter->netdev;
  2858. struct pci_dev *pdev = adapter->pdev;
  2859. struct e1000_rx_desc *rx_desc;
  2860. struct e1000_buffer *buffer_info;
  2861. struct sk_buff *skb;
  2862. unsigned long flags;
  2863. uint32_t length;
  2864. uint8_t last_byte;
  2865. unsigned int i;
  2866. boolean_t cleaned = FALSE;
  2867. i = rx_ring->next_to_clean;
  2868. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2869. while(rx_desc->status & E1000_RXD_STAT_DD) {
  2870. buffer_info = &rx_ring->buffer_info[i];
  2871. #ifdef CONFIG_E1000_NAPI
  2872. if(*work_done >= work_to_do)
  2873. break;
  2874. (*work_done)++;
  2875. #endif
  2876. cleaned = TRUE;
  2877. pci_unmap_single(pdev,
  2878. buffer_info->dma,
  2879. buffer_info->length,
  2880. PCI_DMA_FROMDEVICE);
  2881. skb = buffer_info->skb;
  2882. length = le16_to_cpu(rx_desc->length);
  2883. if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
  2884. /* All receives must fit into a single buffer */
  2885. E1000_DBG("%s: Receive packet consumed multiple"
  2886. " buffers\n", netdev->name);
  2887. dev_kfree_skb_irq(skb);
  2888. goto next_desc;
  2889. }
  2890. if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  2891. last_byte = *(skb->data + length - 1);
  2892. if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
  2893. rx_desc->errors, length, last_byte)) {
  2894. spin_lock_irqsave(&adapter->stats_lock, flags);
  2895. e1000_tbi_adjust_stats(&adapter->hw,
  2896. &adapter->stats,
  2897. length, skb->data);
  2898. spin_unlock_irqrestore(&adapter->stats_lock,
  2899. flags);
  2900. length--;
  2901. } else {
  2902. dev_kfree_skb_irq(skb);
  2903. goto next_desc;
  2904. }
  2905. }
  2906. /* Good Receive */
  2907. skb_put(skb, length - ETHERNET_FCS_SIZE);
  2908. /* Receive Checksum Offload */
  2909. e1000_rx_checksum(adapter,
  2910. (uint32_t)(rx_desc->status) |
  2911. ((uint32_t)(rx_desc->errors) << 24),
  2912. rx_desc->csum, skb);
  2913. skb->protocol = eth_type_trans(skb, netdev);
  2914. #ifdef CONFIG_E1000_NAPI
  2915. if(unlikely(adapter->vlgrp &&
  2916. (rx_desc->status & E1000_RXD_STAT_VP))) {
  2917. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  2918. le16_to_cpu(rx_desc->special) &
  2919. E1000_RXD_SPC_VLAN_MASK);
  2920. } else {
  2921. netif_receive_skb(skb);
  2922. }
  2923. #else /* CONFIG_E1000_NAPI */
  2924. if(unlikely(adapter->vlgrp &&
  2925. (rx_desc->status & E1000_RXD_STAT_VP))) {
  2926. vlan_hwaccel_rx(skb, adapter->vlgrp,
  2927. le16_to_cpu(rx_desc->special) &
  2928. E1000_RXD_SPC_VLAN_MASK);
  2929. } else {
  2930. netif_rx(skb);
  2931. }
  2932. #endif /* CONFIG_E1000_NAPI */
  2933. netdev->last_rx = jiffies;
  2934. rx_ring->pkt++;
  2935. next_desc:
  2936. rx_desc->status = 0;
  2937. buffer_info->skb = NULL;
  2938. if(unlikely(++i == rx_ring->count)) i = 0;
  2939. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2940. }
  2941. rx_ring->next_to_clean = i;
  2942. adapter->alloc_rx_buf(adapter, rx_ring);
  2943. return cleaned;
  2944. }
  2945. /**
  2946. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  2947. * @adapter: board private structure
  2948. **/
  2949. static boolean_t
  2950. #ifdef CONFIG_E1000_NAPI
  2951. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  2952. struct e1000_rx_ring *rx_ring,
  2953. int *work_done, int work_to_do)
  2954. #else
  2955. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  2956. struct e1000_rx_ring *rx_ring)
  2957. #endif
  2958. {
  2959. union e1000_rx_desc_packet_split *rx_desc;
  2960. struct net_device *netdev = adapter->netdev;
  2961. struct pci_dev *pdev = adapter->pdev;
  2962. struct e1000_buffer *buffer_info;
  2963. struct e1000_ps_page *ps_page;
  2964. struct e1000_ps_page_dma *ps_page_dma;
  2965. struct sk_buff *skb;
  2966. unsigned int i, j;
  2967. uint32_t length, staterr;
  2968. boolean_t cleaned = FALSE;
  2969. i = rx_ring->next_to_clean;
  2970. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  2971. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  2972. while(staterr & E1000_RXD_STAT_DD) {
  2973. buffer_info = &rx_ring->buffer_info[i];
  2974. ps_page = &rx_ring->ps_page[i];
  2975. ps_page_dma = &rx_ring->ps_page_dma[i];
  2976. #ifdef CONFIG_E1000_NAPI
  2977. if(unlikely(*work_done >= work_to_do))
  2978. break;
  2979. (*work_done)++;
  2980. #endif
  2981. cleaned = TRUE;
  2982. pci_unmap_single(pdev, buffer_info->dma,
  2983. buffer_info->length,
  2984. PCI_DMA_FROMDEVICE);
  2985. skb = buffer_info->skb;
  2986. if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  2987. E1000_DBG("%s: Packet Split buffers didn't pick up"
  2988. " the full packet\n", netdev->name);
  2989. dev_kfree_skb_irq(skb);
  2990. goto next_desc;
  2991. }
  2992. if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  2993. dev_kfree_skb_irq(skb);
  2994. goto next_desc;
  2995. }
  2996. length = le16_to_cpu(rx_desc->wb.middle.length0);
  2997. if(unlikely(!length)) {
  2998. E1000_DBG("%s: Last part of the packet spanning"
  2999. " multiple descriptors\n", netdev->name);
  3000. dev_kfree_skb_irq(skb);
  3001. goto next_desc;
  3002. }
  3003. /* Good Receive */
  3004. skb_put(skb, length);
  3005. for(j = 0; j < adapter->rx_ps_pages; j++) {
  3006. if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  3007. break;
  3008. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3009. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3010. ps_page_dma->ps_page_dma[j] = 0;
  3011. skb_shinfo(skb)->frags[j].page =
  3012. ps_page->ps_page[j];
  3013. ps_page->ps_page[j] = NULL;
  3014. skb_shinfo(skb)->frags[j].page_offset = 0;
  3015. skb_shinfo(skb)->frags[j].size = length;
  3016. skb_shinfo(skb)->nr_frags++;
  3017. skb->len += length;
  3018. skb->data_len += length;
  3019. }
  3020. e1000_rx_checksum(adapter, staterr,
  3021. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3022. skb->protocol = eth_type_trans(skb, netdev);
  3023. if(likely(rx_desc->wb.upper.header_status &
  3024. E1000_RXDPS_HDRSTAT_HDRSP)) {
  3025. adapter->rx_hdr_split++;
  3026. #ifdef HAVE_RX_ZERO_COPY
  3027. skb_shinfo(skb)->zero_copy = TRUE;
  3028. #endif
  3029. }
  3030. #ifdef CONFIG_E1000_NAPI
  3031. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3032. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3033. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3034. E1000_RXD_SPC_VLAN_MASK);
  3035. } else {
  3036. netif_receive_skb(skb);
  3037. }
  3038. #else /* CONFIG_E1000_NAPI */
  3039. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3040. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3041. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3042. E1000_RXD_SPC_VLAN_MASK);
  3043. } else {
  3044. netif_rx(skb);
  3045. }
  3046. #endif /* CONFIG_E1000_NAPI */
  3047. netdev->last_rx = jiffies;
  3048. rx_ring->pkt++;
  3049. next_desc:
  3050. rx_desc->wb.middle.status_error &= ~0xFF;
  3051. buffer_info->skb = NULL;
  3052. if(unlikely(++i == rx_ring->count)) i = 0;
  3053. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3054. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3055. }
  3056. rx_ring->next_to_clean = i;
  3057. adapter->alloc_rx_buf(adapter, rx_ring);
  3058. return cleaned;
  3059. }
  3060. /**
  3061. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3062. * @adapter: address of board private structure
  3063. **/
  3064. static void
  3065. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3066. struct e1000_rx_ring *rx_ring)
  3067. {
  3068. struct net_device *netdev = adapter->netdev;
  3069. struct pci_dev *pdev = adapter->pdev;
  3070. struct e1000_rx_desc *rx_desc;
  3071. struct e1000_buffer *buffer_info;
  3072. struct sk_buff *skb;
  3073. unsigned int i;
  3074. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3075. i = rx_ring->next_to_use;
  3076. buffer_info = &rx_ring->buffer_info[i];
  3077. while(!buffer_info->skb) {
  3078. skb = dev_alloc_skb(bufsz);
  3079. if(unlikely(!skb)) {
  3080. /* Better luck next round */
  3081. break;
  3082. }
  3083. /* Fix for errata 23, can't cross 64kB boundary */
  3084. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3085. struct sk_buff *oldskb = skb;
  3086. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3087. "at %p\n", bufsz, skb->data);
  3088. /* Try again, without freeing the previous */
  3089. skb = dev_alloc_skb(bufsz);
  3090. /* Failed allocation, critical failure */
  3091. if (!skb) {
  3092. dev_kfree_skb(oldskb);
  3093. break;
  3094. }
  3095. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3096. /* give up */
  3097. dev_kfree_skb(skb);
  3098. dev_kfree_skb(oldskb);
  3099. break; /* while !buffer_info->skb */
  3100. } else {
  3101. /* Use new allocation */
  3102. dev_kfree_skb(oldskb);
  3103. }
  3104. }
  3105. /* Make buffer alignment 2 beyond a 16 byte boundary
  3106. * this will result in a 16 byte aligned IP header after
  3107. * the 14 byte MAC header is removed
  3108. */
  3109. skb_reserve(skb, NET_IP_ALIGN);
  3110. skb->dev = netdev;
  3111. buffer_info->skb = skb;
  3112. buffer_info->length = adapter->rx_buffer_len;
  3113. buffer_info->dma = pci_map_single(pdev,
  3114. skb->data,
  3115. adapter->rx_buffer_len,
  3116. PCI_DMA_FROMDEVICE);
  3117. /* Fix for errata 23, can't cross 64kB boundary */
  3118. if (!e1000_check_64k_bound(adapter,
  3119. (void *)(unsigned long)buffer_info->dma,
  3120. adapter->rx_buffer_len)) {
  3121. DPRINTK(RX_ERR, ERR,
  3122. "dma align check failed: %u bytes at %p\n",
  3123. adapter->rx_buffer_len,
  3124. (void *)(unsigned long)buffer_info->dma);
  3125. dev_kfree_skb(skb);
  3126. buffer_info->skb = NULL;
  3127. pci_unmap_single(pdev, buffer_info->dma,
  3128. adapter->rx_buffer_len,
  3129. PCI_DMA_FROMDEVICE);
  3130. break; /* while !buffer_info->skb */
  3131. }
  3132. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3133. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3134. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3135. /* Force memory writes to complete before letting h/w
  3136. * know there are new descriptors to fetch. (Only
  3137. * applicable for weak-ordered memory model archs,
  3138. * such as IA-64). */
  3139. wmb();
  3140. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3141. }
  3142. if(unlikely(++i == rx_ring->count)) i = 0;
  3143. buffer_info = &rx_ring->buffer_info[i];
  3144. }
  3145. rx_ring->next_to_use = i;
  3146. }
  3147. /**
  3148. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3149. * @adapter: address of board private structure
  3150. **/
  3151. static void
  3152. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3153. struct e1000_rx_ring *rx_ring)
  3154. {
  3155. struct net_device *netdev = adapter->netdev;
  3156. struct pci_dev *pdev = adapter->pdev;
  3157. union e1000_rx_desc_packet_split *rx_desc;
  3158. struct e1000_buffer *buffer_info;
  3159. struct e1000_ps_page *ps_page;
  3160. struct e1000_ps_page_dma *ps_page_dma;
  3161. struct sk_buff *skb;
  3162. unsigned int i, j;
  3163. i = rx_ring->next_to_use;
  3164. buffer_info = &rx_ring->buffer_info[i];
  3165. ps_page = &rx_ring->ps_page[i];
  3166. ps_page_dma = &rx_ring->ps_page_dma[i];
  3167. while(!buffer_info->skb) {
  3168. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3169. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  3170. if (j < adapter->rx_ps_pages) {
  3171. if (likely(!ps_page->ps_page[j])) {
  3172. ps_page->ps_page[j] =
  3173. alloc_page(GFP_ATOMIC);
  3174. if (unlikely(!ps_page->ps_page[j]))
  3175. goto no_buffers;
  3176. ps_page_dma->ps_page_dma[j] =
  3177. pci_map_page(pdev,
  3178. ps_page->ps_page[j],
  3179. 0, PAGE_SIZE,
  3180. PCI_DMA_FROMDEVICE);
  3181. }
  3182. /* Refresh the desc even if buffer_addrs didn't
  3183. * change because each write-back erases
  3184. * this info.
  3185. */
  3186. rx_desc->read.buffer_addr[j+1] =
  3187. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3188. } else
  3189. rx_desc->read.buffer_addr[j+1] = ~0;
  3190. }
  3191. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3192. if(unlikely(!skb))
  3193. break;
  3194. /* Make buffer alignment 2 beyond a 16 byte boundary
  3195. * this will result in a 16 byte aligned IP header after
  3196. * the 14 byte MAC header is removed
  3197. */
  3198. skb_reserve(skb, NET_IP_ALIGN);
  3199. skb->dev = netdev;
  3200. buffer_info->skb = skb;
  3201. buffer_info->length = adapter->rx_ps_bsize0;
  3202. buffer_info->dma = pci_map_single(pdev, skb->data,
  3203. adapter->rx_ps_bsize0,
  3204. PCI_DMA_FROMDEVICE);
  3205. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3206. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3207. /* Force memory writes to complete before letting h/w
  3208. * know there are new descriptors to fetch. (Only
  3209. * applicable for weak-ordered memory model archs,
  3210. * such as IA-64). */
  3211. wmb();
  3212. /* Hardware increments by 16 bytes, but packet split
  3213. * descriptors are 32 bytes...so we increment tail
  3214. * twice as much.
  3215. */
  3216. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3217. }
  3218. if(unlikely(++i == rx_ring->count)) i = 0;
  3219. buffer_info = &rx_ring->buffer_info[i];
  3220. ps_page = &rx_ring->ps_page[i];
  3221. ps_page_dma = &rx_ring->ps_page_dma[i];
  3222. }
  3223. no_buffers:
  3224. rx_ring->next_to_use = i;
  3225. }
  3226. /**
  3227. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3228. * @adapter:
  3229. **/
  3230. static void
  3231. e1000_smartspeed(struct e1000_adapter *adapter)
  3232. {
  3233. uint16_t phy_status;
  3234. uint16_t phy_ctrl;
  3235. if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3236. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3237. return;
  3238. if(adapter->smartspeed == 0) {
  3239. /* If Master/Slave config fault is asserted twice,
  3240. * we assume back-to-back */
  3241. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3242. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3243. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3244. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3245. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3246. if(phy_ctrl & CR_1000T_MS_ENABLE) {
  3247. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3248. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3249. phy_ctrl);
  3250. adapter->smartspeed++;
  3251. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3252. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3253. &phy_ctrl)) {
  3254. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3255. MII_CR_RESTART_AUTO_NEG);
  3256. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3257. phy_ctrl);
  3258. }
  3259. }
  3260. return;
  3261. } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3262. /* If still no link, perhaps using 2/3 pair cable */
  3263. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3264. phy_ctrl |= CR_1000T_MS_ENABLE;
  3265. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3266. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3267. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3268. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3269. MII_CR_RESTART_AUTO_NEG);
  3270. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3271. }
  3272. }
  3273. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3274. if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3275. adapter->smartspeed = 0;
  3276. }
  3277. /**
  3278. * e1000_ioctl -
  3279. * @netdev:
  3280. * @ifreq:
  3281. * @cmd:
  3282. **/
  3283. static int
  3284. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3285. {
  3286. switch (cmd) {
  3287. case SIOCGMIIPHY:
  3288. case SIOCGMIIREG:
  3289. case SIOCSMIIREG:
  3290. return e1000_mii_ioctl(netdev, ifr, cmd);
  3291. default:
  3292. return -EOPNOTSUPP;
  3293. }
  3294. }
  3295. /**
  3296. * e1000_mii_ioctl -
  3297. * @netdev:
  3298. * @ifreq:
  3299. * @cmd:
  3300. **/
  3301. static int
  3302. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3303. {
  3304. struct e1000_adapter *adapter = netdev_priv(netdev);
  3305. struct mii_ioctl_data *data = if_mii(ifr);
  3306. int retval;
  3307. uint16_t mii_reg;
  3308. uint16_t spddplx;
  3309. unsigned long flags;
  3310. if(adapter->hw.media_type != e1000_media_type_copper)
  3311. return -EOPNOTSUPP;
  3312. switch (cmd) {
  3313. case SIOCGMIIPHY:
  3314. data->phy_id = adapter->hw.phy_addr;
  3315. break;
  3316. case SIOCGMIIREG:
  3317. if(!capable(CAP_NET_ADMIN))
  3318. return -EPERM;
  3319. spin_lock_irqsave(&adapter->stats_lock, flags);
  3320. if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3321. &data->val_out)) {
  3322. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3323. return -EIO;
  3324. }
  3325. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3326. break;
  3327. case SIOCSMIIREG:
  3328. if(!capable(CAP_NET_ADMIN))
  3329. return -EPERM;
  3330. if(data->reg_num & ~(0x1F))
  3331. return -EFAULT;
  3332. mii_reg = data->val_in;
  3333. spin_lock_irqsave(&adapter->stats_lock, flags);
  3334. if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3335. mii_reg)) {
  3336. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3337. return -EIO;
  3338. }
  3339. if(adapter->hw.phy_type == e1000_phy_m88) {
  3340. switch (data->reg_num) {
  3341. case PHY_CTRL:
  3342. if(mii_reg & MII_CR_POWER_DOWN)
  3343. break;
  3344. if(mii_reg & MII_CR_AUTO_NEG_EN) {
  3345. adapter->hw.autoneg = 1;
  3346. adapter->hw.autoneg_advertised = 0x2F;
  3347. } else {
  3348. if (mii_reg & 0x40)
  3349. spddplx = SPEED_1000;
  3350. else if (mii_reg & 0x2000)
  3351. spddplx = SPEED_100;
  3352. else
  3353. spddplx = SPEED_10;
  3354. spddplx += (mii_reg & 0x100)
  3355. ? FULL_DUPLEX :
  3356. HALF_DUPLEX;
  3357. retval = e1000_set_spd_dplx(adapter,
  3358. spddplx);
  3359. if(retval) {
  3360. spin_unlock_irqrestore(
  3361. &adapter->stats_lock,
  3362. flags);
  3363. return retval;
  3364. }
  3365. }
  3366. if(netif_running(adapter->netdev)) {
  3367. e1000_down(adapter);
  3368. e1000_up(adapter);
  3369. } else
  3370. e1000_reset(adapter);
  3371. break;
  3372. case M88E1000_PHY_SPEC_CTRL:
  3373. case M88E1000_EXT_PHY_SPEC_CTRL:
  3374. if(e1000_phy_reset(&adapter->hw)) {
  3375. spin_unlock_irqrestore(
  3376. &adapter->stats_lock, flags);
  3377. return -EIO;
  3378. }
  3379. break;
  3380. }
  3381. } else {
  3382. switch (data->reg_num) {
  3383. case PHY_CTRL:
  3384. if(mii_reg & MII_CR_POWER_DOWN)
  3385. break;
  3386. if(netif_running(adapter->netdev)) {
  3387. e1000_down(adapter);
  3388. e1000_up(adapter);
  3389. } else
  3390. e1000_reset(adapter);
  3391. break;
  3392. }
  3393. }
  3394. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3395. break;
  3396. default:
  3397. return -EOPNOTSUPP;
  3398. }
  3399. return E1000_SUCCESS;
  3400. }
  3401. void
  3402. e1000_pci_set_mwi(struct e1000_hw *hw)
  3403. {
  3404. struct e1000_adapter *adapter = hw->back;
  3405. int ret_val = pci_set_mwi(adapter->pdev);
  3406. if(ret_val)
  3407. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3408. }
  3409. void
  3410. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3411. {
  3412. struct e1000_adapter *adapter = hw->back;
  3413. pci_clear_mwi(adapter->pdev);
  3414. }
  3415. void
  3416. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3417. {
  3418. struct e1000_adapter *adapter = hw->back;
  3419. pci_read_config_word(adapter->pdev, reg, value);
  3420. }
  3421. void
  3422. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3423. {
  3424. struct e1000_adapter *adapter = hw->back;
  3425. pci_write_config_word(adapter->pdev, reg, *value);
  3426. }
  3427. uint32_t
  3428. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3429. {
  3430. return inl(port);
  3431. }
  3432. void
  3433. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3434. {
  3435. outl(value, port);
  3436. }
  3437. static void
  3438. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3439. {
  3440. struct e1000_adapter *adapter = netdev_priv(netdev);
  3441. uint32_t ctrl, rctl;
  3442. e1000_irq_disable(adapter);
  3443. adapter->vlgrp = grp;
  3444. if(grp) {
  3445. /* enable VLAN tag insert/strip */
  3446. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3447. ctrl |= E1000_CTRL_VME;
  3448. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3449. /* enable VLAN receive filtering */
  3450. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3451. rctl |= E1000_RCTL_VFE;
  3452. rctl &= ~E1000_RCTL_CFIEN;
  3453. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3454. e1000_update_mng_vlan(adapter);
  3455. } else {
  3456. /* disable VLAN tag insert/strip */
  3457. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3458. ctrl &= ~E1000_CTRL_VME;
  3459. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3460. /* disable VLAN filtering */
  3461. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3462. rctl &= ~E1000_RCTL_VFE;
  3463. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3464. if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3465. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3466. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3467. }
  3468. }
  3469. e1000_irq_enable(adapter);
  3470. }
  3471. static void
  3472. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3473. {
  3474. struct e1000_adapter *adapter = netdev_priv(netdev);
  3475. uint32_t vfta, index;
  3476. if((adapter->hw.mng_cookie.status &
  3477. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3478. (vid == adapter->mng_vlan_id))
  3479. return;
  3480. /* add VID to filter table */
  3481. index = (vid >> 5) & 0x7F;
  3482. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3483. vfta |= (1 << (vid & 0x1F));
  3484. e1000_write_vfta(&adapter->hw, index, vfta);
  3485. }
  3486. static void
  3487. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3488. {
  3489. struct e1000_adapter *adapter = netdev_priv(netdev);
  3490. uint32_t vfta, index;
  3491. e1000_irq_disable(adapter);
  3492. if(adapter->vlgrp)
  3493. adapter->vlgrp->vlan_devices[vid] = NULL;
  3494. e1000_irq_enable(adapter);
  3495. if((adapter->hw.mng_cookie.status &
  3496. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3497. (vid == adapter->mng_vlan_id))
  3498. return;
  3499. /* remove VID from filter table */
  3500. index = (vid >> 5) & 0x7F;
  3501. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3502. vfta &= ~(1 << (vid & 0x1F));
  3503. e1000_write_vfta(&adapter->hw, index, vfta);
  3504. }
  3505. static void
  3506. e1000_restore_vlan(struct e1000_adapter *adapter)
  3507. {
  3508. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3509. if(adapter->vlgrp) {
  3510. uint16_t vid;
  3511. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3512. if(!adapter->vlgrp->vlan_devices[vid])
  3513. continue;
  3514. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3515. }
  3516. }
  3517. }
  3518. int
  3519. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3520. {
  3521. adapter->hw.autoneg = 0;
  3522. /* Fiber NICs only allow 1000 gbps Full duplex */
  3523. if((adapter->hw.media_type == e1000_media_type_fiber) &&
  3524. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3525. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3526. return -EINVAL;
  3527. }
  3528. switch(spddplx) {
  3529. case SPEED_10 + DUPLEX_HALF:
  3530. adapter->hw.forced_speed_duplex = e1000_10_half;
  3531. break;
  3532. case SPEED_10 + DUPLEX_FULL:
  3533. adapter->hw.forced_speed_duplex = e1000_10_full;
  3534. break;
  3535. case SPEED_100 + DUPLEX_HALF:
  3536. adapter->hw.forced_speed_duplex = e1000_100_half;
  3537. break;
  3538. case SPEED_100 + DUPLEX_FULL:
  3539. adapter->hw.forced_speed_duplex = e1000_100_full;
  3540. break;
  3541. case SPEED_1000 + DUPLEX_FULL:
  3542. adapter->hw.autoneg = 1;
  3543. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3544. break;
  3545. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3546. default:
  3547. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3548. return -EINVAL;
  3549. }
  3550. return 0;
  3551. }
  3552. #ifdef CONFIG_PM
  3553. static int
  3554. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3555. {
  3556. struct net_device *netdev = pci_get_drvdata(pdev);
  3557. struct e1000_adapter *adapter = netdev_priv(netdev);
  3558. uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm;
  3559. uint32_t wufc = adapter->wol;
  3560. netif_device_detach(netdev);
  3561. if(netif_running(netdev))
  3562. e1000_down(adapter);
  3563. status = E1000_READ_REG(&adapter->hw, STATUS);
  3564. if(status & E1000_STATUS_LU)
  3565. wufc &= ~E1000_WUFC_LNKC;
  3566. if(wufc) {
  3567. e1000_setup_rctl(adapter);
  3568. e1000_set_multi(netdev);
  3569. /* turn on all-multi mode if wake on multicast is enabled */
  3570. if(adapter->wol & E1000_WUFC_MC) {
  3571. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3572. rctl |= E1000_RCTL_MPE;
  3573. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3574. }
  3575. if(adapter->hw.mac_type >= e1000_82540) {
  3576. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3577. /* advertise wake from D3Cold */
  3578. #define E1000_CTRL_ADVD3WUC 0x00100000
  3579. /* phy power management enable */
  3580. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3581. ctrl |= E1000_CTRL_ADVD3WUC |
  3582. E1000_CTRL_EN_PHY_PWR_MGMT;
  3583. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3584. }
  3585. if(adapter->hw.media_type == e1000_media_type_fiber ||
  3586. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3587. /* keep the laser running in D3 */
  3588. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3589. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3590. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3591. }
  3592. /* Allow time for pending master requests to run */
  3593. e1000_disable_pciex_master(&adapter->hw);
  3594. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3595. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3596. pci_enable_wake(pdev, 3, 1);
  3597. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3598. } else {
  3599. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3600. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3601. pci_enable_wake(pdev, 3, 0);
  3602. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  3603. }
  3604. pci_save_state(pdev);
  3605. if(adapter->hw.mac_type >= e1000_82540 &&
  3606. adapter->hw.media_type == e1000_media_type_copper) {
  3607. manc = E1000_READ_REG(&adapter->hw, MANC);
  3608. if(manc & E1000_MANC_SMBUS_EN) {
  3609. manc |= E1000_MANC_ARP_EN;
  3610. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3611. pci_enable_wake(pdev, 3, 1);
  3612. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3613. }
  3614. }
  3615. switch(adapter->hw.mac_type) {
  3616. case e1000_82571:
  3617. case e1000_82572:
  3618. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3619. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  3620. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  3621. break;
  3622. case e1000_82573:
  3623. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  3624. E1000_WRITE_REG(&adapter->hw, SWSM,
  3625. swsm & ~E1000_SWSM_DRV_LOAD);
  3626. break;
  3627. default:
  3628. break;
  3629. }
  3630. pci_disable_device(pdev);
  3631. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3632. return 0;
  3633. }
  3634. static int
  3635. e1000_resume(struct pci_dev *pdev)
  3636. {
  3637. struct net_device *netdev = pci_get_drvdata(pdev);
  3638. struct e1000_adapter *adapter = netdev_priv(netdev);
  3639. uint32_t manc, ret_val, swsm;
  3640. uint32_t ctrl_ext;
  3641. pci_set_power_state(pdev, PCI_D0);
  3642. pci_restore_state(pdev);
  3643. ret_val = pci_enable_device(pdev);
  3644. pci_set_master(pdev);
  3645. pci_enable_wake(pdev, PCI_D3hot, 0);
  3646. pci_enable_wake(pdev, PCI_D3cold, 0);
  3647. e1000_reset(adapter);
  3648. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3649. if(netif_running(netdev))
  3650. e1000_up(adapter);
  3651. netif_device_attach(netdev);
  3652. if(adapter->hw.mac_type >= e1000_82540 &&
  3653. adapter->hw.media_type == e1000_media_type_copper) {
  3654. manc = E1000_READ_REG(&adapter->hw, MANC);
  3655. manc &= ~(E1000_MANC_ARP_EN);
  3656. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3657. }
  3658. switch(adapter->hw.mac_type) {
  3659. case e1000_82571:
  3660. case e1000_82572:
  3661. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3662. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  3663. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  3664. break;
  3665. case e1000_82573:
  3666. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  3667. E1000_WRITE_REG(&adapter->hw, SWSM,
  3668. swsm | E1000_SWSM_DRV_LOAD);
  3669. break;
  3670. default:
  3671. break;
  3672. }
  3673. return 0;
  3674. }
  3675. #endif
  3676. #ifdef CONFIG_NET_POLL_CONTROLLER
  3677. /*
  3678. * Polling 'interrupt' - used by things like netconsole to send skbs
  3679. * without having to re-enable interrupts. It's not called while
  3680. * the interrupt routine is executing.
  3681. */
  3682. static void
  3683. e1000_netpoll(struct net_device *netdev)
  3684. {
  3685. struct e1000_adapter *adapter = netdev_priv(netdev);
  3686. disable_irq(adapter->pdev->irq);
  3687. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3688. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3689. enable_irq(adapter->pdev->irq);
  3690. }
  3691. #endif
  3692. /* e1000_main.c */