mthca_provider.c 31 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  5. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  6. * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
  7. *
  8. * This software is available to you under a choice of one of two
  9. * licenses. You may choose to be licensed under the terms of the GNU
  10. * General Public License (GPL) Version 2, available from the file
  11. * COPYING in the main directory of this source tree, or the
  12. * OpenIB.org BSD license below:
  13. *
  14. * Redistribution and use in source and binary forms, with or
  15. * without modification, are permitted provided that the following
  16. * conditions are met:
  17. *
  18. * - Redistributions of source code must retain the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer.
  21. *
  22. * - Redistributions in binary form must reproduce the above
  23. * copyright notice, this list of conditions and the following
  24. * disclaimer in the documentation and/or other materials
  25. * provided with the distribution.
  26. *
  27. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34. * SOFTWARE.
  35. *
  36. * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $
  37. */
  38. #include <rdma/ib_smi.h>
  39. #include <rdma/ib_user_verbs.h>
  40. #include <linux/mm.h>
  41. #include "mthca_dev.h"
  42. #include "mthca_cmd.h"
  43. #include "mthca_user.h"
  44. #include "mthca_memfree.h"
  45. static int mthca_query_device(struct ib_device *ibdev,
  46. struct ib_device_attr *props)
  47. {
  48. struct ib_smp *in_mad = NULL;
  49. struct ib_smp *out_mad = NULL;
  50. int err = -ENOMEM;
  51. struct mthca_dev* mdev = to_mdev(ibdev);
  52. u8 status;
  53. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  54. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  55. if (!in_mad || !out_mad)
  56. goto out;
  57. memset(props, 0, sizeof *props);
  58. props->fw_ver = mdev->fw_ver;
  59. memset(in_mad, 0, sizeof *in_mad);
  60. in_mad->base_version = 1;
  61. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  62. in_mad->class_version = 1;
  63. in_mad->method = IB_MGMT_METHOD_GET;
  64. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  65. err = mthca_MAD_IFC(mdev, 1, 1,
  66. 1, NULL, NULL, in_mad, out_mad,
  67. &status);
  68. if (err)
  69. goto out;
  70. if (status) {
  71. err = -EINVAL;
  72. goto out;
  73. }
  74. props->device_cap_flags = mdev->device_cap_flags;
  75. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  76. 0xffffff;
  77. props->vendor_part_id = be16_to_cpup((__be16 *) (out_mad->data + 30));
  78. props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
  79. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  80. memcpy(&props->node_guid, out_mad->data + 12, 8);
  81. props->max_mr_size = ~0ull;
  82. props->page_size_cap = mdev->limits.page_size_cap;
  83. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  84. props->max_qp_wr = mdev->limits.max_wqes;
  85. props->max_sge = mdev->limits.max_sg;
  86. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  87. props->max_cqe = mdev->limits.max_cqes;
  88. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  89. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  90. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  91. props->max_qp_init_rd_atom = mdev->limits.max_qp_init_rdma;
  92. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  93. props->max_srq = mdev->limits.num_srqs - mdev->limits.reserved_srqs;
  94. props->max_srq_wr = mdev->limits.max_srq_wqes;
  95. props->max_srq_sge = mdev->limits.max_sg;
  96. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  97. props->atomic_cap = mdev->limits.flags & DEV_LIM_FLAG_ATOMIC ?
  98. IB_ATOMIC_HCA : IB_ATOMIC_NONE;
  99. props->max_pkeys = mdev->limits.pkey_table_len;
  100. props->max_mcast_grp = mdev->limits.num_mgms + mdev->limits.num_amgms;
  101. props->max_mcast_qp_attach = MTHCA_QP_PER_MGM;
  102. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  103. props->max_mcast_grp;
  104. err = 0;
  105. out:
  106. kfree(in_mad);
  107. kfree(out_mad);
  108. return err;
  109. }
  110. static int mthca_query_port(struct ib_device *ibdev,
  111. u8 port, struct ib_port_attr *props)
  112. {
  113. struct ib_smp *in_mad = NULL;
  114. struct ib_smp *out_mad = NULL;
  115. int err = -ENOMEM;
  116. u8 status;
  117. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  118. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  119. if (!in_mad || !out_mad)
  120. goto out;
  121. memset(props, 0, sizeof *props);
  122. memset(in_mad, 0, sizeof *in_mad);
  123. in_mad->base_version = 1;
  124. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  125. in_mad->class_version = 1;
  126. in_mad->method = IB_MGMT_METHOD_GET;
  127. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  128. in_mad->attr_mod = cpu_to_be32(port);
  129. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  130. port, NULL, NULL, in_mad, out_mad,
  131. &status);
  132. if (err)
  133. goto out;
  134. if (status) {
  135. err = -EINVAL;
  136. goto out;
  137. }
  138. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  139. props->lmc = out_mad->data[34] & 0x7;
  140. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  141. props->sm_sl = out_mad->data[36] & 0xf;
  142. props->state = out_mad->data[32] & 0xf;
  143. props->phys_state = out_mad->data[33] >> 4;
  144. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  145. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  146. props->max_msg_sz = 0x80000000;
  147. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  148. props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
  149. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  150. props->active_width = out_mad->data[31] & 0xf;
  151. props->active_speed = out_mad->data[35] >> 4;
  152. props->max_mtu = out_mad->data[41] & 0xf;
  153. props->active_mtu = out_mad->data[36] >> 4;
  154. props->subnet_timeout = out_mad->data[51] & 0x1f;
  155. out:
  156. kfree(in_mad);
  157. kfree(out_mad);
  158. return err;
  159. }
  160. static int mthca_modify_port(struct ib_device *ibdev,
  161. u8 port, int port_modify_mask,
  162. struct ib_port_modify *props)
  163. {
  164. struct mthca_set_ib_param set_ib;
  165. struct ib_port_attr attr;
  166. int err;
  167. u8 status;
  168. if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  169. return -ERESTARTSYS;
  170. err = mthca_query_port(ibdev, port, &attr);
  171. if (err)
  172. goto out;
  173. set_ib.set_si_guid = 0;
  174. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  175. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  176. ~props->clr_port_cap_mask;
  177. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  178. if (err)
  179. goto out;
  180. if (status) {
  181. err = -EINVAL;
  182. goto out;
  183. }
  184. out:
  185. up(&to_mdev(ibdev)->cap_mask_mutex);
  186. return err;
  187. }
  188. static int mthca_query_pkey(struct ib_device *ibdev,
  189. u8 port, u16 index, u16 *pkey)
  190. {
  191. struct ib_smp *in_mad = NULL;
  192. struct ib_smp *out_mad = NULL;
  193. int err = -ENOMEM;
  194. u8 status;
  195. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  196. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  197. if (!in_mad || !out_mad)
  198. goto out;
  199. memset(in_mad, 0, sizeof *in_mad);
  200. in_mad->base_version = 1;
  201. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  202. in_mad->class_version = 1;
  203. in_mad->method = IB_MGMT_METHOD_GET;
  204. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  205. in_mad->attr_mod = cpu_to_be32(index / 32);
  206. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  207. port, NULL, NULL, in_mad, out_mad,
  208. &status);
  209. if (err)
  210. goto out;
  211. if (status) {
  212. err = -EINVAL;
  213. goto out;
  214. }
  215. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  216. out:
  217. kfree(in_mad);
  218. kfree(out_mad);
  219. return err;
  220. }
  221. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  222. int index, union ib_gid *gid)
  223. {
  224. struct ib_smp *in_mad = NULL;
  225. struct ib_smp *out_mad = NULL;
  226. int err = -ENOMEM;
  227. u8 status;
  228. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  229. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  230. if (!in_mad || !out_mad)
  231. goto out;
  232. memset(in_mad, 0, sizeof *in_mad);
  233. in_mad->base_version = 1;
  234. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  235. in_mad->class_version = 1;
  236. in_mad->method = IB_MGMT_METHOD_GET;
  237. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  238. in_mad->attr_mod = cpu_to_be32(port);
  239. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  240. port, NULL, NULL, in_mad, out_mad,
  241. &status);
  242. if (err)
  243. goto out;
  244. if (status) {
  245. err = -EINVAL;
  246. goto out;
  247. }
  248. memcpy(gid->raw, out_mad->data + 8, 8);
  249. memset(in_mad, 0, sizeof *in_mad);
  250. in_mad->base_version = 1;
  251. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  252. in_mad->class_version = 1;
  253. in_mad->method = IB_MGMT_METHOD_GET;
  254. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  255. in_mad->attr_mod = cpu_to_be32(index / 8);
  256. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  257. port, NULL, NULL, in_mad, out_mad,
  258. &status);
  259. if (err)
  260. goto out;
  261. if (status) {
  262. err = -EINVAL;
  263. goto out;
  264. }
  265. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
  266. out:
  267. kfree(in_mad);
  268. kfree(out_mad);
  269. return err;
  270. }
  271. static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
  272. struct ib_udata *udata)
  273. {
  274. struct mthca_alloc_ucontext_resp uresp;
  275. struct mthca_ucontext *context;
  276. int err;
  277. memset(&uresp, 0, sizeof uresp);
  278. uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
  279. if (mthca_is_memfree(to_mdev(ibdev)))
  280. uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
  281. else
  282. uresp.uarc_size = 0;
  283. context = kmalloc(sizeof *context, GFP_KERNEL);
  284. if (!context)
  285. return ERR_PTR(-ENOMEM);
  286. err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
  287. if (err) {
  288. kfree(context);
  289. return ERR_PTR(err);
  290. }
  291. context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
  292. if (IS_ERR(context->db_tab)) {
  293. err = PTR_ERR(context->db_tab);
  294. mthca_uar_free(to_mdev(ibdev), &context->uar);
  295. kfree(context);
  296. return ERR_PTR(err);
  297. }
  298. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  299. mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
  300. mthca_uar_free(to_mdev(ibdev), &context->uar);
  301. kfree(context);
  302. return ERR_PTR(-EFAULT);
  303. }
  304. return &context->ibucontext;
  305. }
  306. static int mthca_dealloc_ucontext(struct ib_ucontext *context)
  307. {
  308. mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
  309. to_mucontext(context)->db_tab);
  310. mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
  311. kfree(to_mucontext(context));
  312. return 0;
  313. }
  314. static int mthca_mmap_uar(struct ib_ucontext *context,
  315. struct vm_area_struct *vma)
  316. {
  317. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  318. return -EINVAL;
  319. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  320. if (io_remap_pfn_range(vma, vma->vm_start,
  321. to_mucontext(context)->uar.pfn,
  322. PAGE_SIZE, vma->vm_page_prot))
  323. return -EAGAIN;
  324. return 0;
  325. }
  326. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
  327. struct ib_ucontext *context,
  328. struct ib_udata *udata)
  329. {
  330. struct mthca_pd *pd;
  331. int err;
  332. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  333. if (!pd)
  334. return ERR_PTR(-ENOMEM);
  335. err = mthca_pd_alloc(to_mdev(ibdev), !context, pd);
  336. if (err) {
  337. kfree(pd);
  338. return ERR_PTR(err);
  339. }
  340. if (context) {
  341. if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) {
  342. mthca_pd_free(to_mdev(ibdev), pd);
  343. kfree(pd);
  344. return ERR_PTR(-EFAULT);
  345. }
  346. }
  347. return &pd->ibpd;
  348. }
  349. static int mthca_dealloc_pd(struct ib_pd *pd)
  350. {
  351. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  352. kfree(pd);
  353. return 0;
  354. }
  355. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  356. struct ib_ah_attr *ah_attr)
  357. {
  358. int err;
  359. struct mthca_ah *ah;
  360. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  361. if (!ah)
  362. return ERR_PTR(-ENOMEM);
  363. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  364. if (err) {
  365. kfree(ah);
  366. return ERR_PTR(err);
  367. }
  368. return &ah->ibah;
  369. }
  370. static int mthca_ah_destroy(struct ib_ah *ah)
  371. {
  372. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  373. kfree(ah);
  374. return 0;
  375. }
  376. static struct ib_srq *mthca_create_srq(struct ib_pd *pd,
  377. struct ib_srq_init_attr *init_attr,
  378. struct ib_udata *udata)
  379. {
  380. struct mthca_create_srq ucmd;
  381. struct mthca_ucontext *context = NULL;
  382. struct mthca_srq *srq;
  383. int err;
  384. srq = kmalloc(sizeof *srq, GFP_KERNEL);
  385. if (!srq)
  386. return ERR_PTR(-ENOMEM);
  387. if (pd->uobject) {
  388. context = to_mucontext(pd->uobject->context);
  389. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  390. return ERR_PTR(-EFAULT);
  391. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  392. context->db_tab, ucmd.db_index,
  393. ucmd.db_page);
  394. if (err)
  395. goto err_free;
  396. srq->mr.ibmr.lkey = ucmd.lkey;
  397. srq->db_index = ucmd.db_index;
  398. }
  399. err = mthca_alloc_srq(to_mdev(pd->device), to_mpd(pd),
  400. &init_attr->attr, srq);
  401. if (err && pd->uobject)
  402. mthca_unmap_user_db(to_mdev(pd->device), &context->uar,
  403. context->db_tab, ucmd.db_index);
  404. if (err)
  405. goto err_free;
  406. if (context && ib_copy_to_udata(udata, &srq->srqn, sizeof (__u32))) {
  407. mthca_free_srq(to_mdev(pd->device), srq);
  408. err = -EFAULT;
  409. goto err_free;
  410. }
  411. return &srq->ibsrq;
  412. err_free:
  413. kfree(srq);
  414. return ERR_PTR(err);
  415. }
  416. static int mthca_destroy_srq(struct ib_srq *srq)
  417. {
  418. struct mthca_ucontext *context;
  419. if (srq->uobject) {
  420. context = to_mucontext(srq->uobject->context);
  421. mthca_unmap_user_db(to_mdev(srq->device), &context->uar,
  422. context->db_tab, to_msrq(srq)->db_index);
  423. }
  424. mthca_free_srq(to_mdev(srq->device), to_msrq(srq));
  425. kfree(srq);
  426. return 0;
  427. }
  428. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  429. struct ib_qp_init_attr *init_attr,
  430. struct ib_udata *udata)
  431. {
  432. struct mthca_create_qp ucmd;
  433. struct mthca_qp *qp;
  434. int err;
  435. switch (init_attr->qp_type) {
  436. case IB_QPT_RC:
  437. case IB_QPT_UC:
  438. case IB_QPT_UD:
  439. {
  440. struct mthca_ucontext *context;
  441. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  442. if (!qp)
  443. return ERR_PTR(-ENOMEM);
  444. if (pd->uobject) {
  445. context = to_mucontext(pd->uobject->context);
  446. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  447. return ERR_PTR(-EFAULT);
  448. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  449. context->db_tab,
  450. ucmd.sq_db_index, ucmd.sq_db_page);
  451. if (err) {
  452. kfree(qp);
  453. return ERR_PTR(err);
  454. }
  455. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  456. context->db_tab,
  457. ucmd.rq_db_index, ucmd.rq_db_page);
  458. if (err) {
  459. mthca_unmap_user_db(to_mdev(pd->device),
  460. &context->uar,
  461. context->db_tab,
  462. ucmd.sq_db_index);
  463. kfree(qp);
  464. return ERR_PTR(err);
  465. }
  466. qp->mr.ibmr.lkey = ucmd.lkey;
  467. qp->sq.db_index = ucmd.sq_db_index;
  468. qp->rq.db_index = ucmd.rq_db_index;
  469. }
  470. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  471. to_mcq(init_attr->send_cq),
  472. to_mcq(init_attr->recv_cq),
  473. init_attr->qp_type, init_attr->sq_sig_type,
  474. &init_attr->cap, qp);
  475. if (err && pd->uobject) {
  476. context = to_mucontext(pd->uobject->context);
  477. mthca_unmap_user_db(to_mdev(pd->device),
  478. &context->uar,
  479. context->db_tab,
  480. ucmd.sq_db_index);
  481. mthca_unmap_user_db(to_mdev(pd->device),
  482. &context->uar,
  483. context->db_tab,
  484. ucmd.rq_db_index);
  485. }
  486. qp->ibqp.qp_num = qp->qpn;
  487. break;
  488. }
  489. case IB_QPT_SMI:
  490. case IB_QPT_GSI:
  491. {
  492. /* Don't allow userspace to create special QPs */
  493. if (pd->uobject)
  494. return ERR_PTR(-EINVAL);
  495. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  496. if (!qp)
  497. return ERR_PTR(-ENOMEM);
  498. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  499. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  500. to_mcq(init_attr->send_cq),
  501. to_mcq(init_attr->recv_cq),
  502. init_attr->sq_sig_type, &init_attr->cap,
  503. qp->ibqp.qp_num, init_attr->port_num,
  504. to_msqp(qp));
  505. break;
  506. }
  507. default:
  508. /* Don't support raw QPs */
  509. return ERR_PTR(-ENOSYS);
  510. }
  511. if (err) {
  512. kfree(qp);
  513. return ERR_PTR(err);
  514. }
  515. init_attr->cap.max_send_wr = qp->sq.max;
  516. init_attr->cap.max_recv_wr = qp->rq.max;
  517. init_attr->cap.max_send_sge = qp->sq.max_gs;
  518. init_attr->cap.max_recv_sge = qp->rq.max_gs;
  519. init_attr->cap.max_inline_data = qp->max_inline_data;
  520. return &qp->ibqp;
  521. }
  522. static int mthca_destroy_qp(struct ib_qp *qp)
  523. {
  524. if (qp->uobject) {
  525. mthca_unmap_user_db(to_mdev(qp->device),
  526. &to_mucontext(qp->uobject->context)->uar,
  527. to_mucontext(qp->uobject->context)->db_tab,
  528. to_mqp(qp)->sq.db_index);
  529. mthca_unmap_user_db(to_mdev(qp->device),
  530. &to_mucontext(qp->uobject->context)->uar,
  531. to_mucontext(qp->uobject->context)->db_tab,
  532. to_mqp(qp)->rq.db_index);
  533. }
  534. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  535. kfree(qp);
  536. return 0;
  537. }
  538. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
  539. struct ib_ucontext *context,
  540. struct ib_udata *udata)
  541. {
  542. struct mthca_create_cq ucmd;
  543. struct mthca_cq *cq;
  544. int nent;
  545. int err;
  546. if (entries < 1 || entries > to_mdev(ibdev)->limits.max_cqes)
  547. return ERR_PTR(-EINVAL);
  548. if (context) {
  549. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  550. return ERR_PTR(-EFAULT);
  551. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  552. to_mucontext(context)->db_tab,
  553. ucmd.set_db_index, ucmd.set_db_page);
  554. if (err)
  555. return ERR_PTR(err);
  556. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  557. to_mucontext(context)->db_tab,
  558. ucmd.arm_db_index, ucmd.arm_db_page);
  559. if (err)
  560. goto err_unmap_set;
  561. }
  562. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  563. if (!cq) {
  564. err = -ENOMEM;
  565. goto err_unmap_arm;
  566. }
  567. if (context) {
  568. cq->mr.ibmr.lkey = ucmd.lkey;
  569. cq->set_ci_db_index = ucmd.set_db_index;
  570. cq->arm_db_index = ucmd.arm_db_index;
  571. }
  572. for (nent = 1; nent <= entries; nent <<= 1)
  573. ; /* nothing */
  574. err = mthca_init_cq(to_mdev(ibdev), nent,
  575. context ? to_mucontext(context) : NULL,
  576. context ? ucmd.pdn : to_mdev(ibdev)->driver_pd.pd_num,
  577. cq);
  578. if (err)
  579. goto err_free;
  580. if (context && ib_copy_to_udata(udata, &cq->cqn, sizeof (__u32))) {
  581. mthca_free_cq(to_mdev(ibdev), cq);
  582. goto err_free;
  583. }
  584. return &cq->ibcq;
  585. err_free:
  586. kfree(cq);
  587. err_unmap_arm:
  588. if (context)
  589. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  590. to_mucontext(context)->db_tab, ucmd.arm_db_index);
  591. err_unmap_set:
  592. if (context)
  593. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  594. to_mucontext(context)->db_tab, ucmd.set_db_index);
  595. return ERR_PTR(err);
  596. }
  597. static int mthca_destroy_cq(struct ib_cq *cq)
  598. {
  599. if (cq->uobject) {
  600. mthca_unmap_user_db(to_mdev(cq->device),
  601. &to_mucontext(cq->uobject->context)->uar,
  602. to_mucontext(cq->uobject->context)->db_tab,
  603. to_mcq(cq)->arm_db_index);
  604. mthca_unmap_user_db(to_mdev(cq->device),
  605. &to_mucontext(cq->uobject->context)->uar,
  606. to_mucontext(cq->uobject->context)->db_tab,
  607. to_mcq(cq)->set_ci_db_index);
  608. }
  609. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  610. kfree(cq);
  611. return 0;
  612. }
  613. static inline u32 convert_access(int acc)
  614. {
  615. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  616. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  617. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  618. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  619. MTHCA_MPT_FLAG_LOCAL_READ;
  620. }
  621. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  622. {
  623. struct mthca_mr *mr;
  624. int err;
  625. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  626. if (!mr)
  627. return ERR_PTR(-ENOMEM);
  628. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  629. to_mpd(pd)->pd_num,
  630. convert_access(acc), mr);
  631. if (err) {
  632. kfree(mr);
  633. return ERR_PTR(err);
  634. }
  635. return &mr->ibmr;
  636. }
  637. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  638. struct ib_phys_buf *buffer_list,
  639. int num_phys_buf,
  640. int acc,
  641. u64 *iova_start)
  642. {
  643. struct mthca_mr *mr;
  644. u64 *page_list;
  645. u64 total_size;
  646. u64 mask;
  647. int shift;
  648. int npages;
  649. int err;
  650. int i, j, n;
  651. /* First check that we have enough alignment */
  652. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  653. return ERR_PTR(-EINVAL);
  654. if (num_phys_buf > 1 &&
  655. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK))
  656. return ERR_PTR(-EINVAL);
  657. mask = 0;
  658. total_size = 0;
  659. for (i = 0; i < num_phys_buf; ++i) {
  660. if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
  661. return ERR_PTR(-EINVAL);
  662. if (i != 0 && i != num_phys_buf - 1 &&
  663. (buffer_list[i].size & ~PAGE_MASK))
  664. return ERR_PTR(-EINVAL);
  665. total_size += buffer_list[i].size;
  666. if (i > 0)
  667. mask |= buffer_list[i].addr;
  668. }
  669. /* Find largest page shift we can use to cover buffers */
  670. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  671. if (num_phys_buf > 1) {
  672. if ((1ULL << shift) & mask)
  673. break;
  674. } else {
  675. if (1ULL << shift >=
  676. buffer_list[0].size +
  677. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  678. break;
  679. }
  680. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  681. buffer_list[0].addr &= ~0ull << shift;
  682. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  683. if (!mr)
  684. return ERR_PTR(-ENOMEM);
  685. npages = 0;
  686. for (i = 0; i < num_phys_buf; ++i)
  687. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  688. if (!npages)
  689. return &mr->ibmr;
  690. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  691. if (!page_list) {
  692. kfree(mr);
  693. return ERR_PTR(-ENOMEM);
  694. }
  695. n = 0;
  696. for (i = 0; i < num_phys_buf; ++i)
  697. for (j = 0;
  698. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  699. ++j)
  700. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  701. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  702. "in PD %x; shift %d, npages %d.\n",
  703. (unsigned long long) buffer_list[0].addr,
  704. (unsigned long long) *iova_start,
  705. to_mpd(pd)->pd_num,
  706. shift, npages);
  707. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  708. to_mpd(pd)->pd_num,
  709. page_list, shift, npages,
  710. *iova_start, total_size,
  711. convert_access(acc), mr);
  712. if (err) {
  713. kfree(page_list);
  714. kfree(mr);
  715. return ERR_PTR(err);
  716. }
  717. kfree(page_list);
  718. return &mr->ibmr;
  719. }
  720. static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region,
  721. int acc, struct ib_udata *udata)
  722. {
  723. struct mthca_dev *dev = to_mdev(pd->device);
  724. struct ib_umem_chunk *chunk;
  725. struct mthca_mr *mr;
  726. u64 *pages;
  727. int shift, n, len;
  728. int i, j, k;
  729. int err = 0;
  730. shift = ffs(region->page_size) - 1;
  731. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  732. if (!mr)
  733. return ERR_PTR(-ENOMEM);
  734. n = 0;
  735. list_for_each_entry(chunk, &region->chunk_list, list)
  736. n += chunk->nents;
  737. mr->mtt = mthca_alloc_mtt(dev, n);
  738. if (IS_ERR(mr->mtt)) {
  739. err = PTR_ERR(mr->mtt);
  740. goto err;
  741. }
  742. pages = (u64 *) __get_free_page(GFP_KERNEL);
  743. if (!pages) {
  744. err = -ENOMEM;
  745. goto err_mtt;
  746. }
  747. i = n = 0;
  748. list_for_each_entry(chunk, &region->chunk_list, list)
  749. for (j = 0; j < chunk->nmap; ++j) {
  750. len = sg_dma_len(&chunk->page_list[j]) >> shift;
  751. for (k = 0; k < len; ++k) {
  752. pages[i++] = sg_dma_address(&chunk->page_list[j]) +
  753. region->page_size * k;
  754. /*
  755. * Be friendly to WRITE_MTT command
  756. * and leave two empty slots for the
  757. * index and reserved fields of the
  758. * mailbox.
  759. */
  760. if (i == PAGE_SIZE / sizeof (u64) - 2) {
  761. err = mthca_write_mtt(dev, mr->mtt,
  762. n, pages, i);
  763. if (err)
  764. goto mtt_done;
  765. n += i;
  766. i = 0;
  767. }
  768. }
  769. }
  770. if (i)
  771. err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
  772. mtt_done:
  773. free_page((unsigned long) pages);
  774. if (err)
  775. goto err_mtt;
  776. err = mthca_mr_alloc(dev, to_mpd(pd)->pd_num, shift, region->virt_base,
  777. region->length, convert_access(acc), mr);
  778. if (err)
  779. goto err_mtt;
  780. return &mr->ibmr;
  781. err_mtt:
  782. mthca_free_mtt(dev, mr->mtt);
  783. err:
  784. kfree(mr);
  785. return ERR_PTR(err);
  786. }
  787. static int mthca_dereg_mr(struct ib_mr *mr)
  788. {
  789. struct mthca_mr *mmr = to_mmr(mr);
  790. mthca_free_mr(to_mdev(mr->device), mmr);
  791. kfree(mmr);
  792. return 0;
  793. }
  794. static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
  795. struct ib_fmr_attr *fmr_attr)
  796. {
  797. struct mthca_fmr *fmr;
  798. int err;
  799. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  800. if (!fmr)
  801. return ERR_PTR(-ENOMEM);
  802. memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
  803. err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
  804. convert_access(mr_access_flags), fmr);
  805. if (err) {
  806. kfree(fmr);
  807. return ERR_PTR(err);
  808. }
  809. return &fmr->ibmr;
  810. }
  811. static int mthca_dealloc_fmr(struct ib_fmr *fmr)
  812. {
  813. struct mthca_fmr *mfmr = to_mfmr(fmr);
  814. int err;
  815. err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
  816. if (err)
  817. return err;
  818. kfree(mfmr);
  819. return 0;
  820. }
  821. static int mthca_unmap_fmr(struct list_head *fmr_list)
  822. {
  823. struct ib_fmr *fmr;
  824. int err;
  825. u8 status;
  826. struct mthca_dev *mdev = NULL;
  827. list_for_each_entry(fmr, fmr_list, list) {
  828. if (mdev && to_mdev(fmr->device) != mdev)
  829. return -EINVAL;
  830. mdev = to_mdev(fmr->device);
  831. }
  832. if (!mdev)
  833. return 0;
  834. if (mthca_is_memfree(mdev)) {
  835. list_for_each_entry(fmr, fmr_list, list)
  836. mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
  837. wmb();
  838. } else
  839. list_for_each_entry(fmr, fmr_list, list)
  840. mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
  841. err = mthca_SYNC_TPT(mdev, &status);
  842. if (err)
  843. return err;
  844. if (status)
  845. return -EINVAL;
  846. return 0;
  847. }
  848. static ssize_t show_rev(struct class_device *cdev, char *buf)
  849. {
  850. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  851. return sprintf(buf, "%x\n", dev->rev_id);
  852. }
  853. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  854. {
  855. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  856. return sprintf(buf, "%d.%d.%d\n", (int) (dev->fw_ver >> 32),
  857. (int) (dev->fw_ver >> 16) & 0xffff,
  858. (int) dev->fw_ver & 0xffff);
  859. }
  860. static ssize_t show_hca(struct class_device *cdev, char *buf)
  861. {
  862. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  863. switch (dev->pdev->device) {
  864. case PCI_DEVICE_ID_MELLANOX_TAVOR:
  865. return sprintf(buf, "MT23108\n");
  866. case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
  867. return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  868. case PCI_DEVICE_ID_MELLANOX_ARBEL:
  869. return sprintf(buf, "MT25208\n");
  870. case PCI_DEVICE_ID_MELLANOX_SINAI:
  871. case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
  872. return sprintf(buf, "MT25204\n");
  873. default:
  874. return sprintf(buf, "unknown\n");
  875. }
  876. }
  877. static ssize_t show_board(struct class_device *cdev, char *buf)
  878. {
  879. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  880. return sprintf(buf, "%.*s\n", MTHCA_BOARD_ID_LEN, dev->board_id);
  881. }
  882. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  883. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  884. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  885. static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  886. static struct class_device_attribute *mthca_class_attributes[] = {
  887. &class_device_attr_hw_rev,
  888. &class_device_attr_fw_ver,
  889. &class_device_attr_hca_type,
  890. &class_device_attr_board_id
  891. };
  892. int mthca_register_device(struct mthca_dev *dev)
  893. {
  894. int ret;
  895. int i;
  896. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  897. dev->ib_dev.owner = THIS_MODULE;
  898. dev->ib_dev.uverbs_abi_ver = MTHCA_UVERBS_ABI_VERSION;
  899. dev->ib_dev.uverbs_cmd_mask =
  900. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  901. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  902. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  903. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  904. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  905. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  906. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  907. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  908. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  909. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  910. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  911. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  912. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  913. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  914. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
  915. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  916. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  917. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
  918. dev->ib_dev.node_type = IB_NODE_CA;
  919. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  920. dev->ib_dev.dma_device = &dev->pdev->dev;
  921. dev->ib_dev.class_dev.dev = &dev->pdev->dev;
  922. dev->ib_dev.query_device = mthca_query_device;
  923. dev->ib_dev.query_port = mthca_query_port;
  924. dev->ib_dev.modify_port = mthca_modify_port;
  925. dev->ib_dev.query_pkey = mthca_query_pkey;
  926. dev->ib_dev.query_gid = mthca_query_gid;
  927. dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
  928. dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
  929. dev->ib_dev.mmap = mthca_mmap_uar;
  930. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  931. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  932. dev->ib_dev.create_ah = mthca_ah_create;
  933. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  934. if (dev->mthca_flags & MTHCA_FLAG_SRQ) {
  935. dev->ib_dev.create_srq = mthca_create_srq;
  936. dev->ib_dev.modify_srq = mthca_modify_srq;
  937. dev->ib_dev.destroy_srq = mthca_destroy_srq;
  938. if (mthca_is_memfree(dev))
  939. dev->ib_dev.post_srq_recv = mthca_arbel_post_srq_recv;
  940. else
  941. dev->ib_dev.post_srq_recv = mthca_tavor_post_srq_recv;
  942. }
  943. dev->ib_dev.create_qp = mthca_create_qp;
  944. dev->ib_dev.modify_qp = mthca_modify_qp;
  945. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  946. dev->ib_dev.create_cq = mthca_create_cq;
  947. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  948. dev->ib_dev.poll_cq = mthca_poll_cq;
  949. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  950. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  951. dev->ib_dev.reg_user_mr = mthca_reg_user_mr;
  952. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  953. if (dev->mthca_flags & MTHCA_FLAG_FMR) {
  954. dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
  955. dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
  956. dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
  957. if (mthca_is_memfree(dev))
  958. dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
  959. else
  960. dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
  961. }
  962. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  963. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  964. dev->ib_dev.process_mad = mthca_process_mad;
  965. if (mthca_is_memfree(dev)) {
  966. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  967. dev->ib_dev.post_send = mthca_arbel_post_send;
  968. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  969. } else {
  970. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  971. dev->ib_dev.post_send = mthca_tavor_post_send;
  972. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  973. }
  974. init_MUTEX(&dev->cap_mask_mutex);
  975. ret = ib_register_device(&dev->ib_dev);
  976. if (ret)
  977. return ret;
  978. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  979. ret = class_device_create_file(&dev->ib_dev.class_dev,
  980. mthca_class_attributes[i]);
  981. if (ret) {
  982. ib_unregister_device(&dev->ib_dev);
  983. return ret;
  984. }
  985. }
  986. mthca_start_catas_poll(dev);
  987. return 0;
  988. }
  989. void mthca_unregister_device(struct mthca_dev *dev)
  990. {
  991. mthca_stop_catas_poll(dev);
  992. ib_unregister_device(&dev->ib_dev);
  993. }