iwl3945-base.c 132 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. /*
  55. * module name, copyright, version, etc.
  56. */
  57. #define DRV_DESCRIPTION \
  58. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  59. #ifdef CONFIG_IWLWIFI_DEBUG
  60. #define VD "d"
  61. #else
  62. #define VD
  63. #endif
  64. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  65. #define VS "s"
  66. #else
  67. #define VS
  68. #endif
  69. #define IWL39_VERSION "1.2.26k" VD VS
  70. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  71. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  72. #define DRV_VERSION IWL39_VERSION
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct iwl_mod_params iwl3945_mod_params = {
  79. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /*************** STATION TABLE MANAGEMENT ****
  85. * mac80211 should be examined to determine if sta_info is duplicating
  86. * the functionality provided here
  87. */
  88. /**************************************************************/
  89. #if 0 /* temporary disable till we add real remove station */
  90. /**
  91. * iwl3945_remove_station - Remove driver's knowledge of station.
  92. *
  93. * NOTE: This does not remove station from device's station table.
  94. */
  95. static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  96. {
  97. int index = IWL_INVALID_STATION;
  98. int i;
  99. unsigned long flags;
  100. spin_lock_irqsave(&priv->sta_lock, flags);
  101. if (is_ap)
  102. index = IWL_AP_ID;
  103. else if (is_broadcast_ether_addr(addr))
  104. index = priv->hw_params.bcast_sta_id;
  105. else
  106. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
  107. if (priv->stations_39[i].used &&
  108. !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  109. addr)) {
  110. index = i;
  111. break;
  112. }
  113. if (unlikely(index == IWL_INVALID_STATION))
  114. goto out;
  115. if (priv->stations_39[index].used) {
  116. priv->stations_39[index].used = 0;
  117. priv->num_stations--;
  118. }
  119. BUG_ON(priv->num_stations < 0);
  120. out:
  121. spin_unlock_irqrestore(&priv->sta_lock, flags);
  122. return 0;
  123. }
  124. #endif
  125. /**
  126. * iwl3945_clear_stations_table - Clear the driver's station table
  127. *
  128. * NOTE: This does not clear or otherwise alter the device's station table.
  129. */
  130. void iwl3945_clear_stations_table(struct iwl_priv *priv)
  131. {
  132. unsigned long flags;
  133. spin_lock_irqsave(&priv->sta_lock, flags);
  134. priv->num_stations = 0;
  135. memset(priv->stations_39, 0, sizeof(priv->stations_39));
  136. spin_unlock_irqrestore(&priv->sta_lock, flags);
  137. }
  138. /**
  139. * iwl3945_add_station - Add station to station tables in driver and device
  140. */
  141. u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags, struct ieee80211_sta_ht_cap *ht_info)
  142. {
  143. int i;
  144. int index = IWL_INVALID_STATION;
  145. struct iwl3945_station_entry *station;
  146. unsigned long flags_spin;
  147. u8 rate;
  148. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  149. if (is_ap)
  150. index = IWL_AP_ID;
  151. else if (is_broadcast_ether_addr(addr))
  152. index = priv->hw_params.bcast_sta_id;
  153. else
  154. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
  155. if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  156. addr)) {
  157. index = i;
  158. break;
  159. }
  160. if (!priv->stations_39[i].used &&
  161. index == IWL_INVALID_STATION)
  162. index = i;
  163. }
  164. /* These two conditions has the same outcome but keep them separate
  165. since they have different meaning */
  166. if (unlikely(index == IWL_INVALID_STATION)) {
  167. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  168. return index;
  169. }
  170. if (priv->stations_39[index].used &&
  171. !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
  172. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  173. return index;
  174. }
  175. IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr);
  176. station = &priv->stations_39[index];
  177. station->used = 1;
  178. priv->num_stations++;
  179. /* Set up the REPLY_ADD_STA command to send to device */
  180. memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
  181. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  182. station->sta.mode = 0;
  183. station->sta.sta.sta_id = index;
  184. station->sta.station_flags = 0;
  185. if (priv->band == IEEE80211_BAND_5GHZ)
  186. rate = IWL_RATE_6M_PLCP;
  187. else
  188. rate = IWL_RATE_1M_PLCP;
  189. /* Turn on both antennas for the station... */
  190. station->sta.rate_n_flags =
  191. iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  192. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  193. /* Add station to device's station table */
  194. iwl_send_add_sta(priv,
  195. (struct iwl_addsta_cmd *)&station->sta, flags);
  196. return index;
  197. }
  198. /**
  199. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  200. * @priv: eeprom and antenna fields are used to determine antenna flags
  201. *
  202. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  203. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  204. *
  205. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  206. * IWL_ANTENNA_MAIN - Force MAIN antenna
  207. * IWL_ANTENNA_AUX - Force AUX antenna
  208. */
  209. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  210. {
  211. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  212. switch (iwl3945_mod_params.antenna) {
  213. case IWL_ANTENNA_DIVERSITY:
  214. return 0;
  215. case IWL_ANTENNA_MAIN:
  216. if (eeprom->antenna_switch_type)
  217. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  218. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  219. case IWL_ANTENNA_AUX:
  220. if (eeprom->antenna_switch_type)
  221. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  222. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  223. }
  224. /* bad antenna selector value */
  225. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  226. iwl3945_mod_params.antenna);
  227. return 0; /* "diversity" is default if error */
  228. }
  229. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  230. struct ieee80211_key_conf *keyconf,
  231. u8 sta_id)
  232. {
  233. unsigned long flags;
  234. __le16 key_flags = 0;
  235. int ret;
  236. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  237. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  238. if (sta_id == priv->hw_params.bcast_sta_id)
  239. key_flags |= STA_KEY_MULTICAST_MSK;
  240. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  241. keyconf->hw_key_idx = keyconf->keyidx;
  242. key_flags &= ~STA_KEY_FLG_INVALID;
  243. spin_lock_irqsave(&priv->sta_lock, flags);
  244. priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
  245. priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
  246. memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
  247. keyconf->keylen);
  248. memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
  249. keyconf->keylen);
  250. if ((priv->stations_39[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  251. == STA_KEY_FLG_NO_ENC)
  252. priv->stations_39[sta_id].sta.key.key_offset =
  253. iwl_get_free_ucode_key_index(priv);
  254. /* else, we are overriding an existing key => no need to allocated room
  255. * in uCode. */
  256. WARN(priv->stations_39[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  257. "no space for a new key");
  258. priv->stations_39[sta_id].sta.key.key_flags = key_flags;
  259. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  260. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  261. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  262. ret = iwl_send_add_sta(priv,
  263. (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, CMD_ASYNC);
  264. spin_unlock_irqrestore(&priv->sta_lock, flags);
  265. return ret;
  266. }
  267. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  268. struct ieee80211_key_conf *keyconf,
  269. u8 sta_id)
  270. {
  271. return -EOPNOTSUPP;
  272. }
  273. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  274. struct ieee80211_key_conf *keyconf,
  275. u8 sta_id)
  276. {
  277. return -EOPNOTSUPP;
  278. }
  279. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  280. {
  281. unsigned long flags;
  282. spin_lock_irqsave(&priv->sta_lock, flags);
  283. memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
  284. memset(&priv->stations_39[sta_id].sta.key, 0,
  285. sizeof(struct iwl4965_keyinfo));
  286. priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  287. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  288. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  289. spin_unlock_irqrestore(&priv->sta_lock, flags);
  290. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  291. iwl_send_add_sta(priv,
  292. (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
  293. return 0;
  294. }
  295. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  296. struct ieee80211_key_conf *keyconf, u8 sta_id)
  297. {
  298. int ret = 0;
  299. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  300. switch (keyconf->alg) {
  301. case ALG_CCMP:
  302. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  303. break;
  304. case ALG_TKIP:
  305. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  306. break;
  307. case ALG_WEP:
  308. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  309. break;
  310. default:
  311. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  312. ret = -EINVAL;
  313. }
  314. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  315. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  316. sta_id, ret);
  317. return ret;
  318. }
  319. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  320. {
  321. int ret = -EOPNOTSUPP;
  322. return ret;
  323. }
  324. static int iwl3945_set_static_key(struct iwl_priv *priv,
  325. struct ieee80211_key_conf *key)
  326. {
  327. if (key->alg == ALG_WEP)
  328. return -EOPNOTSUPP;
  329. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  330. return -EINVAL;
  331. }
  332. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  333. {
  334. struct list_head *element;
  335. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  336. priv->frames_count);
  337. while (!list_empty(&priv->free_frames)) {
  338. element = priv->free_frames.next;
  339. list_del(element);
  340. kfree(list_entry(element, struct iwl3945_frame, list));
  341. priv->frames_count--;
  342. }
  343. if (priv->frames_count) {
  344. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  345. priv->frames_count);
  346. priv->frames_count = 0;
  347. }
  348. }
  349. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  350. {
  351. struct iwl3945_frame *frame;
  352. struct list_head *element;
  353. if (list_empty(&priv->free_frames)) {
  354. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  355. if (!frame) {
  356. IWL_ERR(priv, "Could not allocate frame!\n");
  357. return NULL;
  358. }
  359. priv->frames_count++;
  360. return frame;
  361. }
  362. element = priv->free_frames.next;
  363. list_del(element);
  364. return list_entry(element, struct iwl3945_frame, list);
  365. }
  366. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  367. {
  368. memset(frame, 0, sizeof(*frame));
  369. list_add(&frame->list, &priv->free_frames);
  370. }
  371. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  372. struct ieee80211_hdr *hdr,
  373. int left)
  374. {
  375. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  376. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  377. (priv->iw_mode != NL80211_IFTYPE_AP)))
  378. return 0;
  379. if (priv->ibss_beacon->len > left)
  380. return 0;
  381. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  382. return priv->ibss_beacon->len;
  383. }
  384. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  385. {
  386. struct iwl3945_frame *frame;
  387. unsigned int frame_size;
  388. int rc;
  389. u8 rate;
  390. frame = iwl3945_get_free_frame(priv);
  391. if (!frame) {
  392. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  393. "command.\n");
  394. return -ENOMEM;
  395. }
  396. rate = iwl_rate_get_lowest_plcp(priv);
  397. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  398. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  399. &frame->u.cmd[0]);
  400. iwl3945_free_frame(priv, frame);
  401. return rc;
  402. }
  403. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  404. {
  405. if (priv->shared_virt)
  406. pci_free_consistent(priv->pci_dev,
  407. sizeof(struct iwl3945_shared),
  408. priv->shared_virt,
  409. priv->shared_phys);
  410. }
  411. #define MAX_UCODE_BEACON_INTERVAL 1024
  412. #define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
  413. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  414. {
  415. u16 new_val = 0;
  416. u16 beacon_factor = 0;
  417. beacon_factor =
  418. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  419. / MAX_UCODE_BEACON_INTERVAL;
  420. new_val = beacon_val / beacon_factor;
  421. return cpu_to_le16(new_val);
  422. }
  423. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  424. {
  425. u64 interval_tm_unit;
  426. u64 tsf, result;
  427. unsigned long flags;
  428. struct ieee80211_conf *conf = NULL;
  429. u16 beacon_int = 0;
  430. conf = ieee80211_get_hw_conf(priv->hw);
  431. spin_lock_irqsave(&priv->lock, flags);
  432. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  433. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  434. tsf = priv->timestamp;
  435. beacon_int = priv->beacon_int;
  436. spin_unlock_irqrestore(&priv->lock, flags);
  437. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  438. if (beacon_int == 0) {
  439. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  440. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  441. } else {
  442. priv->rxon_timing.beacon_interval =
  443. cpu_to_le16(beacon_int);
  444. priv->rxon_timing.beacon_interval =
  445. iwl3945_adjust_beacon_interval(
  446. le16_to_cpu(priv->rxon_timing.beacon_interval));
  447. }
  448. priv->rxon_timing.atim_window = 0;
  449. } else {
  450. priv->rxon_timing.beacon_interval =
  451. iwl3945_adjust_beacon_interval(conf->beacon_int);
  452. /* TODO: we need to get atim_window from upper stack
  453. * for now we set to 0 */
  454. priv->rxon_timing.atim_window = 0;
  455. }
  456. interval_tm_unit =
  457. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  458. result = do_div(tsf, interval_tm_unit);
  459. priv->rxon_timing.beacon_init_val =
  460. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  461. IWL_DEBUG_ASSOC(priv,
  462. "beacon interval %d beacon timer %d beacon tim %d\n",
  463. le16_to_cpu(priv->rxon_timing.beacon_interval),
  464. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  465. le16_to_cpu(priv->rxon_timing.atim_window));
  466. }
  467. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  468. struct ieee80211_tx_info *info,
  469. struct iwl_cmd *cmd,
  470. struct sk_buff *skb_frag,
  471. int sta_id)
  472. {
  473. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  474. struct iwl3945_hw_key *keyinfo =
  475. &priv->stations_39[sta_id].keyinfo;
  476. switch (keyinfo->alg) {
  477. case ALG_CCMP:
  478. tx->sec_ctl = TX_CMD_SEC_CCM;
  479. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  480. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  481. break;
  482. case ALG_TKIP:
  483. break;
  484. case ALG_WEP:
  485. tx->sec_ctl = TX_CMD_SEC_WEP |
  486. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  487. if (keyinfo->keylen == 13)
  488. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  489. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  490. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  491. "with key %d\n", info->control.hw_key->hw_key_idx);
  492. break;
  493. default:
  494. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  495. break;
  496. }
  497. }
  498. /*
  499. * handle build REPLY_TX command notification.
  500. */
  501. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  502. struct iwl_cmd *cmd,
  503. struct ieee80211_tx_info *info,
  504. struct ieee80211_hdr *hdr, u8 std_id)
  505. {
  506. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  507. __le32 tx_flags = tx->tx_flags;
  508. __le16 fc = hdr->frame_control;
  509. u8 rc_flags = info->control.rates[0].flags;
  510. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  511. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  512. tx_flags |= TX_CMD_FLG_ACK_MSK;
  513. if (ieee80211_is_mgmt(fc))
  514. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  515. if (ieee80211_is_probe_resp(fc) &&
  516. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  517. tx_flags |= TX_CMD_FLG_TSF_MSK;
  518. } else {
  519. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  520. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  521. }
  522. tx->sta_id = std_id;
  523. if (ieee80211_has_morefrags(fc))
  524. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  525. if (ieee80211_is_data_qos(fc)) {
  526. u8 *qc = ieee80211_get_qos_ctl(hdr);
  527. tx->tid_tspec = qc[0] & 0xf;
  528. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  529. } else {
  530. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  531. }
  532. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  533. tx_flags |= TX_CMD_FLG_RTS_MSK;
  534. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  535. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  536. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  537. tx_flags |= TX_CMD_FLG_CTS_MSK;
  538. }
  539. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  540. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  541. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  542. if (ieee80211_is_mgmt(fc)) {
  543. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  544. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  545. else
  546. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  547. } else {
  548. tx->timeout.pm_frame_timeout = 0;
  549. #ifdef CONFIG_IWLWIFI_LEDS
  550. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  551. #endif
  552. }
  553. tx->driver_txop = 0;
  554. tx->tx_flags = tx_flags;
  555. tx->next_frame_len = 0;
  556. }
  557. /*
  558. * start REPLY_TX command process
  559. */
  560. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  561. {
  562. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  563. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  564. struct iwl3945_tx_cmd *tx;
  565. struct iwl_tx_queue *txq = NULL;
  566. struct iwl_queue *q = NULL;
  567. struct iwl_cmd *out_cmd = NULL;
  568. dma_addr_t phys_addr;
  569. dma_addr_t txcmd_phys;
  570. int txq_id = skb_get_queue_mapping(skb);
  571. u16 len, idx, len_org, hdr_len;
  572. u8 id;
  573. u8 unicast;
  574. u8 sta_id;
  575. u8 tid = 0;
  576. u16 seq_number = 0;
  577. __le16 fc;
  578. u8 wait_write_ptr = 0;
  579. u8 *qc = NULL;
  580. unsigned long flags;
  581. int rc;
  582. spin_lock_irqsave(&priv->lock, flags);
  583. if (iwl_is_rfkill(priv)) {
  584. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  585. goto drop_unlock;
  586. }
  587. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  588. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  589. goto drop_unlock;
  590. }
  591. unicast = !is_multicast_ether_addr(hdr->addr1);
  592. id = 0;
  593. fc = hdr->frame_control;
  594. #ifdef CONFIG_IWLWIFI_DEBUG
  595. if (ieee80211_is_auth(fc))
  596. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  597. else if (ieee80211_is_assoc_req(fc))
  598. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  599. else if (ieee80211_is_reassoc_req(fc))
  600. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  601. #endif
  602. /* drop all data frame if we are not associated */
  603. if (ieee80211_is_data(fc) &&
  604. (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
  605. (!iwl_is_associated(priv) ||
  606. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  607. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  608. goto drop_unlock;
  609. }
  610. spin_unlock_irqrestore(&priv->lock, flags);
  611. hdr_len = ieee80211_hdrlen(fc);
  612. /* Find (or create) index into station table for destination station */
  613. sta_id = iwl_get_sta_id(priv, hdr);
  614. if (sta_id == IWL_INVALID_STATION) {
  615. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  616. hdr->addr1);
  617. goto drop;
  618. }
  619. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  620. if (ieee80211_is_data_qos(fc)) {
  621. qc = ieee80211_get_qos_ctl(hdr);
  622. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  623. seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
  624. IEEE80211_SCTL_SEQ;
  625. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  626. (hdr->seq_ctrl &
  627. cpu_to_le16(IEEE80211_SCTL_FRAG));
  628. seq_number += 0x10;
  629. }
  630. /* Descriptor for chosen Tx queue */
  631. txq = &priv->txq[txq_id];
  632. q = &txq->q;
  633. spin_lock_irqsave(&priv->lock, flags);
  634. idx = get_cmd_index(q, q->write_ptr, 0);
  635. /* Set up driver data for this TFD */
  636. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  637. txq->txb[q->write_ptr].skb[0] = skb;
  638. /* Init first empty entry in queue's array of Tx/cmd buffers */
  639. out_cmd = txq->cmd[idx];
  640. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  641. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  642. memset(tx, 0, sizeof(*tx));
  643. /*
  644. * Set up the Tx-command (not MAC!) header.
  645. * Store the chosen Tx queue and TFD index within the sequence field;
  646. * after Tx, uCode's Tx response will return this value so driver can
  647. * locate the frame within the tx queue and do post-tx processing.
  648. */
  649. out_cmd->hdr.cmd = REPLY_TX;
  650. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  651. INDEX_TO_SEQ(q->write_ptr)));
  652. /* Copy MAC header from skb into command buffer */
  653. memcpy(tx->hdr, hdr, hdr_len);
  654. /*
  655. * Use the first empty entry in this queue's command buffer array
  656. * to contain the Tx command and MAC header concatenated together
  657. * (payload data will be in another buffer).
  658. * Size of this varies, due to varying MAC header length.
  659. * If end is not dword aligned, we'll have 2 extra bytes at the end
  660. * of the MAC header (device reads on dword boundaries).
  661. * We'll tell device about this padding later.
  662. */
  663. len = sizeof(struct iwl3945_tx_cmd) +
  664. sizeof(struct iwl_cmd_header) + hdr_len;
  665. len_org = len;
  666. len = (len + 3) & ~3;
  667. if (len_org != len)
  668. len_org = 1;
  669. else
  670. len_org = 0;
  671. /* Physical address of this Tx command's header (not MAC header!),
  672. * within command buffer array. */
  673. txcmd_phys = pci_map_single(priv->pci_dev,
  674. out_cmd, sizeof(struct iwl_cmd),
  675. PCI_DMA_TODEVICE);
  676. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  677. pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
  678. /* Add buffer containing Tx command and MAC(!) header to TFD's
  679. * first entry */
  680. txcmd_phys += offsetof(struct iwl_cmd, hdr);
  681. /* Add buffer containing Tx command and MAC(!) header to TFD's
  682. * first entry */
  683. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  684. txcmd_phys, len, 1, 0);
  685. if (info->control.hw_key)
  686. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  687. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  688. * if any (802.11 null frames have no payload). */
  689. len = skb->len - hdr_len;
  690. if (len) {
  691. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  692. len, PCI_DMA_TODEVICE);
  693. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  694. phys_addr, len,
  695. 0, U32_PAD(len));
  696. }
  697. /* Total # bytes to be transmitted */
  698. len = (u16)skb->len;
  699. tx->len = cpu_to_le16(len);
  700. /* TODO need this for burst mode later on */
  701. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  702. /* set is_hcca to 0; it probably will never be implemented */
  703. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  704. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  705. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  706. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  707. txq->need_update = 1;
  708. if (qc)
  709. priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
  710. } else {
  711. wait_write_ptr = 1;
  712. txq->need_update = 0;
  713. }
  714. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  715. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  716. ieee80211_hdrlen(fc));
  717. /* Tell device the write index *just past* this latest filled TFD */
  718. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  719. rc = iwl_txq_update_write_ptr(priv, txq);
  720. spin_unlock_irqrestore(&priv->lock, flags);
  721. if (rc)
  722. return rc;
  723. if ((iwl_queue_space(q) < q->high_mark)
  724. && priv->mac80211_registered) {
  725. if (wait_write_ptr) {
  726. spin_lock_irqsave(&priv->lock, flags);
  727. txq->need_update = 1;
  728. iwl_txq_update_write_ptr(priv, txq);
  729. spin_unlock_irqrestore(&priv->lock, flags);
  730. }
  731. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  732. }
  733. return 0;
  734. drop_unlock:
  735. spin_unlock_irqrestore(&priv->lock, flags);
  736. drop:
  737. return -1;
  738. }
  739. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  740. #include "iwl-spectrum.h"
  741. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  742. #define BEACON_TIME_MASK_HIGH 0xFF000000
  743. #define TIME_UNIT 1024
  744. /*
  745. * extended beacon time format
  746. * time in usec will be changed into a 32-bit value in 8:24 format
  747. * the high 1 byte is the beacon counts
  748. * the lower 3 bytes is the time in usec within one beacon interval
  749. */
  750. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  751. {
  752. u32 quot;
  753. u32 rem;
  754. u32 interval = beacon_interval * 1024;
  755. if (!interval || !usec)
  756. return 0;
  757. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  758. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  759. return (quot << 24) + rem;
  760. }
  761. /* base is usually what we get from ucode with each received frame,
  762. * the same as HW timer counter counting down
  763. */
  764. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  765. {
  766. u32 base_low = base & BEACON_TIME_MASK_LOW;
  767. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  768. u32 interval = beacon_interval * TIME_UNIT;
  769. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  770. (addon & BEACON_TIME_MASK_HIGH);
  771. if (base_low > addon_low)
  772. res += base_low - addon_low;
  773. else if (base_low < addon_low) {
  774. res += interval + base_low - addon_low;
  775. res += (1 << 24);
  776. } else
  777. res += (1 << 24);
  778. return cpu_to_le32(res);
  779. }
  780. static int iwl3945_get_measurement(struct iwl_priv *priv,
  781. struct ieee80211_measurement_params *params,
  782. u8 type)
  783. {
  784. struct iwl_spectrum_cmd spectrum;
  785. struct iwl_rx_packet *res;
  786. struct iwl_host_cmd cmd = {
  787. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  788. .data = (void *)&spectrum,
  789. .meta.flags = CMD_WANT_SKB,
  790. };
  791. u32 add_time = le64_to_cpu(params->start_time);
  792. int rc;
  793. int spectrum_resp_status;
  794. int duration = le16_to_cpu(params->duration);
  795. if (iwl_is_associated(priv))
  796. add_time =
  797. iwl3945_usecs_to_beacons(
  798. le64_to_cpu(params->start_time) - priv->last_tsf,
  799. le16_to_cpu(priv->rxon_timing.beacon_interval));
  800. memset(&spectrum, 0, sizeof(spectrum));
  801. spectrum.channel_count = cpu_to_le16(1);
  802. spectrum.flags =
  803. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  804. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  805. cmd.len = sizeof(spectrum);
  806. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  807. if (iwl_is_associated(priv))
  808. spectrum.start_time =
  809. iwl3945_add_beacon_time(priv->last_beacon_time,
  810. add_time,
  811. le16_to_cpu(priv->rxon_timing.beacon_interval));
  812. else
  813. spectrum.start_time = 0;
  814. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  815. spectrum.channels[0].channel = params->channel;
  816. spectrum.channels[0].type = type;
  817. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  818. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  819. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  820. rc = iwl_send_cmd_sync(priv, &cmd);
  821. if (rc)
  822. return rc;
  823. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  824. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  825. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  826. rc = -EIO;
  827. }
  828. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  829. switch (spectrum_resp_status) {
  830. case 0: /* Command will be handled */
  831. if (res->u.spectrum.id != 0xff) {
  832. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  833. res->u.spectrum.id);
  834. priv->measurement_status &= ~MEASUREMENT_READY;
  835. }
  836. priv->measurement_status |= MEASUREMENT_ACTIVE;
  837. rc = 0;
  838. break;
  839. case 1: /* Command will not be handled */
  840. rc = -EAGAIN;
  841. break;
  842. }
  843. dev_kfree_skb_any(cmd.meta.u.skb);
  844. return rc;
  845. }
  846. #endif
  847. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  848. struct iwl_rx_mem_buffer *rxb)
  849. {
  850. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  851. struct iwl_alive_resp *palive;
  852. struct delayed_work *pwork;
  853. palive = &pkt->u.alive_frame;
  854. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  855. "0x%01X 0x%01X\n",
  856. palive->is_valid, palive->ver_type,
  857. palive->ver_subtype);
  858. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  859. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  860. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  861. sizeof(struct iwl_alive_resp));
  862. pwork = &priv->init_alive_start;
  863. } else {
  864. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  865. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  866. sizeof(struct iwl_alive_resp));
  867. pwork = &priv->alive_start;
  868. iwl3945_disable_events(priv);
  869. }
  870. /* We delay the ALIVE response by 5ms to
  871. * give the HW RF Kill time to activate... */
  872. if (palive->is_valid == UCODE_VALID_OK)
  873. queue_delayed_work(priv->workqueue, pwork,
  874. msecs_to_jiffies(5));
  875. else
  876. IWL_WARN(priv, "uCode did not respond OK.\n");
  877. }
  878. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  879. struct iwl_rx_mem_buffer *rxb)
  880. {
  881. #ifdef CONFIG_IWLWIFI_DEBUG
  882. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  883. #endif
  884. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  885. return;
  886. }
  887. static void iwl3945_bg_beacon_update(struct work_struct *work)
  888. {
  889. struct iwl_priv *priv =
  890. container_of(work, struct iwl_priv, beacon_update);
  891. struct sk_buff *beacon;
  892. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  893. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  894. if (!beacon) {
  895. IWL_ERR(priv, "update beacon failed\n");
  896. return;
  897. }
  898. mutex_lock(&priv->mutex);
  899. /* new beacon skb is allocated every time; dispose previous.*/
  900. if (priv->ibss_beacon)
  901. dev_kfree_skb(priv->ibss_beacon);
  902. priv->ibss_beacon = beacon;
  903. mutex_unlock(&priv->mutex);
  904. iwl3945_send_beacon_cmd(priv);
  905. }
  906. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  907. struct iwl_rx_mem_buffer *rxb)
  908. {
  909. #ifdef CONFIG_IWLWIFI_DEBUG
  910. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  911. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  912. u8 rate = beacon->beacon_notify_hdr.rate;
  913. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  914. "tsf %d %d rate %d\n",
  915. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  916. beacon->beacon_notify_hdr.failure_frame,
  917. le32_to_cpu(beacon->ibss_mgr_status),
  918. le32_to_cpu(beacon->high_tsf),
  919. le32_to_cpu(beacon->low_tsf), rate);
  920. #endif
  921. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  922. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  923. queue_work(priv->workqueue, &priv->beacon_update);
  924. }
  925. /* Handle notification from uCode that card's power state is changing
  926. * due to software, hardware, or critical temperature RFKILL */
  927. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  928. struct iwl_rx_mem_buffer *rxb)
  929. {
  930. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  931. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  932. unsigned long status = priv->status;
  933. IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
  934. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  935. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  936. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  937. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  938. if (flags & HW_CARD_DISABLED)
  939. set_bit(STATUS_RF_KILL_HW, &priv->status);
  940. else
  941. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  942. if (flags & SW_CARD_DISABLED)
  943. set_bit(STATUS_RF_KILL_SW, &priv->status);
  944. else
  945. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  946. iwl_scan_cancel(priv);
  947. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  948. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  949. (test_bit(STATUS_RF_KILL_SW, &status) !=
  950. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  951. queue_work(priv->workqueue, &priv->rf_kill);
  952. else
  953. wake_up_interruptible(&priv->wait_command_queue);
  954. }
  955. /**
  956. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  957. *
  958. * Setup the RX handlers for each of the reply types sent from the uCode
  959. * to the host.
  960. *
  961. * This function chains into the hardware specific files for them to setup
  962. * any hardware specific handlers as well.
  963. */
  964. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  965. {
  966. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  967. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  968. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  969. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  970. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  971. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  972. iwl_rx_pm_debug_statistics_notif;
  973. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  974. /*
  975. * The same handler is used for both the REPLY to a discrete
  976. * statistics request from the host as well as for the periodic
  977. * statistics notifications (after received beacons) from the uCode.
  978. */
  979. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  980. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  981. iwl_setup_spectrum_handlers(priv);
  982. iwl_setup_rx_scan_handlers(priv);
  983. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  984. /* Set up hardware specific Rx handlers */
  985. iwl3945_hw_rx_handler_setup(priv);
  986. }
  987. /************************** RX-FUNCTIONS ****************************/
  988. /*
  989. * Rx theory of operation
  990. *
  991. * The host allocates 32 DMA target addresses and passes the host address
  992. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  993. * 0 to 31
  994. *
  995. * Rx Queue Indexes
  996. * The host/firmware share two index registers for managing the Rx buffers.
  997. *
  998. * The READ index maps to the first position that the firmware may be writing
  999. * to -- the driver can read up to (but not including) this position and get
  1000. * good data.
  1001. * The READ index is managed by the firmware once the card is enabled.
  1002. *
  1003. * The WRITE index maps to the last position the driver has read from -- the
  1004. * position preceding WRITE is the last slot the firmware can place a packet.
  1005. *
  1006. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  1007. * WRITE = READ.
  1008. *
  1009. * During initialization, the host sets up the READ queue position to the first
  1010. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  1011. *
  1012. * When the firmware places a packet in a buffer, it will advance the READ index
  1013. * and fire the RX interrupt. The driver can then query the READ index and
  1014. * process as many packets as possible, moving the WRITE index forward as it
  1015. * resets the Rx queue buffers with new memory.
  1016. *
  1017. * The management in the driver is as follows:
  1018. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  1019. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  1020. * to replenish the iwl->rxq->rx_free.
  1021. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  1022. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  1023. * 'processed' and 'read' driver indexes as well)
  1024. * + A received packet is processed and handed to the kernel network stack,
  1025. * detached from the iwl->rxq. The driver 'processed' index is updated.
  1026. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  1027. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  1028. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  1029. * were enough free buffers and RX_STALLED is set it is cleared.
  1030. *
  1031. *
  1032. * Driver sequence:
  1033. *
  1034. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  1035. * iwl3945_rx_queue_restock
  1036. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  1037. * queue, updates firmware pointers, and updates
  1038. * the WRITE index. If insufficient rx_free buffers
  1039. * are available, schedules iwl3945_rx_replenish
  1040. *
  1041. * -- enable interrupts --
  1042. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  1043. * READ INDEX, detaching the SKB from the pool.
  1044. * Moves the packet buffer from queue to rx_used.
  1045. * Calls iwl3945_rx_queue_restock to refill any empty
  1046. * slots.
  1047. * ...
  1048. *
  1049. */
  1050. /**
  1051. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  1052. */
  1053. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  1054. dma_addr_t dma_addr)
  1055. {
  1056. return cpu_to_le32((u32)dma_addr);
  1057. }
  1058. /**
  1059. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  1060. *
  1061. * If there are slots in the RX queue that need to be restocked,
  1062. * and we have free pre-allocated buffers, fill the ranks as much
  1063. * as we can, pulling from rx_free.
  1064. *
  1065. * This moves the 'write' index forward to catch up with 'processed', and
  1066. * also updates the memory address in the firmware to reference the new
  1067. * target buffer.
  1068. */
  1069. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  1070. {
  1071. struct iwl_rx_queue *rxq = &priv->rxq;
  1072. struct list_head *element;
  1073. struct iwl_rx_mem_buffer *rxb;
  1074. unsigned long flags;
  1075. int write, rc;
  1076. spin_lock_irqsave(&rxq->lock, flags);
  1077. write = rxq->write & ~0x7;
  1078. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  1079. /* Get next free Rx buffer, remove from free list */
  1080. element = rxq->rx_free.next;
  1081. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  1082. list_del(element);
  1083. /* Point to Rx buffer via next RBD in circular buffer */
  1084. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  1085. rxq->queue[rxq->write] = rxb;
  1086. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  1087. rxq->free_count--;
  1088. }
  1089. spin_unlock_irqrestore(&rxq->lock, flags);
  1090. /* If the pre-allocated buffer pool is dropping low, schedule to
  1091. * refill it */
  1092. if (rxq->free_count <= RX_LOW_WATERMARK)
  1093. queue_work(priv->workqueue, &priv->rx_replenish);
  1094. /* If we've added more space for the firmware to place data, tell it.
  1095. * Increment device's write pointer in multiples of 8. */
  1096. if ((write != (rxq->write & ~0x7))
  1097. || (abs(rxq->write - rxq->read) > 7)) {
  1098. spin_lock_irqsave(&rxq->lock, flags);
  1099. rxq->need_update = 1;
  1100. spin_unlock_irqrestore(&rxq->lock, flags);
  1101. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  1102. if (rc)
  1103. return rc;
  1104. }
  1105. return 0;
  1106. }
  1107. /**
  1108. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  1109. *
  1110. * When moving to rx_free an SKB is allocated for the slot.
  1111. *
  1112. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  1113. * This is called as a scheduled work item (except for during initialization)
  1114. */
  1115. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  1116. {
  1117. struct iwl_rx_queue *rxq = &priv->rxq;
  1118. struct list_head *element;
  1119. struct iwl_rx_mem_buffer *rxb;
  1120. unsigned long flags;
  1121. spin_lock_irqsave(&rxq->lock, flags);
  1122. while (!list_empty(&rxq->rx_used)) {
  1123. element = rxq->rx_used.next;
  1124. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  1125. /* Alloc a new receive buffer */
  1126. rxb->skb =
  1127. alloc_skb(priv->hw_params.rx_buf_size,
  1128. __GFP_NOWARN | GFP_ATOMIC);
  1129. if (!rxb->skb) {
  1130. if (net_ratelimit())
  1131. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  1132. /* We don't reschedule replenish work here -- we will
  1133. * call the restock method and if it still needs
  1134. * more buffers it will schedule replenish */
  1135. break;
  1136. }
  1137. /* If radiotap head is required, reserve some headroom here.
  1138. * The physical head count is a variable rx_stats->phy_count.
  1139. * We reserve 4 bytes here. Plus these extra bytes, the
  1140. * headroom of the physical head should be enough for the
  1141. * radiotap head that iwl3945 supported. See iwl3945_rt.
  1142. */
  1143. skb_reserve(rxb->skb, 4);
  1144. priv->alloc_rxb_skb++;
  1145. list_del(element);
  1146. /* Get physical address of RB/SKB */
  1147. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  1148. rxb->skb->data,
  1149. priv->hw_params.rx_buf_size,
  1150. PCI_DMA_FROMDEVICE);
  1151. list_add_tail(&rxb->list, &rxq->rx_free);
  1152. rxq->free_count++;
  1153. }
  1154. spin_unlock_irqrestore(&rxq->lock, flags);
  1155. }
  1156. /*
  1157. * this should be called while priv->lock is locked
  1158. */
  1159. static void __iwl3945_rx_replenish(void *data)
  1160. {
  1161. struct iwl_priv *priv = data;
  1162. iwl3945_rx_allocate(priv);
  1163. iwl3945_rx_queue_restock(priv);
  1164. }
  1165. void iwl3945_rx_replenish(void *data)
  1166. {
  1167. struct iwl_priv *priv = data;
  1168. unsigned long flags;
  1169. iwl3945_rx_allocate(priv);
  1170. spin_lock_irqsave(&priv->lock, flags);
  1171. iwl3945_rx_queue_restock(priv);
  1172. spin_unlock_irqrestore(&priv->lock, flags);
  1173. }
  1174. /* Convert linear signal-to-noise ratio into dB */
  1175. static u8 ratio2dB[100] = {
  1176. /* 0 1 2 3 4 5 6 7 8 9 */
  1177. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1178. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1179. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1180. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1181. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1182. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1183. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1184. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1185. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1186. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1187. };
  1188. /* Calculates a relative dB value from a ratio of linear
  1189. * (i.e. not dB) signal levels.
  1190. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1191. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1192. {
  1193. /* 1000:1 or higher just report as 60 dB */
  1194. if (sig_ratio >= 1000)
  1195. return 60;
  1196. /* 100:1 or higher, divide by 10 and use table,
  1197. * add 20 dB to make up for divide by 10 */
  1198. if (sig_ratio >= 100)
  1199. return 20 + (int)ratio2dB[sig_ratio/10];
  1200. /* We shouldn't see this */
  1201. if (sig_ratio < 1)
  1202. return 0;
  1203. /* Use table for ratios 1:1 - 99:1 */
  1204. return (int)ratio2dB[sig_ratio];
  1205. }
  1206. #define PERFECT_RSSI (-20) /* dBm */
  1207. #define WORST_RSSI (-95) /* dBm */
  1208. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1209. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1210. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1211. * about formulas used below. */
  1212. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1213. {
  1214. int sig_qual;
  1215. int degradation = PERFECT_RSSI - rssi_dbm;
  1216. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1217. * as indicator; formula is (signal dbm - noise dbm).
  1218. * SNR at or above 40 is a great signal (100%).
  1219. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1220. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1221. if (noise_dbm) {
  1222. if (rssi_dbm - noise_dbm >= 40)
  1223. return 100;
  1224. else if (rssi_dbm < noise_dbm)
  1225. return 0;
  1226. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1227. /* Else use just the signal level.
  1228. * This formula is a least squares fit of data points collected and
  1229. * compared with a reference system that had a percentage (%) display
  1230. * for signal quality. */
  1231. } else
  1232. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1233. (15 * RSSI_RANGE + 62 * degradation)) /
  1234. (RSSI_RANGE * RSSI_RANGE);
  1235. if (sig_qual > 100)
  1236. sig_qual = 100;
  1237. else if (sig_qual < 1)
  1238. sig_qual = 0;
  1239. return sig_qual;
  1240. }
  1241. /**
  1242. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1243. *
  1244. * Uses the priv->rx_handlers callback function array to invoke
  1245. * the appropriate handlers, including command responses,
  1246. * frame-received notifications, and other notifications.
  1247. */
  1248. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1249. {
  1250. struct iwl_rx_mem_buffer *rxb;
  1251. struct iwl_rx_packet *pkt;
  1252. struct iwl_rx_queue *rxq = &priv->rxq;
  1253. u32 r, i;
  1254. int reclaim;
  1255. unsigned long flags;
  1256. u8 fill_rx = 0;
  1257. u32 count = 8;
  1258. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1259. * buffer that the driver may process (last buffer filled by ucode). */
  1260. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1261. i = rxq->read;
  1262. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  1263. fill_rx = 1;
  1264. /* Rx interrupt, but nothing sent from uCode */
  1265. if (i == r)
  1266. IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  1267. while (i != r) {
  1268. rxb = rxq->queue[i];
  1269. /* If an RXB doesn't have a Rx queue slot associated with it,
  1270. * then a bug has been introduced in the queue refilling
  1271. * routines -- catch it here */
  1272. BUG_ON(rxb == NULL);
  1273. rxq->queue[i] = NULL;
  1274. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
  1275. priv->hw_params.rx_buf_size,
  1276. PCI_DMA_FROMDEVICE);
  1277. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1278. /* Reclaim a command buffer only if this packet is a response
  1279. * to a (driver-originated) command.
  1280. * If the packet (e.g. Rx frame) originated from uCode,
  1281. * there is no command buffer to reclaim.
  1282. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1283. * but apparently a few don't get set; catch them here. */
  1284. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1285. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1286. (pkt->hdr.cmd != REPLY_TX);
  1287. /* Based on type of command response or notification,
  1288. * handle those that need handling via function in
  1289. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1290. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1291. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1292. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1293. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1294. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1295. } else {
  1296. /* No handling needed */
  1297. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1298. "r %d i %d No handler needed for %s, 0x%02x\n",
  1299. r, i, get_cmd_string(pkt->hdr.cmd),
  1300. pkt->hdr.cmd);
  1301. }
  1302. if (reclaim) {
  1303. /* Invoke any callbacks, transfer the skb to caller, and
  1304. * fire off the (possibly) blocking iwl_send_cmd()
  1305. * as we reclaim the driver command queue */
  1306. if (rxb && rxb->skb)
  1307. iwl_tx_cmd_complete(priv, rxb);
  1308. else
  1309. IWL_WARN(priv, "Claim null rxb?\n");
  1310. }
  1311. /* For now we just don't re-use anything. We can tweak this
  1312. * later to try and re-use notification packets and SKBs that
  1313. * fail to Rx correctly */
  1314. if (rxb->skb != NULL) {
  1315. priv->alloc_rxb_skb--;
  1316. dev_kfree_skb_any(rxb->skb);
  1317. rxb->skb = NULL;
  1318. }
  1319. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  1320. priv->hw_params.rx_buf_size,
  1321. PCI_DMA_FROMDEVICE);
  1322. spin_lock_irqsave(&rxq->lock, flags);
  1323. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1324. spin_unlock_irqrestore(&rxq->lock, flags);
  1325. i = (i + 1) & RX_QUEUE_MASK;
  1326. /* If there are a lot of unused frames,
  1327. * restock the Rx queue so ucode won't assert. */
  1328. if (fill_rx) {
  1329. count++;
  1330. if (count >= 8) {
  1331. priv->rxq.read = i;
  1332. __iwl3945_rx_replenish(priv);
  1333. count = 0;
  1334. }
  1335. }
  1336. }
  1337. /* Backtrack one entry */
  1338. priv->rxq.read = i;
  1339. iwl3945_rx_queue_restock(priv);
  1340. }
  1341. /* call this function to flush any scheduled tasklet */
  1342. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1343. {
  1344. /* wait to make sure we flush pending tasklet*/
  1345. synchronize_irq(priv->pci_dev->irq);
  1346. tasklet_kill(&priv->irq_tasklet);
  1347. }
  1348. static const char *desc_lookup(int i)
  1349. {
  1350. switch (i) {
  1351. case 1:
  1352. return "FAIL";
  1353. case 2:
  1354. return "BAD_PARAM";
  1355. case 3:
  1356. return "BAD_CHECKSUM";
  1357. case 4:
  1358. return "NMI_INTERRUPT";
  1359. case 5:
  1360. return "SYSASSERT";
  1361. case 6:
  1362. return "FATAL_ERROR";
  1363. }
  1364. return "UNKNOWN";
  1365. }
  1366. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1367. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1368. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1369. {
  1370. u32 i;
  1371. u32 desc, time, count, base, data1;
  1372. u32 blink1, blink2, ilink1, ilink2;
  1373. int rc;
  1374. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1375. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1376. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1377. return;
  1378. }
  1379. rc = iwl_grab_nic_access(priv);
  1380. if (rc) {
  1381. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  1382. return;
  1383. }
  1384. count = iwl_read_targ_mem(priv, base);
  1385. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1386. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1387. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1388. priv->status, count);
  1389. }
  1390. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1391. "ilink1 nmiPC Line\n");
  1392. for (i = ERROR_START_OFFSET;
  1393. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1394. i += ERROR_ELEM_SIZE) {
  1395. desc = iwl_read_targ_mem(priv, base + i);
  1396. time =
  1397. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1398. blink1 =
  1399. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1400. blink2 =
  1401. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1402. ilink1 =
  1403. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1404. ilink2 =
  1405. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1406. data1 =
  1407. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1408. IWL_ERR(priv,
  1409. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1410. desc_lookup(desc), desc, time, blink1, blink2,
  1411. ilink1, ilink2, data1);
  1412. }
  1413. iwl_release_nic_access(priv);
  1414. }
  1415. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1416. /**
  1417. * iwl3945_print_event_log - Dump error event log to syslog
  1418. *
  1419. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  1420. */
  1421. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1422. u32 num_events, u32 mode)
  1423. {
  1424. u32 i;
  1425. u32 base; /* SRAM byte address of event log header */
  1426. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1427. u32 ptr; /* SRAM byte address of log data */
  1428. u32 ev, time, data; /* event log data */
  1429. if (num_events == 0)
  1430. return;
  1431. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1432. if (mode == 0)
  1433. event_size = 2 * sizeof(u32);
  1434. else
  1435. event_size = 3 * sizeof(u32);
  1436. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1437. /* "time" is actually "data" for mode 0 (no timestamp).
  1438. * place event id # at far right for easier visual parsing. */
  1439. for (i = 0; i < num_events; i++) {
  1440. ev = iwl_read_targ_mem(priv, ptr);
  1441. ptr += sizeof(u32);
  1442. time = iwl_read_targ_mem(priv, ptr);
  1443. ptr += sizeof(u32);
  1444. if (mode == 0) {
  1445. /* data, ev */
  1446. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1447. } else {
  1448. data = iwl_read_targ_mem(priv, ptr);
  1449. ptr += sizeof(u32);
  1450. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1451. }
  1452. }
  1453. }
  1454. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1455. {
  1456. int rc;
  1457. u32 base; /* SRAM byte address of event log header */
  1458. u32 capacity; /* event log capacity in # entries */
  1459. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1460. u32 num_wraps; /* # times uCode wrapped to top of log */
  1461. u32 next_entry; /* index of next entry to be written by uCode */
  1462. u32 size; /* # entries that we'll print */
  1463. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1464. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1465. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1466. return;
  1467. }
  1468. rc = iwl_grab_nic_access(priv);
  1469. if (rc) {
  1470. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  1471. return;
  1472. }
  1473. /* event log header */
  1474. capacity = iwl_read_targ_mem(priv, base);
  1475. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1476. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1477. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1478. size = num_wraps ? capacity : next_entry;
  1479. /* bail out if nothing in log */
  1480. if (size == 0) {
  1481. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1482. iwl_release_nic_access(priv);
  1483. return;
  1484. }
  1485. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1486. size, num_wraps);
  1487. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1488. * i.e the next one that uCode would fill. */
  1489. if (num_wraps)
  1490. iwl3945_print_event_log(priv, next_entry,
  1491. capacity - next_entry, mode);
  1492. /* (then/else) start at top of log */
  1493. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1494. iwl_release_nic_access(priv);
  1495. }
  1496. static void iwl3945_error_recovery(struct iwl_priv *priv)
  1497. {
  1498. unsigned long flags;
  1499. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  1500. sizeof(priv->staging_rxon));
  1501. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1502. iwlcore_commit_rxon(priv);
  1503. priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 1, 0, NULL);
  1504. spin_lock_irqsave(&priv->lock, flags);
  1505. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  1506. priv->error_recovering = 0;
  1507. spin_unlock_irqrestore(&priv->lock, flags);
  1508. }
  1509. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1510. {
  1511. u32 inta, handled = 0;
  1512. u32 inta_fh;
  1513. unsigned long flags;
  1514. #ifdef CONFIG_IWLWIFI_DEBUG
  1515. u32 inta_mask;
  1516. #endif
  1517. spin_lock_irqsave(&priv->lock, flags);
  1518. /* Ack/clear/reset pending uCode interrupts.
  1519. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1520. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1521. inta = iwl_read32(priv, CSR_INT);
  1522. iwl_write32(priv, CSR_INT, inta);
  1523. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1524. * Any new interrupts that happen after this, either while we're
  1525. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1526. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1527. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1528. #ifdef CONFIG_IWLWIFI_DEBUG
  1529. if (priv->debug_level & IWL_DL_ISR) {
  1530. /* just for debug */
  1531. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1532. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1533. inta, inta_mask, inta_fh);
  1534. }
  1535. #endif
  1536. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1537. * atomic, make sure that inta covers all the interrupts that
  1538. * we've discovered, even if FH interrupt came in just after
  1539. * reading CSR_INT. */
  1540. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1541. inta |= CSR_INT_BIT_FH_RX;
  1542. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1543. inta |= CSR_INT_BIT_FH_TX;
  1544. /* Now service all interrupt bits discovered above. */
  1545. if (inta & CSR_INT_BIT_HW_ERR) {
  1546. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  1547. /* Tell the device to stop sending interrupts */
  1548. iwl_disable_interrupts(priv);
  1549. iwl_irq_handle_error(priv);
  1550. handled |= CSR_INT_BIT_HW_ERR;
  1551. spin_unlock_irqrestore(&priv->lock, flags);
  1552. return;
  1553. }
  1554. #ifdef CONFIG_IWLWIFI_DEBUG
  1555. if (priv->debug_level & (IWL_DL_ISR)) {
  1556. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1557. if (inta & CSR_INT_BIT_SCD)
  1558. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1559. "the frame/frames.\n");
  1560. /* Alive notification via Rx interrupt will do the real work */
  1561. if (inta & CSR_INT_BIT_ALIVE)
  1562. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1563. }
  1564. #endif
  1565. /* Safely ignore these bits for debug checks below */
  1566. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1567. /* Error detected by uCode */
  1568. if (inta & CSR_INT_BIT_SW_ERR) {
  1569. IWL_ERR(priv, "Microcode SW error detected. "
  1570. "Restarting 0x%X.\n", inta);
  1571. iwl_irq_handle_error(priv);
  1572. handled |= CSR_INT_BIT_SW_ERR;
  1573. }
  1574. /* uCode wakes up after power-down sleep */
  1575. if (inta & CSR_INT_BIT_WAKEUP) {
  1576. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1577. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1578. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1579. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1580. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1581. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1582. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1583. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1584. handled |= CSR_INT_BIT_WAKEUP;
  1585. }
  1586. /* All uCode command responses, including Tx command responses,
  1587. * Rx "responses" (frame-received notification), and other
  1588. * notifications from uCode come through here*/
  1589. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1590. iwl3945_rx_handle(priv);
  1591. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1592. }
  1593. if (inta & CSR_INT_BIT_FH_TX) {
  1594. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1595. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1596. if (!iwl_grab_nic_access(priv)) {
  1597. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1598. (FH39_SRVC_CHNL), 0x0);
  1599. iwl_release_nic_access(priv);
  1600. }
  1601. handled |= CSR_INT_BIT_FH_TX;
  1602. }
  1603. if (inta & ~handled)
  1604. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1605. if (inta & ~CSR_INI_SET_MASK) {
  1606. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1607. inta & ~CSR_INI_SET_MASK);
  1608. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1609. }
  1610. /* Re-enable all interrupts */
  1611. /* only Re-enable if disabled by irq */
  1612. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1613. iwl_enable_interrupts(priv);
  1614. #ifdef CONFIG_IWLWIFI_DEBUG
  1615. if (priv->debug_level & (IWL_DL_ISR)) {
  1616. inta = iwl_read32(priv, CSR_INT);
  1617. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1618. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1619. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1620. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1621. }
  1622. #endif
  1623. spin_unlock_irqrestore(&priv->lock, flags);
  1624. }
  1625. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1626. enum ieee80211_band band,
  1627. u8 is_active, u8 n_probes,
  1628. struct iwl3945_scan_channel *scan_ch)
  1629. {
  1630. const struct ieee80211_channel *channels = NULL;
  1631. const struct ieee80211_supported_band *sband;
  1632. const struct iwl_channel_info *ch_info;
  1633. u16 passive_dwell = 0;
  1634. u16 active_dwell = 0;
  1635. int added, i;
  1636. sband = iwl_get_hw_mode(priv, band);
  1637. if (!sband)
  1638. return 0;
  1639. channels = sband->channels;
  1640. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1641. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1642. if (passive_dwell <= active_dwell)
  1643. passive_dwell = active_dwell + 1;
  1644. for (i = 0, added = 0; i < sband->n_channels; i++) {
  1645. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  1646. continue;
  1647. scan_ch->channel = channels[i].hw_value;
  1648. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1649. if (!is_channel_valid(ch_info)) {
  1650. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1651. scan_ch->channel);
  1652. continue;
  1653. }
  1654. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1655. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1656. /* If passive , set up for auto-switch
  1657. * and use long active_dwell time.
  1658. */
  1659. if (!is_active || is_channel_passive(ch_info) ||
  1660. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1661. scan_ch->type = 0; /* passive */
  1662. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1663. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1664. } else {
  1665. scan_ch->type = 1; /* active */
  1666. }
  1667. /* Set direct probe bits. These may be used both for active
  1668. * scan channels (probes gets sent right away),
  1669. * or for passive channels (probes get se sent only after
  1670. * hearing clear Rx packet).*/
  1671. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1672. if (n_probes)
  1673. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1674. } else {
  1675. /* uCode v1 does not allow setting direct probe bits on
  1676. * passive channel. */
  1677. if ((scan_ch->type & 1) && n_probes)
  1678. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1679. }
  1680. /* Set txpower levels to defaults */
  1681. scan_ch->tpc.dsp_atten = 110;
  1682. /* scan_pwr_info->tpc.dsp_atten; */
  1683. /*scan_pwr_info->tpc.tx_gain; */
  1684. if (band == IEEE80211_BAND_5GHZ)
  1685. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1686. else {
  1687. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1688. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1689. * power level:
  1690. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1691. */
  1692. }
  1693. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1694. scan_ch->channel,
  1695. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1696. (scan_ch->type & 1) ?
  1697. active_dwell : passive_dwell);
  1698. scan_ch++;
  1699. added++;
  1700. }
  1701. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1702. return added;
  1703. }
  1704. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1705. struct ieee80211_rate *rates)
  1706. {
  1707. int i;
  1708. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1709. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1710. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1711. rates[i].hw_value_short = i;
  1712. rates[i].flags = 0;
  1713. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1714. /*
  1715. * If CCK != 1M then set short preamble rate flag.
  1716. */
  1717. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1718. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1719. }
  1720. }
  1721. }
  1722. /******************************************************************************
  1723. *
  1724. * uCode download functions
  1725. *
  1726. ******************************************************************************/
  1727. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1728. {
  1729. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1730. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1731. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1732. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1733. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1734. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1735. }
  1736. /**
  1737. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1738. * looking at all data.
  1739. */
  1740. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1741. {
  1742. u32 val;
  1743. u32 save_len = len;
  1744. int rc = 0;
  1745. u32 errcnt;
  1746. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1747. rc = iwl_grab_nic_access(priv);
  1748. if (rc)
  1749. return rc;
  1750. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1751. IWL39_RTC_INST_LOWER_BOUND);
  1752. errcnt = 0;
  1753. for (; len > 0; len -= sizeof(u32), image++) {
  1754. /* read data comes through single port, auto-incr addr */
  1755. /* NOTE: Use the debugless read so we don't flood kernel log
  1756. * if IWL_DL_IO is set */
  1757. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1758. if (val != le32_to_cpu(*image)) {
  1759. IWL_ERR(priv, "uCode INST section is invalid at "
  1760. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1761. save_len - len, val, le32_to_cpu(*image));
  1762. rc = -EIO;
  1763. errcnt++;
  1764. if (errcnt >= 20)
  1765. break;
  1766. }
  1767. }
  1768. iwl_release_nic_access(priv);
  1769. if (!errcnt)
  1770. IWL_DEBUG_INFO(priv,
  1771. "ucode image in INSTRUCTION memory is good\n");
  1772. return rc;
  1773. }
  1774. /**
  1775. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1776. * using sample data 100 bytes apart. If these sample points are good,
  1777. * it's a pretty good bet that everything between them is good, too.
  1778. */
  1779. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1780. {
  1781. u32 val;
  1782. int rc = 0;
  1783. u32 errcnt = 0;
  1784. u32 i;
  1785. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1786. rc = iwl_grab_nic_access(priv);
  1787. if (rc)
  1788. return rc;
  1789. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1790. /* read data comes through single port, auto-incr addr */
  1791. /* NOTE: Use the debugless read so we don't flood kernel log
  1792. * if IWL_DL_IO is set */
  1793. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1794. i + IWL39_RTC_INST_LOWER_BOUND);
  1795. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1796. if (val != le32_to_cpu(*image)) {
  1797. #if 0 /* Enable this if you want to see details */
  1798. IWL_ERR(priv, "uCode INST section is invalid at "
  1799. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1800. i, val, *image);
  1801. #endif
  1802. rc = -EIO;
  1803. errcnt++;
  1804. if (errcnt >= 3)
  1805. break;
  1806. }
  1807. }
  1808. iwl_release_nic_access(priv);
  1809. return rc;
  1810. }
  1811. /**
  1812. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1813. * and verify its contents
  1814. */
  1815. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1816. {
  1817. __le32 *image;
  1818. u32 len;
  1819. int rc = 0;
  1820. /* Try bootstrap */
  1821. image = (__le32 *)priv->ucode_boot.v_addr;
  1822. len = priv->ucode_boot.len;
  1823. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1824. if (rc == 0) {
  1825. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1826. return 0;
  1827. }
  1828. /* Try initialize */
  1829. image = (__le32 *)priv->ucode_init.v_addr;
  1830. len = priv->ucode_init.len;
  1831. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1832. if (rc == 0) {
  1833. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1834. return 0;
  1835. }
  1836. /* Try runtime/protocol */
  1837. image = (__le32 *)priv->ucode_code.v_addr;
  1838. len = priv->ucode_code.len;
  1839. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1840. if (rc == 0) {
  1841. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1842. return 0;
  1843. }
  1844. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1845. /* Since nothing seems to match, show first several data entries in
  1846. * instruction SRAM, so maybe visual inspection will give a clue.
  1847. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1848. image = (__le32 *)priv->ucode_boot.v_addr;
  1849. len = priv->ucode_boot.len;
  1850. rc = iwl3945_verify_inst_full(priv, image, len);
  1851. return rc;
  1852. }
  1853. static void iwl3945_nic_start(struct iwl_priv *priv)
  1854. {
  1855. /* Remove all resets to allow NIC to operate */
  1856. iwl_write32(priv, CSR_RESET, 0);
  1857. }
  1858. /**
  1859. * iwl3945_read_ucode - Read uCode images from disk file.
  1860. *
  1861. * Copy into buffers for card to fetch via bus-mastering
  1862. */
  1863. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1864. {
  1865. struct iwl_ucode *ucode;
  1866. int ret = -EINVAL, index;
  1867. const struct firmware *ucode_raw;
  1868. /* firmware file name contains uCode/driver compatibility version */
  1869. const char *name_pre = priv->cfg->fw_name_pre;
  1870. const unsigned int api_max = priv->cfg->ucode_api_max;
  1871. const unsigned int api_min = priv->cfg->ucode_api_min;
  1872. char buf[25];
  1873. u8 *src;
  1874. size_t len;
  1875. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1876. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1877. * request_firmware() is synchronous, file is in memory on return. */
  1878. for (index = api_max; index >= api_min; index--) {
  1879. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1880. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1881. if (ret < 0) {
  1882. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1883. buf, ret);
  1884. if (ret == -ENOENT)
  1885. continue;
  1886. else
  1887. goto error;
  1888. } else {
  1889. if (index < api_max)
  1890. IWL_ERR(priv, "Loaded firmware %s, "
  1891. "which is deprecated. "
  1892. " Please use API v%u instead.\n",
  1893. buf, api_max);
  1894. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1895. "(%zd bytes) from disk\n",
  1896. buf, ucode_raw->size);
  1897. break;
  1898. }
  1899. }
  1900. if (ret < 0)
  1901. goto error;
  1902. /* Make sure that we got at least our header! */
  1903. if (ucode_raw->size < sizeof(*ucode)) {
  1904. IWL_ERR(priv, "File size way too small!\n");
  1905. ret = -EINVAL;
  1906. goto err_release;
  1907. }
  1908. /* Data from ucode file: header followed by uCode images */
  1909. ucode = (void *)ucode_raw->data;
  1910. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1911. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1912. inst_size = le32_to_cpu(ucode->inst_size);
  1913. data_size = le32_to_cpu(ucode->data_size);
  1914. init_size = le32_to_cpu(ucode->init_size);
  1915. init_data_size = le32_to_cpu(ucode->init_data_size);
  1916. boot_size = le32_to_cpu(ucode->boot_size);
  1917. /* api_ver should match the api version forming part of the
  1918. * firmware filename ... but we don't check for that and only rely
  1919. * on the API version read from firmware header from here on forward */
  1920. if (api_ver < api_min || api_ver > api_max) {
  1921. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1922. "Driver supports v%u, firmware is v%u.\n",
  1923. api_max, api_ver);
  1924. priv->ucode_ver = 0;
  1925. ret = -EINVAL;
  1926. goto err_release;
  1927. }
  1928. if (api_ver != api_max)
  1929. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1930. "got %u. New firmware can be obtained "
  1931. "from http://www.intellinuxwireless.org.\n",
  1932. api_max, api_ver);
  1933. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1934. IWL_UCODE_MAJOR(priv->ucode_ver),
  1935. IWL_UCODE_MINOR(priv->ucode_ver),
  1936. IWL_UCODE_API(priv->ucode_ver),
  1937. IWL_UCODE_SERIAL(priv->ucode_ver));
  1938. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1939. priv->ucode_ver);
  1940. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1941. inst_size);
  1942. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1943. data_size);
  1944. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1945. init_size);
  1946. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1947. init_data_size);
  1948. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1949. boot_size);
  1950. /* Verify size of file vs. image size info in file's header */
  1951. if (ucode_raw->size < sizeof(*ucode) +
  1952. inst_size + data_size + init_size +
  1953. init_data_size + boot_size) {
  1954. IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
  1955. ucode_raw->size);
  1956. ret = -EINVAL;
  1957. goto err_release;
  1958. }
  1959. /* Verify that uCode images will fit in card's SRAM */
  1960. if (inst_size > IWL39_MAX_INST_SIZE) {
  1961. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1962. inst_size);
  1963. ret = -EINVAL;
  1964. goto err_release;
  1965. }
  1966. if (data_size > IWL39_MAX_DATA_SIZE) {
  1967. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1968. data_size);
  1969. ret = -EINVAL;
  1970. goto err_release;
  1971. }
  1972. if (init_size > IWL39_MAX_INST_SIZE) {
  1973. IWL_DEBUG_INFO(priv,
  1974. "uCode init instr len %d too large to fit in\n",
  1975. init_size);
  1976. ret = -EINVAL;
  1977. goto err_release;
  1978. }
  1979. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1980. IWL_DEBUG_INFO(priv,
  1981. "uCode init data len %d too large to fit in\n",
  1982. init_data_size);
  1983. ret = -EINVAL;
  1984. goto err_release;
  1985. }
  1986. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1987. IWL_DEBUG_INFO(priv,
  1988. "uCode boot instr len %d too large to fit in\n",
  1989. boot_size);
  1990. ret = -EINVAL;
  1991. goto err_release;
  1992. }
  1993. /* Allocate ucode buffers for card's bus-master loading ... */
  1994. /* Runtime instructions and 2 copies of data:
  1995. * 1) unmodified from disk
  1996. * 2) backup cache for save/restore during power-downs */
  1997. priv->ucode_code.len = inst_size;
  1998. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1999. priv->ucode_data.len = data_size;
  2000. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  2001. priv->ucode_data_backup.len = data_size;
  2002. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  2003. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  2004. !priv->ucode_data_backup.v_addr)
  2005. goto err_pci_alloc;
  2006. /* Initialization instructions and data */
  2007. if (init_size && init_data_size) {
  2008. priv->ucode_init.len = init_size;
  2009. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  2010. priv->ucode_init_data.len = init_data_size;
  2011. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  2012. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  2013. goto err_pci_alloc;
  2014. }
  2015. /* Bootstrap (instructions only, no data) */
  2016. if (boot_size) {
  2017. priv->ucode_boot.len = boot_size;
  2018. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  2019. if (!priv->ucode_boot.v_addr)
  2020. goto err_pci_alloc;
  2021. }
  2022. /* Copy images into buffers for card's bus-master reads ... */
  2023. /* Runtime instructions (first block of data in file) */
  2024. src = &ucode->data[0];
  2025. len = priv->ucode_code.len;
  2026. IWL_DEBUG_INFO(priv,
  2027. "Copying (but not loading) uCode instr len %zd\n", len);
  2028. memcpy(priv->ucode_code.v_addr, src, len);
  2029. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  2030. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  2031. /* Runtime data (2nd block)
  2032. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  2033. src = &ucode->data[inst_size];
  2034. len = priv->ucode_data.len;
  2035. IWL_DEBUG_INFO(priv,
  2036. "Copying (but not loading) uCode data len %zd\n", len);
  2037. memcpy(priv->ucode_data.v_addr, src, len);
  2038. memcpy(priv->ucode_data_backup.v_addr, src, len);
  2039. /* Initialization instructions (3rd block) */
  2040. if (init_size) {
  2041. src = &ucode->data[inst_size + data_size];
  2042. len = priv->ucode_init.len;
  2043. IWL_DEBUG_INFO(priv,
  2044. "Copying (but not loading) init instr len %zd\n", len);
  2045. memcpy(priv->ucode_init.v_addr, src, len);
  2046. }
  2047. /* Initialization data (4th block) */
  2048. if (init_data_size) {
  2049. src = &ucode->data[inst_size + data_size + init_size];
  2050. len = priv->ucode_init_data.len;
  2051. IWL_DEBUG_INFO(priv,
  2052. "Copying (but not loading) init data len %zd\n", len);
  2053. memcpy(priv->ucode_init_data.v_addr, src, len);
  2054. }
  2055. /* Bootstrap instructions (5th block) */
  2056. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  2057. len = priv->ucode_boot.len;
  2058. IWL_DEBUG_INFO(priv,
  2059. "Copying (but not loading) boot instr len %zd\n", len);
  2060. memcpy(priv->ucode_boot.v_addr, src, len);
  2061. /* We have our copies now, allow OS release its copies */
  2062. release_firmware(ucode_raw);
  2063. return 0;
  2064. err_pci_alloc:
  2065. IWL_ERR(priv, "failed to allocate pci memory\n");
  2066. ret = -ENOMEM;
  2067. iwl3945_dealloc_ucode_pci(priv);
  2068. err_release:
  2069. release_firmware(ucode_raw);
  2070. error:
  2071. return ret;
  2072. }
  2073. /**
  2074. * iwl3945_set_ucode_ptrs - Set uCode address location
  2075. *
  2076. * Tell initialization uCode where to find runtime uCode.
  2077. *
  2078. * BSM registers initially contain pointers to initialization uCode.
  2079. * We need to replace them to load runtime uCode inst and data,
  2080. * and to save runtime data when powering down.
  2081. */
  2082. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2083. {
  2084. dma_addr_t pinst;
  2085. dma_addr_t pdata;
  2086. int rc = 0;
  2087. unsigned long flags;
  2088. /* bits 31:0 for 3945 */
  2089. pinst = priv->ucode_code.p_addr;
  2090. pdata = priv->ucode_data_backup.p_addr;
  2091. spin_lock_irqsave(&priv->lock, flags);
  2092. rc = iwl_grab_nic_access(priv);
  2093. if (rc) {
  2094. spin_unlock_irqrestore(&priv->lock, flags);
  2095. return rc;
  2096. }
  2097. /* Tell bootstrap uCode where to find image to load */
  2098. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2099. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2100. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2101. priv->ucode_data.len);
  2102. /* Inst byte count must be last to set up, bit 31 signals uCode
  2103. * that all new ptr/size info is in place */
  2104. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2105. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2106. iwl_release_nic_access(priv);
  2107. spin_unlock_irqrestore(&priv->lock, flags);
  2108. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2109. return rc;
  2110. }
  2111. /**
  2112. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2113. *
  2114. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2115. *
  2116. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2117. */
  2118. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2119. {
  2120. /* Check alive response for "valid" sign from uCode */
  2121. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2122. /* We had an error bringing up the hardware, so take it
  2123. * all the way back down so we can try again */
  2124. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2125. goto restart;
  2126. }
  2127. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2128. * This is a paranoid check, because we would not have gotten the
  2129. * "initialize" alive if code weren't properly loaded. */
  2130. if (iwl3945_verify_ucode(priv)) {
  2131. /* Runtime instruction load was bad;
  2132. * take it all the way back down so we can try again */
  2133. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2134. goto restart;
  2135. }
  2136. /* Send pointers to protocol/runtime uCode image ... init code will
  2137. * load and launch runtime uCode, which will send us another "Alive"
  2138. * notification. */
  2139. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2140. if (iwl3945_set_ucode_ptrs(priv)) {
  2141. /* Runtime instruction load won't happen;
  2142. * take it all the way back down so we can try again */
  2143. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2144. goto restart;
  2145. }
  2146. return;
  2147. restart:
  2148. queue_work(priv->workqueue, &priv->restart);
  2149. }
  2150. /**
  2151. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2152. * from protocol/runtime uCode (initialization uCode's
  2153. * Alive gets handled by iwl3945_init_alive_start()).
  2154. */
  2155. static void iwl3945_alive_start(struct iwl_priv *priv)
  2156. {
  2157. int rc = 0;
  2158. int thermal_spin = 0;
  2159. u32 rfkill;
  2160. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2161. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2162. /* We had an error bringing up the hardware, so take it
  2163. * all the way back down so we can try again */
  2164. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2165. goto restart;
  2166. }
  2167. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2168. * This is a paranoid check, because we would not have gotten the
  2169. * "runtime" alive if code weren't properly loaded. */
  2170. if (iwl3945_verify_ucode(priv)) {
  2171. /* Runtime instruction load was bad;
  2172. * take it all the way back down so we can try again */
  2173. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2174. goto restart;
  2175. }
  2176. priv->cfg->ops->smgmt->clear_station_table(priv);
  2177. rc = iwl_grab_nic_access(priv);
  2178. if (rc) {
  2179. IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
  2180. return;
  2181. }
  2182. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2183. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2184. iwl_release_nic_access(priv);
  2185. if (rfkill & 0x1) {
  2186. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2187. /* if RFKILL is not on, then wait for thermal
  2188. * sensor in adapter to kick in */
  2189. while (iwl3945_hw_get_temperature(priv) == 0) {
  2190. thermal_spin++;
  2191. udelay(10);
  2192. }
  2193. if (thermal_spin)
  2194. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2195. thermal_spin * 10);
  2196. } else
  2197. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2198. /* After the ALIVE response, we can send commands to 3945 uCode */
  2199. set_bit(STATUS_ALIVE, &priv->status);
  2200. /* Clear out the uCode error bit if it is set */
  2201. clear_bit(STATUS_FW_ERROR, &priv->status);
  2202. if (iwl_is_rfkill(priv))
  2203. return;
  2204. ieee80211_wake_queues(priv->hw);
  2205. priv->active_rate = priv->rates_mask;
  2206. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2207. iwl_power_update_mode(priv, false);
  2208. if (iwl_is_associated(priv)) {
  2209. struct iwl3945_rxon_cmd *active_rxon =
  2210. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2211. memcpy(&priv->staging_rxon, &priv->active_rxon,
  2212. sizeof(priv->staging_rxon));
  2213. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2214. } else {
  2215. /* Initialize our rx_config data */
  2216. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2217. }
  2218. /* Configure Bluetooth device coexistence support */
  2219. iwl_send_bt_config(priv);
  2220. /* Configure the adapter for unassociated operation */
  2221. iwlcore_commit_rxon(priv);
  2222. iwl3945_reg_txpower_periodic(priv);
  2223. iwl3945_led_register(priv);
  2224. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2225. set_bit(STATUS_READY, &priv->status);
  2226. wake_up_interruptible(&priv->wait_command_queue);
  2227. if (priv->error_recovering)
  2228. iwl3945_error_recovery(priv);
  2229. /* reassociate for ADHOC mode */
  2230. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2231. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2232. priv->vif);
  2233. if (beacon)
  2234. iwl_mac_beacon_update(priv->hw, beacon);
  2235. }
  2236. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2237. iwl_set_mode(priv, priv->iw_mode);
  2238. return;
  2239. restart:
  2240. queue_work(priv->workqueue, &priv->restart);
  2241. }
  2242. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2243. static void __iwl3945_down(struct iwl_priv *priv)
  2244. {
  2245. unsigned long flags;
  2246. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2247. struct ieee80211_conf *conf = NULL;
  2248. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2249. conf = ieee80211_get_hw_conf(priv->hw);
  2250. if (!exit_pending)
  2251. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2252. iwl3945_led_unregister(priv);
  2253. priv->cfg->ops->smgmt->clear_station_table(priv);
  2254. /* Unblock any waiting calls */
  2255. wake_up_interruptible_all(&priv->wait_command_queue);
  2256. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2257. * exiting the module */
  2258. if (!exit_pending)
  2259. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2260. /* stop and reset the on-board processor */
  2261. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2262. /* tell the device to stop sending interrupts */
  2263. spin_lock_irqsave(&priv->lock, flags);
  2264. iwl_disable_interrupts(priv);
  2265. spin_unlock_irqrestore(&priv->lock, flags);
  2266. iwl_synchronize_irq(priv);
  2267. if (priv->mac80211_registered)
  2268. ieee80211_stop_queues(priv->hw);
  2269. /* If we have not previously called iwl3945_init() then
  2270. * clear all bits but the RF Kill bits and return */
  2271. if (!iwl_is_init(priv)) {
  2272. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2273. STATUS_RF_KILL_HW |
  2274. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  2275. STATUS_RF_KILL_SW |
  2276. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2277. STATUS_GEO_CONFIGURED |
  2278. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2279. STATUS_EXIT_PENDING;
  2280. goto exit;
  2281. }
  2282. /* ...otherwise clear out all the status bits but the RF Kill
  2283. * bits and continue taking the NIC down. */
  2284. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2285. STATUS_RF_KILL_HW |
  2286. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  2287. STATUS_RF_KILL_SW |
  2288. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2289. STATUS_GEO_CONFIGURED |
  2290. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2291. STATUS_FW_ERROR |
  2292. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2293. STATUS_EXIT_PENDING;
  2294. priv->cfg->ops->lib->apm_ops.reset(priv);
  2295. spin_lock_irqsave(&priv->lock, flags);
  2296. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2297. spin_unlock_irqrestore(&priv->lock, flags);
  2298. iwl3945_hw_txq_ctx_stop(priv);
  2299. iwl3945_hw_rxq_stop(priv);
  2300. spin_lock_irqsave(&priv->lock, flags);
  2301. if (!iwl_grab_nic_access(priv)) {
  2302. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2303. APMG_CLK_VAL_DMA_CLK_RQT);
  2304. iwl_release_nic_access(priv);
  2305. }
  2306. spin_unlock_irqrestore(&priv->lock, flags);
  2307. udelay(5);
  2308. if (exit_pending)
  2309. priv->cfg->ops->lib->apm_ops.stop(priv);
  2310. else
  2311. priv->cfg->ops->lib->apm_ops.reset(priv);
  2312. exit:
  2313. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2314. if (priv->ibss_beacon)
  2315. dev_kfree_skb(priv->ibss_beacon);
  2316. priv->ibss_beacon = NULL;
  2317. /* clear out any free frames */
  2318. iwl3945_clear_free_frames(priv);
  2319. }
  2320. static void iwl3945_down(struct iwl_priv *priv)
  2321. {
  2322. mutex_lock(&priv->mutex);
  2323. __iwl3945_down(priv);
  2324. mutex_unlock(&priv->mutex);
  2325. iwl3945_cancel_deferred_work(priv);
  2326. }
  2327. #define MAX_HW_RESTARTS 5
  2328. static int __iwl3945_up(struct iwl_priv *priv)
  2329. {
  2330. int rc, i;
  2331. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2332. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2333. return -EIO;
  2334. }
  2335. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  2336. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  2337. "parameter)\n");
  2338. return -ENODEV;
  2339. }
  2340. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2341. IWL_ERR(priv, "ucode not available for device bring up\n");
  2342. return -EIO;
  2343. }
  2344. /* If platform's RF_KILL switch is NOT set to KILL */
  2345. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2346. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2347. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2348. else {
  2349. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2350. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2351. return -ENODEV;
  2352. }
  2353. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2354. rc = iwl3945_hw_nic_init(priv);
  2355. if (rc) {
  2356. IWL_ERR(priv, "Unable to int nic\n");
  2357. return rc;
  2358. }
  2359. /* make sure rfkill handshake bits are cleared */
  2360. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2361. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2362. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2363. /* clear (again), then enable host interrupts */
  2364. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2365. iwl_enable_interrupts(priv);
  2366. /* really make sure rfkill handshake bits are cleared */
  2367. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2368. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2369. /* Copy original ucode data image from disk into backup cache.
  2370. * This will be used to initialize the on-board processor's
  2371. * data SRAM for a clean start when the runtime program first loads. */
  2372. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2373. priv->ucode_data.len);
  2374. /* We return success when we resume from suspend and rf_kill is on. */
  2375. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2376. return 0;
  2377. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2378. priv->cfg->ops->smgmt->clear_station_table(priv);
  2379. /* load bootstrap state machine,
  2380. * load bootstrap program into processor's memory,
  2381. * prepare to load the "initialize" uCode */
  2382. priv->cfg->ops->lib->load_ucode(priv);
  2383. if (rc) {
  2384. IWL_ERR(priv,
  2385. "Unable to set up bootstrap uCode: %d\n", rc);
  2386. continue;
  2387. }
  2388. /* start card; "initialize" will load runtime ucode */
  2389. iwl3945_nic_start(priv);
  2390. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2391. return 0;
  2392. }
  2393. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2394. __iwl3945_down(priv);
  2395. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2396. /* tried to restart and config the device for as long as our
  2397. * patience could withstand */
  2398. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2399. return -EIO;
  2400. }
  2401. /*****************************************************************************
  2402. *
  2403. * Workqueue callbacks
  2404. *
  2405. *****************************************************************************/
  2406. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2407. {
  2408. struct iwl_priv *priv =
  2409. container_of(data, struct iwl_priv, init_alive_start.work);
  2410. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2411. return;
  2412. mutex_lock(&priv->mutex);
  2413. iwl3945_init_alive_start(priv);
  2414. mutex_unlock(&priv->mutex);
  2415. }
  2416. static void iwl3945_bg_alive_start(struct work_struct *data)
  2417. {
  2418. struct iwl_priv *priv =
  2419. container_of(data, struct iwl_priv, alive_start.work);
  2420. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2421. return;
  2422. mutex_lock(&priv->mutex);
  2423. iwl3945_alive_start(priv);
  2424. mutex_unlock(&priv->mutex);
  2425. }
  2426. static void iwl3945_rfkill_poll(struct work_struct *data)
  2427. {
  2428. struct iwl_priv *priv =
  2429. container_of(data, struct iwl_priv, rfkill_poll.work);
  2430. unsigned long status = priv->status;
  2431. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2432. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2433. else
  2434. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2435. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  2436. queue_work(priv->workqueue, &priv->rf_kill);
  2437. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2438. round_jiffies_relative(2 * HZ));
  2439. }
  2440. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2441. static void iwl3945_bg_request_scan(struct work_struct *data)
  2442. {
  2443. struct iwl_priv *priv =
  2444. container_of(data, struct iwl_priv, request_scan);
  2445. struct iwl_host_cmd cmd = {
  2446. .id = REPLY_SCAN_CMD,
  2447. .len = sizeof(struct iwl3945_scan_cmd),
  2448. .meta.flags = CMD_SIZE_HUGE,
  2449. };
  2450. int rc = 0;
  2451. struct iwl3945_scan_cmd *scan;
  2452. struct ieee80211_conf *conf = NULL;
  2453. u8 n_probes = 2;
  2454. enum ieee80211_band band;
  2455. DECLARE_SSID_BUF(ssid);
  2456. conf = ieee80211_get_hw_conf(priv->hw);
  2457. mutex_lock(&priv->mutex);
  2458. if (!iwl_is_ready(priv)) {
  2459. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2460. goto done;
  2461. }
  2462. /* Make sure the scan wasn't canceled before this queued work
  2463. * was given the chance to run... */
  2464. if (!test_bit(STATUS_SCANNING, &priv->status))
  2465. goto done;
  2466. /* This should never be called or scheduled if there is currently
  2467. * a scan active in the hardware. */
  2468. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2469. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2470. "Ignoring second request.\n");
  2471. rc = -EIO;
  2472. goto done;
  2473. }
  2474. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2475. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2476. goto done;
  2477. }
  2478. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2479. IWL_DEBUG_HC(priv,
  2480. "Scan request while abort pending. Queuing.\n");
  2481. goto done;
  2482. }
  2483. if (iwl_is_rfkill(priv)) {
  2484. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2485. goto done;
  2486. }
  2487. if (!test_bit(STATUS_READY, &priv->status)) {
  2488. IWL_DEBUG_HC(priv,
  2489. "Scan request while uninitialized. Queuing.\n");
  2490. goto done;
  2491. }
  2492. if (!priv->scan_bands) {
  2493. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2494. goto done;
  2495. }
  2496. if (!priv->scan) {
  2497. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2498. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2499. if (!priv->scan) {
  2500. rc = -ENOMEM;
  2501. goto done;
  2502. }
  2503. }
  2504. scan = priv->scan;
  2505. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2506. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2507. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2508. if (iwl_is_associated(priv)) {
  2509. u16 interval = 0;
  2510. u32 extra;
  2511. u32 suspend_time = 100;
  2512. u32 scan_suspend_time = 100;
  2513. unsigned long flags;
  2514. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2515. spin_lock_irqsave(&priv->lock, flags);
  2516. interval = priv->beacon_int;
  2517. spin_unlock_irqrestore(&priv->lock, flags);
  2518. scan->suspend_time = 0;
  2519. scan->max_out_time = cpu_to_le32(200 * 1024);
  2520. if (!interval)
  2521. interval = suspend_time;
  2522. /*
  2523. * suspend time format:
  2524. * 0-19: beacon interval in usec (time before exec.)
  2525. * 20-23: 0
  2526. * 24-31: number of beacons (suspend between channels)
  2527. */
  2528. extra = (suspend_time / interval) << 24;
  2529. scan_suspend_time = 0xFF0FFFFF &
  2530. (extra | ((suspend_time % interval) * 1024));
  2531. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2532. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2533. scan_suspend_time, interval);
  2534. }
  2535. /* We should add the ability for user to lock to PASSIVE ONLY */
  2536. if (priv->one_direct_scan) {
  2537. IWL_DEBUG_SCAN(priv, "Kicking off one direct scan for '%s'\n",
  2538. print_ssid(ssid, priv->direct_ssid,
  2539. priv->direct_ssid_len));
  2540. scan->direct_scan[0].id = WLAN_EID_SSID;
  2541. scan->direct_scan[0].len = priv->direct_ssid_len;
  2542. memcpy(scan->direct_scan[0].ssid,
  2543. priv->direct_ssid, priv->direct_ssid_len);
  2544. n_probes++;
  2545. } else
  2546. IWL_DEBUG_SCAN(priv, "Kicking off one indirect scan.\n");
  2547. /* We don't build a direct scan probe request; the uCode will do
  2548. * that based on the direct_mask added to each channel entry */
  2549. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2550. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2551. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2552. /* flags + rate selection */
  2553. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2554. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2555. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2556. scan->good_CRC_th = 0;
  2557. band = IEEE80211_BAND_2GHZ;
  2558. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2559. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2560. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  2561. band = IEEE80211_BAND_5GHZ;
  2562. } else {
  2563. IWL_WARN(priv, "Invalid scan band count\n");
  2564. goto done;
  2565. }
  2566. scan->tx_cmd.len = cpu_to_le16(
  2567. iwl_fill_probe_req(priv, band,
  2568. (struct ieee80211_mgmt *)scan->data,
  2569. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2570. /* select Rx antennas */
  2571. scan->flags |= iwl3945_get_antenna_flags(priv);
  2572. if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
  2573. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2574. scan->channel_count =
  2575. iwl3945_get_channels_for_scan(priv, band, 1, /* active */
  2576. n_probes,
  2577. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2578. if (scan->channel_count == 0) {
  2579. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2580. goto done;
  2581. }
  2582. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2583. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2584. cmd.data = scan;
  2585. scan->len = cpu_to_le16(cmd.len);
  2586. set_bit(STATUS_SCAN_HW, &priv->status);
  2587. rc = iwl_send_cmd_sync(priv, &cmd);
  2588. if (rc)
  2589. goto done;
  2590. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2591. IWL_SCAN_CHECK_WATCHDOG);
  2592. mutex_unlock(&priv->mutex);
  2593. return;
  2594. done:
  2595. /* can not perform scan make sure we clear scanning
  2596. * bits from status so next scan request can be performed.
  2597. * if we dont clear scanning status bit here all next scan
  2598. * will fail
  2599. */
  2600. clear_bit(STATUS_SCAN_HW, &priv->status);
  2601. clear_bit(STATUS_SCANNING, &priv->status);
  2602. /* inform mac80211 scan aborted */
  2603. queue_work(priv->workqueue, &priv->scan_completed);
  2604. mutex_unlock(&priv->mutex);
  2605. }
  2606. static void iwl3945_bg_up(struct work_struct *data)
  2607. {
  2608. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2609. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2610. return;
  2611. mutex_lock(&priv->mutex);
  2612. __iwl3945_up(priv);
  2613. mutex_unlock(&priv->mutex);
  2614. iwl_rfkill_set_hw_state(priv);
  2615. }
  2616. static void iwl3945_bg_restart(struct work_struct *data)
  2617. {
  2618. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2619. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2620. return;
  2621. iwl3945_down(priv);
  2622. queue_work(priv->workqueue, &priv->up);
  2623. }
  2624. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2625. {
  2626. struct iwl_priv *priv =
  2627. container_of(data, struct iwl_priv, rx_replenish);
  2628. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2629. return;
  2630. mutex_lock(&priv->mutex);
  2631. iwl3945_rx_replenish(priv);
  2632. mutex_unlock(&priv->mutex);
  2633. }
  2634. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
  2635. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2636. void iwl3945_post_associate(struct iwl_priv *priv)
  2637. {
  2638. int rc = 0;
  2639. struct ieee80211_conf *conf = NULL;
  2640. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2641. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2642. return;
  2643. }
  2644. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2645. priv->assoc_id, priv->active_rxon.bssid_addr);
  2646. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2647. return;
  2648. if (!priv->vif || !priv->is_open)
  2649. return;
  2650. iwl_scan_cancel_timeout(priv, 200);
  2651. conf = ieee80211_get_hw_conf(priv->hw);
  2652. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2653. iwlcore_commit_rxon(priv);
  2654. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2655. iwl3945_setup_rxon_timing(priv);
  2656. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2657. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2658. if (rc)
  2659. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2660. "Attempting to continue.\n");
  2661. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2662. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2663. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2664. priv->assoc_id, priv->beacon_int);
  2665. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2666. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2667. else
  2668. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2669. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2670. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2671. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2672. else
  2673. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2674. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2675. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2676. }
  2677. iwlcore_commit_rxon(priv);
  2678. switch (priv->iw_mode) {
  2679. case NL80211_IFTYPE_STATION:
  2680. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2681. break;
  2682. case NL80211_IFTYPE_ADHOC:
  2683. priv->assoc_id = 1;
  2684. priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 0, 0, NULL);
  2685. iwl3945_sync_sta(priv, IWL_STA_ID,
  2686. (priv->band == IEEE80211_BAND_5GHZ) ?
  2687. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2688. CMD_ASYNC);
  2689. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2690. iwl3945_send_beacon_cmd(priv);
  2691. break;
  2692. default:
  2693. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2694. __func__, priv->iw_mode);
  2695. break;
  2696. }
  2697. iwl_activate_qos(priv, 0);
  2698. /* we have just associated, don't start scan too early */
  2699. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2700. }
  2701. /*****************************************************************************
  2702. *
  2703. * mac80211 entry point functions
  2704. *
  2705. *****************************************************************************/
  2706. #define UCODE_READY_TIMEOUT (2 * HZ)
  2707. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2708. {
  2709. struct iwl_priv *priv = hw->priv;
  2710. int ret;
  2711. IWL_DEBUG_MAC80211(priv, "enter\n");
  2712. /* we should be verifying the device is ready to be opened */
  2713. mutex_lock(&priv->mutex);
  2714. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2715. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2716. * ucode filename and max sizes are card-specific. */
  2717. if (!priv->ucode_code.len) {
  2718. ret = iwl3945_read_ucode(priv);
  2719. if (ret) {
  2720. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2721. mutex_unlock(&priv->mutex);
  2722. goto out_release_irq;
  2723. }
  2724. }
  2725. ret = __iwl3945_up(priv);
  2726. mutex_unlock(&priv->mutex);
  2727. iwl_rfkill_set_hw_state(priv);
  2728. if (ret)
  2729. goto out_release_irq;
  2730. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2731. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2732. * mac80211 will not be run successfully. */
  2733. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2734. test_bit(STATUS_READY, &priv->status),
  2735. UCODE_READY_TIMEOUT);
  2736. if (!ret) {
  2737. if (!test_bit(STATUS_READY, &priv->status)) {
  2738. IWL_ERR(priv,
  2739. "Wait for START_ALIVE timeout after %dms.\n",
  2740. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2741. ret = -ETIMEDOUT;
  2742. goto out_release_irq;
  2743. }
  2744. }
  2745. /* ucode is running and will send rfkill notifications,
  2746. * no need to poll the killswitch state anymore */
  2747. cancel_delayed_work(&priv->rfkill_poll);
  2748. priv->is_open = 1;
  2749. IWL_DEBUG_MAC80211(priv, "leave\n");
  2750. return 0;
  2751. out_release_irq:
  2752. priv->is_open = 0;
  2753. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2754. return ret;
  2755. }
  2756. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2757. {
  2758. struct iwl_priv *priv = hw->priv;
  2759. IWL_DEBUG_MAC80211(priv, "enter\n");
  2760. if (!priv->is_open) {
  2761. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2762. return;
  2763. }
  2764. priv->is_open = 0;
  2765. if (iwl_is_ready_rf(priv)) {
  2766. /* stop mac, cancel any scan request and clear
  2767. * RXON_FILTER_ASSOC_MSK BIT
  2768. */
  2769. mutex_lock(&priv->mutex);
  2770. iwl_scan_cancel_timeout(priv, 100);
  2771. mutex_unlock(&priv->mutex);
  2772. }
  2773. iwl3945_down(priv);
  2774. flush_workqueue(priv->workqueue);
  2775. /* start polling the killswitch state again */
  2776. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2777. round_jiffies_relative(2 * HZ));
  2778. IWL_DEBUG_MAC80211(priv, "leave\n");
  2779. }
  2780. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2781. {
  2782. struct iwl_priv *priv = hw->priv;
  2783. IWL_DEBUG_MAC80211(priv, "enter\n");
  2784. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2785. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2786. if (iwl3945_tx_skb(priv, skb))
  2787. dev_kfree_skb_any(skb);
  2788. IWL_DEBUG_MAC80211(priv, "leave\n");
  2789. return NETDEV_TX_OK;
  2790. }
  2791. /**
  2792. * iwl3945_mac_config - mac80211 config callback
  2793. *
  2794. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  2795. * be set inappropriately and the driver currently sets the hardware up to
  2796. * use it whenever needed.
  2797. */
  2798. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
  2799. {
  2800. struct iwl_priv *priv = hw->priv;
  2801. const struct iwl_channel_info *ch_info;
  2802. struct ieee80211_conf *conf = &hw->conf;
  2803. unsigned long flags;
  2804. int ret = 0;
  2805. mutex_lock(&priv->mutex);
  2806. IWL_DEBUG_MAC80211(priv, "enter to channel %d\n",
  2807. conf->channel->hw_value);
  2808. if (!iwl_is_ready(priv)) {
  2809. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  2810. ret = -EIO;
  2811. goto out;
  2812. }
  2813. if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
  2814. test_bit(STATUS_SCANNING, &priv->status))) {
  2815. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  2816. set_bit(STATUS_CONF_PENDING, &priv->status);
  2817. mutex_unlock(&priv->mutex);
  2818. return 0;
  2819. }
  2820. spin_lock_irqsave(&priv->lock, flags);
  2821. ch_info = iwl_get_channel_info(priv, conf->channel->band,
  2822. conf->channel->hw_value);
  2823. if (!is_channel_valid(ch_info)) {
  2824. IWL_DEBUG_SCAN(priv,
  2825. "Channel %d [%d] is INVALID for this band.\n",
  2826. conf->channel->hw_value, conf->channel->band);
  2827. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  2828. spin_unlock_irqrestore(&priv->lock, flags);
  2829. ret = -EINVAL;
  2830. goto out;
  2831. }
  2832. iwl_set_rxon_channel(priv, conf->channel);
  2833. iwl_set_flags_for_band(priv, conf->channel->band);
  2834. /* The list of supported rates and rate mask can be different
  2835. * for each phymode; since the phymode may have changed, reset
  2836. * the rate mask to what mac80211 lists */
  2837. iwl_set_rate(priv);
  2838. spin_unlock_irqrestore(&priv->lock, flags);
  2839. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  2840. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  2841. iwl3945_hw_channel_switch(priv, conf->channel);
  2842. goto out;
  2843. }
  2844. #endif
  2845. if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
  2846. if (conf->radio_enabled &&
  2847. iwl_radio_kill_sw_enable_radio(priv)) {
  2848. IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - "
  2849. "waiting for uCode\n");
  2850. goto out;
  2851. }
  2852. if (!conf->radio_enabled) {
  2853. iwl_radio_kill_sw_disable_radio(priv);
  2854. IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
  2855. goto out;
  2856. }
  2857. }
  2858. if (iwl_is_rfkill(priv)) {
  2859. IWL_DEBUG_MAC80211(priv, "leave - RF kill\n");
  2860. ret = -EIO;
  2861. goto out;
  2862. }
  2863. iwl_set_rate(priv);
  2864. if (memcmp(&priv->active_rxon,
  2865. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  2866. iwlcore_commit_rxon(priv);
  2867. else
  2868. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration\n");
  2869. IWL_DEBUG_MAC80211(priv, "leave\n");
  2870. out:
  2871. clear_bit(STATUS_CONF_PENDING, &priv->status);
  2872. mutex_unlock(&priv->mutex);
  2873. return ret;
  2874. }
  2875. static void iwl3945_config_ap(struct iwl_priv *priv)
  2876. {
  2877. int rc = 0;
  2878. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2879. return;
  2880. /* The following should be done only at AP bring up */
  2881. if (!(iwl_is_associated(priv))) {
  2882. /* RXON - unassoc (to set timing command) */
  2883. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2884. iwlcore_commit_rxon(priv);
  2885. /* RXON Timing */
  2886. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2887. iwl3945_setup_rxon_timing(priv);
  2888. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2889. sizeof(priv->rxon_timing),
  2890. &priv->rxon_timing);
  2891. if (rc)
  2892. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2893. "Attempting to continue.\n");
  2894. /* FIXME: what should be the assoc_id for AP? */
  2895. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2896. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2897. priv->staging_rxon.flags |=
  2898. RXON_FLG_SHORT_PREAMBLE_MSK;
  2899. else
  2900. priv->staging_rxon.flags &=
  2901. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2902. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2903. if (priv->assoc_capability &
  2904. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2905. priv->staging_rxon.flags |=
  2906. RXON_FLG_SHORT_SLOT_MSK;
  2907. else
  2908. priv->staging_rxon.flags &=
  2909. ~RXON_FLG_SHORT_SLOT_MSK;
  2910. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2911. priv->staging_rxon.flags &=
  2912. ~RXON_FLG_SHORT_SLOT_MSK;
  2913. }
  2914. /* restore RXON assoc */
  2915. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2916. iwlcore_commit_rxon(priv);
  2917. priv->cfg->ops->smgmt->add_station(priv, iwl_bcast_addr, 0, 0, NULL);
  2918. }
  2919. iwl3945_send_beacon_cmd(priv);
  2920. /* FIXME - we need to add code here to detect a totally new
  2921. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2922. * clear sta table, add BCAST sta... */
  2923. }
  2924. static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
  2925. struct ieee80211_vif *vif,
  2926. struct ieee80211_if_conf *conf)
  2927. {
  2928. struct iwl_priv *priv = hw->priv;
  2929. int rc;
  2930. if (conf == NULL)
  2931. return -EIO;
  2932. if (priv->vif != vif) {
  2933. IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n");
  2934. return 0;
  2935. }
  2936. /* handle this temporarily here */
  2937. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  2938. conf->changed & IEEE80211_IFCC_BEACON) {
  2939. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  2940. if (!beacon)
  2941. return -ENOMEM;
  2942. mutex_lock(&priv->mutex);
  2943. rc = iwl_mac_beacon_update(hw, beacon);
  2944. mutex_unlock(&priv->mutex);
  2945. if (rc)
  2946. return rc;
  2947. }
  2948. if (!iwl_is_alive(priv))
  2949. return -EAGAIN;
  2950. mutex_lock(&priv->mutex);
  2951. if (conf->bssid)
  2952. IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid);
  2953. /*
  2954. * very dubious code was here; the probe filtering flag is never set:
  2955. *
  2956. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  2957. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  2958. */
  2959. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2960. if (!conf->bssid) {
  2961. conf->bssid = priv->mac_addr;
  2962. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  2963. IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n",
  2964. conf->bssid);
  2965. }
  2966. if (priv->ibss_beacon)
  2967. dev_kfree_skb(priv->ibss_beacon);
  2968. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  2969. }
  2970. if (iwl_is_rfkill(priv))
  2971. goto done;
  2972. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  2973. !is_multicast_ether_addr(conf->bssid)) {
  2974. /* If there is currently a HW scan going on in the background
  2975. * then we need to cancel it else the RXON below will fail. */
  2976. if (iwl_scan_cancel_timeout(priv, 100)) {
  2977. IWL_WARN(priv, "Aborted scan still in progress "
  2978. "after 100ms\n");
  2979. IWL_DEBUG_MAC80211(priv, "leaving:scan abort failed\n");
  2980. mutex_unlock(&priv->mutex);
  2981. return -EAGAIN;
  2982. }
  2983. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  2984. /* TODO: Audit driver for usage of these members and see
  2985. * if mac80211 deprecates them (priv->bssid looks like it
  2986. * shouldn't be there, but I haven't scanned the IBSS code
  2987. * to verify) - jpk */
  2988. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  2989. if (priv->iw_mode == NL80211_IFTYPE_AP)
  2990. iwl3945_config_ap(priv);
  2991. else {
  2992. rc = iwlcore_commit_rxon(priv);
  2993. if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
  2994. priv->cfg->ops->smgmt->add_station(priv,
  2995. priv->active_rxon.bssid_addr, 1, 0, NULL);
  2996. }
  2997. } else {
  2998. iwl_scan_cancel_timeout(priv, 100);
  2999. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3000. iwlcore_commit_rxon(priv);
  3001. }
  3002. done:
  3003. IWL_DEBUG_MAC80211(priv, "leave\n");
  3004. mutex_unlock(&priv->mutex);
  3005. return 0;
  3006. }
  3007. static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
  3008. struct ieee80211_if_init_conf *conf)
  3009. {
  3010. struct iwl_priv *priv = hw->priv;
  3011. IWL_DEBUG_MAC80211(priv, "enter\n");
  3012. mutex_lock(&priv->mutex);
  3013. if (iwl_is_ready_rf(priv)) {
  3014. iwl_scan_cancel_timeout(priv, 100);
  3015. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3016. iwlcore_commit_rxon(priv);
  3017. }
  3018. if (priv->vif == conf->vif) {
  3019. priv->vif = NULL;
  3020. memset(priv->bssid, 0, ETH_ALEN);
  3021. }
  3022. mutex_unlock(&priv->mutex);
  3023. IWL_DEBUG_MAC80211(priv, "leave\n");
  3024. }
  3025. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  3026. struct ieee80211_vif *vif,
  3027. struct ieee80211_sta *sta,
  3028. struct ieee80211_key_conf *key)
  3029. {
  3030. struct iwl_priv *priv = hw->priv;
  3031. const u8 *addr;
  3032. int ret = 0;
  3033. u8 sta_id = IWL_INVALID_STATION;
  3034. u8 static_key;
  3035. IWL_DEBUG_MAC80211(priv, "enter\n");
  3036. if (iwl3945_mod_params.sw_crypto) {
  3037. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  3038. return -EOPNOTSUPP;
  3039. }
  3040. addr = sta ? sta->addr : iwl_bcast_addr;
  3041. static_key = !iwl_is_associated(priv);
  3042. if (!static_key) {
  3043. sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
  3044. if (sta_id == IWL_INVALID_STATION) {
  3045. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  3046. addr);
  3047. return -EINVAL;
  3048. }
  3049. }
  3050. mutex_lock(&priv->mutex);
  3051. iwl_scan_cancel_timeout(priv, 100);
  3052. mutex_unlock(&priv->mutex);
  3053. switch (cmd) {
  3054. case SET_KEY:
  3055. if (static_key)
  3056. ret = iwl3945_set_static_key(priv, key);
  3057. else
  3058. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  3059. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  3060. break;
  3061. case DISABLE_KEY:
  3062. if (static_key)
  3063. ret = iwl3945_remove_static_key(priv);
  3064. else
  3065. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  3066. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  3067. break;
  3068. default:
  3069. ret = -EINVAL;
  3070. }
  3071. IWL_DEBUG_MAC80211(priv, "leave\n");
  3072. return ret;
  3073. }
  3074. static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
  3075. struct ieee80211_tx_queue_stats *stats)
  3076. {
  3077. struct iwl_priv *priv = hw->priv;
  3078. int i, avail;
  3079. struct iwl_tx_queue *txq;
  3080. struct iwl_queue *q;
  3081. unsigned long flags;
  3082. IWL_DEBUG_MAC80211(priv, "enter\n");
  3083. if (!iwl_is_ready_rf(priv)) {
  3084. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  3085. return -EIO;
  3086. }
  3087. spin_lock_irqsave(&priv->lock, flags);
  3088. for (i = 0; i < AC_NUM; i++) {
  3089. txq = &priv->txq[i];
  3090. q = &txq->q;
  3091. avail = iwl_queue_space(q);
  3092. stats[i].len = q->n_window - avail;
  3093. stats[i].limit = q->n_window - q->high_mark;
  3094. stats[i].count = q->n_window;
  3095. }
  3096. spin_unlock_irqrestore(&priv->lock, flags);
  3097. IWL_DEBUG_MAC80211(priv, "leave\n");
  3098. return 0;
  3099. }
  3100. static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
  3101. {
  3102. struct iwl_priv *priv = hw->priv;
  3103. unsigned long flags;
  3104. mutex_lock(&priv->mutex);
  3105. IWL_DEBUG_MAC80211(priv, "enter\n");
  3106. iwl_reset_qos(priv);
  3107. spin_lock_irqsave(&priv->lock, flags);
  3108. priv->assoc_id = 0;
  3109. priv->assoc_capability = 0;
  3110. /* new association get rid of ibss beacon skb */
  3111. if (priv->ibss_beacon)
  3112. dev_kfree_skb(priv->ibss_beacon);
  3113. priv->ibss_beacon = NULL;
  3114. priv->beacon_int = priv->hw->conf.beacon_int;
  3115. priv->timestamp = 0;
  3116. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  3117. priv->beacon_int = 0;
  3118. spin_unlock_irqrestore(&priv->lock, flags);
  3119. if (!iwl_is_ready_rf(priv)) {
  3120. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  3121. mutex_unlock(&priv->mutex);
  3122. return;
  3123. }
  3124. /* we are restarting association process
  3125. * clear RXON_FILTER_ASSOC_MSK bit
  3126. */
  3127. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  3128. iwl_scan_cancel_timeout(priv, 100);
  3129. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3130. iwlcore_commit_rxon(priv);
  3131. }
  3132. /* Per mac80211.h: This is only used in IBSS mode... */
  3133. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  3134. IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
  3135. mutex_unlock(&priv->mutex);
  3136. return;
  3137. }
  3138. iwl_set_rate(priv);
  3139. mutex_unlock(&priv->mutex);
  3140. IWL_DEBUG_MAC80211(priv, "leave\n");
  3141. }
  3142. /*****************************************************************************
  3143. *
  3144. * sysfs attributes
  3145. *
  3146. *****************************************************************************/
  3147. #ifdef CONFIG_IWLWIFI_DEBUG
  3148. /*
  3149. * The following adds a new attribute to the sysfs representation
  3150. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  3151. * used for controlling the debug level.
  3152. *
  3153. * See the level definitions in iwl for details.
  3154. */
  3155. static ssize_t show_debug_level(struct device *d,
  3156. struct device_attribute *attr, char *buf)
  3157. {
  3158. struct iwl_priv *priv = d->driver_data;
  3159. return sprintf(buf, "0x%08X\n", priv->debug_level);
  3160. }
  3161. static ssize_t store_debug_level(struct device *d,
  3162. struct device_attribute *attr,
  3163. const char *buf, size_t count)
  3164. {
  3165. struct iwl_priv *priv = d->driver_data;
  3166. unsigned long val;
  3167. int ret;
  3168. ret = strict_strtoul(buf, 0, &val);
  3169. if (ret)
  3170. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  3171. else
  3172. priv->debug_level = val;
  3173. return strnlen(buf, count);
  3174. }
  3175. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  3176. show_debug_level, store_debug_level);
  3177. #endif /* CONFIG_IWLWIFI_DEBUG */
  3178. static ssize_t show_temperature(struct device *d,
  3179. struct device_attribute *attr, char *buf)
  3180. {
  3181. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3182. if (!iwl_is_alive(priv))
  3183. return -EAGAIN;
  3184. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  3185. }
  3186. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  3187. static ssize_t show_tx_power(struct device *d,
  3188. struct device_attribute *attr, char *buf)
  3189. {
  3190. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3191. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  3192. }
  3193. static ssize_t store_tx_power(struct device *d,
  3194. struct device_attribute *attr,
  3195. const char *buf, size_t count)
  3196. {
  3197. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3198. char *p = (char *)buf;
  3199. u32 val;
  3200. val = simple_strtoul(p, &p, 10);
  3201. if (p == buf)
  3202. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  3203. else
  3204. iwl3945_hw_reg_set_txpower(priv, val);
  3205. return count;
  3206. }
  3207. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  3208. static ssize_t show_flags(struct device *d,
  3209. struct device_attribute *attr, char *buf)
  3210. {
  3211. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3212. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  3213. }
  3214. static ssize_t store_flags(struct device *d,
  3215. struct device_attribute *attr,
  3216. const char *buf, size_t count)
  3217. {
  3218. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3219. u32 flags = simple_strtoul(buf, NULL, 0);
  3220. mutex_lock(&priv->mutex);
  3221. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  3222. /* Cancel any currently running scans... */
  3223. if (iwl_scan_cancel_timeout(priv, 100))
  3224. IWL_WARN(priv, "Could not cancel scan.\n");
  3225. else {
  3226. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  3227. flags);
  3228. priv->staging_rxon.flags = cpu_to_le32(flags);
  3229. iwlcore_commit_rxon(priv);
  3230. }
  3231. }
  3232. mutex_unlock(&priv->mutex);
  3233. return count;
  3234. }
  3235. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  3236. static ssize_t show_filter_flags(struct device *d,
  3237. struct device_attribute *attr, char *buf)
  3238. {
  3239. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3240. return sprintf(buf, "0x%04X\n",
  3241. le32_to_cpu(priv->active_rxon.filter_flags));
  3242. }
  3243. static ssize_t store_filter_flags(struct device *d,
  3244. struct device_attribute *attr,
  3245. const char *buf, size_t count)
  3246. {
  3247. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3248. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  3249. mutex_lock(&priv->mutex);
  3250. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  3251. /* Cancel any currently running scans... */
  3252. if (iwl_scan_cancel_timeout(priv, 100))
  3253. IWL_WARN(priv, "Could not cancel scan.\n");
  3254. else {
  3255. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  3256. "0x%04X\n", filter_flags);
  3257. priv->staging_rxon.filter_flags =
  3258. cpu_to_le32(filter_flags);
  3259. iwlcore_commit_rxon(priv);
  3260. }
  3261. }
  3262. mutex_unlock(&priv->mutex);
  3263. return count;
  3264. }
  3265. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  3266. store_filter_flags);
  3267. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3268. static ssize_t show_measurement(struct device *d,
  3269. struct device_attribute *attr, char *buf)
  3270. {
  3271. struct iwl_priv *priv = dev_get_drvdata(d);
  3272. struct iwl_spectrum_notification measure_report;
  3273. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  3274. u8 *data = (u8 *)&measure_report;
  3275. unsigned long flags;
  3276. spin_lock_irqsave(&priv->lock, flags);
  3277. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  3278. spin_unlock_irqrestore(&priv->lock, flags);
  3279. return 0;
  3280. }
  3281. memcpy(&measure_report, &priv->measure_report, size);
  3282. priv->measurement_status = 0;
  3283. spin_unlock_irqrestore(&priv->lock, flags);
  3284. while (size && (PAGE_SIZE - len)) {
  3285. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3286. PAGE_SIZE - len, 1);
  3287. len = strlen(buf);
  3288. if (PAGE_SIZE - len)
  3289. buf[len++] = '\n';
  3290. ofs += 16;
  3291. size -= min(size, 16U);
  3292. }
  3293. return len;
  3294. }
  3295. static ssize_t store_measurement(struct device *d,
  3296. struct device_attribute *attr,
  3297. const char *buf, size_t count)
  3298. {
  3299. struct iwl_priv *priv = dev_get_drvdata(d);
  3300. struct ieee80211_measurement_params params = {
  3301. .channel = le16_to_cpu(priv->active_rxon.channel),
  3302. .start_time = cpu_to_le64(priv->last_tsf),
  3303. .duration = cpu_to_le16(1),
  3304. };
  3305. u8 type = IWL_MEASURE_BASIC;
  3306. u8 buffer[32];
  3307. u8 channel;
  3308. if (count) {
  3309. char *p = buffer;
  3310. strncpy(buffer, buf, min(sizeof(buffer), count));
  3311. channel = simple_strtoul(p, NULL, 0);
  3312. if (channel)
  3313. params.channel = channel;
  3314. p = buffer;
  3315. while (*p && *p != ' ')
  3316. p++;
  3317. if (*p)
  3318. type = simple_strtoul(p + 1, NULL, 0);
  3319. }
  3320. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3321. "channel %d (for '%s')\n", type, params.channel, buf);
  3322. iwl3945_get_measurement(priv, &params, type);
  3323. return count;
  3324. }
  3325. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3326. show_measurement, store_measurement);
  3327. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  3328. static ssize_t store_retry_rate(struct device *d,
  3329. struct device_attribute *attr,
  3330. const char *buf, size_t count)
  3331. {
  3332. struct iwl_priv *priv = dev_get_drvdata(d);
  3333. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3334. if (priv->retry_rate <= 0)
  3335. priv->retry_rate = 1;
  3336. return count;
  3337. }
  3338. static ssize_t show_retry_rate(struct device *d,
  3339. struct device_attribute *attr, char *buf)
  3340. {
  3341. struct iwl_priv *priv = dev_get_drvdata(d);
  3342. return sprintf(buf, "%d", priv->retry_rate);
  3343. }
  3344. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3345. store_retry_rate);
  3346. static ssize_t store_power_level(struct device *d,
  3347. struct device_attribute *attr,
  3348. const char *buf, size_t count)
  3349. {
  3350. struct iwl_priv *priv = dev_get_drvdata(d);
  3351. int ret;
  3352. unsigned long mode;
  3353. mutex_lock(&priv->mutex);
  3354. ret = strict_strtoul(buf, 10, &mode);
  3355. if (ret)
  3356. goto out;
  3357. ret = iwl_power_set_user_mode(priv, mode);
  3358. if (ret) {
  3359. IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
  3360. goto out;
  3361. }
  3362. ret = count;
  3363. out:
  3364. mutex_unlock(&priv->mutex);
  3365. return ret;
  3366. }
  3367. static ssize_t show_power_level(struct device *d,
  3368. struct device_attribute *attr, char *buf)
  3369. {
  3370. struct iwl_priv *priv = dev_get_drvdata(d);
  3371. int mode = priv->power_data.user_power_setting;
  3372. int system = priv->power_data.system_power_setting;
  3373. int level = priv->power_data.power_mode;
  3374. char *p = buf;
  3375. switch (system) {
  3376. case IWL_POWER_SYS_AUTO:
  3377. p += sprintf(p, "SYSTEM:auto");
  3378. break;
  3379. case IWL_POWER_SYS_AC:
  3380. p += sprintf(p, "SYSTEM:ac");
  3381. break;
  3382. case IWL_POWER_SYS_BATTERY:
  3383. p += sprintf(p, "SYSTEM:battery");
  3384. break;
  3385. }
  3386. p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
  3387. "fixed" : "auto");
  3388. p += sprintf(p, "\tINDEX:%d", level);
  3389. p += sprintf(p, "\n");
  3390. return p - buf + 1;
  3391. }
  3392. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
  3393. show_power_level, store_power_level);
  3394. #define MAX_WX_STRING 80
  3395. /* Values are in microsecond */
  3396. static const s32 timeout_duration[] = {
  3397. 350000,
  3398. 250000,
  3399. 75000,
  3400. 37000,
  3401. 25000,
  3402. };
  3403. static const s32 period_duration[] = {
  3404. 400000,
  3405. 700000,
  3406. 1000000,
  3407. 1000000,
  3408. 1000000
  3409. };
  3410. static ssize_t show_channels(struct device *d,
  3411. struct device_attribute *attr, char *buf)
  3412. {
  3413. /* all this shit doesn't belong into sysfs anyway */
  3414. return 0;
  3415. }
  3416. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3417. static ssize_t show_statistics(struct device *d,
  3418. struct device_attribute *attr, char *buf)
  3419. {
  3420. struct iwl_priv *priv = dev_get_drvdata(d);
  3421. u32 size = sizeof(struct iwl3945_notif_statistics);
  3422. u32 len = 0, ofs = 0;
  3423. u8 *data = (u8 *)&priv->statistics_39;
  3424. int rc = 0;
  3425. if (!iwl_is_alive(priv))
  3426. return -EAGAIN;
  3427. mutex_lock(&priv->mutex);
  3428. rc = iwl_send_statistics_request(priv, 0);
  3429. mutex_unlock(&priv->mutex);
  3430. if (rc) {
  3431. len = sprintf(buf,
  3432. "Error sending statistics request: 0x%08X\n", rc);
  3433. return len;
  3434. }
  3435. while (size && (PAGE_SIZE - len)) {
  3436. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3437. PAGE_SIZE - len, 1);
  3438. len = strlen(buf);
  3439. if (PAGE_SIZE - len)
  3440. buf[len++] = '\n';
  3441. ofs += 16;
  3442. size -= min(size, 16U);
  3443. }
  3444. return len;
  3445. }
  3446. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3447. static ssize_t show_antenna(struct device *d,
  3448. struct device_attribute *attr, char *buf)
  3449. {
  3450. struct iwl_priv *priv = dev_get_drvdata(d);
  3451. if (!iwl_is_alive(priv))
  3452. return -EAGAIN;
  3453. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3454. }
  3455. static ssize_t store_antenna(struct device *d,
  3456. struct device_attribute *attr,
  3457. const char *buf, size_t count)
  3458. {
  3459. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3460. int ant;
  3461. if (count == 0)
  3462. return 0;
  3463. if (sscanf(buf, "%1i", &ant) != 1) {
  3464. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3465. return count;
  3466. }
  3467. if ((ant >= 0) && (ant <= 2)) {
  3468. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3469. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3470. } else
  3471. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3472. return count;
  3473. }
  3474. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3475. static ssize_t show_status(struct device *d,
  3476. struct device_attribute *attr, char *buf)
  3477. {
  3478. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3479. if (!iwl_is_alive(priv))
  3480. return -EAGAIN;
  3481. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3482. }
  3483. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3484. static ssize_t dump_error_log(struct device *d,
  3485. struct device_attribute *attr,
  3486. const char *buf, size_t count)
  3487. {
  3488. char *p = (char *)buf;
  3489. if (p[0] == '1')
  3490. iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  3491. return strnlen(buf, count);
  3492. }
  3493. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3494. static ssize_t dump_event_log(struct device *d,
  3495. struct device_attribute *attr,
  3496. const char *buf, size_t count)
  3497. {
  3498. char *p = (char *)buf;
  3499. if (p[0] == '1')
  3500. iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  3501. return strnlen(buf, count);
  3502. }
  3503. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  3504. /*****************************************************************************
  3505. *
  3506. * driver setup and tear down
  3507. *
  3508. *****************************************************************************/
  3509. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3510. {
  3511. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3512. init_waitqueue_head(&priv->wait_command_queue);
  3513. INIT_WORK(&priv->up, iwl3945_bg_up);
  3514. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3515. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3516. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  3517. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3518. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3519. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3520. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3521. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3522. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3523. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3524. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3525. iwl3945_hw_setup_deferred_work(priv);
  3526. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3527. iwl3945_irq_tasklet, (unsigned long)priv);
  3528. }
  3529. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3530. {
  3531. iwl3945_hw_cancel_deferred_work(priv);
  3532. cancel_delayed_work_sync(&priv->init_alive_start);
  3533. cancel_delayed_work(&priv->scan_check);
  3534. cancel_delayed_work(&priv->alive_start);
  3535. cancel_work_sync(&priv->beacon_update);
  3536. }
  3537. static struct attribute *iwl3945_sysfs_entries[] = {
  3538. &dev_attr_antenna.attr,
  3539. &dev_attr_channels.attr,
  3540. &dev_attr_dump_errors.attr,
  3541. &dev_attr_dump_events.attr,
  3542. &dev_attr_flags.attr,
  3543. &dev_attr_filter_flags.attr,
  3544. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3545. &dev_attr_measurement.attr,
  3546. #endif
  3547. &dev_attr_power_level.attr,
  3548. &dev_attr_retry_rate.attr,
  3549. &dev_attr_statistics.attr,
  3550. &dev_attr_status.attr,
  3551. &dev_attr_temperature.attr,
  3552. &dev_attr_tx_power.attr,
  3553. #ifdef CONFIG_IWLWIFI_DEBUG
  3554. &dev_attr_debug_level.attr,
  3555. #endif
  3556. NULL
  3557. };
  3558. static struct attribute_group iwl3945_attribute_group = {
  3559. .name = NULL, /* put in device directory */
  3560. .attrs = iwl3945_sysfs_entries,
  3561. };
  3562. static struct ieee80211_ops iwl3945_hw_ops = {
  3563. .tx = iwl3945_mac_tx,
  3564. .start = iwl3945_mac_start,
  3565. .stop = iwl3945_mac_stop,
  3566. .add_interface = iwl_mac_add_interface,
  3567. .remove_interface = iwl3945_mac_remove_interface,
  3568. .config = iwl3945_mac_config,
  3569. .config_interface = iwl3945_mac_config_interface,
  3570. .configure_filter = iwl_configure_filter,
  3571. .set_key = iwl3945_mac_set_key,
  3572. .get_tx_stats = iwl3945_mac_get_tx_stats,
  3573. .conf_tx = iwl_mac_conf_tx,
  3574. .reset_tsf = iwl3945_mac_reset_tsf,
  3575. .bss_info_changed = iwl_bss_info_changed,
  3576. .hw_scan = iwl_mac_hw_scan
  3577. };
  3578. static int iwl3945_init_drv(struct iwl_priv *priv)
  3579. {
  3580. int ret;
  3581. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3582. priv->retry_rate = 1;
  3583. priv->ibss_beacon = NULL;
  3584. spin_lock_init(&priv->lock);
  3585. spin_lock_init(&priv->power_data.lock);
  3586. spin_lock_init(&priv->sta_lock);
  3587. spin_lock_init(&priv->hcmd_lock);
  3588. INIT_LIST_HEAD(&priv->free_frames);
  3589. mutex_init(&priv->mutex);
  3590. /* Clear the driver's (not device's) station table */
  3591. priv->cfg->ops->smgmt->clear_station_table(priv);
  3592. priv->data_retry_limit = -1;
  3593. priv->ieee_channels = NULL;
  3594. priv->ieee_rates = NULL;
  3595. priv->band = IEEE80211_BAND_2GHZ;
  3596. priv->iw_mode = NL80211_IFTYPE_STATION;
  3597. iwl_reset_qos(priv);
  3598. priv->qos_data.qos_active = 0;
  3599. priv->qos_data.qos_cap.val = 0;
  3600. priv->rates_mask = IWL_RATES_MASK;
  3601. /* If power management is turned on, default to CAM mode */
  3602. priv->power_mode = IWL_POWER_MODE_CAM;
  3603. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3604. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3605. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3606. eeprom->version);
  3607. ret = -EINVAL;
  3608. goto err;
  3609. }
  3610. ret = iwl_init_channel_map(priv);
  3611. if (ret) {
  3612. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3613. goto err;
  3614. }
  3615. /* Set up txpower settings in driver for all channels */
  3616. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3617. ret = -EIO;
  3618. goto err_free_channel_map;
  3619. }
  3620. ret = iwlcore_init_geos(priv);
  3621. if (ret) {
  3622. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3623. goto err_free_channel_map;
  3624. }
  3625. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3626. return 0;
  3627. err_free_channel_map:
  3628. iwl_free_channel_map(priv);
  3629. err:
  3630. return ret;
  3631. }
  3632. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3633. {
  3634. int ret;
  3635. struct ieee80211_hw *hw = priv->hw;
  3636. hw->rate_control_algorithm = "iwl-3945-rs";
  3637. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3638. /* Tell mac80211 our characteristics */
  3639. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3640. IEEE80211_HW_NOISE_DBM |
  3641. IEEE80211_HW_SPECTRUM_MGMT;
  3642. hw->wiphy->interface_modes =
  3643. BIT(NL80211_IFTYPE_STATION) |
  3644. BIT(NL80211_IFTYPE_ADHOC);
  3645. hw->wiphy->custom_regulatory = true;
  3646. hw->wiphy->max_scan_ssids = 1; /* WILL FIX */
  3647. /* Default value; 4 EDCA QOS priorities */
  3648. hw->queues = 4;
  3649. hw->conf.beacon_int = 100;
  3650. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3651. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3652. &priv->bands[IEEE80211_BAND_2GHZ];
  3653. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3654. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3655. &priv->bands[IEEE80211_BAND_5GHZ];
  3656. ret = ieee80211_register_hw(priv->hw);
  3657. if (ret) {
  3658. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3659. return ret;
  3660. }
  3661. priv->mac80211_registered = 1;
  3662. return 0;
  3663. }
  3664. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3665. {
  3666. int err = 0;
  3667. struct iwl_priv *priv;
  3668. struct ieee80211_hw *hw;
  3669. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3670. struct iwl3945_eeprom *eeprom;
  3671. unsigned long flags;
  3672. /***********************
  3673. * 1. Allocating HW data
  3674. * ********************/
  3675. /* mac80211 allocates memory for this device instance, including
  3676. * space for this driver's private structure */
  3677. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3678. if (hw == NULL) {
  3679. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3680. err = -ENOMEM;
  3681. goto out;
  3682. }
  3683. priv = hw->priv;
  3684. SET_IEEE80211_DEV(hw, &pdev->dev);
  3685. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  3686. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  3687. IWL_ERR(priv,
  3688. "invalid queues_num, should be between %d and %d\n",
  3689. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  3690. err = -EINVAL;
  3691. goto out_ieee80211_free_hw;
  3692. }
  3693. /*
  3694. * Disabling hardware scan means that mac80211 will perform scans
  3695. * "the hard way", rather than using device's scan.
  3696. */
  3697. if (iwl3945_mod_params.disable_hw_scan) {
  3698. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3699. iwl3945_hw_ops.hw_scan = NULL;
  3700. }
  3701. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3702. priv->cfg = cfg;
  3703. priv->pci_dev = pdev;
  3704. #ifdef CONFIG_IWLWIFI_DEBUG
  3705. priv->debug_level = iwl3945_mod_params.debug;
  3706. atomic_set(&priv->restrict_refcnt, 0);
  3707. #endif
  3708. /***************************
  3709. * 2. Initializing PCI bus
  3710. * *************************/
  3711. if (pci_enable_device(pdev)) {
  3712. err = -ENODEV;
  3713. goto out_ieee80211_free_hw;
  3714. }
  3715. pci_set_master(pdev);
  3716. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3717. if (!err)
  3718. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3719. if (err) {
  3720. IWL_WARN(priv, "No suitable DMA available.\n");
  3721. goto out_pci_disable_device;
  3722. }
  3723. pci_set_drvdata(pdev, priv);
  3724. err = pci_request_regions(pdev, DRV_NAME);
  3725. if (err)
  3726. goto out_pci_disable_device;
  3727. /***********************
  3728. * 3. Read REV Register
  3729. * ********************/
  3730. priv->hw_base = pci_iomap(pdev, 0, 0);
  3731. if (!priv->hw_base) {
  3732. err = -ENODEV;
  3733. goto out_pci_release_regions;
  3734. }
  3735. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3736. (unsigned long long) pci_resource_len(pdev, 0));
  3737. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3738. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3739. * PCI Tx retries from interfering with C3 CPU state */
  3740. pci_write_config_byte(pdev, 0x41, 0x00);
  3741. /* amp init */
  3742. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3743. if (err < 0) {
  3744. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3745. goto out_iounmap;
  3746. }
  3747. /***********************
  3748. * 4. Read EEPROM
  3749. * ********************/
  3750. /* Read the EEPROM */
  3751. err = iwl_eeprom_init(priv);
  3752. if (err) {
  3753. IWL_ERR(priv, "Unable to init EEPROM\n");
  3754. goto out_iounmap;
  3755. }
  3756. /* MAC Address location in EEPROM same for 3945/4965 */
  3757. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3758. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3759. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3760. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3761. /***********************
  3762. * 5. Setup HW Constants
  3763. * ********************/
  3764. /* Device-specific setup */
  3765. if (iwl3945_hw_set_hw_params(priv)) {
  3766. IWL_ERR(priv, "failed to set hw settings\n");
  3767. goto out_eeprom_free;
  3768. }
  3769. /***********************
  3770. * 6. Setup priv
  3771. * ********************/
  3772. err = iwl3945_init_drv(priv);
  3773. if (err) {
  3774. IWL_ERR(priv, "initializing driver failed\n");
  3775. goto out_unset_hw_params;
  3776. }
  3777. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3778. priv->cfg->name);
  3779. /***********************************
  3780. * 7. Initialize Module Parameters
  3781. * **********************************/
  3782. /* Initialize module parameter values here */
  3783. /* Disable radio (SW RF KILL) via parameter when loading driver */
  3784. if (iwl3945_mod_params.disable) {
  3785. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3786. IWL_DEBUG_INFO(priv, "Radio disabled.\n");
  3787. }
  3788. /***********************
  3789. * 8. Setup Services
  3790. * ********************/
  3791. spin_lock_irqsave(&priv->lock, flags);
  3792. iwl_disable_interrupts(priv);
  3793. spin_unlock_irqrestore(&priv->lock, flags);
  3794. pci_enable_msi(priv->pci_dev);
  3795. err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
  3796. DRV_NAME, priv);
  3797. if (err) {
  3798. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3799. goto out_disable_msi;
  3800. }
  3801. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3802. if (err) {
  3803. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3804. goto out_release_irq;
  3805. }
  3806. iwl_set_rxon_channel(priv,
  3807. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3808. iwl3945_setup_deferred_work(priv);
  3809. iwl3945_setup_rx_handlers(priv);
  3810. /*********************************
  3811. * 9. Setup and Register mac80211
  3812. * *******************************/
  3813. iwl_enable_interrupts(priv);
  3814. err = iwl3945_setup_mac(priv);
  3815. if (err)
  3816. goto out_remove_sysfs;
  3817. err = iwl_rfkill_init(priv);
  3818. if (err)
  3819. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  3820. "Ignoring error: %d\n", err);
  3821. else
  3822. iwl_rfkill_set_hw_state(priv);
  3823. /* Start monitoring the killswitch */
  3824. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3825. 2 * HZ);
  3826. return 0;
  3827. out_remove_sysfs:
  3828. destroy_workqueue(priv->workqueue);
  3829. priv->workqueue = NULL;
  3830. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3831. out_release_irq:
  3832. free_irq(priv->pci_dev->irq, priv);
  3833. out_disable_msi:
  3834. pci_disable_msi(priv->pci_dev);
  3835. iwlcore_free_geos(priv);
  3836. iwl_free_channel_map(priv);
  3837. out_unset_hw_params:
  3838. iwl3945_unset_hw_params(priv);
  3839. out_eeprom_free:
  3840. iwl_eeprom_free(priv);
  3841. out_iounmap:
  3842. pci_iounmap(pdev, priv->hw_base);
  3843. out_pci_release_regions:
  3844. pci_release_regions(pdev);
  3845. out_pci_disable_device:
  3846. pci_set_drvdata(pdev, NULL);
  3847. pci_disable_device(pdev);
  3848. out_ieee80211_free_hw:
  3849. ieee80211_free_hw(priv->hw);
  3850. out:
  3851. return err;
  3852. }
  3853. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3854. {
  3855. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3856. unsigned long flags;
  3857. if (!priv)
  3858. return;
  3859. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3860. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3861. if (priv->mac80211_registered) {
  3862. ieee80211_unregister_hw(priv->hw);
  3863. priv->mac80211_registered = 0;
  3864. } else {
  3865. iwl3945_down(priv);
  3866. }
  3867. /* make sure we flush any pending irq or
  3868. * tasklet for the driver
  3869. */
  3870. spin_lock_irqsave(&priv->lock, flags);
  3871. iwl_disable_interrupts(priv);
  3872. spin_unlock_irqrestore(&priv->lock, flags);
  3873. iwl_synchronize_irq(priv);
  3874. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3875. iwl_rfkill_unregister(priv);
  3876. cancel_delayed_work(&priv->rfkill_poll);
  3877. iwl3945_dealloc_ucode_pci(priv);
  3878. if (priv->rxq.bd)
  3879. iwl_rx_queue_free(priv, &priv->rxq);
  3880. iwl3945_hw_txq_ctx_free(priv);
  3881. iwl3945_unset_hw_params(priv);
  3882. priv->cfg->ops->smgmt->clear_station_table(priv);
  3883. /*netif_stop_queue(dev); */
  3884. flush_workqueue(priv->workqueue);
  3885. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3886. * priv->workqueue... so we can't take down the workqueue
  3887. * until now... */
  3888. destroy_workqueue(priv->workqueue);
  3889. priv->workqueue = NULL;
  3890. free_irq(pdev->irq, priv);
  3891. pci_disable_msi(pdev);
  3892. pci_iounmap(pdev, priv->hw_base);
  3893. pci_release_regions(pdev);
  3894. pci_disable_device(pdev);
  3895. pci_set_drvdata(pdev, NULL);
  3896. iwl_free_channel_map(priv);
  3897. iwlcore_free_geos(priv);
  3898. kfree(priv->scan);
  3899. if (priv->ibss_beacon)
  3900. dev_kfree_skb(priv->ibss_beacon);
  3901. ieee80211_free_hw(priv->hw);
  3902. }
  3903. /*****************************************************************************
  3904. *
  3905. * driver and module entry point
  3906. *
  3907. *****************************************************************************/
  3908. static struct pci_driver iwl3945_driver = {
  3909. .name = DRV_NAME,
  3910. .id_table = iwl3945_hw_card_ids,
  3911. .probe = iwl3945_pci_probe,
  3912. .remove = __devexit_p(iwl3945_pci_remove),
  3913. #ifdef CONFIG_PM
  3914. .suspend = iwl_pci_suspend,
  3915. .resume = iwl_pci_resume,
  3916. #endif
  3917. };
  3918. static int __init iwl3945_init(void)
  3919. {
  3920. int ret;
  3921. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3922. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3923. ret = iwl3945_rate_control_register();
  3924. if (ret) {
  3925. printk(KERN_ERR DRV_NAME
  3926. "Unable to register rate control algorithm: %d\n", ret);
  3927. return ret;
  3928. }
  3929. ret = pci_register_driver(&iwl3945_driver);
  3930. if (ret) {
  3931. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3932. goto error_register;
  3933. }
  3934. return ret;
  3935. error_register:
  3936. iwl3945_rate_control_unregister();
  3937. return ret;
  3938. }
  3939. static void __exit iwl3945_exit(void)
  3940. {
  3941. pci_unregister_driver(&iwl3945_driver);
  3942. iwl3945_rate_control_unregister();
  3943. }
  3944. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3945. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  3946. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3947. module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
  3948. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  3949. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  3950. MODULE_PARM_DESC(swcrypto,
  3951. "using software crypto (default 1 [software])\n");
  3952. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  3953. MODULE_PARM_DESC(debug, "debug output mask");
  3954. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  3955. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3956. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  3957. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  3958. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
  3959. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3960. module_exit(iwl3945_exit);
  3961. module_init(iwl3945_init);