pmac32-cpufreq.c 18 KB

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  1. /*
  2. * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  3. * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * TODO: Need a big cleanup here. Basically, we need to have different
  10. * cpufreq_driver structures for the different type of HW instead of the
  11. * current mess. We also need to better deal with the detection of the
  12. * type of machine.
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/types.h>
  17. #include <linux/errno.h>
  18. #include <linux/kernel.h>
  19. #include <linux/delay.h>
  20. #include <linux/sched.h>
  21. #include <linux/adb.h>
  22. #include <linux/pmu.h>
  23. #include <linux/cpufreq.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/hardirq.h>
  27. #include <linux/of_device.h>
  28. #include <asm/prom.h>
  29. #include <asm/machdep.h>
  30. #include <asm/irq.h>
  31. #include <asm/pmac_feature.h>
  32. #include <asm/mmu_context.h>
  33. #include <asm/sections.h>
  34. #include <asm/cputable.h>
  35. #include <asm/time.h>
  36. #include <asm/mpic.h>
  37. #include <asm/keylargo.h>
  38. #include <asm/switch_to.h>
  39. /* WARNING !!! This will cause calibrate_delay() to be called,
  40. * but this is an __init function ! So you MUST go edit
  41. * init/main.c to make it non-init before enabling DEBUG_FREQ
  42. */
  43. #undef DEBUG_FREQ
  44. extern void low_choose_7447a_dfs(int dfs);
  45. extern void low_choose_750fx_pll(int pll);
  46. extern void low_sleep_handler(void);
  47. /*
  48. * Currently, PowerMac cpufreq supports only high & low frequencies
  49. * that are set by the firmware
  50. */
  51. static unsigned int low_freq;
  52. static unsigned int hi_freq;
  53. static unsigned int cur_freq;
  54. static unsigned int sleep_freq;
  55. static unsigned long transition_latency;
  56. /*
  57. * Different models uses different mechanisms to switch the frequency
  58. */
  59. static int (*set_speed_proc)(int low_speed);
  60. static unsigned int (*get_speed_proc)(void);
  61. /*
  62. * Some definitions used by the various speedprocs
  63. */
  64. static u32 voltage_gpio;
  65. static u32 frequency_gpio;
  66. static u32 slew_done_gpio;
  67. static int no_schedule;
  68. static int has_cpu_l2lve;
  69. static int is_pmu_based;
  70. /* There are only two frequency states for each processor. Values
  71. * are in kHz for the time being.
  72. */
  73. #define CPUFREQ_HIGH 0
  74. #define CPUFREQ_LOW 1
  75. static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
  76. {CPUFREQ_HIGH, 0},
  77. {CPUFREQ_LOW, 0},
  78. {0, CPUFREQ_TABLE_END},
  79. };
  80. static inline void local_delay(unsigned long ms)
  81. {
  82. if (no_schedule)
  83. mdelay(ms);
  84. else
  85. msleep(ms);
  86. }
  87. #ifdef DEBUG_FREQ
  88. static inline void debug_calc_bogomips(void)
  89. {
  90. /* This will cause a recalc of bogomips and display the
  91. * result. We backup/restore the value to avoid affecting the
  92. * core cpufreq framework's own calculation.
  93. */
  94. unsigned long save_lpj = loops_per_jiffy;
  95. calibrate_delay();
  96. loops_per_jiffy = save_lpj;
  97. }
  98. #endif /* DEBUG_FREQ */
  99. /* Switch CPU speed under 750FX CPU control
  100. */
  101. static int cpu_750fx_cpu_speed(int low_speed)
  102. {
  103. u32 hid2;
  104. if (low_speed == 0) {
  105. /* ramping up, set voltage first */
  106. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  107. /* Make sure we sleep for at least 1ms */
  108. local_delay(10);
  109. /* tweak L2 for high voltage */
  110. if (has_cpu_l2lve) {
  111. hid2 = mfspr(SPRN_HID2);
  112. hid2 &= ~0x2000;
  113. mtspr(SPRN_HID2, hid2);
  114. }
  115. }
  116. #ifdef CONFIG_6xx
  117. low_choose_750fx_pll(low_speed);
  118. #endif
  119. if (low_speed == 1) {
  120. /* tweak L2 for low voltage */
  121. if (has_cpu_l2lve) {
  122. hid2 = mfspr(SPRN_HID2);
  123. hid2 |= 0x2000;
  124. mtspr(SPRN_HID2, hid2);
  125. }
  126. /* ramping down, set voltage last */
  127. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  128. local_delay(10);
  129. }
  130. return 0;
  131. }
  132. static unsigned int cpu_750fx_get_cpu_speed(void)
  133. {
  134. if (mfspr(SPRN_HID1) & HID1_PS)
  135. return low_freq;
  136. else
  137. return hi_freq;
  138. }
  139. /* Switch CPU speed using DFS */
  140. static int dfs_set_cpu_speed(int low_speed)
  141. {
  142. if (low_speed == 0) {
  143. /* ramping up, set voltage first */
  144. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  145. /* Make sure we sleep for at least 1ms */
  146. local_delay(1);
  147. }
  148. /* set frequency */
  149. #ifdef CONFIG_6xx
  150. low_choose_7447a_dfs(low_speed);
  151. #endif
  152. udelay(100);
  153. if (low_speed == 1) {
  154. /* ramping down, set voltage last */
  155. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  156. local_delay(1);
  157. }
  158. return 0;
  159. }
  160. static unsigned int dfs_get_cpu_speed(void)
  161. {
  162. if (mfspr(SPRN_HID1) & HID1_DFS)
  163. return low_freq;
  164. else
  165. return hi_freq;
  166. }
  167. /* Switch CPU speed using slewing GPIOs
  168. */
  169. static int gpios_set_cpu_speed(int low_speed)
  170. {
  171. int gpio, timeout = 0;
  172. /* If ramping up, set voltage first */
  173. if (low_speed == 0) {
  174. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  175. /* Delay is way too big but it's ok, we schedule */
  176. local_delay(10);
  177. }
  178. /* Set frequency */
  179. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  180. if (low_speed == ((gpio & 0x01) == 0))
  181. goto skip;
  182. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
  183. low_speed ? 0x04 : 0x05);
  184. udelay(200);
  185. do {
  186. if (++timeout > 100)
  187. break;
  188. local_delay(1);
  189. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
  190. } while((gpio & 0x02) == 0);
  191. skip:
  192. /* If ramping down, set voltage last */
  193. if (low_speed == 1) {
  194. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  195. /* Delay is way too big but it's ok, we schedule */
  196. local_delay(10);
  197. }
  198. #ifdef DEBUG_FREQ
  199. debug_calc_bogomips();
  200. #endif
  201. return 0;
  202. }
  203. /* Switch CPU speed under PMU control
  204. */
  205. static int pmu_set_cpu_speed(int low_speed)
  206. {
  207. struct adb_request req;
  208. unsigned long save_l2cr;
  209. unsigned long save_l3cr;
  210. unsigned int pic_prio;
  211. unsigned long flags;
  212. preempt_disable();
  213. #ifdef DEBUG_FREQ
  214. printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
  215. #endif
  216. pmu_suspend();
  217. /* Disable all interrupt sources on openpic */
  218. pic_prio = mpic_cpu_get_priority();
  219. mpic_cpu_set_priority(0xf);
  220. /* Make sure the decrementer won't interrupt us */
  221. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  222. /* Make sure any pending DEC interrupt occurring while we did
  223. * the above didn't re-enable the DEC */
  224. mb();
  225. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  226. /* We can now disable MSR_EE */
  227. local_irq_save(flags);
  228. /* Giveup the FPU & vec */
  229. enable_kernel_fp();
  230. #ifdef CONFIG_ALTIVEC
  231. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  232. enable_kernel_altivec();
  233. #endif /* CONFIG_ALTIVEC */
  234. /* Save & disable L2 and L3 caches */
  235. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  236. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  237. /* Send the new speed command. My assumption is that this command
  238. * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
  239. */
  240. pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
  241. while (!req.complete)
  242. pmu_poll();
  243. /* Prepare the northbridge for the speed transition */
  244. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
  245. /* Call low level code to backup CPU state and recover from
  246. * hardware reset
  247. */
  248. low_sleep_handler();
  249. /* Restore the northbridge */
  250. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
  251. /* Restore L2 cache */
  252. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  253. _set_L2CR(save_l2cr);
  254. /* Restore L3 cache */
  255. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  256. _set_L3CR(save_l3cr);
  257. /* Restore userland MMU context */
  258. switch_mmu_context(NULL, current->active_mm);
  259. #ifdef DEBUG_FREQ
  260. printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
  261. #endif
  262. /* Restore low level PMU operations */
  263. pmu_unlock();
  264. /*
  265. * Restore decrementer; we'll take a decrementer interrupt
  266. * as soon as interrupts are re-enabled and the generic
  267. * clockevents code will reprogram it with the right value.
  268. */
  269. set_dec(1);
  270. /* Restore interrupts */
  271. mpic_cpu_set_priority(pic_prio);
  272. /* Let interrupts flow again ... */
  273. local_irq_restore(flags);
  274. #ifdef DEBUG_FREQ
  275. debug_calc_bogomips();
  276. #endif
  277. pmu_resume();
  278. preempt_enable();
  279. return 0;
  280. }
  281. static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode,
  282. int notify)
  283. {
  284. struct cpufreq_freqs freqs;
  285. unsigned long l3cr;
  286. static unsigned long prev_l3cr;
  287. freqs.old = cur_freq;
  288. freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  289. if (freqs.old == freqs.new)
  290. return 0;
  291. if (notify)
  292. cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
  293. if (speed_mode == CPUFREQ_LOW &&
  294. cpu_has_feature(CPU_FTR_L3CR)) {
  295. l3cr = _get_L3CR();
  296. if (l3cr & L3CR_L3E) {
  297. prev_l3cr = l3cr;
  298. _set_L3CR(0);
  299. }
  300. }
  301. set_speed_proc(speed_mode == CPUFREQ_LOW);
  302. if (speed_mode == CPUFREQ_HIGH &&
  303. cpu_has_feature(CPU_FTR_L3CR)) {
  304. l3cr = _get_L3CR();
  305. if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
  306. _set_L3CR(prev_l3cr);
  307. }
  308. if (notify)
  309. cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
  310. cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  311. return 0;
  312. }
  313. static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
  314. {
  315. return cur_freq;
  316. }
  317. static int pmac_cpufreq_target( struct cpufreq_policy *policy,
  318. unsigned int target_freq,
  319. unsigned int relation)
  320. {
  321. unsigned int newstate = 0;
  322. int rc;
  323. if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
  324. target_freq, relation, &newstate))
  325. return -EINVAL;
  326. rc = do_set_cpu_speed(policy, newstate, 1);
  327. ppc_proc_freq = cur_freq * 1000ul;
  328. return rc;
  329. }
  330. static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
  331. {
  332. if (policy->cpu != 0)
  333. return -ENODEV;
  334. policy->cpuinfo.transition_latency = transition_latency;
  335. return cpufreq_table_validate_and_show(policy, pmac_cpu_freqs);
  336. }
  337. static u32 read_gpio(struct device_node *np)
  338. {
  339. const u32 *reg = of_get_property(np, "reg", NULL);
  340. u32 offset;
  341. if (reg == NULL)
  342. return 0;
  343. /* That works for all keylargos but shall be fixed properly
  344. * some day... The problem is that it seems we can't rely
  345. * on the "reg" property of the GPIO nodes, they are either
  346. * relative to the base of KeyLargo or to the base of the
  347. * GPIO space, and the device-tree doesn't help.
  348. */
  349. offset = *reg;
  350. if (offset < KEYLARGO_GPIO_LEVELS0)
  351. offset += KEYLARGO_GPIO_LEVELS0;
  352. return offset;
  353. }
  354. static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)
  355. {
  356. /* Ok, this could be made a bit smarter, but let's be robust for now. We
  357. * always force a speed change to high speed before sleep, to make sure
  358. * we have appropriate voltage and/or bus speed for the wakeup process,
  359. * and to make sure our loops_per_jiffies are "good enough", that is will
  360. * not cause too short delays if we sleep in low speed and wake in high
  361. * speed..
  362. */
  363. no_schedule = 1;
  364. sleep_freq = cur_freq;
  365. if (cur_freq == low_freq && !is_pmu_based)
  366. do_set_cpu_speed(policy, CPUFREQ_HIGH, 0);
  367. return 0;
  368. }
  369. static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
  370. {
  371. /* If we resume, first check if we have a get() function */
  372. if (get_speed_proc)
  373. cur_freq = get_speed_proc();
  374. else
  375. cur_freq = 0;
  376. /* We don't, hrm... we don't really know our speed here, best
  377. * is that we force a switch to whatever it was, which is
  378. * probably high speed due to our suspend() routine
  379. */
  380. do_set_cpu_speed(policy, sleep_freq == low_freq ?
  381. CPUFREQ_LOW : CPUFREQ_HIGH, 0);
  382. ppc_proc_freq = cur_freq * 1000ul;
  383. no_schedule = 0;
  384. return 0;
  385. }
  386. static struct cpufreq_driver pmac_cpufreq_driver = {
  387. .verify = cpufreq_generic_frequency_table_verify,
  388. .target = pmac_cpufreq_target,
  389. .get = pmac_cpufreq_get_speed,
  390. .init = pmac_cpufreq_cpu_init,
  391. .suspend = pmac_cpufreq_suspend,
  392. .resume = pmac_cpufreq_resume,
  393. .flags = CPUFREQ_PM_NO_WARN,
  394. .attr = cpufreq_generic_attr,
  395. .name = "powermac",
  396. };
  397. static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
  398. {
  399. struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
  400. "voltage-gpio");
  401. struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
  402. "frequency-gpio");
  403. struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
  404. "slewing-done");
  405. const u32 *value;
  406. /*
  407. * Check to see if it's GPIO driven or PMU only
  408. *
  409. * The way we extract the GPIO address is slightly hackish, but it
  410. * works well enough for now. We need to abstract the whole GPIO
  411. * stuff sooner or later anyway
  412. */
  413. if (volt_gpio_np)
  414. voltage_gpio = read_gpio(volt_gpio_np);
  415. if (freq_gpio_np)
  416. frequency_gpio = read_gpio(freq_gpio_np);
  417. if (slew_done_gpio_np)
  418. slew_done_gpio = read_gpio(slew_done_gpio_np);
  419. /* If we use the frequency GPIOs, calculate the min/max speeds based
  420. * on the bus frequencies
  421. */
  422. if (frequency_gpio && slew_done_gpio) {
  423. int lenp, rc;
  424. const u32 *freqs, *ratio;
  425. freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
  426. lenp /= sizeof(u32);
  427. if (freqs == NULL || lenp != 2) {
  428. printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
  429. return 1;
  430. }
  431. ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
  432. NULL);
  433. if (ratio == NULL) {
  434. printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
  435. return 1;
  436. }
  437. /* Get the min/max bus frequencies */
  438. low_freq = min(freqs[0], freqs[1]);
  439. hi_freq = max(freqs[0], freqs[1]);
  440. /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
  441. * frequency, it claims it to be around 84Mhz on some models while
  442. * it appears to be approx. 101Mhz on all. Let's hack around here...
  443. * fortunately, we don't need to be too precise
  444. */
  445. if (low_freq < 98000000)
  446. low_freq = 101000000;
  447. /* Convert those to CPU core clocks */
  448. low_freq = (low_freq * (*ratio)) / 2000;
  449. hi_freq = (hi_freq * (*ratio)) / 2000;
  450. /* Now we get the frequencies, we read the GPIO to see what is out current
  451. * speed
  452. */
  453. rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  454. cur_freq = (rc & 0x01) ? hi_freq : low_freq;
  455. set_speed_proc = gpios_set_cpu_speed;
  456. return 1;
  457. }
  458. /* If we use the PMU, look for the min & max frequencies in the
  459. * device-tree
  460. */
  461. value = of_get_property(cpunode, "min-clock-frequency", NULL);
  462. if (!value)
  463. return 1;
  464. low_freq = (*value) / 1000;
  465. /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
  466. * here */
  467. if (low_freq < 100000)
  468. low_freq *= 10;
  469. value = of_get_property(cpunode, "max-clock-frequency", NULL);
  470. if (!value)
  471. return 1;
  472. hi_freq = (*value) / 1000;
  473. set_speed_proc = pmu_set_cpu_speed;
  474. is_pmu_based = 1;
  475. return 0;
  476. }
  477. static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
  478. {
  479. struct device_node *volt_gpio_np;
  480. if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  481. return 1;
  482. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  483. if (volt_gpio_np)
  484. voltage_gpio = read_gpio(volt_gpio_np);
  485. if (!voltage_gpio){
  486. printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
  487. return 1;
  488. }
  489. /* OF only reports the high frequency */
  490. hi_freq = cur_freq;
  491. low_freq = cur_freq/2;
  492. /* Read actual frequency from CPU */
  493. cur_freq = dfs_get_cpu_speed();
  494. set_speed_proc = dfs_set_cpu_speed;
  495. get_speed_proc = dfs_get_cpu_speed;
  496. return 0;
  497. }
  498. static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
  499. {
  500. struct device_node *volt_gpio_np;
  501. u32 pvr;
  502. const u32 *value;
  503. if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  504. return 1;
  505. hi_freq = cur_freq;
  506. value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
  507. if (!value)
  508. return 1;
  509. low_freq = (*value) / 1000;
  510. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  511. if (volt_gpio_np)
  512. voltage_gpio = read_gpio(volt_gpio_np);
  513. pvr = mfspr(SPRN_PVR);
  514. has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
  515. set_speed_proc = cpu_750fx_cpu_speed;
  516. get_speed_proc = cpu_750fx_get_cpu_speed;
  517. cur_freq = cpu_750fx_get_cpu_speed();
  518. return 0;
  519. }
  520. /* Currently, we support the following machines:
  521. *
  522. * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
  523. * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
  524. * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
  525. * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
  526. * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
  527. * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
  528. * - Recent MacRISC3 laptops
  529. * - All new machines with 7447A CPUs
  530. */
  531. static int __init pmac_cpufreq_setup(void)
  532. {
  533. struct device_node *cpunode;
  534. const u32 *value;
  535. if (strstr(cmd_line, "nocpufreq"))
  536. return 0;
  537. /* Get first CPU node */
  538. cpunode = of_cpu_device_node_get(0);
  539. if (!cpunode)
  540. goto out;
  541. /* Get current cpu clock freq */
  542. value = of_get_property(cpunode, "clock-frequency", NULL);
  543. if (!value)
  544. goto out;
  545. cur_freq = (*value) / 1000;
  546. transition_latency = CPUFREQ_ETERNAL;
  547. /* Check for 7447A based MacRISC3 */
  548. if (of_machine_is_compatible("MacRISC3") &&
  549. of_get_property(cpunode, "dynamic-power-step", NULL) &&
  550. PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
  551. pmac_cpufreq_init_7447A(cpunode);
  552. transition_latency = 8000000;
  553. /* Check for other MacRISC3 machines */
  554. } else if (of_machine_is_compatible("PowerBook3,4") ||
  555. of_machine_is_compatible("PowerBook3,5") ||
  556. of_machine_is_compatible("MacRISC3")) {
  557. pmac_cpufreq_init_MacRISC3(cpunode);
  558. /* Else check for iBook2 500/600 */
  559. } else if (of_machine_is_compatible("PowerBook4,1")) {
  560. hi_freq = cur_freq;
  561. low_freq = 400000;
  562. set_speed_proc = pmu_set_cpu_speed;
  563. is_pmu_based = 1;
  564. }
  565. /* Else check for TiPb 550 */
  566. else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
  567. hi_freq = cur_freq;
  568. low_freq = 500000;
  569. set_speed_proc = pmu_set_cpu_speed;
  570. is_pmu_based = 1;
  571. }
  572. /* Else check for TiPb 400 & 500 */
  573. else if (of_machine_is_compatible("PowerBook3,2")) {
  574. /* We only know about the 400 MHz and the 500Mhz model
  575. * they both have 300 MHz as low frequency
  576. */
  577. if (cur_freq < 350000 || cur_freq > 550000)
  578. goto out;
  579. hi_freq = cur_freq;
  580. low_freq = 300000;
  581. set_speed_proc = pmu_set_cpu_speed;
  582. is_pmu_based = 1;
  583. }
  584. /* Else check for 750FX */
  585. else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
  586. pmac_cpufreq_init_750FX(cpunode);
  587. out:
  588. of_node_put(cpunode);
  589. if (set_speed_proc == NULL)
  590. return -ENODEV;
  591. pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
  592. pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
  593. ppc_proc_freq = cur_freq * 1000ul;
  594. printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
  595. printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
  596. low_freq/1000, hi_freq/1000, cur_freq/1000);
  597. return cpufreq_register_driver(&pmac_cpufreq_driver);
  598. }
  599. module_init(pmac_cpufreq_setup);