pci.c 20 KB

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  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. *
  7. * The System z PCI code is a rewrite from a prototype by
  8. * the following people (Kudoz!):
  9. * Alexander Schmidt
  10. * Christoph Raisch
  11. * Hannes Hering
  12. * Hoang-Nam Nguyen
  13. * Jan-Bernd Themann
  14. * Stefan Roscher
  15. * Thomas Klein
  16. */
  17. #define COMPONENT "zPCI"
  18. #define pr_fmt(fmt) COMPONENT ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/err.h>
  22. #include <linux/export.h>
  23. #include <linux/delay.h>
  24. #include <linux/irq.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/pci.h>
  28. #include <linux/msi.h>
  29. #include <asm/isc.h>
  30. #include <asm/airq.h>
  31. #include <asm/facility.h>
  32. #include <asm/pci_insn.h>
  33. #include <asm/pci_clp.h>
  34. #include <asm/pci_dma.h>
  35. #define DEBUG /* enable pr_debug */
  36. #define SIC_IRQ_MODE_ALL 0
  37. #define SIC_IRQ_MODE_SINGLE 1
  38. #define ZPCI_NR_DMA_SPACES 1
  39. #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
  40. /* list of all detected zpci devices */
  41. static LIST_HEAD(zpci_list);
  42. static DEFINE_MUTEX(zpci_list_lock);
  43. static void zpci_enable_irq(struct irq_data *data);
  44. static void zpci_disable_irq(struct irq_data *data);
  45. static struct irq_chip zpci_irq_chip = {
  46. .name = "zPCI",
  47. .irq_unmask = zpci_enable_irq,
  48. .irq_mask = zpci_disable_irq,
  49. };
  50. static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
  51. static DEFINE_SPINLOCK(zpci_domain_lock);
  52. static struct airq_iv *zpci_aisb_iv;
  53. static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES];
  54. /* Adapter interrupt definitions */
  55. static void zpci_irq_handler(struct airq_struct *airq);
  56. static struct airq_struct zpci_airq = {
  57. .handler = zpci_irq_handler,
  58. .isc = PCI_ISC,
  59. };
  60. /* I/O Map */
  61. static DEFINE_SPINLOCK(zpci_iomap_lock);
  62. static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  63. struct zpci_iomap_entry *zpci_iomap_start;
  64. EXPORT_SYMBOL_GPL(zpci_iomap_start);
  65. static struct kmem_cache *zdev_fmb_cache;
  66. struct zpci_dev *get_zdev(struct pci_dev *pdev)
  67. {
  68. return (struct zpci_dev *) pdev->sysdata;
  69. }
  70. struct zpci_dev *get_zdev_by_fid(u32 fid)
  71. {
  72. struct zpci_dev *tmp, *zdev = NULL;
  73. mutex_lock(&zpci_list_lock);
  74. list_for_each_entry(tmp, &zpci_list, entry) {
  75. if (tmp->fid == fid) {
  76. zdev = tmp;
  77. break;
  78. }
  79. }
  80. mutex_unlock(&zpci_list_lock);
  81. return zdev;
  82. }
  83. bool zpci_fid_present(u32 fid)
  84. {
  85. return (get_zdev_by_fid(fid) != NULL) ? true : false;
  86. }
  87. static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
  88. {
  89. return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
  90. }
  91. int pci_domain_nr(struct pci_bus *bus)
  92. {
  93. return ((struct zpci_dev *) bus->sysdata)->domain;
  94. }
  95. EXPORT_SYMBOL_GPL(pci_domain_nr);
  96. int pci_proc_domain(struct pci_bus *bus)
  97. {
  98. return pci_domain_nr(bus);
  99. }
  100. EXPORT_SYMBOL_GPL(pci_proc_domain);
  101. /* Modify PCI: Register adapter interruptions */
  102. static int zpci_set_airq(struct zpci_dev *zdev)
  103. {
  104. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  105. struct zpci_fib *fib;
  106. int rc;
  107. fib = (void *) get_zeroed_page(GFP_KERNEL);
  108. if (!fib)
  109. return -ENOMEM;
  110. fib->isc = PCI_ISC;
  111. fib->sum = 1; /* enable summary notifications */
  112. fib->noi = airq_iv_end(zdev->aibv);
  113. fib->aibv = (unsigned long) zdev->aibv->vector;
  114. fib->aibvo = 0; /* each zdev has its own interrupt vector */
  115. fib->aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8;
  116. fib->aisbo = zdev->aisb & 63;
  117. rc = zpci_mod_fc(req, fib);
  118. pr_debug("%s mpcifc returned noi: %d\n", __func__, fib->noi);
  119. free_page((unsigned long) fib);
  120. return rc;
  121. }
  122. struct mod_pci_args {
  123. u64 base;
  124. u64 limit;
  125. u64 iota;
  126. u64 fmb_addr;
  127. };
  128. static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
  129. {
  130. u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
  131. struct zpci_fib *fib;
  132. int rc;
  133. /* The FIB must be available even if it's not used */
  134. fib = (void *) get_zeroed_page(GFP_KERNEL);
  135. if (!fib)
  136. return -ENOMEM;
  137. fib->pba = args->base;
  138. fib->pal = args->limit;
  139. fib->iota = args->iota;
  140. fib->fmb_addr = args->fmb_addr;
  141. rc = zpci_mod_fc(req, fib);
  142. free_page((unsigned long) fib);
  143. return rc;
  144. }
  145. /* Modify PCI: Register I/O address translation parameters */
  146. int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
  147. u64 base, u64 limit, u64 iota)
  148. {
  149. struct mod_pci_args args = { base, limit, iota, 0 };
  150. WARN_ON_ONCE(iota & 0x3fff);
  151. args.iota |= ZPCI_IOTA_RTTO_FLAG;
  152. return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
  153. }
  154. /* Modify PCI: Unregister I/O address translation parameters */
  155. int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
  156. {
  157. struct mod_pci_args args = { 0, 0, 0, 0 };
  158. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
  159. }
  160. /* Modify PCI: Unregister adapter interruptions */
  161. static int zpci_clear_airq(struct zpci_dev *zdev)
  162. {
  163. struct mod_pci_args args = { 0, 0, 0, 0 };
  164. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
  165. }
  166. /* Modify PCI: Set PCI function measurement parameters */
  167. int zpci_fmb_enable_device(struct zpci_dev *zdev)
  168. {
  169. struct mod_pci_args args = { 0, 0, 0, 0 };
  170. if (zdev->fmb)
  171. return -EINVAL;
  172. zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
  173. if (!zdev->fmb)
  174. return -ENOMEM;
  175. WARN_ON((u64) zdev->fmb & 0xf);
  176. args.fmb_addr = virt_to_phys(zdev->fmb);
  177. return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  178. }
  179. /* Modify PCI: Disable PCI function measurement */
  180. int zpci_fmb_disable_device(struct zpci_dev *zdev)
  181. {
  182. struct mod_pci_args args = { 0, 0, 0, 0 };
  183. int rc;
  184. if (!zdev->fmb)
  185. return -EINVAL;
  186. /* Function measurement is disabled if fmb address is zero */
  187. rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  188. kmem_cache_free(zdev_fmb_cache, zdev->fmb);
  189. zdev->fmb = NULL;
  190. return rc;
  191. }
  192. #define ZPCI_PCIAS_CFGSPC 15
  193. static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
  194. {
  195. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  196. u64 data;
  197. int rc;
  198. rc = zpci_load(&data, req, offset);
  199. if (!rc) {
  200. data = data << ((8 - len) * 8);
  201. data = le64_to_cpu(data);
  202. *val = (u32) data;
  203. } else
  204. *val = 0xffffffff;
  205. return rc;
  206. }
  207. static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
  208. {
  209. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  210. u64 data = val;
  211. int rc;
  212. data = cpu_to_le64(data);
  213. data = data >> ((8 - len) * 8);
  214. rc = zpci_store(data, req, offset);
  215. return rc;
  216. }
  217. static int zpci_msi_set_mask_bits(struct msi_desc *msi, u32 mask, u32 flag)
  218. {
  219. int offset, pos;
  220. u32 mask_bits;
  221. if (msi->msi_attrib.is_msix) {
  222. offset = msi->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
  223. PCI_MSIX_ENTRY_VECTOR_CTRL;
  224. msi->masked = readl(msi->mask_base + offset);
  225. writel(flag, msi->mask_base + offset);
  226. } else if (msi->msi_attrib.maskbit) {
  227. pos = (long) msi->mask_base;
  228. pci_read_config_dword(msi->dev, pos, &mask_bits);
  229. mask_bits &= ~(mask);
  230. mask_bits |= flag & mask;
  231. pci_write_config_dword(msi->dev, pos, mask_bits);
  232. } else
  233. return 0;
  234. msi->msi_attrib.maskbit = !!flag;
  235. return 1;
  236. }
  237. static void zpci_enable_irq(struct irq_data *data)
  238. {
  239. struct msi_desc *msi = irq_get_msi_desc(data->irq);
  240. zpci_msi_set_mask_bits(msi, 1, 0);
  241. }
  242. static void zpci_disable_irq(struct irq_data *data)
  243. {
  244. struct msi_desc *msi = irq_get_msi_desc(data->irq);
  245. zpci_msi_set_mask_bits(msi, 1, 1);
  246. }
  247. void pcibios_fixup_bus(struct pci_bus *bus)
  248. {
  249. }
  250. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  251. resource_size_t size,
  252. resource_size_t align)
  253. {
  254. return 0;
  255. }
  256. /* combine single writes by using store-block insn */
  257. void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
  258. {
  259. zpci_memcpy_toio(to, from, count);
  260. }
  261. /* Create a virtual mapping cookie for a PCI BAR */
  262. void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max)
  263. {
  264. struct zpci_dev *zdev = get_zdev(pdev);
  265. u64 addr;
  266. int idx;
  267. if ((bar & 7) != bar)
  268. return NULL;
  269. idx = zdev->bars[bar].map_idx;
  270. spin_lock(&zpci_iomap_lock);
  271. zpci_iomap_start[idx].fh = zdev->fh;
  272. zpci_iomap_start[idx].bar = bar;
  273. spin_unlock(&zpci_iomap_lock);
  274. addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
  275. return (void __iomem *) addr;
  276. }
  277. EXPORT_SYMBOL_GPL(pci_iomap);
  278. void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
  279. {
  280. unsigned int idx;
  281. idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
  282. spin_lock(&zpci_iomap_lock);
  283. zpci_iomap_start[idx].fh = 0;
  284. zpci_iomap_start[idx].bar = 0;
  285. spin_unlock(&zpci_iomap_lock);
  286. }
  287. EXPORT_SYMBOL_GPL(pci_iounmap);
  288. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  289. int size, u32 *val)
  290. {
  291. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  292. int ret;
  293. if (!zdev || devfn != ZPCI_DEVFN)
  294. ret = -ENODEV;
  295. else
  296. ret = zpci_cfg_load(zdev, where, val, size);
  297. return ret;
  298. }
  299. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  300. int size, u32 val)
  301. {
  302. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  303. int ret;
  304. if (!zdev || devfn != ZPCI_DEVFN)
  305. ret = -ENODEV;
  306. else
  307. ret = zpci_cfg_store(zdev, where, val, size);
  308. return ret;
  309. }
  310. static struct pci_ops pci_root_ops = {
  311. .read = pci_read,
  312. .write = pci_write,
  313. };
  314. static void zpci_irq_handler(struct airq_struct *airq)
  315. {
  316. unsigned long si, ai;
  317. struct airq_iv *aibv;
  318. int irqs_on = 0;
  319. inc_irq_stat(IRQIO_PCI);
  320. for (si = 0;;) {
  321. /* Scan adapter summary indicator bit vector */
  322. si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv));
  323. if (si == -1UL) {
  324. if (irqs_on++)
  325. /* End of second scan with interrupts on. */
  326. break;
  327. /* First scan complete, reenable interrupts. */
  328. zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  329. si = 0;
  330. continue;
  331. }
  332. /* Scan the adapter interrupt vector for this device. */
  333. aibv = zpci_aibv[si];
  334. for (ai = 0;;) {
  335. ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv));
  336. if (ai == -1UL)
  337. break;
  338. inc_irq_stat(IRQIO_MSI);
  339. airq_iv_lock(aibv, ai);
  340. generic_handle_irq(airq_iv_get_data(aibv, ai));
  341. airq_iv_unlock(aibv, ai);
  342. }
  343. }
  344. }
  345. int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  346. {
  347. struct zpci_dev *zdev = get_zdev(pdev);
  348. unsigned int hwirq, irq, msi_vecs;
  349. unsigned long aisb;
  350. struct msi_desc *msi;
  351. struct msi_msg msg;
  352. int rc;
  353. pr_debug("%s: requesting %d MSI-X interrupts...", __func__, nvec);
  354. if (type != PCI_CAP_ID_MSIX && type != PCI_CAP_ID_MSI)
  355. return -EINVAL;
  356. msi_vecs = min(nvec, ZPCI_MSI_VEC_MAX);
  357. msi_vecs = min_t(unsigned int, msi_vecs, CONFIG_PCI_NR_MSI);
  358. /* Allocate adapter summary indicator bit */
  359. rc = -EIO;
  360. aisb = airq_iv_alloc_bit(zpci_aisb_iv);
  361. if (aisb == -1UL)
  362. goto out;
  363. zdev->aisb = aisb;
  364. /* Create adapter interrupt vector */
  365. rc = -ENOMEM;
  366. zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK);
  367. if (!zdev->aibv)
  368. goto out_si;
  369. /* Wire up shortcut pointer */
  370. zpci_aibv[aisb] = zdev->aibv;
  371. /* Request MSI interrupts */
  372. hwirq = 0;
  373. list_for_each_entry(msi, &pdev->msi_list, list) {
  374. rc = -EIO;
  375. irq = irq_alloc_desc(0); /* Alloc irq on node 0 */
  376. if (irq == NO_IRQ)
  377. goto out_msi;
  378. rc = irq_set_msi_desc(irq, msi);
  379. if (rc)
  380. goto out_msi;
  381. irq_set_chip_and_handler(irq, &zpci_irq_chip,
  382. handle_simple_irq);
  383. msg.data = hwirq;
  384. msg.address_lo = zdev->msi_addr & 0xffffffff;
  385. msg.address_hi = zdev->msi_addr >> 32;
  386. write_msi_msg(irq, &msg);
  387. airq_iv_set_data(zdev->aibv, hwirq, irq);
  388. hwirq++;
  389. }
  390. /* Enable adapter interrupts */
  391. rc = zpci_set_airq(zdev);
  392. if (rc)
  393. goto out_msi;
  394. return (msi_vecs == nvec) ? 0 : msi_vecs;
  395. out_msi:
  396. list_for_each_entry(msi, &pdev->msi_list, list) {
  397. if (hwirq-- == 0)
  398. break;
  399. irq_set_msi_desc(msi->irq, NULL);
  400. irq_free_desc(msi->irq);
  401. msi->msg.address_lo = 0;
  402. msi->msg.address_hi = 0;
  403. msi->msg.data = 0;
  404. msi->irq = 0;
  405. }
  406. zpci_aibv[aisb] = NULL;
  407. airq_iv_release(zdev->aibv);
  408. out_si:
  409. airq_iv_free_bit(zpci_aisb_iv, aisb);
  410. out:
  411. dev_err(&pdev->dev, "register MSI failed with: %d\n", rc);
  412. return rc;
  413. }
  414. void arch_teardown_msi_irqs(struct pci_dev *pdev)
  415. {
  416. struct zpci_dev *zdev = get_zdev(pdev);
  417. struct msi_desc *msi;
  418. int rc;
  419. pr_info("%s: on pdev: %p\n", __func__, pdev);
  420. /* Disable adapter interrupts */
  421. rc = zpci_clear_airq(zdev);
  422. if (rc) {
  423. dev_err(&pdev->dev, "deregister MSI failed with: %d\n", rc);
  424. return;
  425. }
  426. /* Release MSI interrupts */
  427. list_for_each_entry(msi, &pdev->msi_list, list) {
  428. zpci_msi_set_mask_bits(msi, 1, 1);
  429. irq_set_msi_desc(msi->irq, NULL);
  430. irq_free_desc(msi->irq);
  431. msi->msg.address_lo = 0;
  432. msi->msg.address_hi = 0;
  433. msi->msg.data = 0;
  434. msi->irq = 0;
  435. }
  436. zpci_aibv[zdev->aisb] = NULL;
  437. airq_iv_release(zdev->aibv);
  438. airq_iv_free_bit(zpci_aisb_iv, zdev->aisb);
  439. }
  440. static void zpci_map_resources(struct zpci_dev *zdev)
  441. {
  442. struct pci_dev *pdev = zdev->pdev;
  443. resource_size_t len;
  444. int i;
  445. for (i = 0; i < PCI_BAR_COUNT; i++) {
  446. len = pci_resource_len(pdev, i);
  447. if (!len)
  448. continue;
  449. pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0);
  450. pdev->resource[i].end = pdev->resource[i].start + len - 1;
  451. }
  452. }
  453. static void zpci_unmap_resources(struct zpci_dev *zdev)
  454. {
  455. struct pci_dev *pdev = zdev->pdev;
  456. resource_size_t len;
  457. int i;
  458. for (i = 0; i < PCI_BAR_COUNT; i++) {
  459. len = pci_resource_len(pdev, i);
  460. if (!len)
  461. continue;
  462. pci_iounmap(pdev, (void *) pdev->resource[i].start);
  463. }
  464. }
  465. struct zpci_dev *zpci_alloc_device(void)
  466. {
  467. struct zpci_dev *zdev;
  468. /* Alloc memory for our private pci device data */
  469. zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
  470. return zdev ? : ERR_PTR(-ENOMEM);
  471. }
  472. void zpci_free_device(struct zpci_dev *zdev)
  473. {
  474. kfree(zdev);
  475. }
  476. int pcibios_add_platform_entries(struct pci_dev *pdev)
  477. {
  478. return zpci_sysfs_add_device(&pdev->dev);
  479. }
  480. static int __init zpci_irq_init(void)
  481. {
  482. int rc;
  483. rc = register_adapter_interrupt(&zpci_airq);
  484. if (rc)
  485. goto out;
  486. /* Set summary to 1 to be called every time for the ISC. */
  487. *zpci_airq.lsi_ptr = 1;
  488. rc = -ENOMEM;
  489. zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC);
  490. if (!zpci_aisb_iv)
  491. goto out_airq;
  492. zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  493. return 0;
  494. out_airq:
  495. unregister_adapter_interrupt(&zpci_airq);
  496. out:
  497. return rc;
  498. }
  499. static void zpci_irq_exit(void)
  500. {
  501. airq_iv_release(zpci_aisb_iv);
  502. unregister_adapter_interrupt(&zpci_airq);
  503. }
  504. static struct resource *zpci_alloc_bus_resource(unsigned long start, unsigned long size,
  505. unsigned long flags, int domain)
  506. {
  507. struct resource *r;
  508. char *name;
  509. int rc;
  510. r = kzalloc(sizeof(*r), GFP_KERNEL);
  511. if (!r)
  512. return ERR_PTR(-ENOMEM);
  513. r->start = start;
  514. r->end = r->start + size - 1;
  515. r->flags = flags;
  516. r->parent = &iomem_resource;
  517. name = kmalloc(18, GFP_KERNEL);
  518. if (!name) {
  519. kfree(r);
  520. return ERR_PTR(-ENOMEM);
  521. }
  522. sprintf(name, "PCI Bus: %04x:%02x", domain, ZPCI_BUS_NR);
  523. r->name = name;
  524. rc = request_resource(&iomem_resource, r);
  525. if (rc)
  526. pr_debug("request resource %pR failed\n", r);
  527. return r;
  528. }
  529. static int zpci_alloc_iomap(struct zpci_dev *zdev)
  530. {
  531. int entry;
  532. spin_lock(&zpci_iomap_lock);
  533. entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  534. if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
  535. spin_unlock(&zpci_iomap_lock);
  536. return -ENOSPC;
  537. }
  538. set_bit(entry, zpci_iomap);
  539. spin_unlock(&zpci_iomap_lock);
  540. return entry;
  541. }
  542. static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
  543. {
  544. spin_lock(&zpci_iomap_lock);
  545. memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
  546. clear_bit(entry, zpci_iomap);
  547. spin_unlock(&zpci_iomap_lock);
  548. }
  549. int pcibios_add_device(struct pci_dev *pdev)
  550. {
  551. struct zpci_dev *zdev = get_zdev(pdev);
  552. struct resource *res;
  553. int i;
  554. zdev->pdev = pdev;
  555. zpci_map_resources(zdev);
  556. for (i = 0; i < PCI_BAR_COUNT; i++) {
  557. res = &pdev->resource[i];
  558. if (res->parent || !res->flags)
  559. continue;
  560. pci_claim_resource(pdev, i);
  561. }
  562. return 0;
  563. }
  564. int pcibios_enable_device(struct pci_dev *pdev, int mask)
  565. {
  566. struct zpci_dev *zdev = get_zdev(pdev);
  567. struct resource *res;
  568. u16 cmd;
  569. int i;
  570. zdev->pdev = pdev;
  571. zpci_debug_init_device(zdev);
  572. zpci_fmb_enable_device(zdev);
  573. zpci_map_resources(zdev);
  574. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  575. for (i = 0; i < PCI_BAR_COUNT; i++) {
  576. res = &pdev->resource[i];
  577. if (res->flags & IORESOURCE_IO)
  578. return -EINVAL;
  579. if (res->flags & IORESOURCE_MEM)
  580. cmd |= PCI_COMMAND_MEMORY;
  581. }
  582. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  583. return 0;
  584. }
  585. void pcibios_disable_device(struct pci_dev *pdev)
  586. {
  587. struct zpci_dev *zdev = get_zdev(pdev);
  588. zpci_unmap_resources(zdev);
  589. zpci_fmb_disable_device(zdev);
  590. zpci_debug_exit_device(zdev);
  591. zdev->pdev = NULL;
  592. }
  593. static int zpci_scan_bus(struct zpci_dev *zdev)
  594. {
  595. struct resource *res;
  596. LIST_HEAD(resources);
  597. int i;
  598. /* allocate mapping entry for each used bar */
  599. for (i = 0; i < PCI_BAR_COUNT; i++) {
  600. unsigned long addr, size, flags;
  601. int entry;
  602. if (!zdev->bars[i].size)
  603. continue;
  604. entry = zpci_alloc_iomap(zdev);
  605. if (entry < 0)
  606. return entry;
  607. zdev->bars[i].map_idx = entry;
  608. /* only MMIO is supported */
  609. flags = IORESOURCE_MEM;
  610. if (zdev->bars[i].val & 8)
  611. flags |= IORESOURCE_PREFETCH;
  612. if (zdev->bars[i].val & 4)
  613. flags |= IORESOURCE_MEM_64;
  614. addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
  615. size = 1UL << zdev->bars[i].size;
  616. res = zpci_alloc_bus_resource(addr, size, flags, zdev->domain);
  617. if (IS_ERR(res)) {
  618. zpci_free_iomap(zdev, entry);
  619. return PTR_ERR(res);
  620. }
  621. pci_add_resource(&resources, res);
  622. }
  623. zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
  624. zdev, &resources);
  625. if (!zdev->bus)
  626. return -EIO;
  627. zdev->bus->max_bus_speed = zdev->max_bus_speed;
  628. return 0;
  629. }
  630. static int zpci_alloc_domain(struct zpci_dev *zdev)
  631. {
  632. spin_lock(&zpci_domain_lock);
  633. zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
  634. if (zdev->domain == ZPCI_NR_DEVICES) {
  635. spin_unlock(&zpci_domain_lock);
  636. return -ENOSPC;
  637. }
  638. set_bit(zdev->domain, zpci_domain);
  639. spin_unlock(&zpci_domain_lock);
  640. return 0;
  641. }
  642. static void zpci_free_domain(struct zpci_dev *zdev)
  643. {
  644. spin_lock(&zpci_domain_lock);
  645. clear_bit(zdev->domain, zpci_domain);
  646. spin_unlock(&zpci_domain_lock);
  647. }
  648. int zpci_enable_device(struct zpci_dev *zdev)
  649. {
  650. int rc;
  651. rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  652. if (rc)
  653. goto out;
  654. pr_info("Enabled fh: 0x%x fid: 0x%x\n", zdev->fh, zdev->fid);
  655. rc = zpci_dma_init_device(zdev);
  656. if (rc)
  657. goto out_dma;
  658. return 0;
  659. out_dma:
  660. clp_disable_fh(zdev);
  661. out:
  662. return rc;
  663. }
  664. EXPORT_SYMBOL_GPL(zpci_enable_device);
  665. int zpci_disable_device(struct zpci_dev *zdev)
  666. {
  667. zpci_dma_exit_device(zdev);
  668. return clp_disable_fh(zdev);
  669. }
  670. EXPORT_SYMBOL_GPL(zpci_disable_device);
  671. int zpci_create_device(struct zpci_dev *zdev)
  672. {
  673. int rc;
  674. rc = zpci_alloc_domain(zdev);
  675. if (rc)
  676. goto out;
  677. if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
  678. rc = zpci_enable_device(zdev);
  679. if (rc)
  680. goto out_free;
  681. zdev->state = ZPCI_FN_STATE_ONLINE;
  682. }
  683. rc = zpci_scan_bus(zdev);
  684. if (rc)
  685. goto out_disable;
  686. mutex_lock(&zpci_list_lock);
  687. list_add_tail(&zdev->entry, &zpci_list);
  688. mutex_unlock(&zpci_list_lock);
  689. zpci_init_slot(zdev);
  690. return 0;
  691. out_disable:
  692. if (zdev->state == ZPCI_FN_STATE_ONLINE)
  693. zpci_disable_device(zdev);
  694. out_free:
  695. zpci_free_domain(zdev);
  696. out:
  697. return rc;
  698. }
  699. void zpci_stop_device(struct zpci_dev *zdev)
  700. {
  701. zpci_dma_exit_device(zdev);
  702. /*
  703. * Note: SCLP disables fh via set-pci-fn so don't
  704. * do that here.
  705. */
  706. }
  707. EXPORT_SYMBOL_GPL(zpci_stop_device);
  708. static inline int barsize(u8 size)
  709. {
  710. return (size) ? (1 << size) >> 10 : 0;
  711. }
  712. static int zpci_mem_init(void)
  713. {
  714. zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
  715. 16, 0, NULL);
  716. if (!zdev_fmb_cache)
  717. goto error_zdev;
  718. /* TODO: use realloc */
  719. zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
  720. GFP_KERNEL);
  721. if (!zpci_iomap_start)
  722. goto error_iomap;
  723. return 0;
  724. error_iomap:
  725. kmem_cache_destroy(zdev_fmb_cache);
  726. error_zdev:
  727. return -ENOMEM;
  728. }
  729. static void zpci_mem_exit(void)
  730. {
  731. kfree(zpci_iomap_start);
  732. kmem_cache_destroy(zdev_fmb_cache);
  733. }
  734. static unsigned int s390_pci_probe;
  735. char * __init pcibios_setup(char *str)
  736. {
  737. if (!strcmp(str, "on")) {
  738. s390_pci_probe = 1;
  739. return NULL;
  740. }
  741. return str;
  742. }
  743. static int __init pci_base_init(void)
  744. {
  745. int rc;
  746. if (!s390_pci_probe)
  747. return 0;
  748. if (!test_facility(2) || !test_facility(69)
  749. || !test_facility(71) || !test_facility(72))
  750. return 0;
  751. pr_info("Probing PCI hardware: PCI:%d SID:%d AEN:%d\n",
  752. test_facility(69), test_facility(70),
  753. test_facility(71));
  754. rc = zpci_debug_init();
  755. if (rc)
  756. goto out;
  757. rc = zpci_mem_init();
  758. if (rc)
  759. goto out_mem;
  760. rc = zpci_irq_init();
  761. if (rc)
  762. goto out_irq;
  763. rc = zpci_dma_init();
  764. if (rc)
  765. goto out_dma;
  766. rc = clp_find_pci_devices();
  767. if (rc)
  768. goto out_find;
  769. return 0;
  770. out_find:
  771. zpci_dma_exit();
  772. out_dma:
  773. zpci_irq_exit();
  774. out_irq:
  775. zpci_mem_exit();
  776. out_mem:
  777. zpci_debug_exit();
  778. out:
  779. return rc;
  780. }
  781. subsys_initcall_sync(pci_base_init);