netxen_nic_init.c 35 KB

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  1. /*
  2. * Copyright (C) 2003 - 2006 NetXen, Inc.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called LICENSE.
  22. *
  23. * Contact Information:
  24. * info@netxen.com
  25. * NetXen,
  26. * 3965 Freedom Circle, Fourth floor,
  27. * Santa Clara, CA 95054
  28. *
  29. *
  30. * Source file for NIC routines to initialize the Phantom Hardware
  31. *
  32. */
  33. #include <linux/netdevice.h>
  34. #include <linux/delay.h>
  35. #include "netxen_nic.h"
  36. #include "netxen_nic_hw.h"
  37. #include "netxen_nic_ioctl.h"
  38. #include "netxen_nic_phan_reg.h"
  39. struct crb_addr_pair {
  40. long addr;
  41. long data;
  42. };
  43. #define NETXEN_MAX_CRB_XFORM 60
  44. static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
  45. #define NETXEN_ADDR_ERROR ((unsigned long ) 0xffffffff )
  46. #define crb_addr_transform(name) \
  47. crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
  48. NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
  49. #define NETXEN_NIC_XDMA_RESET 0x8000ff
  50. static inline void
  51. netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
  52. unsigned long off, int *data)
  53. {
  54. void __iomem *addr = pci_base_offset(adapter, off);
  55. writel(*data, addr);
  56. }
  57. static void crb_addr_transform_setup(void)
  58. {
  59. crb_addr_transform(XDMA);
  60. crb_addr_transform(TIMR);
  61. crb_addr_transform(SRE);
  62. crb_addr_transform(SQN3);
  63. crb_addr_transform(SQN2);
  64. crb_addr_transform(SQN1);
  65. crb_addr_transform(SQN0);
  66. crb_addr_transform(SQS3);
  67. crb_addr_transform(SQS2);
  68. crb_addr_transform(SQS1);
  69. crb_addr_transform(SQS0);
  70. crb_addr_transform(RPMX7);
  71. crb_addr_transform(RPMX6);
  72. crb_addr_transform(RPMX5);
  73. crb_addr_transform(RPMX4);
  74. crb_addr_transform(RPMX3);
  75. crb_addr_transform(RPMX2);
  76. crb_addr_transform(RPMX1);
  77. crb_addr_transform(RPMX0);
  78. crb_addr_transform(ROMUSB);
  79. crb_addr_transform(SN);
  80. crb_addr_transform(QMN);
  81. crb_addr_transform(QMS);
  82. crb_addr_transform(PGNI);
  83. crb_addr_transform(PGND);
  84. crb_addr_transform(PGN3);
  85. crb_addr_transform(PGN2);
  86. crb_addr_transform(PGN1);
  87. crb_addr_transform(PGN0);
  88. crb_addr_transform(PGSI);
  89. crb_addr_transform(PGSD);
  90. crb_addr_transform(PGS3);
  91. crb_addr_transform(PGS2);
  92. crb_addr_transform(PGS1);
  93. crb_addr_transform(PGS0);
  94. crb_addr_transform(PS);
  95. crb_addr_transform(PH);
  96. crb_addr_transform(NIU);
  97. crb_addr_transform(I2Q);
  98. crb_addr_transform(EG);
  99. crb_addr_transform(MN);
  100. crb_addr_transform(MS);
  101. crb_addr_transform(CAS2);
  102. crb_addr_transform(CAS1);
  103. crb_addr_transform(CAS0);
  104. crb_addr_transform(CAM);
  105. crb_addr_transform(C2C1);
  106. crb_addr_transform(C2C0);
  107. }
  108. int netxen_init_firmware(struct netxen_adapter *adapter)
  109. {
  110. u32 state = 0, loops = 0, err = 0;
  111. /* Window 1 call */
  112. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  113. if (state == PHAN_INITIALIZE_ACK)
  114. return 0;
  115. while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
  116. udelay(100);
  117. /* Window 1 call */
  118. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  119. loops++;
  120. }
  121. if (loops >= 2000) {
  122. printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
  123. state);
  124. err = -EIO;
  125. return err;
  126. }
  127. /* Window 1 call */
  128. writel(PHAN_INITIALIZE_ACK,
  129. NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  130. return err;
  131. }
  132. #define NETXEN_ADDR_LIMIT 0xffffffffULL
  133. void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
  134. struct pci_dev **used_dev)
  135. {
  136. void *addr;
  137. addr = pci_alloc_consistent(pdev, sz, ptr);
  138. if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
  139. *used_dev = pdev;
  140. return addr;
  141. }
  142. pci_free_consistent(pdev, sz, addr, *ptr);
  143. addr = pci_alloc_consistent(NULL, sz, ptr);
  144. *used_dev = NULL;
  145. return addr;
  146. }
  147. void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
  148. {
  149. int ctxid, ring;
  150. u32 i;
  151. u32 num_rx_bufs = 0;
  152. struct netxen_rcv_desc_ctx *rcv_desc;
  153. DPRINTK(INFO, "initializing some queues: %p\n", adapter);
  154. for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
  155. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
  156. struct netxen_rx_buffer *rx_buf;
  157. rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
  158. rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
  159. rcv_desc->begin_alloc = 0;
  160. rx_buf = rcv_desc->rx_buf_arr;
  161. num_rx_bufs = rcv_desc->max_rx_desc_count;
  162. /*
  163. * Now go through all of them, set reference handles
  164. * and put them in the queues.
  165. */
  166. for (i = 0; i < num_rx_bufs; i++) {
  167. rx_buf->ref_handle = i;
  168. rx_buf->state = NETXEN_BUFFER_FREE;
  169. DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
  170. "%p\n", ctxid, i, rx_buf);
  171. rx_buf++;
  172. }
  173. }
  174. }
  175. DPRINTK(INFO, "initialized buffers for %s and %s\n",
  176. "adapter->free_cmd_buf_list", "adapter->free_rxbuf");
  177. }
  178. void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
  179. {
  180. int ports = 0;
  181. struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
  182. if (netxen_nic_get_board_info(adapter) != 0)
  183. printk("%s: Error getting board config info.\n",
  184. netxen_nic_driver_name);
  185. get_brd_port_by_type(board_info->board_type, &ports);
  186. if (ports == 0)
  187. printk(KERN_ERR "%s: Unknown board type\n",
  188. netxen_nic_driver_name);
  189. adapter->ahw.max_ports = ports;
  190. }
  191. void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
  192. {
  193. struct netxen_drvops *ops = adapter->ops;
  194. switch (adapter->ahw.board_type) {
  195. case NETXEN_NIC_GBE:
  196. ops->enable_phy_interrupts =
  197. netxen_niu_gbe_enable_phy_interrupts;
  198. ops->disable_phy_interrupts =
  199. netxen_niu_gbe_disable_phy_interrupts;
  200. ops->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
  201. ops->macaddr_set = netxen_niu_macaddr_set;
  202. ops->set_mtu = netxen_nic_set_mtu_gb;
  203. ops->set_promisc = netxen_niu_set_promiscuous_mode;
  204. ops->unset_promisc = netxen_niu_set_promiscuous_mode;
  205. ops->phy_read = netxen_niu_gbe_phy_read;
  206. ops->phy_write = netxen_niu_gbe_phy_write;
  207. ops->init_port = netxen_niu_gbe_init_port;
  208. ops->init_niu = netxen_nic_init_niu_gb;
  209. ops->stop_port = netxen_niu_disable_gbe_port;
  210. break;
  211. case NETXEN_NIC_XGBE:
  212. ops->enable_phy_interrupts =
  213. netxen_niu_xgbe_enable_phy_interrupts;
  214. ops->disable_phy_interrupts =
  215. netxen_niu_xgbe_disable_phy_interrupts;
  216. ops->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
  217. ops->macaddr_set = netxen_niu_xg_macaddr_set;
  218. ops->set_mtu = netxen_nic_set_mtu_xgb;
  219. ops->init_port = netxen_niu_xg_init_port;
  220. ops->set_promisc = netxen_niu_xg_set_promiscuous_mode;
  221. ops->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
  222. ops->stop_port = netxen_niu_disable_xg_port;
  223. break;
  224. default:
  225. break;
  226. }
  227. }
  228. /*
  229. * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
  230. * address to external PCI CRB address.
  231. */
  232. unsigned long netxen_decode_crb_addr(unsigned long addr)
  233. {
  234. int i;
  235. unsigned long base_addr, offset, pci_base;
  236. crb_addr_transform_setup();
  237. pci_base = NETXEN_ADDR_ERROR;
  238. base_addr = addr & 0xfff00000;
  239. offset = addr & 0x000fffff;
  240. for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
  241. if (crb_addr_xform[i] == base_addr) {
  242. pci_base = i << 20;
  243. break;
  244. }
  245. }
  246. if (pci_base == NETXEN_ADDR_ERROR)
  247. return pci_base;
  248. else
  249. return (pci_base + offset);
  250. }
  251. static long rom_max_timeout = 10000;
  252. static long rom_lock_timeout = 1000000;
  253. static inline int rom_lock(struct netxen_adapter *adapter)
  254. {
  255. int iter;
  256. u32 done = 0;
  257. int timeout = 0;
  258. while (!done) {
  259. /* acquire semaphore2 from PCI HW block */
  260. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
  261. &done);
  262. if (done == 1)
  263. break;
  264. if (timeout >= rom_lock_timeout)
  265. return -EIO;
  266. timeout++;
  267. /*
  268. * Yield CPU
  269. */
  270. if (!in_atomic())
  271. schedule();
  272. else {
  273. for (iter = 0; iter < 20; iter++)
  274. cpu_relax(); /*This a nop instr on i386 */
  275. }
  276. }
  277. netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
  278. return 0;
  279. }
  280. int netxen_wait_rom_done(struct netxen_adapter *adapter)
  281. {
  282. long timeout = 0;
  283. long done = 0;
  284. while (done == 0) {
  285. done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
  286. done &= 2;
  287. timeout++;
  288. if (timeout >= rom_max_timeout) {
  289. printk("Timeout reached waiting for rom done");
  290. return -EIO;
  291. }
  292. }
  293. return 0;
  294. }
  295. static inline int netxen_rom_wren(struct netxen_adapter *adapter)
  296. {
  297. /* Set write enable latch in ROM status register */
  298. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  299. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  300. M25P_INSTR_WREN);
  301. if (netxen_wait_rom_done(adapter)) {
  302. return -1;
  303. }
  304. return 0;
  305. }
  306. static inline unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
  307. unsigned int addr)
  308. {
  309. unsigned int data = 0xdeaddead;
  310. data = netxen_nic_reg_read(adapter, addr);
  311. return data;
  312. }
  313. static inline int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
  314. {
  315. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  316. M25P_INSTR_RDSR);
  317. if (netxen_wait_rom_done(adapter)) {
  318. return -1;
  319. }
  320. return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
  321. }
  322. static inline void netxen_rom_unlock(struct netxen_adapter *adapter)
  323. {
  324. u32 val;
  325. /* release semaphore2 */
  326. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
  327. }
  328. int netxen_rom_wip_poll(struct netxen_adapter *adapter)
  329. {
  330. long timeout = 0;
  331. long wip = 1;
  332. int val;
  333. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  334. while (wip != 0) {
  335. val = netxen_do_rom_rdsr(adapter);
  336. wip = val & 1;
  337. timeout++;
  338. if (timeout > rom_max_timeout) {
  339. return -1;
  340. }
  341. }
  342. return 0;
  343. }
  344. static inline int do_rom_fast_write(struct netxen_adapter *adapter,
  345. int addr, int data)
  346. {
  347. if (netxen_rom_wren(adapter)) {
  348. return -1;
  349. }
  350. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
  351. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  352. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  353. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  354. M25P_INSTR_PP);
  355. if (netxen_wait_rom_done(adapter)) {
  356. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  357. return -1;
  358. }
  359. return netxen_rom_wip_poll(adapter);
  360. }
  361. static inline int
  362. do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
  363. {
  364. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  365. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  366. udelay(100); /* prevent bursting on CRB */
  367. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  368. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  369. if (netxen_wait_rom_done(adapter)) {
  370. printk("Error waiting for rom done\n");
  371. return -EIO;
  372. }
  373. /* reset abyte_cnt and dummy_byte_cnt */
  374. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  375. udelay(100); /* prevent bursting on CRB */
  376. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  377. *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
  378. return 0;
  379. }
  380. int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
  381. {
  382. int ret;
  383. if (rom_lock(adapter) != 0)
  384. return -EIO;
  385. ret = do_rom_fast_read(adapter, addr, valp);
  386. netxen_rom_unlock(adapter);
  387. return ret;
  388. }
  389. int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
  390. {
  391. int ret = 0;
  392. if (rom_lock(adapter) != 0) {
  393. return -1;
  394. }
  395. ret = do_rom_fast_write(adapter, addr, data);
  396. netxen_rom_unlock(adapter);
  397. return ret;
  398. }
  399. int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
  400. {
  401. netxen_rom_wren(adapter);
  402. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  403. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  404. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  405. M25P_INSTR_SE);
  406. if (netxen_wait_rom_done(adapter)) {
  407. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  408. return -1;
  409. }
  410. return netxen_rom_wip_poll(adapter);
  411. }
  412. int netxen_rom_se(struct netxen_adapter *adapter, int addr)
  413. {
  414. int ret = 0;
  415. if (rom_lock(adapter) != 0) {
  416. return -1;
  417. }
  418. ret = netxen_do_rom_se(adapter, addr);
  419. netxen_rom_unlock(adapter);
  420. return ret;
  421. }
  422. #define NETXEN_BOARDTYPE 0x4008
  423. #define NETXEN_BOARDNUM 0x400c
  424. #define NETXEN_CHIPNUM 0x4010
  425. #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
  426. #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
  427. #define NETXEN_ROM_FOUND_INIT 0x400
  428. int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
  429. {
  430. int addr, val, status;
  431. int n, i;
  432. int init_delay = 0;
  433. struct crb_addr_pair *buf;
  434. unsigned long off;
  435. /* resetall */
  436. status = netxen_nic_get_board_info(adapter);
  437. if (status)
  438. printk("%s: netxen_pinit_from_rom: Error getting board info\n",
  439. netxen_nic_driver_name);
  440. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  441. NETXEN_ROMBUS_RESET);
  442. if (verbose) {
  443. int val;
  444. if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
  445. printk("P2 ROM board type: 0x%08x\n", val);
  446. else
  447. printk("Could not read board type\n");
  448. if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
  449. printk("P2 ROM board num: 0x%08x\n", val);
  450. else
  451. printk("Could not read board number\n");
  452. if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
  453. printk("P2 ROM chip num: 0x%08x\n", val);
  454. else
  455. printk("Could not read chip number\n");
  456. }
  457. if (netxen_rom_fast_read(adapter, 0, &n) == 0
  458. && (n & NETXEN_ROM_FIRST_BARRIER)) {
  459. n &= ~NETXEN_ROM_ROUNDUP;
  460. if (n < NETXEN_ROM_FOUND_INIT) {
  461. if (verbose)
  462. printk("%s: %d CRB init values found"
  463. " in ROM.\n", netxen_nic_driver_name, n);
  464. } else {
  465. printk("%s:n=0x%x Error! NetXen card flash not"
  466. " initialized.\n", __FUNCTION__, n);
  467. return -EIO;
  468. }
  469. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  470. if (buf == NULL) {
  471. printk("%s: netxen_pinit_from_rom: Unable to calloc "
  472. "memory.\n", netxen_nic_driver_name);
  473. return -ENOMEM;
  474. }
  475. for (i = 0; i < n; i++) {
  476. if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
  477. || netxen_rom_fast_read(adapter, 8 * i + 8,
  478. &addr) != 0)
  479. return -EIO;
  480. buf[i].addr = addr;
  481. buf[i].data = val;
  482. if (verbose)
  483. printk("%s: PCI: 0x%08x == 0x%08x\n",
  484. netxen_nic_driver_name, (unsigned int)
  485. netxen_decode_crb_addr((unsigned long)
  486. addr), val);
  487. }
  488. for (i = 0; i < n; i++) {
  489. off =
  490. netxen_decode_crb_addr((unsigned long)buf[i].addr) +
  491. NETXEN_PCI_CRBSPACE;
  492. /* skipping cold reboot MAGIC */
  493. if (off == NETXEN_CAM_RAM(0x1fc))
  494. continue;
  495. /* After writing this register, HW needs time for CRB */
  496. /* to quiet down (else crb_window returns 0xffffffff) */
  497. if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
  498. init_delay = 1;
  499. /* hold xdma in reset also */
  500. buf[i].data = NETXEN_NIC_XDMA_RESET;
  501. }
  502. if (ADDR_IN_WINDOW1(off)) {
  503. writel(buf[i].data,
  504. NETXEN_CRB_NORMALIZE(adapter, off));
  505. } else {
  506. netxen_nic_pci_change_crbwindow(adapter, 0);
  507. writel(buf[i].data,
  508. pci_base_offset(adapter, off));
  509. netxen_nic_pci_change_crbwindow(adapter, 1);
  510. }
  511. if (init_delay == 1) {
  512. ssleep(1);
  513. init_delay = 0;
  514. }
  515. msleep(1);
  516. }
  517. kfree(buf);
  518. /* disable_peg_cache_all */
  519. /* unreset_net_cache */
  520. netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
  521. 4);
  522. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  523. (val & 0xffffff0f));
  524. /* p2dn replyCount */
  525. netxen_crb_writelit_adapter(adapter,
  526. NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
  527. /* disable_peg_cache 0 */
  528. netxen_crb_writelit_adapter(adapter,
  529. NETXEN_CRB_PEG_NET_D + 0x4c, 8);
  530. /* disable_peg_cache 1 */
  531. netxen_crb_writelit_adapter(adapter,
  532. NETXEN_CRB_PEG_NET_I + 0x4c, 8);
  533. /* peg_clr_all */
  534. /* peg_clr 0 */
  535. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
  536. 0);
  537. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
  538. 0);
  539. /* peg_clr 1 */
  540. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
  541. 0);
  542. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
  543. 0);
  544. /* peg_clr 2 */
  545. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
  546. 0);
  547. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
  548. 0);
  549. /* peg_clr 3 */
  550. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
  551. 0);
  552. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
  553. 0);
  554. }
  555. return 0;
  556. }
  557. void netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
  558. {
  559. u32 val = 0;
  560. int loops = 0;
  561. if (!pegtune_val) {
  562. while (val != PHAN_INITIALIZE_COMPLETE && loops < 200000) {
  563. udelay(100);
  564. schedule();
  565. val =
  566. readl(NETXEN_CRB_NORMALIZE
  567. (adapter, CRB_CMDPEG_STATE));
  568. loops++;
  569. }
  570. if (val != PHAN_INITIALIZE_COMPLETE)
  571. printk("WARNING: Initial boot wait loop failed...\n");
  572. }
  573. }
  574. int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
  575. {
  576. int ctx;
  577. for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
  578. struct netxen_recv_context *recv_ctx =
  579. &(adapter->recv_ctx[ctx]);
  580. u32 consumer;
  581. struct status_desc *desc_head;
  582. struct status_desc *desc;
  583. consumer = recv_ctx->status_rx_consumer;
  584. desc_head = recv_ctx->rcv_status_desc_head;
  585. desc = &desc_head[consumer];
  586. if (((le16_to_cpu(desc->owner)) & STATUS_OWNER_HOST))
  587. return 1;
  588. }
  589. return 0;
  590. }
  591. static inline int netxen_nic_check_temp(struct netxen_adapter *adapter)
  592. {
  593. int port_num;
  594. struct netxen_port *port;
  595. struct net_device *netdev;
  596. uint32_t temp, temp_state, temp_val;
  597. int rv = 0;
  598. temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
  599. temp_state = nx_get_temp_state(temp);
  600. temp_val = nx_get_temp_val(temp);
  601. if (temp_state == NX_TEMP_PANIC) {
  602. printk(KERN_ALERT
  603. "%s: Device temperature %d degrees C exceeds"
  604. " maximum allowed. Hardware has been shut down.\n",
  605. netxen_nic_driver_name, temp_val);
  606. for (port_num = 0; port_num < adapter->ahw.max_ports;
  607. port_num++) {
  608. port = adapter->port[port_num];
  609. netdev = port->netdev;
  610. netif_carrier_off(netdev);
  611. netif_stop_queue(netdev);
  612. }
  613. rv = 1;
  614. } else if (temp_state == NX_TEMP_WARN) {
  615. if (adapter->temp == NX_TEMP_NORMAL) {
  616. printk(KERN_ALERT
  617. "%s: Device temperature %d degrees C "
  618. "exceeds operating range."
  619. " Immediate action needed.\n",
  620. netxen_nic_driver_name, temp_val);
  621. }
  622. } else {
  623. if (adapter->temp == NX_TEMP_WARN) {
  624. printk(KERN_INFO
  625. "%s: Device temperature is now %d degrees C"
  626. " in normal range.\n", netxen_nic_driver_name,
  627. temp_val);
  628. }
  629. }
  630. adapter->temp = temp_state;
  631. return rv;
  632. }
  633. void netxen_watchdog_task(unsigned long v)
  634. {
  635. int port_num;
  636. struct netxen_port *port;
  637. struct net_device *netdev;
  638. struct netxen_adapter *adapter = (struct netxen_adapter *)v;
  639. if (netxen_nic_check_temp(adapter))
  640. return;
  641. for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
  642. port = adapter->port[port_num];
  643. netdev = port->netdev;
  644. if ((netif_running(netdev)) && !netif_carrier_ok(netdev)) {
  645. printk(KERN_INFO "%s port %d, %s carrier is now ok\n",
  646. netxen_nic_driver_name, port_num, netdev->name);
  647. netif_carrier_on(netdev);
  648. }
  649. if (netif_queue_stopped(netdev))
  650. netif_wake_queue(netdev);
  651. }
  652. if (adapter->ops->handle_phy_intr)
  653. adapter->ops->handle_phy_intr(adapter);
  654. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  655. }
  656. /*
  657. * netxen_process_rcv() send the received packet to the protocol stack.
  658. * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
  659. * invoke the routine to send more rx buffers to the Phantom...
  660. */
  661. void
  662. netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
  663. struct status_desc *desc)
  664. {
  665. struct netxen_port *port = adapter->port[STATUS_DESC_PORT(desc)];
  666. struct pci_dev *pdev = port->pdev;
  667. struct net_device *netdev = port->netdev;
  668. int index = le16_to_cpu(desc->reference_handle);
  669. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  670. struct netxen_rx_buffer *buffer;
  671. struct sk_buff *skb;
  672. u32 length = le16_to_cpu(desc->total_length);
  673. u32 desc_ctx;
  674. struct netxen_rcv_desc_ctx *rcv_desc;
  675. int ret;
  676. desc_ctx = STATUS_DESC_TYPE(desc);
  677. if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
  678. printk("%s: %s Bad Rcv descriptor ring\n",
  679. netxen_nic_driver_name, netdev->name);
  680. return;
  681. }
  682. rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
  683. buffer = &rcv_desc->rx_buf_arr[index];
  684. pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
  685. PCI_DMA_FROMDEVICE);
  686. skb = (struct sk_buff *)buffer->skb;
  687. if (likely(STATUS_DESC_STATUS(desc) == STATUS_CKSUM_OK)) {
  688. port->stats.csummed++;
  689. skb->ip_summed = CHECKSUM_UNNECESSARY;
  690. } else
  691. skb->ip_summed = CHECKSUM_NONE;
  692. skb->dev = netdev;
  693. skb_put(skb, length);
  694. skb->protocol = eth_type_trans(skb, netdev);
  695. ret = netif_receive_skb(skb);
  696. /*
  697. * RH: Do we need these stats on a regular basis. Can we get it from
  698. * Linux stats.
  699. */
  700. switch (ret) {
  701. case NET_RX_SUCCESS:
  702. port->stats.uphappy++;
  703. break;
  704. case NET_RX_CN_LOW:
  705. port->stats.uplcong++;
  706. break;
  707. case NET_RX_CN_MOD:
  708. port->stats.upmcong++;
  709. break;
  710. case NET_RX_CN_HIGH:
  711. port->stats.uphcong++;
  712. break;
  713. case NET_RX_DROP:
  714. port->stats.updropped++;
  715. break;
  716. default:
  717. port->stats.updunno++;
  718. break;
  719. }
  720. netdev->last_rx = jiffies;
  721. rcv_desc->rcv_free++;
  722. rcv_desc->rcv_pending--;
  723. /*
  724. * We just consumed one buffer so post a buffer.
  725. */
  726. adapter->stats.post_called++;
  727. buffer->skb = NULL;
  728. buffer->state = NETXEN_BUFFER_FREE;
  729. port->stats.no_rcv++;
  730. port->stats.rxbytes += length;
  731. }
  732. /* Process Receive status ring */
  733. u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
  734. {
  735. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  736. struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
  737. struct status_desc *desc; /* used to read status desc here */
  738. u32 consumer = recv_ctx->status_rx_consumer;
  739. int count = 0, ring;
  740. DPRINTK(INFO, "procesing receive\n");
  741. /*
  742. * we assume in this case that there is only one port and that is
  743. * port #1...changes need to be done in firmware to indicate port
  744. * number as part of the descriptor. This way we will be able to get
  745. * the netdev which is associated with that device.
  746. */
  747. while (count < max) {
  748. desc = &desc_head[consumer];
  749. if (!((le16_to_cpu(desc->owner)) & STATUS_OWNER_HOST)) {
  750. DPRINTK(ERR, "desc %p ownedby %x\n", desc, desc->owner);
  751. break;
  752. }
  753. netxen_process_rcv(adapter, ctxid, desc);
  754. desc->owner = STATUS_OWNER_PHANTOM;
  755. consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
  756. count++;
  757. }
  758. if (count) {
  759. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
  760. netxen_post_rx_buffers(adapter, ctxid, ring);
  761. }
  762. }
  763. /* update the consumer index in phantom */
  764. if (count) {
  765. adapter->stats.process_rcv++;
  766. recv_ctx->status_rx_consumer = consumer;
  767. /* Window = 1 */
  768. writel(consumer,
  769. NETXEN_CRB_NORMALIZE(adapter,
  770. recv_crb_registers[ctxid].
  771. crb_rcv_status_consumer));
  772. }
  773. return count;
  774. }
  775. /* Process Command status ring */
  776. void netxen_process_cmd_ring(unsigned long data)
  777. {
  778. u32 last_consumer;
  779. u32 consumer;
  780. struct netxen_adapter *adapter = (struct netxen_adapter *)data;
  781. int count = 0;
  782. struct netxen_cmd_buffer *buffer;
  783. struct netxen_port *port; /* port #1 */
  784. struct netxen_port *nport;
  785. struct pci_dev *pdev;
  786. struct netxen_skb_frag *frag;
  787. u32 i;
  788. struct sk_buff *skb = NULL;
  789. int p;
  790. spin_lock(&adapter->tx_lock);
  791. last_consumer = adapter->last_cmd_consumer;
  792. DPRINTK(INFO, "procesing xmit complete\n");
  793. /* we assume in this case that there is only one port and that is
  794. * port #1...changes need to be done in firmware to indicate port
  795. * number as part of the descriptor. This way we will be able to get
  796. * the netdev which is associated with that device.
  797. */
  798. consumer =
  799. readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMD_CONSUMER_OFFSET));
  800. if (last_consumer == consumer) { /* Ring is empty */
  801. DPRINTK(INFO, "last_consumer %d == consumer %d\n",
  802. last_consumer, consumer);
  803. spin_unlock(&adapter->tx_lock);
  804. return;
  805. }
  806. adapter->proc_cmd_buf_counter++;
  807. adapter->stats.process_xmit++;
  808. /*
  809. * Not needed - does not seem to be used anywhere.
  810. * adapter->cmd_consumer = consumer;
  811. */
  812. spin_unlock(&adapter->tx_lock);
  813. while ((last_consumer != consumer) && (count < MAX_STATUS_HANDLE)) {
  814. buffer = &adapter->cmd_buf_arr[last_consumer];
  815. port = adapter->port[buffer->port];
  816. pdev = port->pdev;
  817. frag = &buffer->frag_array[0];
  818. skb = buffer->skb;
  819. if (skb && (cmpxchg(&buffer->skb, skb, 0) == skb)) {
  820. pci_unmap_single(pdev, frag->dma, frag->length,
  821. PCI_DMA_TODEVICE);
  822. for (i = 1; i < buffer->frag_count; i++) {
  823. DPRINTK(INFO, "getting fragment no %d\n", i);
  824. frag++; /* Get the next frag */
  825. pci_unmap_page(pdev, frag->dma, frag->length,
  826. PCI_DMA_TODEVICE);
  827. }
  828. port->stats.skbfreed++;
  829. dev_kfree_skb_any(skb);
  830. skb = NULL;
  831. } else if (adapter->proc_cmd_buf_counter == 1) {
  832. port->stats.txnullskb++;
  833. }
  834. if (unlikely(netif_queue_stopped(port->netdev)
  835. && netif_carrier_ok(port->netdev))
  836. && ((jiffies - port->netdev->trans_start) >
  837. port->netdev->watchdog_timeo)) {
  838. schedule_work(&port->adapter->tx_timeout_task);
  839. }
  840. last_consumer = get_next_index(last_consumer,
  841. adapter->max_tx_desc_count);
  842. count++;
  843. }
  844. adapter->stats.noxmitdone += count;
  845. count = 0;
  846. spin_lock(&adapter->tx_lock);
  847. if ((--adapter->proc_cmd_buf_counter) == 0) {
  848. adapter->last_cmd_consumer = last_consumer;
  849. while ((adapter->last_cmd_consumer != consumer)
  850. && (count < MAX_STATUS_HANDLE)) {
  851. buffer =
  852. &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
  853. count++;
  854. if (buffer->skb)
  855. break;
  856. else
  857. adapter->last_cmd_consumer =
  858. get_next_index(adapter->last_cmd_consumer,
  859. adapter->max_tx_desc_count);
  860. }
  861. }
  862. if (count) {
  863. for (p = 0; p < adapter->ahw.max_ports; p++) {
  864. nport = adapter->port[p];
  865. if (netif_queue_stopped(nport->netdev)
  866. && (nport->flags & NETXEN_NETDEV_STATUS)) {
  867. netif_wake_queue(nport->netdev);
  868. nport->flags &= ~NETXEN_NETDEV_STATUS;
  869. }
  870. }
  871. }
  872. spin_unlock(&adapter->tx_lock);
  873. DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
  874. __FUNCTION__);
  875. }
  876. /*
  877. * netxen_post_rx_buffers puts buffer in the Phantom memory
  878. */
  879. void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
  880. {
  881. struct pci_dev *pdev = adapter->ahw.pdev;
  882. struct sk_buff *skb;
  883. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
  884. struct netxen_rcv_desc_ctx *rcv_desc = NULL;
  885. struct netxen_recv_crb *crbarea = &recv_crb_registers[ctx];
  886. struct netxen_rcv_desc_crb *rcv_desc_crb = NULL;
  887. u32 producer;
  888. struct rcv_desc *pdesc;
  889. struct netxen_rx_buffer *buffer;
  890. int count = 0;
  891. int index = 0;
  892. adapter->stats.post_called++;
  893. rcv_desc = &recv_ctx->rcv_desc[ringid];
  894. rcv_desc_crb = &crbarea->rcv_desc_crb[ringid];
  895. producer = rcv_desc->producer;
  896. index = rcv_desc->begin_alloc;
  897. buffer = &rcv_desc->rx_buf_arr[index];
  898. /* We can start writing rx descriptors into the phantom memory. */
  899. while (buffer->state == NETXEN_BUFFER_FREE) {
  900. skb = dev_alloc_skb(rcv_desc->skb_size);
  901. if (unlikely(!skb)) {
  902. /*
  903. * We need to schedule the posting of buffers to the pegs.
  904. */
  905. rcv_desc->begin_alloc = index;
  906. DPRINTK(ERR, "netxen_post_rx_buffers: "
  907. " allocated only %d buffers\n", count);
  908. break;
  909. }
  910. count++; /* now there should be no failure */
  911. pdesc = &rcv_desc->desc_head[producer];
  912. skb_reserve(skb, NET_IP_ALIGN);
  913. /*
  914. * This will be setup when we receive the
  915. * buffer after it has been filled
  916. * skb->dev = netdev;
  917. */
  918. buffer->skb = skb;
  919. buffer->state = NETXEN_BUFFER_BUSY;
  920. buffer->dma = pci_map_single(pdev, skb->data,
  921. rcv_desc->dma_size,
  922. PCI_DMA_FROMDEVICE);
  923. /* make a rcv descriptor */
  924. pdesc->reference_handle = le16_to_cpu(buffer->ref_handle);
  925. pdesc->buffer_length = le16_to_cpu(rcv_desc->dma_size);
  926. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  927. DPRINTK(INFO, "done writing descripter\n");
  928. producer =
  929. get_next_index(producer, rcv_desc->max_rx_desc_count);
  930. index = get_next_index(index, rcv_desc->max_rx_desc_count);
  931. buffer = &rcv_desc->rx_buf_arr[index];
  932. }
  933. /* if we did allocate buffers, then write the count to Phantom */
  934. if (count) {
  935. rcv_desc->begin_alloc = index;
  936. rcv_desc->rcv_pending += count;
  937. adapter->stats.lastposted = count;
  938. adapter->stats.posted += count;
  939. rcv_desc->producer = producer;
  940. if (rcv_desc->rcv_free >= 32) {
  941. rcv_desc->rcv_free = 0;
  942. /* Window = 1 */
  943. writel((producer - 1) &
  944. (rcv_desc->max_rx_desc_count - 1),
  945. NETXEN_CRB_NORMALIZE(adapter,
  946. rcv_desc_crb->
  947. crb_rcv_producer_offset));
  948. wmb();
  949. }
  950. }
  951. }
  952. int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
  953. {
  954. if (find_diff_among(adapter->last_cmd_consumer,
  955. adapter->cmd_producer,
  956. adapter->max_tx_desc_count) > 0)
  957. return 1;
  958. return 0;
  959. }
  960. int
  961. netxen_nic_fill_statistics(struct netxen_adapter *adapter,
  962. struct netxen_port *port,
  963. struct netxen_statistics *netxen_stats)
  964. {
  965. void __iomem *addr;
  966. if (adapter->ahw.board_type == NETXEN_NIC_XGBE) {
  967. netxen_nic_pci_change_crbwindow(adapter, 0);
  968. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_TX_BYTE_CNT,
  969. &(netxen_stats->tx_bytes));
  970. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_TX_FRAME_CNT,
  971. &(netxen_stats->tx_packets));
  972. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_RX_BYTE_CNT,
  973. &(netxen_stats->rx_bytes));
  974. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_RX_FRAME_CNT,
  975. &(netxen_stats->rx_packets));
  976. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_AGGR_ERROR_CNT,
  977. &(netxen_stats->rx_errors));
  978. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_CRC_ERROR_CNT,
  979. &(netxen_stats->rx_crc_errors));
  980. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR,
  981. &(netxen_stats->
  982. rx_long_length_error));
  983. NETXEN_NIC_LOCKED_READ_REG(NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR,
  984. &(netxen_stats->
  985. rx_short_length_error));
  986. netxen_nic_pci_change_crbwindow(adapter, 1);
  987. } else {
  988. spin_lock_bh(&adapter->tx_lock);
  989. netxen_stats->tx_bytes = port->stats.txbytes;
  990. netxen_stats->tx_packets = port->stats.xmitedframes +
  991. port->stats.xmitfinished;
  992. netxen_stats->rx_bytes = port->stats.rxbytes;
  993. netxen_stats->rx_packets = port->stats.no_rcv;
  994. netxen_stats->rx_errors = port->stats.rcvdbadskb;
  995. netxen_stats->tx_errors = port->stats.nocmddescriptor;
  996. netxen_stats->rx_short_length_error = port->stats.uplcong;
  997. netxen_stats->rx_long_length_error = port->stats.uphcong;
  998. netxen_stats->rx_crc_errors = 0;
  999. netxen_stats->rx_mac_errors = 0;
  1000. spin_unlock_bh(&adapter->tx_lock);
  1001. }
  1002. return 0;
  1003. }
  1004. void netxen_nic_clear_stats(struct netxen_adapter *adapter)
  1005. {
  1006. struct netxen_port *port;
  1007. int port_num;
  1008. memset(&adapter->stats, 0, sizeof(adapter->stats));
  1009. for (port_num = 0; port_num < adapter->ahw.max_ports; port_num++) {
  1010. port = adapter->port[port_num];
  1011. memset(&port->stats, 0, sizeof(port->stats));
  1012. }
  1013. }
  1014. int
  1015. netxen_nic_clear_statistics(struct netxen_adapter *adapter,
  1016. struct netxen_port *port)
  1017. {
  1018. int data = 0;
  1019. netxen_nic_pci_change_crbwindow(adapter, 0);
  1020. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_TX_BYTE_CNT, &data);
  1021. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_TX_FRAME_CNT,
  1022. &data);
  1023. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_RX_BYTE_CNT, &data);
  1024. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_RX_FRAME_CNT,
  1025. &data);
  1026. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_AGGR_ERROR_CNT,
  1027. &data);
  1028. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_CRC_ERROR_CNT,
  1029. &data);
  1030. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR,
  1031. &data);
  1032. netxen_nic_locked_write_reg(adapter, NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR,
  1033. &data);
  1034. netxen_nic_pci_change_crbwindow(adapter, 1);
  1035. netxen_nic_clear_stats(adapter);
  1036. return 0;
  1037. }
  1038. int
  1039. netxen_nic_do_ioctl(struct netxen_adapter *adapter, void *u_data,
  1040. struct netxen_port *port)
  1041. {
  1042. struct netxen_nic_ioctl_data data;
  1043. struct netxen_nic_ioctl_data *up_data;
  1044. int retval = 0;
  1045. struct netxen_statistics netxen_stats;
  1046. up_data = (void *)u_data;
  1047. DPRINTK(INFO, "doing ioctl for %p\n", adapter);
  1048. if (copy_from_user(&data, (void __user *)up_data, sizeof(data))) {
  1049. /* evil user tried to crash the kernel */
  1050. DPRINTK(ERR, "bad copy from userland: %d\n", (int)sizeof(data));
  1051. retval = -EFAULT;
  1052. goto error_out;
  1053. }
  1054. /* Shouldn't access beyond legal limits of "char u[64];" member */
  1055. if (!data.ptr && (data.size > sizeof(data.u))) {
  1056. /* evil user tried to crash the kernel */
  1057. DPRINTK(ERR, "bad size: %d\n", data.size);
  1058. retval = -EFAULT;
  1059. goto error_out;
  1060. }
  1061. switch (data.cmd) {
  1062. case netxen_nic_cmd_pci_read:
  1063. if ((retval = netxen_nic_hw_read_wx(adapter, data.off,
  1064. &(data.u), data.size)))
  1065. goto error_out;
  1066. if (copy_to_user
  1067. ((void __user *)&(up_data->u), &(data.u), data.size)) {
  1068. DPRINTK(ERR, "bad copy to userland: %d\n",
  1069. (int)sizeof(data));
  1070. retval = -EFAULT;
  1071. goto error_out;
  1072. }
  1073. data.rv = 0;
  1074. break;
  1075. case netxen_nic_cmd_pci_write:
  1076. data.rv = netxen_nic_hw_write_wx(adapter, data.off, &(data.u),
  1077. data.size);
  1078. break;
  1079. case netxen_nic_cmd_pci_config_read:
  1080. switch (data.size) {
  1081. case 1:
  1082. data.rv = pci_read_config_byte(adapter->ahw.pdev,
  1083. data.off,
  1084. (char *)&(data.u));
  1085. break;
  1086. case 2:
  1087. data.rv = pci_read_config_word(adapter->ahw.pdev,
  1088. data.off,
  1089. (short *)&(data.u));
  1090. break;
  1091. case 4:
  1092. data.rv = pci_read_config_dword(adapter->ahw.pdev,
  1093. data.off,
  1094. (u32 *) & (data.u));
  1095. break;
  1096. }
  1097. if (copy_to_user
  1098. ((void __user *)&(up_data->u), &(data.u), data.size)) {
  1099. DPRINTK(ERR, "bad copy to userland: %d\n",
  1100. (int)sizeof(data));
  1101. retval = -EFAULT;
  1102. goto error_out;
  1103. }
  1104. break;
  1105. case netxen_nic_cmd_pci_config_write:
  1106. switch (data.size) {
  1107. case 1:
  1108. data.rv = pci_write_config_byte(adapter->ahw.pdev,
  1109. data.off,
  1110. *(char *)&(data.u));
  1111. break;
  1112. case 2:
  1113. data.rv = pci_write_config_word(adapter->ahw.pdev,
  1114. data.off,
  1115. *(short *)&(data.u));
  1116. break;
  1117. case 4:
  1118. data.rv = pci_write_config_dword(adapter->ahw.pdev,
  1119. data.off,
  1120. *(u32 *) & (data.u));
  1121. break;
  1122. }
  1123. break;
  1124. case netxen_nic_cmd_get_stats:
  1125. data.rv =
  1126. netxen_nic_fill_statistics(adapter, port, &netxen_stats);
  1127. if (copy_to_user
  1128. ((void __user *)(up_data->ptr), (void *)&netxen_stats,
  1129. sizeof(struct netxen_statistics))) {
  1130. DPRINTK(ERR, "bad copy to userland: %d\n",
  1131. (int)sizeof(netxen_stats));
  1132. retval = -EFAULT;
  1133. goto error_out;
  1134. }
  1135. up_data->rv = data.rv;
  1136. break;
  1137. case netxen_nic_cmd_clear_stats:
  1138. data.rv = netxen_nic_clear_statistics(adapter, port);
  1139. up_data->rv = data.rv;
  1140. break;
  1141. case netxen_nic_cmd_get_version:
  1142. if (copy_to_user
  1143. ((void __user *)&(up_data->u), NETXEN_NIC_LINUX_VERSIONID,
  1144. sizeof(NETXEN_NIC_LINUX_VERSIONID))) {
  1145. DPRINTK(ERR, "bad copy to userland: %d\n",
  1146. (int)sizeof(data));
  1147. retval = -EFAULT;
  1148. goto error_out;
  1149. }
  1150. break;
  1151. default:
  1152. DPRINTK(INFO, "bad command %d for %p\n", data.cmd, adapter);
  1153. retval = -EOPNOTSUPP;
  1154. goto error_out;
  1155. }
  1156. put_user(data.rv, (u16 __user *) (&(up_data->rv)));
  1157. DPRINTK(INFO, "done ioctl for %p well.\n", adapter);
  1158. error_out:
  1159. return retval;
  1160. }