s3c-pcm.c 13 KB

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  1. /* sound/soc/s3c24xx/s3c-pcm.c
  2. *
  3. * ALSA SoC Audio Layer - S3C PCM-Controller driver
  4. *
  5. * Copyright (c) 2009 Samsung Electronics Co. Ltd
  6. * Author: Jaswinder Singh <jassi.brar@samsung.com>
  7. * based upon I2S drivers by Ben Dooks.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/device.h>
  16. #include <linux/delay.h>
  17. #include <linux/clk.h>
  18. #include <linux/kernel.h>
  19. #include <linux/gpio.h>
  20. #include <linux/io.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/initval.h>
  25. #include <sound/soc.h>
  26. #include <plat/audio.h>
  27. #include <plat/dma.h>
  28. #include "s3c-dma.h"
  29. #include "s3c-pcm.h"
  30. static struct s3c2410_dma_client s3c_pcm_dma_client_out = {
  31. .name = "PCM Stereo out"
  32. };
  33. static struct s3c2410_dma_client s3c_pcm_dma_client_in = {
  34. .name = "PCM Stereo in"
  35. };
  36. static struct s3c_dma_params s3c_pcm_stereo_out[] = {
  37. [0] = {
  38. .client = &s3c_pcm_dma_client_out,
  39. .dma_size = 4,
  40. },
  41. [1] = {
  42. .client = &s3c_pcm_dma_client_out,
  43. .dma_size = 4,
  44. },
  45. };
  46. static struct s3c_dma_params s3c_pcm_stereo_in[] = {
  47. [0] = {
  48. .client = &s3c_pcm_dma_client_in,
  49. .dma_size = 4,
  50. },
  51. [1] = {
  52. .client = &s3c_pcm_dma_client_in,
  53. .dma_size = 4,
  54. },
  55. };
  56. static struct s3c_pcm_info s3c_pcm[2];
  57. static void s3c_pcm_snd_txctrl(struct s3c_pcm_info *pcm, int on)
  58. {
  59. void __iomem *regs = pcm->regs;
  60. u32 ctl, clkctl;
  61. clkctl = readl(regs + S3C_PCM_CLKCTL);
  62. ctl = readl(regs + S3C_PCM_CTL);
  63. ctl &= ~(S3C_PCM_CTL_TXDIPSTICK_MASK
  64. << S3C_PCM_CTL_TXDIPSTICK_SHIFT);
  65. if (on) {
  66. ctl |= S3C_PCM_CTL_TXDMA_EN;
  67. ctl |= S3C_PCM_CTL_TXFIFO_EN;
  68. ctl |= S3C_PCM_CTL_ENABLE;
  69. ctl |= (0x4<<S3C_PCM_CTL_TXDIPSTICK_SHIFT);
  70. clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
  71. } else {
  72. ctl &= ~S3C_PCM_CTL_TXDMA_EN;
  73. ctl &= ~S3C_PCM_CTL_TXFIFO_EN;
  74. if (!(ctl & S3C_PCM_CTL_RXFIFO_EN)) {
  75. ctl &= ~S3C_PCM_CTL_ENABLE;
  76. if (!pcm->idleclk)
  77. clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
  78. }
  79. }
  80. writel(clkctl, regs + S3C_PCM_CLKCTL);
  81. writel(ctl, regs + S3C_PCM_CTL);
  82. }
  83. static void s3c_pcm_snd_rxctrl(struct s3c_pcm_info *pcm, int on)
  84. {
  85. void __iomem *regs = pcm->regs;
  86. u32 ctl, clkctl;
  87. ctl = readl(regs + S3C_PCM_CTL);
  88. clkctl = readl(regs + S3C_PCM_CLKCTL);
  89. ctl &= ~(S3C_PCM_CTL_RXDIPSTICK_MASK
  90. << S3C_PCM_CTL_RXDIPSTICK_SHIFT);
  91. if (on) {
  92. ctl |= S3C_PCM_CTL_RXDMA_EN;
  93. ctl |= S3C_PCM_CTL_RXFIFO_EN;
  94. ctl |= S3C_PCM_CTL_ENABLE;
  95. ctl |= (0x20<<S3C_PCM_CTL_RXDIPSTICK_SHIFT);
  96. clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
  97. } else {
  98. ctl &= ~S3C_PCM_CTL_RXDMA_EN;
  99. ctl &= ~S3C_PCM_CTL_RXFIFO_EN;
  100. if (!(ctl & S3C_PCM_CTL_TXFIFO_EN)) {
  101. ctl &= ~S3C_PCM_CTL_ENABLE;
  102. if (!pcm->idleclk)
  103. clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
  104. }
  105. }
  106. writel(clkctl, regs + S3C_PCM_CLKCTL);
  107. writel(ctl, regs + S3C_PCM_CTL);
  108. }
  109. static int s3c_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
  110. struct snd_soc_dai *dai)
  111. {
  112. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  113. struct s3c_pcm_info *pcm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
  114. unsigned long flags;
  115. dev_dbg(pcm->dev, "Entered %s\n", __func__);
  116. switch (cmd) {
  117. case SNDRV_PCM_TRIGGER_START:
  118. case SNDRV_PCM_TRIGGER_RESUME:
  119. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  120. spin_lock_irqsave(&pcm->lock, flags);
  121. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  122. s3c_pcm_snd_rxctrl(pcm, 1);
  123. else
  124. s3c_pcm_snd_txctrl(pcm, 1);
  125. spin_unlock_irqrestore(&pcm->lock, flags);
  126. break;
  127. case SNDRV_PCM_TRIGGER_STOP:
  128. case SNDRV_PCM_TRIGGER_SUSPEND:
  129. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  130. spin_lock_irqsave(&pcm->lock, flags);
  131. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  132. s3c_pcm_snd_rxctrl(pcm, 0);
  133. else
  134. s3c_pcm_snd_txctrl(pcm, 0);
  135. spin_unlock_irqrestore(&pcm->lock, flags);
  136. break;
  137. default:
  138. return -EINVAL;
  139. }
  140. return 0;
  141. }
  142. static int s3c_pcm_hw_params(struct snd_pcm_substream *substream,
  143. struct snd_pcm_hw_params *params,
  144. struct snd_soc_dai *socdai)
  145. {
  146. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  147. struct s3c_pcm_info *pcm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
  148. struct s3c_dma_params *dma_data;
  149. void __iomem *regs = pcm->regs;
  150. struct clk *clk;
  151. int sclk_div, sync_div;
  152. unsigned long flags;
  153. u32 clkctl;
  154. dev_dbg(pcm->dev, "Entered %s\n", __func__);
  155. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  156. dma_data = pcm->dma_playback;
  157. else
  158. dma_data = pcm->dma_capture;
  159. snd_soc_dai_set_dma_data(rtd->cpu_dai, substream, dma_data);
  160. /* Strictly check for sample size */
  161. switch (params_format(params)) {
  162. case SNDRV_PCM_FORMAT_S16_LE:
  163. break;
  164. default:
  165. return -EINVAL;
  166. }
  167. spin_lock_irqsave(&pcm->lock, flags);
  168. /* Get hold of the PCMSOURCE_CLK */
  169. clkctl = readl(regs + S3C_PCM_CLKCTL);
  170. if (clkctl & S3C_PCM_CLKCTL_SERCLKSEL_PCLK)
  171. clk = pcm->pclk;
  172. else
  173. clk = pcm->cclk;
  174. /* Set the SCLK divider */
  175. sclk_div = clk_get_rate(clk) / pcm->sclk_per_fs /
  176. params_rate(params) / 2 - 1;
  177. clkctl &= ~(S3C_PCM_CLKCTL_SCLKDIV_MASK
  178. << S3C_PCM_CLKCTL_SCLKDIV_SHIFT);
  179. clkctl |= ((sclk_div & S3C_PCM_CLKCTL_SCLKDIV_MASK)
  180. << S3C_PCM_CLKCTL_SCLKDIV_SHIFT);
  181. /* Set the SYNC divider */
  182. sync_div = pcm->sclk_per_fs - 1;
  183. clkctl &= ~(S3C_PCM_CLKCTL_SYNCDIV_MASK
  184. << S3C_PCM_CLKCTL_SYNCDIV_SHIFT);
  185. clkctl |= ((sync_div & S3C_PCM_CLKCTL_SYNCDIV_MASK)
  186. << S3C_PCM_CLKCTL_SYNCDIV_SHIFT);
  187. writel(clkctl, regs + S3C_PCM_CLKCTL);
  188. spin_unlock_irqrestore(&pcm->lock, flags);
  189. dev_dbg(pcm->dev, "PCMSOURCE_CLK-%lu SCLK=%ufs SCLK_DIV=%d SYNC_DIV=%d\n",
  190. clk_get_rate(clk), pcm->sclk_per_fs,
  191. sclk_div, sync_div);
  192. return 0;
  193. }
  194. static int s3c_pcm_set_fmt(struct snd_soc_dai *cpu_dai,
  195. unsigned int fmt)
  196. {
  197. struct s3c_pcm_info *pcm = snd_soc_dai_get_drvdata(cpu_dai);
  198. void __iomem *regs = pcm->regs;
  199. unsigned long flags;
  200. int ret = 0;
  201. u32 ctl;
  202. dev_dbg(pcm->dev, "Entered %s\n", __func__);
  203. spin_lock_irqsave(&pcm->lock, flags);
  204. ctl = readl(regs + S3C_PCM_CTL);
  205. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  206. case SND_SOC_DAIFMT_NB_NF:
  207. /* Nothing to do, NB_NF by default */
  208. break;
  209. default:
  210. dev_err(pcm->dev, "Unsupported clock inversion!\n");
  211. ret = -EINVAL;
  212. goto exit;
  213. }
  214. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  215. case SND_SOC_DAIFMT_CBS_CFS:
  216. /* Nothing to do, Master by default */
  217. break;
  218. default:
  219. dev_err(pcm->dev, "Unsupported master/slave format!\n");
  220. ret = -EINVAL;
  221. goto exit;
  222. }
  223. switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) {
  224. case SND_SOC_DAIFMT_CONT:
  225. pcm->idleclk = 1;
  226. break;
  227. case SND_SOC_DAIFMT_GATED:
  228. pcm->idleclk = 0;
  229. break;
  230. default:
  231. dev_err(pcm->dev, "Invalid Clock gating request!\n");
  232. ret = -EINVAL;
  233. goto exit;
  234. }
  235. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  236. case SND_SOC_DAIFMT_DSP_A:
  237. ctl |= S3C_PCM_CTL_TXMSB_AFTER_FSYNC;
  238. ctl |= S3C_PCM_CTL_RXMSB_AFTER_FSYNC;
  239. break;
  240. case SND_SOC_DAIFMT_DSP_B:
  241. ctl &= ~S3C_PCM_CTL_TXMSB_AFTER_FSYNC;
  242. ctl &= ~S3C_PCM_CTL_RXMSB_AFTER_FSYNC;
  243. break;
  244. default:
  245. dev_err(pcm->dev, "Unsupported data format!\n");
  246. ret = -EINVAL;
  247. goto exit;
  248. }
  249. writel(ctl, regs + S3C_PCM_CTL);
  250. exit:
  251. spin_unlock_irqrestore(&pcm->lock, flags);
  252. return ret;
  253. }
  254. static int s3c_pcm_set_clkdiv(struct snd_soc_dai *cpu_dai,
  255. int div_id, int div)
  256. {
  257. struct s3c_pcm_info *pcm = snd_soc_dai_get_drvdata(cpu_dai);
  258. switch (div_id) {
  259. case S3C_PCM_SCLK_PER_FS:
  260. pcm->sclk_per_fs = div;
  261. break;
  262. default:
  263. return -EINVAL;
  264. }
  265. return 0;
  266. }
  267. static int s3c_pcm_set_sysclk(struct snd_soc_dai *cpu_dai,
  268. int clk_id, unsigned int freq, int dir)
  269. {
  270. struct s3c_pcm_info *pcm = snd_soc_dai_get_drvdata(cpu_dai);
  271. void __iomem *regs = pcm->regs;
  272. u32 clkctl = readl(regs + S3C_PCM_CLKCTL);
  273. switch (clk_id) {
  274. case S3C_PCM_CLKSRC_PCLK:
  275. clkctl |= S3C_PCM_CLKCTL_SERCLKSEL_PCLK;
  276. break;
  277. case S3C_PCM_CLKSRC_MUX:
  278. clkctl &= ~S3C_PCM_CLKCTL_SERCLKSEL_PCLK;
  279. if (clk_get_rate(pcm->cclk) != freq)
  280. clk_set_rate(pcm->cclk, freq);
  281. break;
  282. default:
  283. return -EINVAL;
  284. }
  285. writel(clkctl, regs + S3C_PCM_CLKCTL);
  286. return 0;
  287. }
  288. static struct snd_soc_dai_ops s3c_pcm_dai_ops = {
  289. .set_sysclk = s3c_pcm_set_sysclk,
  290. .set_clkdiv = s3c_pcm_set_clkdiv,
  291. .trigger = s3c_pcm_trigger,
  292. .hw_params = s3c_pcm_hw_params,
  293. .set_fmt = s3c_pcm_set_fmt,
  294. };
  295. #define S3C_PCM_RATES SNDRV_PCM_RATE_8000_96000
  296. #define S3C_PCM_DAI_DECLARE \
  297. .symmetric_rates = 1, \
  298. .ops = &s3c_pcm_dai_ops, \
  299. .playback = { \
  300. .channels_min = 2, \
  301. .channels_max = 2, \
  302. .rates = S3C_PCM_RATES, \
  303. .formats = SNDRV_PCM_FMTBIT_S16_LE, \
  304. }, \
  305. .capture = { \
  306. .channels_min = 2, \
  307. .channels_max = 2, \
  308. .rates = S3C_PCM_RATES, \
  309. .formats = SNDRV_PCM_FMTBIT_S16_LE, \
  310. }
  311. struct snd_soc_dai_driver s3c_pcm_dai[] = {
  312. [0] = {
  313. .name = "samsung-pcm.0",
  314. S3C_PCM_DAI_DECLARE,
  315. },
  316. [1] = {
  317. .name = "samsung-pcm.1",
  318. S3C_PCM_DAI_DECLARE,
  319. },
  320. };
  321. EXPORT_SYMBOL_GPL(s3c_pcm_dai);
  322. static __devinit int s3c_pcm_dev_probe(struct platform_device *pdev)
  323. {
  324. struct s3c_pcm_info *pcm;
  325. struct resource *mem_res, *dmatx_res, *dmarx_res;
  326. struct s3c_audio_pdata *pcm_pdata;
  327. int ret;
  328. /* Check for valid device index */
  329. if ((pdev->id < 0) || pdev->id >= ARRAY_SIZE(s3c_pcm)) {
  330. dev_err(&pdev->dev, "id %d out of range\n", pdev->id);
  331. return -EINVAL;
  332. }
  333. pcm_pdata = pdev->dev.platform_data;
  334. /* Check for availability of necessary resource */
  335. dmatx_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  336. if (!dmatx_res) {
  337. dev_err(&pdev->dev, "Unable to get PCM-TX dma resource\n");
  338. return -ENXIO;
  339. }
  340. dmarx_res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  341. if (!dmarx_res) {
  342. dev_err(&pdev->dev, "Unable to get PCM-RX dma resource\n");
  343. return -ENXIO;
  344. }
  345. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  346. if (!mem_res) {
  347. dev_err(&pdev->dev, "Unable to get register resource\n");
  348. return -ENXIO;
  349. }
  350. if (pcm_pdata && pcm_pdata->cfg_gpio && pcm_pdata->cfg_gpio(pdev)) {
  351. dev_err(&pdev->dev, "Unable to configure gpio\n");
  352. return -EINVAL;
  353. }
  354. pcm = &s3c_pcm[pdev->id];
  355. pcm->dev = &pdev->dev;
  356. spin_lock_init(&pcm->lock);
  357. /* Default is 128fs */
  358. pcm->sclk_per_fs = 128;
  359. pcm->cclk = clk_get(&pdev->dev, "audio-bus");
  360. if (IS_ERR(pcm->cclk)) {
  361. dev_err(&pdev->dev, "failed to get audio-bus\n");
  362. ret = PTR_ERR(pcm->cclk);
  363. goto err1;
  364. }
  365. clk_enable(pcm->cclk);
  366. /* record our pcm structure for later use in the callbacks */
  367. dev_set_drvdata(&pdev->dev, pcm);
  368. if (!request_mem_region(mem_res->start,
  369. resource_size(mem_res), "samsung-pcm")) {
  370. dev_err(&pdev->dev, "Unable to request register region\n");
  371. ret = -EBUSY;
  372. goto err2;
  373. }
  374. pcm->regs = ioremap(mem_res->start, 0x100);
  375. if (pcm->regs == NULL) {
  376. dev_err(&pdev->dev, "cannot ioremap registers\n");
  377. ret = -ENXIO;
  378. goto err3;
  379. }
  380. pcm->pclk = clk_get(&pdev->dev, "pcm");
  381. if (IS_ERR(pcm->pclk)) {
  382. dev_err(&pdev->dev, "failed to get pcm_clock\n");
  383. ret = -ENOENT;
  384. goto err4;
  385. }
  386. clk_enable(pcm->pclk);
  387. ret = snd_soc_register_dai(&pdev->dev, &s3c_pcm_dai[pdev->id]);
  388. if (ret != 0) {
  389. dev_err(&pdev->dev, "failed to get pcm_clock\n");
  390. goto err5;
  391. }
  392. s3c_pcm_stereo_in[pdev->id].dma_addr = mem_res->start
  393. + S3C_PCM_RXFIFO;
  394. s3c_pcm_stereo_out[pdev->id].dma_addr = mem_res->start
  395. + S3C_PCM_TXFIFO;
  396. s3c_pcm_stereo_in[pdev->id].channel = dmarx_res->start;
  397. s3c_pcm_stereo_out[pdev->id].channel = dmatx_res->start;
  398. pcm->dma_capture = &s3c_pcm_stereo_in[pdev->id];
  399. pcm->dma_playback = &s3c_pcm_stereo_out[pdev->id];
  400. return 0;
  401. err5:
  402. clk_disable(pcm->pclk);
  403. clk_put(pcm->pclk);
  404. err4:
  405. iounmap(pcm->regs);
  406. err3:
  407. release_mem_region(mem_res->start, resource_size(mem_res));
  408. err2:
  409. clk_disable(pcm->cclk);
  410. clk_put(pcm->cclk);
  411. err1:
  412. return ret;
  413. }
  414. static __devexit int s3c_pcm_dev_remove(struct platform_device *pdev)
  415. {
  416. struct s3c_pcm_info *pcm = &s3c_pcm[pdev->id];
  417. struct resource *mem_res;
  418. snd_soc_unregister_dai(&pdev->dev);
  419. iounmap(pcm->regs);
  420. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  421. release_mem_region(mem_res->start, resource_size(mem_res));
  422. clk_disable(pcm->cclk);
  423. clk_disable(pcm->pclk);
  424. clk_put(pcm->pclk);
  425. clk_put(pcm->cclk);
  426. return 0;
  427. }
  428. static struct platform_driver s3c_pcm_driver = {
  429. .probe = s3c_pcm_dev_probe,
  430. .remove = s3c_pcm_dev_remove,
  431. .driver = {
  432. .name = "samsung-pcm",
  433. .owner = THIS_MODULE,
  434. },
  435. };
  436. static int __init s3c_pcm_init(void)
  437. {
  438. return platform_driver_register(&s3c_pcm_driver);
  439. }
  440. module_init(s3c_pcm_init);
  441. static void __exit s3c_pcm_exit(void)
  442. {
  443. platform_driver_unregister(&s3c_pcm_driver);
  444. }
  445. module_exit(s3c_pcm_exit);
  446. /* Module information */
  447. MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>");
  448. MODULE_DESCRIPTION("S3C PCM Controller Driver");
  449. MODULE_LICENSE("GPL");
  450. MODULE_ALIAS("platform:samsung-pcm");