wm8731.c 17 KB

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  1. /*
  2. * wm8731.c -- WM8731 ALSA SoC Audio driver
  3. *
  4. * Copyright 2005 Openedhand Ltd.
  5. *
  6. * Author: Richard Purdie <richard@openedhand.com>
  7. *
  8. * Based on wm8753.c by Liam Girdwood
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/pm.h>
  19. #include <linux/i2c.h>
  20. #include <linux/slab.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/regulator/consumer.h>
  23. #include <linux/spi/spi.h>
  24. #include <sound/core.h>
  25. #include <sound/pcm.h>
  26. #include <sound/pcm_params.h>
  27. #include <sound/soc.h>
  28. #include <sound/soc-dapm.h>
  29. #include <sound/initval.h>
  30. #include <sound/tlv.h>
  31. #include "wm8731.h"
  32. #define WM8731_NUM_SUPPLIES 4
  33. static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = {
  34. "AVDD",
  35. "HPVDD",
  36. "DCVDD",
  37. "DBVDD",
  38. };
  39. /* codec private data */
  40. struct wm8731_priv {
  41. enum snd_soc_control_type control_type;
  42. struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
  43. u16 reg_cache[WM8731_CACHEREGNUM];
  44. unsigned int sysclk;
  45. int sysclk_type;
  46. };
  47. /*
  48. * wm8731 register cache
  49. * We can't read the WM8731 register space when we are
  50. * using 2 wire for device control, so we cache them instead.
  51. * There is no point in caching the reset register
  52. */
  53. static const u16 wm8731_reg[WM8731_CACHEREGNUM] = {
  54. 0x0097, 0x0097, 0x0079, 0x0079,
  55. 0x000a, 0x0008, 0x009f, 0x000a,
  56. 0x0000, 0x0000
  57. };
  58. #define wm8731_reset(c) snd_soc_write(c, WM8731_RESET, 0)
  59. static const char *wm8731_input_select[] = {"Line In", "Mic"};
  60. static const char *wm8731_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  61. static const struct soc_enum wm8731_enum[] = {
  62. SOC_ENUM_SINGLE(WM8731_APANA, 2, 2, wm8731_input_select),
  63. SOC_ENUM_SINGLE(WM8731_APDIGI, 1, 4, wm8731_deemph),
  64. };
  65. static const DECLARE_TLV_DB_SCALE(in_tlv, -3450, 150, 0);
  66. static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -1500, 300, 0);
  67. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  68. static const struct snd_kcontrol_new wm8731_snd_controls[] = {
  69. SOC_DOUBLE_R_TLV("Master Playback Volume", WM8731_LOUT1V, WM8731_ROUT1V,
  70. 0, 127, 0, out_tlv),
  71. SOC_DOUBLE_R("Master Playback ZC Switch", WM8731_LOUT1V, WM8731_ROUT1V,
  72. 7, 1, 0),
  73. SOC_DOUBLE_R_TLV("Capture Volume", WM8731_LINVOL, WM8731_RINVOL, 0, 31, 0,
  74. in_tlv),
  75. SOC_DOUBLE_R("Line Capture Switch", WM8731_LINVOL, WM8731_RINVOL, 7, 1, 1),
  76. SOC_SINGLE("Mic Boost (+20dB)", WM8731_APANA, 0, 1, 0),
  77. SOC_SINGLE("Mic Capture Switch", WM8731_APANA, 1, 1, 1),
  78. SOC_SINGLE_TLV("Sidetone Playback Volume", WM8731_APANA, 6, 3, 1,
  79. sidetone_tlv),
  80. SOC_SINGLE("ADC High Pass Filter Switch", WM8731_APDIGI, 0, 1, 1),
  81. SOC_SINGLE("Store DC Offset Switch", WM8731_APDIGI, 4, 1, 0),
  82. SOC_ENUM("Playback De-emphasis", wm8731_enum[1]),
  83. };
  84. /* Output Mixer */
  85. static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = {
  86. SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0),
  87. SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0),
  88. SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0),
  89. };
  90. /* Input mux */
  91. static const struct snd_kcontrol_new wm8731_input_mux_controls =
  92. SOC_DAPM_ENUM("Input Select", wm8731_enum[0]);
  93. static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = {
  94. SND_SOC_DAPM_SUPPLY("OSC", WM8731_PWR, 5, 1, NULL, 0),
  95. SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1,
  96. &wm8731_output_mixer_controls[0],
  97. ARRAY_SIZE(wm8731_output_mixer_controls)),
  98. SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8731_PWR, 3, 1),
  99. SND_SOC_DAPM_OUTPUT("LOUT"),
  100. SND_SOC_DAPM_OUTPUT("LHPOUT"),
  101. SND_SOC_DAPM_OUTPUT("ROUT"),
  102. SND_SOC_DAPM_OUTPUT("RHPOUT"),
  103. SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8731_PWR, 2, 1),
  104. SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &wm8731_input_mux_controls),
  105. SND_SOC_DAPM_PGA("Line Input", WM8731_PWR, 0, 1, NULL, 0),
  106. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8731_PWR, 1, 1),
  107. SND_SOC_DAPM_INPUT("MICIN"),
  108. SND_SOC_DAPM_INPUT("RLINEIN"),
  109. SND_SOC_DAPM_INPUT("LLINEIN"),
  110. };
  111. static int wm8731_check_osc(struct snd_soc_dapm_widget *source,
  112. struct snd_soc_dapm_widget *sink)
  113. {
  114. struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(source->codec);
  115. return wm8731->sysclk_type == WM8731_SYSCLK_MCLK;
  116. }
  117. static const struct snd_soc_dapm_route intercon[] = {
  118. {"DAC", NULL, "OSC", wm8731_check_osc},
  119. {"ADC", NULL, "OSC", wm8731_check_osc},
  120. /* output mixer */
  121. {"Output Mixer", "Line Bypass Switch", "Line Input"},
  122. {"Output Mixer", "HiFi Playback Switch", "DAC"},
  123. {"Output Mixer", "Mic Sidetone Switch", "Mic Bias"},
  124. /* outputs */
  125. {"RHPOUT", NULL, "Output Mixer"},
  126. {"ROUT", NULL, "Output Mixer"},
  127. {"LHPOUT", NULL, "Output Mixer"},
  128. {"LOUT", NULL, "Output Mixer"},
  129. /* input mux */
  130. {"Input Mux", "Line In", "Line Input"},
  131. {"Input Mux", "Mic", "Mic Bias"},
  132. {"ADC", NULL, "Input Mux"},
  133. /* inputs */
  134. {"Line Input", NULL, "LLINEIN"},
  135. {"Line Input", NULL, "RLINEIN"},
  136. {"Mic Bias", NULL, "MICIN"},
  137. };
  138. static int wm8731_add_widgets(struct snd_soc_codec *codec)
  139. {
  140. snd_soc_dapm_new_controls(codec, wm8731_dapm_widgets,
  141. ARRAY_SIZE(wm8731_dapm_widgets));
  142. snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
  143. return 0;
  144. }
  145. struct _coeff_div {
  146. u32 mclk;
  147. u32 rate;
  148. u16 fs;
  149. u8 sr:4;
  150. u8 bosr:1;
  151. u8 usb:1;
  152. };
  153. /* codec mclk clock divider coefficients */
  154. static const struct _coeff_div coeff_div[] = {
  155. /* 48k */
  156. {12288000, 48000, 256, 0x0, 0x0, 0x0},
  157. {18432000, 48000, 384, 0x0, 0x1, 0x0},
  158. {12000000, 48000, 250, 0x0, 0x0, 0x1},
  159. /* 32k */
  160. {12288000, 32000, 384, 0x6, 0x0, 0x0},
  161. {18432000, 32000, 576, 0x6, 0x1, 0x0},
  162. {12000000, 32000, 375, 0x6, 0x0, 0x1},
  163. /* 8k */
  164. {12288000, 8000, 1536, 0x3, 0x0, 0x0},
  165. {18432000, 8000, 2304, 0x3, 0x1, 0x0},
  166. {11289600, 8000, 1408, 0xb, 0x0, 0x0},
  167. {16934400, 8000, 2112, 0xb, 0x1, 0x0},
  168. {12000000, 8000, 1500, 0x3, 0x0, 0x1},
  169. /* 96k */
  170. {12288000, 96000, 128, 0x7, 0x0, 0x0},
  171. {18432000, 96000, 192, 0x7, 0x1, 0x0},
  172. {12000000, 96000, 125, 0x7, 0x0, 0x1},
  173. /* 44.1k */
  174. {11289600, 44100, 256, 0x8, 0x0, 0x0},
  175. {16934400, 44100, 384, 0x8, 0x1, 0x0},
  176. {12000000, 44100, 272, 0x8, 0x1, 0x1},
  177. /* 88.2k */
  178. {11289600, 88200, 128, 0xf, 0x0, 0x0},
  179. {16934400, 88200, 192, 0xf, 0x1, 0x0},
  180. {12000000, 88200, 136, 0xf, 0x1, 0x1},
  181. };
  182. static inline int get_coeff(int mclk, int rate)
  183. {
  184. int i;
  185. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  186. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  187. return i;
  188. }
  189. return 0;
  190. }
  191. static int wm8731_hw_params(struct snd_pcm_substream *substream,
  192. struct snd_pcm_hw_params *params,
  193. struct snd_soc_dai *dai)
  194. {
  195. struct snd_soc_codec *codec = dai->codec;
  196. struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
  197. u16 iface = snd_soc_read(codec, WM8731_IFACE) & 0xfff3;
  198. int i = get_coeff(wm8731->sysclk, params_rate(params));
  199. u16 srate = (coeff_div[i].sr << 2) |
  200. (coeff_div[i].bosr << 1) | coeff_div[i].usb;
  201. snd_soc_write(codec, WM8731_SRATE, srate);
  202. /* bit size */
  203. switch (params_format(params)) {
  204. case SNDRV_PCM_FORMAT_S16_LE:
  205. break;
  206. case SNDRV_PCM_FORMAT_S20_3LE:
  207. iface |= 0x0004;
  208. break;
  209. case SNDRV_PCM_FORMAT_S24_LE:
  210. iface |= 0x0008;
  211. break;
  212. }
  213. snd_soc_write(codec, WM8731_IFACE, iface);
  214. return 0;
  215. }
  216. static int wm8731_pcm_prepare(struct snd_pcm_substream *substream,
  217. struct snd_soc_dai *dai)
  218. {
  219. struct snd_soc_codec *codec = dai->codec;
  220. /* set active */
  221. snd_soc_write(codec, WM8731_ACTIVE, 0x0001);
  222. return 0;
  223. }
  224. static void wm8731_shutdown(struct snd_pcm_substream *substream,
  225. struct snd_soc_dai *dai)
  226. {
  227. struct snd_soc_codec *codec = dai->codec;
  228. /* deactivate */
  229. if (!codec->active) {
  230. udelay(50);
  231. snd_soc_write(codec, WM8731_ACTIVE, 0x0);
  232. }
  233. }
  234. static int wm8731_mute(struct snd_soc_dai *dai, int mute)
  235. {
  236. struct snd_soc_codec *codec = dai->codec;
  237. u16 mute_reg = snd_soc_read(codec, WM8731_APDIGI) & 0xfff7;
  238. if (mute)
  239. snd_soc_write(codec, WM8731_APDIGI, mute_reg | 0x8);
  240. else
  241. snd_soc_write(codec, WM8731_APDIGI, mute_reg);
  242. return 0;
  243. }
  244. static int wm8731_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  245. int clk_id, unsigned int freq, int dir)
  246. {
  247. struct snd_soc_codec *codec = codec_dai->codec;
  248. struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
  249. switch (clk_id) {
  250. case WM8731_SYSCLK_XTAL:
  251. case WM8731_SYSCLK_MCLK:
  252. wm8731->sysclk_type = clk_id;
  253. break;
  254. default:
  255. return -EINVAL;
  256. }
  257. switch (freq) {
  258. case 11289600:
  259. case 12000000:
  260. case 12288000:
  261. case 16934400:
  262. case 18432000:
  263. wm8731->sysclk = freq;
  264. break;
  265. default:
  266. return -EINVAL;
  267. }
  268. snd_soc_dapm_sync(codec);
  269. return 0;
  270. }
  271. static int wm8731_set_dai_fmt(struct snd_soc_dai *codec_dai,
  272. unsigned int fmt)
  273. {
  274. struct snd_soc_codec *codec = codec_dai->codec;
  275. u16 iface = 0;
  276. /* set master/slave audio interface */
  277. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  278. case SND_SOC_DAIFMT_CBM_CFM:
  279. iface |= 0x0040;
  280. break;
  281. case SND_SOC_DAIFMT_CBS_CFS:
  282. break;
  283. default:
  284. return -EINVAL;
  285. }
  286. /* interface format */
  287. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  288. case SND_SOC_DAIFMT_I2S:
  289. iface |= 0x0002;
  290. break;
  291. case SND_SOC_DAIFMT_RIGHT_J:
  292. break;
  293. case SND_SOC_DAIFMT_LEFT_J:
  294. iface |= 0x0001;
  295. break;
  296. case SND_SOC_DAIFMT_DSP_A:
  297. iface |= 0x0003;
  298. break;
  299. case SND_SOC_DAIFMT_DSP_B:
  300. iface |= 0x0013;
  301. break;
  302. default:
  303. return -EINVAL;
  304. }
  305. /* clock inversion */
  306. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  307. case SND_SOC_DAIFMT_NB_NF:
  308. break;
  309. case SND_SOC_DAIFMT_IB_IF:
  310. iface |= 0x0090;
  311. break;
  312. case SND_SOC_DAIFMT_IB_NF:
  313. iface |= 0x0080;
  314. break;
  315. case SND_SOC_DAIFMT_NB_IF:
  316. iface |= 0x0010;
  317. break;
  318. default:
  319. return -EINVAL;
  320. }
  321. /* set iface */
  322. snd_soc_write(codec, WM8731_IFACE, iface);
  323. return 0;
  324. }
  325. static int wm8731_set_bias_level(struct snd_soc_codec *codec,
  326. enum snd_soc_bias_level level)
  327. {
  328. struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
  329. int i, ret;
  330. u8 data[2];
  331. u16 *cache = codec->reg_cache;
  332. u16 reg;
  333. switch (level) {
  334. case SND_SOC_BIAS_ON:
  335. break;
  336. case SND_SOC_BIAS_PREPARE:
  337. break;
  338. case SND_SOC_BIAS_STANDBY:
  339. if (codec->bias_level == SND_SOC_BIAS_OFF) {
  340. ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
  341. wm8731->supplies);
  342. if (ret != 0)
  343. return ret;
  344. /* Sync reg_cache with the hardware */
  345. for (i = 0; i < ARRAY_SIZE(wm8731_reg); i++) {
  346. if (cache[i] == wm8731_reg[i])
  347. continue;
  348. data[0] = (i << 1) | ((cache[i] >> 8)
  349. & 0x0001);
  350. data[1] = cache[i] & 0x00ff;
  351. codec->hw_write(codec->control_data, data, 2);
  352. }
  353. }
  354. /* Clear PWROFF, gate CLKOUT, everything else as-is */
  355. reg = snd_soc_read(codec, WM8731_PWR) & 0xff7f;
  356. snd_soc_write(codec, WM8731_PWR, reg | 0x0040);
  357. break;
  358. case SND_SOC_BIAS_OFF:
  359. snd_soc_write(codec, WM8731_ACTIVE, 0x0);
  360. snd_soc_write(codec, WM8731_PWR, 0xffff);
  361. regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
  362. wm8731->supplies);
  363. break;
  364. }
  365. codec->bias_level = level;
  366. return 0;
  367. }
  368. #define WM8731_RATES SNDRV_PCM_RATE_8000_96000
  369. #define WM8731_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  370. SNDRV_PCM_FMTBIT_S24_LE)
  371. static struct snd_soc_dai_ops wm8731_dai_ops = {
  372. .prepare = wm8731_pcm_prepare,
  373. .hw_params = wm8731_hw_params,
  374. .shutdown = wm8731_shutdown,
  375. .digital_mute = wm8731_mute,
  376. .set_sysclk = wm8731_set_dai_sysclk,
  377. .set_fmt = wm8731_set_dai_fmt,
  378. };
  379. static struct snd_soc_dai_driver wm8731_dai = {
  380. .name = "wm8731-hifi",
  381. .playback = {
  382. .stream_name = "Playback",
  383. .channels_min = 1,
  384. .channels_max = 2,
  385. .rates = WM8731_RATES,
  386. .formats = WM8731_FORMATS,},
  387. .capture = {
  388. .stream_name = "Capture",
  389. .channels_min = 1,
  390. .channels_max = 2,
  391. .rates = WM8731_RATES,
  392. .formats = WM8731_FORMATS,},
  393. .ops = &wm8731_dai_ops,
  394. .symmetric_rates = 1,
  395. };
  396. #ifdef CONFIG_PM
  397. static int wm8731_suspend(struct snd_soc_codec *codec, pm_message_t state)
  398. {
  399. wm8731_set_bias_level(codec, SND_SOC_BIAS_OFF);
  400. return 0;
  401. }
  402. static int wm8731_resume(struct snd_soc_codec *codec)
  403. {
  404. wm8731_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  405. return 0;
  406. }
  407. #else
  408. #define wm8731_suspend NULL
  409. #define wm8731_resume NULL
  410. #endif
  411. static int wm8731_probe(struct snd_soc_codec *codec)
  412. {
  413. struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
  414. int ret = 0, i;
  415. ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8731->control_type);
  416. if (ret < 0) {
  417. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  418. return ret;
  419. }
  420. for (i = 0; i < ARRAY_SIZE(wm8731->supplies); i++)
  421. wm8731->supplies[i].supply = wm8731_supply_names[i];
  422. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8731->supplies),
  423. wm8731->supplies);
  424. if (ret != 0) {
  425. dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
  426. return ret;
  427. }
  428. ret = regulator_bulk_enable(ARRAY_SIZE(wm8731->supplies),
  429. wm8731->supplies);
  430. if (ret != 0) {
  431. dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
  432. goto err_regulator_get;
  433. }
  434. ret = wm8731_reset(codec);
  435. if (ret < 0) {
  436. dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
  437. goto err_regulator_enable;
  438. }
  439. wm8731_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  440. /* Latch the update bits */
  441. snd_soc_update_bits(codec, WM8731_LOUT1V, 0x100, 0);
  442. snd_soc_update_bits(codec, WM8731_ROUT1V, 0x100, 0);
  443. snd_soc_update_bits(codec, WM8731_LINVOL, 0x100, 0);
  444. snd_soc_update_bits(codec, WM8731_RINVOL, 0x100, 0);
  445. /* Disable bypass path by default */
  446. snd_soc_update_bits(codec, WM8731_APANA, 0x8, 0);
  447. snd_soc_add_controls(codec, wm8731_snd_controls,
  448. ARRAY_SIZE(wm8731_snd_controls));
  449. wm8731_add_widgets(codec);
  450. /* Regulators will have been enabled by bias management */
  451. regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
  452. return 0;
  453. err_regulator_enable:
  454. regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
  455. err_regulator_get:
  456. regulator_bulk_free(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
  457. kfree(wm8731);
  458. return ret;
  459. }
  460. /* power down chip */
  461. static int wm8731_remove(struct snd_soc_codec *codec)
  462. {
  463. struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
  464. wm8731_set_bias_level(codec, SND_SOC_BIAS_OFF);
  465. regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
  466. regulator_bulk_free(ARRAY_SIZE(wm8731->supplies), wm8731->supplies);
  467. return 0;
  468. }
  469. static struct snd_soc_codec_driver soc_codec_dev_wm8731 = {
  470. .probe = wm8731_probe,
  471. .remove = wm8731_remove,
  472. .suspend = wm8731_suspend,
  473. .resume = wm8731_resume,
  474. .set_bias_level = wm8731_set_bias_level,
  475. .reg_cache_size = ARRAY_SIZE(wm8731_reg),
  476. .reg_word_size = sizeof(u16),
  477. .reg_cache_default = wm8731_reg,
  478. };
  479. #if defined(CONFIG_SPI_MASTER)
  480. static int __devinit wm8731_spi_probe(struct spi_device *spi)
  481. {
  482. struct wm8731_priv *wm8731;
  483. int ret;
  484. wm8731 = kzalloc(sizeof(struct wm8731_priv), GFP_KERNEL);
  485. if (wm8731 == NULL)
  486. return -ENOMEM;
  487. wm8731->control_type = SND_SOC_SPI;
  488. spi_set_drvdata(spi, wm8731);
  489. ret = snd_soc_register_codec(&spi->dev,
  490. &soc_codec_dev_wm8731, &wm8731_dai, 1);
  491. if (ret < 0)
  492. kfree(wm8731);
  493. return ret;
  494. }
  495. static int __devexit wm8731_spi_remove(struct spi_device *spi)
  496. {
  497. snd_soc_unregister_codec(&spi->dev);
  498. kfree(spi_get_drvdata(spi));
  499. return 0;
  500. }
  501. static struct spi_driver wm8731_spi_driver = {
  502. .driver = {
  503. .name = "wm8731-codec",
  504. .owner = THIS_MODULE,
  505. },
  506. .probe = wm8731_spi_probe,
  507. .remove = __devexit_p(wm8731_spi_remove),
  508. };
  509. #endif /* CONFIG_SPI_MASTER */
  510. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  511. static __devinit int wm8731_i2c_probe(struct i2c_client *i2c,
  512. const struct i2c_device_id *id)
  513. {
  514. struct wm8731_priv *wm8731;
  515. int ret;
  516. wm8731 = kzalloc(sizeof(struct wm8731_priv), GFP_KERNEL);
  517. if (wm8731 == NULL)
  518. return -ENOMEM;
  519. i2c_set_clientdata(i2c, wm8731);
  520. wm8731->control_type = SND_SOC_I2C;
  521. ret = snd_soc_register_codec(&i2c->dev,
  522. &soc_codec_dev_wm8731, &wm8731_dai, 1);
  523. if (ret < 0)
  524. kfree(wm8731);
  525. return ret;
  526. }
  527. static __devexit int wm8731_i2c_remove(struct i2c_client *client)
  528. {
  529. snd_soc_unregister_codec(&client->dev);
  530. kfree(i2c_get_clientdata(client));
  531. return 0;
  532. }
  533. static const struct i2c_device_id wm8731_i2c_id[] = {
  534. { "wm8731", 0 },
  535. { }
  536. };
  537. MODULE_DEVICE_TABLE(i2c, wm8731_i2c_id);
  538. static struct i2c_driver wm8731_i2c_driver = {
  539. .driver = {
  540. .name = "wm8731-codec",
  541. .owner = THIS_MODULE,
  542. },
  543. .probe = wm8731_i2c_probe,
  544. .remove = __devexit_p(wm8731_i2c_remove),
  545. .id_table = wm8731_i2c_id,
  546. };
  547. #endif
  548. static int __init wm8731_modinit(void)
  549. {
  550. int ret = 0;
  551. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  552. ret = i2c_add_driver(&wm8731_i2c_driver);
  553. if (ret != 0) {
  554. printk(KERN_ERR "Failed to register WM8731 I2C driver: %d\n",
  555. ret);
  556. }
  557. #endif
  558. #if defined(CONFIG_SPI_MASTER)
  559. ret = spi_register_driver(&wm8731_spi_driver);
  560. if (ret != 0) {
  561. printk(KERN_ERR "Failed to register WM8731 SPI driver: %d\n",
  562. ret);
  563. }
  564. #endif
  565. return ret;
  566. }
  567. module_init(wm8731_modinit);
  568. static void __exit wm8731_exit(void)
  569. {
  570. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  571. i2c_del_driver(&wm8731_i2c_driver);
  572. #endif
  573. #if defined(CONFIG_SPI_MASTER)
  574. spi_unregister_driver(&wm8731_spi_driver);
  575. #endif
  576. }
  577. module_exit(wm8731_exit);
  578. MODULE_DESCRIPTION("ASoC WM8731 driver");
  579. MODULE_AUTHOR("Richard Purdie");
  580. MODULE_LICENSE("GPL");