tlv320aic26.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459
  1. /*
  2. * Texas Instruments TLV320AIC26 low power audio CODEC
  3. * ALSA SoC CODEC driver
  4. *
  5. * Copyright (C) 2008 Secret Lab Technologies Ltd.
  6. */
  7. #include <linux/module.h>
  8. #include <linux/moduleparam.h>
  9. #include <linux/init.h>
  10. #include <linux/delay.h>
  11. #include <linux/pm.h>
  12. #include <linux/device.h>
  13. #include <linux/sysfs.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/slab.h>
  16. #include <sound/core.h>
  17. #include <sound/pcm.h>
  18. #include <sound/pcm_params.h>
  19. #include <sound/soc.h>
  20. #include <sound/soc-dapm.h>
  21. #include <sound/initval.h>
  22. #include "tlv320aic26.h"
  23. MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
  24. MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
  25. MODULE_LICENSE("GPL");
  26. /* AIC26 driver private data */
  27. struct aic26 {
  28. struct spi_device *spi;
  29. struct snd_soc_codec codec;
  30. u16 reg_cache[AIC26_NUM_REGS]; /* shadow registers */
  31. int master;
  32. int datfm;
  33. int mclk;
  34. /* Keyclick parameters */
  35. int keyclick_amplitude;
  36. int keyclick_freq;
  37. int keyclick_len;
  38. };
  39. /* ---------------------------------------------------------------------
  40. * Register access routines
  41. */
  42. static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
  43. unsigned int reg)
  44. {
  45. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  46. u16 *cache = codec->reg_cache;
  47. u16 cmd, value;
  48. u8 buffer[2];
  49. int rc;
  50. if (reg >= AIC26_NUM_REGS) {
  51. WARN_ON_ONCE(1);
  52. return 0;
  53. }
  54. /* Do SPI transfer; first 16bits are command; remaining is
  55. * register contents */
  56. cmd = AIC26_READ_COMMAND_WORD(reg);
  57. buffer[0] = (cmd >> 8) & 0xff;
  58. buffer[1] = cmd & 0xff;
  59. rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
  60. if (rc) {
  61. dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
  62. return -EIO;
  63. }
  64. value = (buffer[0] << 8) | buffer[1];
  65. /* Update the cache before returning with the value */
  66. cache[reg] = value;
  67. return value;
  68. }
  69. static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
  70. unsigned int reg)
  71. {
  72. u16 *cache = codec->reg_cache;
  73. if (reg >= AIC26_NUM_REGS) {
  74. WARN_ON_ONCE(1);
  75. return 0;
  76. }
  77. return cache[reg];
  78. }
  79. static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
  80. unsigned int value)
  81. {
  82. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  83. u16 *cache = codec->reg_cache;
  84. u16 cmd;
  85. u8 buffer[4];
  86. int rc;
  87. if (reg >= AIC26_NUM_REGS) {
  88. WARN_ON_ONCE(1);
  89. return -EINVAL;
  90. }
  91. /* Do SPI transfer; first 16bits are command; remaining is data
  92. * to write into register */
  93. cmd = AIC26_WRITE_COMMAND_WORD(reg);
  94. buffer[0] = (cmd >> 8) & 0xff;
  95. buffer[1] = cmd & 0xff;
  96. buffer[2] = value >> 8;
  97. buffer[3] = value;
  98. rc = spi_write(aic26->spi, buffer, 4);
  99. if (rc) {
  100. dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
  101. return -EIO;
  102. }
  103. /* update cache before returning */
  104. cache[reg] = value;
  105. return 0;
  106. }
  107. /* ---------------------------------------------------------------------
  108. * Digital Audio Interface Operations
  109. */
  110. static int aic26_hw_params(struct snd_pcm_substream *substream,
  111. struct snd_pcm_hw_params *params,
  112. struct snd_soc_dai *dai)
  113. {
  114. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  115. struct snd_soc_codec *codec = rtd->codec;
  116. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  117. int fsref, divisor, wlen, pval, jval, dval, qval;
  118. u16 reg;
  119. dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
  120. substream, params);
  121. dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
  122. params_format(params));
  123. switch (params_rate(params)) {
  124. case 8000: fsref = 48000; divisor = AIC26_DIV_6; break;
  125. case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
  126. case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
  127. case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
  128. case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
  129. case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
  130. case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
  131. case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
  132. case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
  133. default:
  134. dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
  135. }
  136. /* select data word length */
  137. switch (params_format(params)) {
  138. case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break;
  139. case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
  140. case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
  141. case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
  142. default:
  143. dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
  144. }
  145. /* Configure PLL */
  146. pval = 1;
  147. jval = (fsref == 44100) ? 7 : 8;
  148. dval = (fsref == 44100) ? 5264 : 1920;
  149. qval = 0;
  150. reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
  151. aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
  152. reg = dval << 2;
  153. aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg);
  154. /* Audio Control 3 (master mode, fsref rate) */
  155. reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
  156. reg &= ~0xf800;
  157. if (aic26->master)
  158. reg |= 0x0800;
  159. if (fsref == 48000)
  160. reg |= 0x2000;
  161. aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
  162. /* Audio Control 1 (FSref divisor) */
  163. reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
  164. reg &= ~0x0fff;
  165. reg |= wlen | aic26->datfm | (divisor << 3) | divisor;
  166. aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg);
  167. return 0;
  168. }
  169. /**
  170. * aic26_mute - Mute control to reduce noise when changing audio format
  171. */
  172. static int aic26_mute(struct snd_soc_dai *dai, int mute)
  173. {
  174. struct snd_soc_codec *codec = dai->codec;
  175. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  176. u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);
  177. dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
  178. dai, mute);
  179. if (mute)
  180. reg |= 0x8080;
  181. else
  182. reg &= ~0x8080;
  183. aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg);
  184. return 0;
  185. }
  186. static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
  187. int clk_id, unsigned int freq, int dir)
  188. {
  189. struct snd_soc_codec *codec = codec_dai->codec;
  190. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  191. dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
  192. " freq=%i, dir=%i)\n",
  193. codec_dai, clk_id, freq, dir);
  194. /* MCLK needs to fall between 2MHz and 50 MHz */
  195. if ((freq < 2000000) || (freq > 50000000))
  196. return -EINVAL;
  197. aic26->mclk = freq;
  198. return 0;
  199. }
  200. static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
  201. {
  202. struct snd_soc_codec *codec = codec_dai->codec;
  203. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  204. dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
  205. codec_dai, fmt);
  206. /* set master/slave audio interface */
  207. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  208. case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
  209. case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
  210. default:
  211. dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
  212. }
  213. /* interface format */
  214. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  215. case SND_SOC_DAIFMT_I2S: aic26->datfm = AIC26_DATFM_I2S; break;
  216. case SND_SOC_DAIFMT_DSP_A: aic26->datfm = AIC26_DATFM_DSP; break;
  217. case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
  218. case SND_SOC_DAIFMT_LEFT_J: aic26->datfm = AIC26_DATFM_LEFTJ; break;
  219. default:
  220. dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
  221. }
  222. return 0;
  223. }
  224. /* ---------------------------------------------------------------------
  225. * Digital Audio Interface Definition
  226. */
  227. #define AIC26_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
  228. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
  229. SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
  230. SNDRV_PCM_RATE_48000)
  231. #define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |\
  232. SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)
  233. static struct snd_soc_dai_ops aic26_dai_ops = {
  234. .hw_params = aic26_hw_params,
  235. .digital_mute = aic26_mute,
  236. .set_sysclk = aic26_set_sysclk,
  237. .set_fmt = aic26_set_fmt,
  238. };
  239. static struct snd_soc_dai_driver aic26_dai = {
  240. .name = "tlv320aic26-hifi",
  241. .playback = {
  242. .stream_name = "Playback",
  243. .channels_min = 2,
  244. .channels_max = 2,
  245. .rates = AIC26_RATES,
  246. .formats = AIC26_FORMATS,
  247. },
  248. .capture = {
  249. .stream_name = "Capture",
  250. .channels_min = 2,
  251. .channels_max = 2,
  252. .rates = AIC26_RATES,
  253. .formats = AIC26_FORMATS,
  254. },
  255. .ops = &aic26_dai_ops,
  256. };
  257. /* ---------------------------------------------------------------------
  258. * ALSA controls
  259. */
  260. static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
  261. static const struct soc_enum aic26_capture_src_enum =
  262. SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);
  263. static const struct snd_kcontrol_new aic26_snd_controls[] = {
  264. /* Output */
  265. SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
  266. SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
  267. SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
  268. SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
  269. SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
  270. SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
  271. SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
  272. SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
  273. SOC_ENUM("Capture Source", aic26_capture_src_enum),
  274. };
  275. /* ---------------------------------------------------------------------
  276. * SPI device portion of driver: sysfs files for debugging
  277. */
  278. static ssize_t aic26_keyclick_show(struct device *dev,
  279. struct device_attribute *attr, char *buf)
  280. {
  281. struct aic26 *aic26 = dev_get_drvdata(dev);
  282. int val, amp, freq, len;
  283. val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
  284. amp = (val >> 12) & 0x7;
  285. freq = (125 << ((val >> 8) & 0x7)) >> 1;
  286. len = 2 * (1 + ((val >> 4) & 0xf));
  287. return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
  288. }
  289. /* Any write to the keyclick attribute will trigger the keyclick event */
  290. static ssize_t aic26_keyclick_set(struct device *dev,
  291. struct device_attribute *attr,
  292. const char *buf, size_t count)
  293. {
  294. struct aic26 *aic26 = dev_get_drvdata(dev);
  295. int val;
  296. val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
  297. val |= 0x8000;
  298. aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val);
  299. return count;
  300. }
  301. static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);
  302. /* ---------------------------------------------------------------------
  303. * SoC CODEC portion of driver: probe and release routines
  304. */
  305. static int aic26_probe(struct snd_soc_codec *codec)
  306. {
  307. struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
  308. int ret, err, i, reg;
  309. dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n");
  310. /* Reset the codec to power on defaults */
  311. aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00);
  312. /* Power up CODEC */
  313. aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0);
  314. /* Audio Control 3 (master mode, fsref rate) */
  315. reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3);
  316. reg &= ~0xf800;
  317. reg |= 0x0800; /* set master mode */
  318. aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
  319. /* Fill register cache */
  320. for (i = 0; i < ARRAY_SIZE(aic26->reg_cache); i++)
  321. aic26_reg_read(codec, i);
  322. /* Register the sysfs files for debugging */
  323. /* Create SysFS files */
  324. ret = device_create_file(codec->dev, &dev_attr_keyclick);
  325. if (ret)
  326. dev_info(codec->dev, "error creating sysfs files\n");
  327. /* register controls */
  328. dev_dbg(codec->dev, "Registering controls\n");
  329. err = snd_soc_add_controls(codec, aic26_snd_controls,
  330. ARRAY_SIZE(aic26_snd_controls));
  331. WARN_ON(err < 0);
  332. return 0;
  333. }
  334. static struct snd_soc_codec_driver aic26_soc_codec_dev = {
  335. .probe = aic26_probe,
  336. .read = aic26_reg_read,
  337. .write = aic26_reg_write,
  338. .reg_cache_size = AIC26_NUM_REGS,
  339. .reg_word_size = sizeof(u16),
  340. };
  341. /* ---------------------------------------------------------------------
  342. * SPI device portion of driver: probe and release routines and SPI
  343. * driver registration.
  344. */
  345. static int aic26_spi_probe(struct spi_device *spi)
  346. {
  347. struct aic26 *aic26;
  348. int ret;
  349. dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");
  350. /* Allocate driver data */
  351. aic26 = kzalloc(sizeof *aic26, GFP_KERNEL);
  352. if (!aic26)
  353. return -ENOMEM;
  354. /* Initialize the driver data */
  355. aic26->spi = spi;
  356. dev_set_drvdata(&spi->dev, aic26);
  357. aic26->master = 1;
  358. ret = snd_soc_register_codec(&spi->dev,
  359. &aic26_soc_codec_dev, &aic26_dai, 1);
  360. if (ret < 0)
  361. kfree(aic26);
  362. return ret;
  363. dev_dbg(&spi->dev, "SPI device initialized\n");
  364. return 0;
  365. }
  366. static int aic26_spi_remove(struct spi_device *spi)
  367. {
  368. snd_soc_unregister_codec(&spi->dev);
  369. kfree(spi_get_drvdata(spi));
  370. return 0;
  371. }
  372. static struct spi_driver aic26_spi = {
  373. .driver = {
  374. .name = "tlv320aic26-codec",
  375. .owner = THIS_MODULE,
  376. },
  377. .probe = aic26_spi_probe,
  378. .remove = aic26_spi_remove,
  379. };
  380. static int __init aic26_init(void)
  381. {
  382. return spi_register_driver(&aic26_spi);
  383. }
  384. module_init(aic26_init);
  385. static void __exit aic26_exit(void)
  386. {
  387. spi_unregister_driver(&aic26_spi);
  388. }
  389. module_exit(aic26_exit);