cs4270.c 24 KB

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  1. /*
  2. * CS4270 ALSA SoC (ASoC) codec driver
  3. *
  4. * Author: Timur Tabi <timur@freescale.com>
  5. *
  6. * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
  7. * under the terms of the GNU General Public License version 2. This
  8. * program is licensed "as is" without any warranty of any kind, whether
  9. * express or implied.
  10. *
  11. * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
  12. *
  13. * Current features/limitations:
  14. *
  15. * - Software mode is supported. Stand-alone mode is not supported.
  16. * - Only I2C is supported, not SPI
  17. * - Support for master and slave mode
  18. * - The machine driver's 'startup' function must call
  19. * cs4270_set_dai_sysclk() with the value of MCLK.
  20. * - Only I2S and left-justified modes are supported
  21. * - Power management is supported
  22. */
  23. #include <linux/module.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/slab.h>
  26. #include <sound/core.h>
  27. #include <sound/soc.h>
  28. #include <sound/initval.h>
  29. #include <linux/i2c.h>
  30. #include <linux/delay.h>
  31. #include <linux/regulator/consumer.h>
  32. /*
  33. * The codec isn't really big-endian or little-endian, since the I2S
  34. * interface requires data to be sent serially with the MSbit first.
  35. * However, to support BE and LE I2S devices, we specify both here. That
  36. * way, ALSA will always match the bit patterns.
  37. */
  38. #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
  39. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
  40. SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
  41. SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
  42. SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
  43. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
  44. /* CS4270 registers addresses */
  45. #define CS4270_CHIPID 0x01 /* Chip ID */
  46. #define CS4270_PWRCTL 0x02 /* Power Control */
  47. #define CS4270_MODE 0x03 /* Mode Control */
  48. #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
  49. #define CS4270_TRANS 0x05 /* Transition Control */
  50. #define CS4270_MUTE 0x06 /* Mute Control */
  51. #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
  52. #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
  53. #define CS4270_FIRSTREG 0x01
  54. #define CS4270_LASTREG 0x08
  55. #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
  56. #define CS4270_I2C_INCR 0x80
  57. /* Bit masks for the CS4270 registers */
  58. #define CS4270_CHIPID_ID 0xF0
  59. #define CS4270_CHIPID_REV 0x0F
  60. #define CS4270_PWRCTL_FREEZE 0x80
  61. #define CS4270_PWRCTL_PDN_ADC 0x20
  62. #define CS4270_PWRCTL_PDN_DAC 0x02
  63. #define CS4270_PWRCTL_PDN 0x01
  64. #define CS4270_PWRCTL_PDN_ALL \
  65. (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
  66. #define CS4270_MODE_SPEED_MASK 0x30
  67. #define CS4270_MODE_1X 0x00
  68. #define CS4270_MODE_2X 0x10
  69. #define CS4270_MODE_4X 0x20
  70. #define CS4270_MODE_SLAVE 0x30
  71. #define CS4270_MODE_DIV_MASK 0x0E
  72. #define CS4270_MODE_DIV1 0x00
  73. #define CS4270_MODE_DIV15 0x02
  74. #define CS4270_MODE_DIV2 0x04
  75. #define CS4270_MODE_DIV3 0x06
  76. #define CS4270_MODE_DIV4 0x08
  77. #define CS4270_MODE_POPGUARD 0x01
  78. #define CS4270_FORMAT_FREEZE_A 0x80
  79. #define CS4270_FORMAT_FREEZE_B 0x40
  80. #define CS4270_FORMAT_LOOPBACK 0x20
  81. #define CS4270_FORMAT_DAC_MASK 0x18
  82. #define CS4270_FORMAT_DAC_LJ 0x00
  83. #define CS4270_FORMAT_DAC_I2S 0x08
  84. #define CS4270_FORMAT_DAC_RJ16 0x18
  85. #define CS4270_FORMAT_DAC_RJ24 0x10
  86. #define CS4270_FORMAT_ADC_MASK 0x01
  87. #define CS4270_FORMAT_ADC_LJ 0x00
  88. #define CS4270_FORMAT_ADC_I2S 0x01
  89. #define CS4270_TRANS_ONE_VOL 0x80
  90. #define CS4270_TRANS_SOFT 0x40
  91. #define CS4270_TRANS_ZERO 0x20
  92. #define CS4270_TRANS_INV_ADC_A 0x08
  93. #define CS4270_TRANS_INV_ADC_B 0x10
  94. #define CS4270_TRANS_INV_DAC_A 0x02
  95. #define CS4270_TRANS_INV_DAC_B 0x04
  96. #define CS4270_TRANS_DEEMPH 0x01
  97. #define CS4270_MUTE_AUTO 0x20
  98. #define CS4270_MUTE_ADC_A 0x08
  99. #define CS4270_MUTE_ADC_B 0x10
  100. #define CS4270_MUTE_POLARITY 0x04
  101. #define CS4270_MUTE_DAC_A 0x01
  102. #define CS4270_MUTE_DAC_B 0x02
  103. static const char *supply_names[] = {
  104. "va", "vd", "vlc"
  105. };
  106. /* Private data for the CS4270 */
  107. struct cs4270_private {
  108. enum snd_soc_control_type control_type;
  109. void *control_data;
  110. u8 reg_cache[CS4270_NUMREGS];
  111. unsigned int mclk; /* Input frequency of the MCLK pin */
  112. unsigned int mode; /* The mode (I2S or left-justified) */
  113. unsigned int slave_mode;
  114. unsigned int manual_mute;
  115. /* power domain regulators */
  116. struct regulator_bulk_data supplies[ARRAY_SIZE(supply_names)];
  117. };
  118. /**
  119. * struct cs4270_mode_ratios - clock ratio tables
  120. * @ratio: the ratio of MCLK to the sample rate
  121. * @speed_mode: the Speed Mode bits to set in the Mode Control register for
  122. * this ratio
  123. * @mclk: the Ratio Select bits to set in the Mode Control register for this
  124. * ratio
  125. *
  126. * The data for this chart is taken from Table 5 of the CS4270 reference
  127. * manual.
  128. *
  129. * This table is used to determine how to program the Mode Control register.
  130. * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
  131. * rates the CS4270 currently supports.
  132. *
  133. * @speed_mode is the corresponding bit pattern to be written to the
  134. * MODE bits of the Mode Control Register
  135. *
  136. * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
  137. * the Mode Control Register.
  138. *
  139. * In situations where a single ratio is represented by multiple speed
  140. * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
  141. * double-speed instead of quad-speed. However, the CS4270 errata states
  142. * that divide-By-1.5 can cause failures, so we avoid that mode where
  143. * possible.
  144. *
  145. * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
  146. * work if Vd is 3.3V. If this effects you, select the
  147. * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
  148. * never select any sample rates that require divide-by-1.5.
  149. */
  150. struct cs4270_mode_ratios {
  151. unsigned int ratio;
  152. u8 speed_mode;
  153. u8 mclk;
  154. };
  155. static struct cs4270_mode_ratios cs4270_mode_ratios[] = {
  156. {64, CS4270_MODE_4X, CS4270_MODE_DIV1},
  157. #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
  158. {96, CS4270_MODE_4X, CS4270_MODE_DIV15},
  159. #endif
  160. {128, CS4270_MODE_2X, CS4270_MODE_DIV1},
  161. {192, CS4270_MODE_4X, CS4270_MODE_DIV3},
  162. {256, CS4270_MODE_1X, CS4270_MODE_DIV1},
  163. {384, CS4270_MODE_2X, CS4270_MODE_DIV3},
  164. {512, CS4270_MODE_1X, CS4270_MODE_DIV2},
  165. {768, CS4270_MODE_1X, CS4270_MODE_DIV3},
  166. {1024, CS4270_MODE_1X, CS4270_MODE_DIV4}
  167. };
  168. /* The number of MCLK/LRCK ratios supported by the CS4270 */
  169. #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
  170. /**
  171. * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
  172. * @codec_dai: the codec DAI
  173. * @clk_id: the clock ID (ignored)
  174. * @freq: the MCLK input frequency
  175. * @dir: the clock direction (ignored)
  176. *
  177. * This function is used to tell the codec driver what the input MCLK
  178. * frequency is.
  179. *
  180. * The value of MCLK is used to determine which sample rates are supported
  181. * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
  182. * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
  183. *
  184. * This function calculates the nine ratios and determines which ones match
  185. * a standard sample rate. If there's a match, then it is added to the list
  186. * of supported sample rates.
  187. *
  188. * This function must be called by the machine driver's 'startup' function,
  189. * otherwise the list of supported sample rates will not be available in
  190. * time for ALSA.
  191. *
  192. * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
  193. * theoretically possible sample rates to be enabled. Call it again with a
  194. * proper value set one the external clock is set (most probably you would do
  195. * that from a machine's driver 'hw_param' hook.
  196. */
  197. static int cs4270_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  198. int clk_id, unsigned int freq, int dir)
  199. {
  200. struct snd_soc_codec *codec = codec_dai->codec;
  201. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  202. cs4270->mclk = freq;
  203. return 0;
  204. }
  205. /**
  206. * cs4270_set_dai_fmt - configure the codec for the selected audio format
  207. * @codec_dai: the codec DAI
  208. * @format: a SND_SOC_DAIFMT_x value indicating the data format
  209. *
  210. * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
  211. * codec accordingly.
  212. *
  213. * Currently, this function only supports SND_SOC_DAIFMT_I2S and
  214. * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
  215. * data for playback only, but ASoC currently does not support different
  216. * formats for playback vs. record.
  217. */
  218. static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai,
  219. unsigned int format)
  220. {
  221. struct snd_soc_codec *codec = codec_dai->codec;
  222. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  223. int ret = 0;
  224. /* set DAI format */
  225. switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
  226. case SND_SOC_DAIFMT_I2S:
  227. case SND_SOC_DAIFMT_LEFT_J:
  228. cs4270->mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
  229. break;
  230. default:
  231. dev_err(codec->dev, "invalid dai format\n");
  232. ret = -EINVAL;
  233. }
  234. /* set master/slave audio interface */
  235. switch (format & SND_SOC_DAIFMT_MASTER_MASK) {
  236. case SND_SOC_DAIFMT_CBS_CFS:
  237. cs4270->slave_mode = 1;
  238. break;
  239. case SND_SOC_DAIFMT_CBM_CFM:
  240. cs4270->slave_mode = 0;
  241. break;
  242. default:
  243. /* all other modes are unsupported by the hardware */
  244. ret = -EINVAL;
  245. }
  246. return ret;
  247. }
  248. /**
  249. * cs4270_fill_cache - pre-fill the CS4270 register cache.
  250. * @codec: the codec for this CS4270
  251. *
  252. * This function fills in the CS4270 register cache by reading the register
  253. * values from the hardware.
  254. *
  255. * This CS4270 registers are cached to avoid excessive I2C I/O operations.
  256. * After the initial read to pre-fill the cache, the CS4270 never updates
  257. * the register values, so we won't have a cache coherency problem.
  258. *
  259. * We use the auto-increment feature of the CS4270 to read all registers in
  260. * one shot.
  261. */
  262. static int cs4270_fill_cache(struct snd_soc_codec *codec)
  263. {
  264. u8 *cache = codec->reg_cache;
  265. struct i2c_client *i2c_client = codec->control_data;
  266. s32 length;
  267. length = i2c_smbus_read_i2c_block_data(i2c_client,
  268. CS4270_FIRSTREG | CS4270_I2C_INCR, CS4270_NUMREGS, cache);
  269. if (length != CS4270_NUMREGS) {
  270. dev_err(codec->dev, "i2c read failure, addr=0x%x\n",
  271. i2c_client->addr);
  272. return -EIO;
  273. }
  274. return 0;
  275. }
  276. /**
  277. * cs4270_read_reg_cache - read from the CS4270 register cache.
  278. * @codec: the codec for this CS4270
  279. * @reg: the register to read
  280. *
  281. * This function returns the value for a given register. It reads only from
  282. * the register cache, not the hardware itself.
  283. *
  284. * This CS4270 registers are cached to avoid excessive I2C I/O operations.
  285. * After the initial read to pre-fill the cache, the CS4270 never updates
  286. * the register values, so we won't have a cache coherency problem.
  287. */
  288. static unsigned int cs4270_read_reg_cache(struct snd_soc_codec *codec,
  289. unsigned int reg)
  290. {
  291. u8 *cache = codec->reg_cache;
  292. if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
  293. return -EIO;
  294. return cache[reg - CS4270_FIRSTREG];
  295. }
  296. /**
  297. * cs4270_i2c_write - write to a CS4270 register via the I2C bus.
  298. * @codec: the codec for this CS4270
  299. * @reg: the register to write
  300. * @value: the value to write to the register
  301. *
  302. * This function writes the given value to the given CS4270 register, and
  303. * also updates the register cache.
  304. *
  305. * Note that we don't use the hw_write function pointer of snd_soc_codec.
  306. * That's because it's too clunky: the hw_write_t prototype does not match
  307. * i2c_smbus_write_byte_data(), and it's just another layer of overhead.
  308. */
  309. static int cs4270_i2c_write(struct snd_soc_codec *codec, unsigned int reg,
  310. unsigned int value)
  311. {
  312. u8 *cache = codec->reg_cache;
  313. if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG))
  314. return -EIO;
  315. /* Only perform an I2C operation if the new value is different */
  316. if (cache[reg - CS4270_FIRSTREG] != value) {
  317. struct i2c_client *client = codec->control_data;
  318. if (i2c_smbus_write_byte_data(client, reg, value)) {
  319. dev_err(codec->dev, "i2c write failed\n");
  320. return -EIO;
  321. }
  322. /* We've written to the hardware, so update the cache */
  323. cache[reg - CS4270_FIRSTREG] = value;
  324. }
  325. return 0;
  326. }
  327. /**
  328. * cs4270_hw_params - program the CS4270 with the given hardware parameters.
  329. * @substream: the audio stream
  330. * @params: the hardware parameters to set
  331. * @dai: the SOC DAI (ignored)
  332. *
  333. * This function programs the hardware with the values provided.
  334. * Specifically, the sample rate and the data format.
  335. *
  336. * The .ops functions are used to provide board-specific data, like input
  337. * frequencies, to this driver. This function takes that information,
  338. * combines it with the hardware parameters provided, and programs the
  339. * hardware accordingly.
  340. */
  341. static int cs4270_hw_params(struct snd_pcm_substream *substream,
  342. struct snd_pcm_hw_params *params,
  343. struct snd_soc_dai *dai)
  344. {
  345. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  346. struct snd_soc_codec *codec = rtd->codec;
  347. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  348. int ret;
  349. unsigned int i;
  350. unsigned int rate;
  351. unsigned int ratio;
  352. int reg;
  353. /* Figure out which MCLK/LRCK ratio to use */
  354. rate = params_rate(params); /* Sampling rate, in Hz */
  355. ratio = cs4270->mclk / rate; /* MCLK/LRCK ratio */
  356. for (i = 0; i < NUM_MCLK_RATIOS; i++) {
  357. if (cs4270_mode_ratios[i].ratio == ratio)
  358. break;
  359. }
  360. if (i == NUM_MCLK_RATIOS) {
  361. /* We did not find a matching ratio */
  362. dev_err(codec->dev, "could not find matching ratio\n");
  363. return -EINVAL;
  364. }
  365. /* Set the sample rate */
  366. reg = snd_soc_read(codec, CS4270_MODE);
  367. reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK);
  368. reg |= cs4270_mode_ratios[i].mclk;
  369. if (cs4270->slave_mode)
  370. reg |= CS4270_MODE_SLAVE;
  371. else
  372. reg |= cs4270_mode_ratios[i].speed_mode;
  373. ret = snd_soc_write(codec, CS4270_MODE, reg);
  374. if (ret < 0) {
  375. dev_err(codec->dev, "i2c write failed\n");
  376. return ret;
  377. }
  378. /* Set the DAI format */
  379. reg = snd_soc_read(codec, CS4270_FORMAT);
  380. reg &= ~(CS4270_FORMAT_DAC_MASK | CS4270_FORMAT_ADC_MASK);
  381. switch (cs4270->mode) {
  382. case SND_SOC_DAIFMT_I2S:
  383. reg |= CS4270_FORMAT_DAC_I2S | CS4270_FORMAT_ADC_I2S;
  384. break;
  385. case SND_SOC_DAIFMT_LEFT_J:
  386. reg |= CS4270_FORMAT_DAC_LJ | CS4270_FORMAT_ADC_LJ;
  387. break;
  388. default:
  389. dev_err(codec->dev, "unknown dai format\n");
  390. return -EINVAL;
  391. }
  392. ret = snd_soc_write(codec, CS4270_FORMAT, reg);
  393. if (ret < 0) {
  394. dev_err(codec->dev, "i2c write failed\n");
  395. return ret;
  396. }
  397. return ret;
  398. }
  399. /**
  400. * cs4270_dai_mute - enable/disable the CS4270 external mute
  401. * @dai: the SOC DAI
  402. * @mute: 0 = disable mute, 1 = enable mute
  403. *
  404. * This function toggles the mute bits in the MUTE register. The CS4270's
  405. * mute capability is intended for external muting circuitry, so if the
  406. * board does not have the MUTEA or MUTEB pins connected to such circuitry,
  407. * then this function will do nothing.
  408. */
  409. static int cs4270_dai_mute(struct snd_soc_dai *dai, int mute)
  410. {
  411. struct snd_soc_codec *codec = dai->codec;
  412. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  413. int reg6;
  414. reg6 = snd_soc_read(codec, CS4270_MUTE);
  415. if (mute)
  416. reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B;
  417. else {
  418. reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B);
  419. reg6 |= cs4270->manual_mute;
  420. }
  421. return snd_soc_write(codec, CS4270_MUTE, reg6);
  422. }
  423. /**
  424. * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
  425. * alsa control.
  426. * @kcontrol: mixer control
  427. * @ucontrol: control element information
  428. *
  429. * This function basically passes the arguments on to the generic
  430. * snd_soc_put_volsw() function and saves the mute information in
  431. * our private data structure. This is because we want to prevent
  432. * cs4270_dai_mute() neglecting the user's decision to manually
  433. * mute the codec's output.
  434. *
  435. * Returns 0 for success.
  436. */
  437. static int cs4270_soc_put_mute(struct snd_kcontrol *kcontrol,
  438. struct snd_ctl_elem_value *ucontrol)
  439. {
  440. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  441. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  442. int left = !ucontrol->value.integer.value[0];
  443. int right = !ucontrol->value.integer.value[1];
  444. cs4270->manual_mute = (left ? CS4270_MUTE_DAC_A : 0) |
  445. (right ? CS4270_MUTE_DAC_B : 0);
  446. return snd_soc_put_volsw(kcontrol, ucontrol);
  447. }
  448. /* A list of non-DAPM controls that the CS4270 supports */
  449. static const struct snd_kcontrol_new cs4270_snd_controls[] = {
  450. SOC_DOUBLE_R("Master Playback Volume",
  451. CS4270_VOLA, CS4270_VOLB, 0, 0xFF, 1),
  452. SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT, 5, 1, 0),
  453. SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS, 6, 1, 0),
  454. SOC_SINGLE("Zero Cross Switch", CS4270_TRANS, 5, 1, 0),
  455. SOC_SINGLE("De-emphasis filter", CS4270_TRANS, 0, 1, 0),
  456. SOC_SINGLE("Popguard Switch", CS4270_MODE, 0, 1, 1),
  457. SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE, 5, 1, 0),
  458. SOC_DOUBLE("Master Capture Switch", CS4270_MUTE, 3, 4, 1, 1),
  459. SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE, 0, 1, 1, 1,
  460. snd_soc_get_volsw, cs4270_soc_put_mute),
  461. };
  462. static struct snd_soc_dai_ops cs4270_dai_ops = {
  463. .hw_params = cs4270_hw_params,
  464. .set_sysclk = cs4270_set_dai_sysclk,
  465. .set_fmt = cs4270_set_dai_fmt,
  466. .digital_mute = cs4270_dai_mute,
  467. };
  468. static struct snd_soc_dai_driver cs4270_dai = {
  469. .name = "cs4270-hifi",
  470. .playback = {
  471. .stream_name = "Playback",
  472. .channels_min = 1,
  473. .channels_max = 2,
  474. .rates = SNDRV_PCM_RATE_CONTINUOUS,
  475. .rate_min = 4000,
  476. .rate_max = 216000,
  477. .formats = CS4270_FORMATS,
  478. },
  479. .capture = {
  480. .stream_name = "Capture",
  481. .channels_min = 1,
  482. .channels_max = 2,
  483. .rates = SNDRV_PCM_RATE_CONTINUOUS,
  484. .rate_min = 4000,
  485. .rate_max = 216000,
  486. .formats = CS4270_FORMATS,
  487. },
  488. .ops = &cs4270_dai_ops,
  489. };
  490. /**
  491. * cs4270_probe - ASoC probe function
  492. * @pdev: platform device
  493. *
  494. * This function is called when ASoC has all the pieces it needs to
  495. * instantiate a sound driver.
  496. */
  497. static int cs4270_probe(struct snd_soc_codec *codec)
  498. {
  499. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  500. int i, ret, reg;
  501. codec->control_data = cs4270->control_data;
  502. /* The I2C interface is set up, so pre-fill our register cache */
  503. ret = cs4270_fill_cache(codec);
  504. if (ret < 0) {
  505. dev_err(codec->dev, "failed to fill register cache\n");
  506. return ret;
  507. }
  508. /* Disable auto-mute. This feature appears to be buggy. In some
  509. * situations, auto-mute will not deactivate when it should, so we want
  510. * this feature disabled by default. An application (e.g. alsactl) can
  511. * re-enabled it by using the controls.
  512. */
  513. reg = cs4270_read_reg_cache(codec, CS4270_MUTE);
  514. reg &= ~CS4270_MUTE_AUTO;
  515. ret = cs4270_i2c_write(codec, CS4270_MUTE, reg);
  516. if (ret < 0) {
  517. dev_err(codec->dev, "i2c write failed\n");
  518. return ret;
  519. }
  520. /* Disable automatic volume control. The hardware enables, and it
  521. * causes volume change commands to be delayed, sometimes until after
  522. * playback has started. An application (e.g. alsactl) can
  523. * re-enabled it by using the controls.
  524. */
  525. reg = cs4270_read_reg_cache(codec, CS4270_TRANS);
  526. reg &= ~(CS4270_TRANS_SOFT | CS4270_TRANS_ZERO);
  527. ret = cs4270_i2c_write(codec, CS4270_TRANS, reg);
  528. if (ret < 0) {
  529. dev_err(codec->dev, "i2c write failed\n");
  530. return ret;
  531. }
  532. /* Add the non-DAPM controls */
  533. ret = snd_soc_add_controls(codec, cs4270_snd_controls,
  534. ARRAY_SIZE(cs4270_snd_controls));
  535. if (ret < 0) {
  536. dev_err(codec->dev, "failed to add controls\n");
  537. return ret;
  538. }
  539. /* get the power supply regulators */
  540. for (i = 0; i < ARRAY_SIZE(supply_names); i++)
  541. cs4270->supplies[i].supply = supply_names[i];
  542. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(cs4270->supplies),
  543. cs4270->supplies);
  544. if (ret < 0)
  545. return ret;
  546. ret = regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
  547. cs4270->supplies);
  548. if (ret < 0)
  549. goto error_free_regulators;
  550. return 0;
  551. error_free_regulators:
  552. regulator_bulk_free(ARRAY_SIZE(cs4270->supplies),
  553. cs4270->supplies);
  554. return ret;
  555. }
  556. /**
  557. * cs4270_remove - ASoC remove function
  558. * @pdev: platform device
  559. *
  560. * This function is the counterpart to cs4270_probe().
  561. */
  562. static int cs4270_remove(struct snd_soc_codec *codec)
  563. {
  564. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  565. regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
  566. regulator_bulk_free(ARRAY_SIZE(cs4270->supplies), cs4270->supplies);
  567. return 0;
  568. };
  569. #ifdef CONFIG_PM
  570. /* This suspend/resume implementation can handle both - a simple standby
  571. * where the codec remains powered, and a full suspend, where the voltage
  572. * domain the codec is connected to is teared down and/or any other hardware
  573. * reset condition is asserted.
  574. *
  575. * The codec's own power saving features are enabled in the suspend callback,
  576. * and all registers are written back to the hardware when resuming.
  577. */
  578. static int cs4270_soc_suspend(struct snd_soc_codec *codec, pm_message_t mesg)
  579. {
  580. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  581. int reg, ret;
  582. reg = snd_soc_read(codec, CS4270_PWRCTL) | CS4270_PWRCTL_PDN_ALL;
  583. if (reg < 0)
  584. return reg;
  585. ret = snd_soc_write(codec, CS4270_PWRCTL, reg);
  586. if (ret < 0)
  587. return ret;
  588. regulator_bulk_disable(ARRAY_SIZE(cs4270->supplies),
  589. cs4270->supplies);
  590. return 0;
  591. }
  592. static int cs4270_soc_resume(struct snd_soc_codec *codec)
  593. {
  594. struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
  595. struct i2c_client *i2c_client = codec->control_data;
  596. int reg;
  597. regulator_bulk_enable(ARRAY_SIZE(cs4270->supplies),
  598. cs4270->supplies);
  599. /* In case the device was put to hard reset during sleep, we need to
  600. * wait 500ns here before any I2C communication. */
  601. ndelay(500);
  602. /* first restore the entire register cache ... */
  603. for (reg = CS4270_FIRSTREG; reg <= CS4270_LASTREG; reg++) {
  604. u8 val = snd_soc_read(codec, reg);
  605. if (i2c_smbus_write_byte_data(i2c_client, reg, val)) {
  606. dev_err(codec->dev, "i2c write failed\n");
  607. return -EIO;
  608. }
  609. }
  610. /* ... then disable the power-down bits */
  611. reg = snd_soc_read(codec, CS4270_PWRCTL);
  612. reg &= ~CS4270_PWRCTL_PDN_ALL;
  613. return snd_soc_write(codec, CS4270_PWRCTL, reg);
  614. }
  615. #else
  616. #define cs4270_soc_suspend NULL
  617. #define cs4270_soc_resume NULL
  618. #endif /* CONFIG_PM */
  619. /*
  620. * ASoC codec device structure
  621. *
  622. * Assign this variable to the codec_dev field of the machine driver's
  623. * snd_soc_device structure.
  624. */
  625. static struct snd_soc_codec_driver soc_codec_device_cs4270 = {
  626. .probe = cs4270_probe,
  627. .remove = cs4270_remove,
  628. .suspend = cs4270_soc_suspend,
  629. .resume = cs4270_soc_resume,
  630. .read = cs4270_read_reg_cache,
  631. .write = cs4270_i2c_write,
  632. .reg_cache_size = CS4270_NUMREGS,
  633. .reg_word_size = sizeof(u8),
  634. };
  635. /**
  636. * cs4270_i2c_probe - initialize the I2C interface of the CS4270
  637. * @i2c_client: the I2C client object
  638. * @id: the I2C device ID (ignored)
  639. *
  640. * This function is called whenever the I2C subsystem finds a device that
  641. * matches the device ID given via a prior call to i2c_add_driver().
  642. */
  643. static int cs4270_i2c_probe(struct i2c_client *i2c_client,
  644. const struct i2c_device_id *id)
  645. {
  646. struct cs4270_private *cs4270;
  647. int ret;
  648. /* Verify that we have a CS4270 */
  649. ret = i2c_smbus_read_byte_data(i2c_client, CS4270_CHIPID);
  650. if (ret < 0) {
  651. dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n",
  652. i2c_client->addr);
  653. return ret;
  654. }
  655. /* The top four bits of the chip ID should be 1100. */
  656. if ((ret & 0xF0) != 0xC0) {
  657. dev_err(&i2c_client->dev, "device at addr %X is not a CS4270\n",
  658. i2c_client->addr);
  659. return -ENODEV;
  660. }
  661. dev_info(&i2c_client->dev, "found device at i2c address %X\n",
  662. i2c_client->addr);
  663. dev_info(&i2c_client->dev, "hardware revision %X\n", ret & 0xF);
  664. cs4270 = kzalloc(sizeof(struct cs4270_private), GFP_KERNEL);
  665. if (!cs4270) {
  666. dev_err(&i2c_client->dev, "could not allocate codec\n");
  667. return -ENOMEM;
  668. }
  669. i2c_set_clientdata(i2c_client, cs4270);
  670. cs4270->control_data = i2c_client;
  671. cs4270->control_type = SND_SOC_I2C;
  672. ret = snd_soc_register_codec(&i2c_client->dev,
  673. &soc_codec_device_cs4270, &cs4270_dai, 1);
  674. if (ret < 0)
  675. kfree(cs4270);
  676. return ret;
  677. }
  678. /**
  679. * cs4270_i2c_remove - remove an I2C device
  680. * @i2c_client: the I2C client object
  681. *
  682. * This function is the counterpart to cs4270_i2c_probe().
  683. */
  684. static int cs4270_i2c_remove(struct i2c_client *i2c_client)
  685. {
  686. snd_soc_unregister_codec(&i2c_client->dev);
  687. kfree(i2c_get_clientdata(i2c_client));
  688. return 0;
  689. }
  690. /*
  691. * cs4270_id - I2C device IDs supported by this driver
  692. */
  693. static struct i2c_device_id cs4270_id[] = {
  694. {"cs4270", 0},
  695. {}
  696. };
  697. MODULE_DEVICE_TABLE(i2c, cs4270_id);
  698. /*
  699. * cs4270_i2c_driver - I2C device identification
  700. *
  701. * This structure tells the I2C subsystem how to identify and support a
  702. * given I2C device type.
  703. */
  704. static struct i2c_driver cs4270_i2c_driver = {
  705. .driver = {
  706. .name = "cs4270-codec",
  707. .owner = THIS_MODULE,
  708. },
  709. .id_table = cs4270_id,
  710. .probe = cs4270_i2c_probe,
  711. .remove = cs4270_i2c_remove,
  712. };
  713. static int __init cs4270_init(void)
  714. {
  715. pr_info("Cirrus Logic CS4270 ALSA SoC Codec Driver\n");
  716. return i2c_add_driver(&cs4270_i2c_driver);
  717. }
  718. module_init(cs4270_init);
  719. static void __exit cs4270_exit(void)
  720. {
  721. i2c_del_driver(&cs4270_i2c_driver);
  722. }
  723. module_exit(cs4270_exit);
  724. MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
  725. MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
  726. MODULE_LICENSE("GPL");