xonar_wm87x6.c 32 KB

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  1. /*
  2. * card driver for models with WM8776/WM8766 DACs (Xonar DS)
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, see <http://www.gnu.org/licenses/>.
  17. */
  18. /*
  19. * Xonar DS
  20. * --------
  21. *
  22. * CMI8788:
  23. *
  24. * SPI 0 -> WM8766 (surround, center/LFE, back)
  25. * SPI 1 -> WM8776 (front, input)
  26. *
  27. * GPIO 4 <- headphone detect, 0 = plugged
  28. * GPIO 6 -> route input jack to mic-in (0) or line-in (1)
  29. * GPIO 7 -> enable output to front L/R speaker channels
  30. * GPIO 8 -> enable output to other speaker channels and front panel headphone
  31. *
  32. * WM8766:
  33. *
  34. * input 1 <- line
  35. * input 2 <- mic
  36. * input 3 <- front mic
  37. * input 4 <- aux
  38. */
  39. #include <linux/pci.h>
  40. #include <linux/delay.h>
  41. #include <sound/control.h>
  42. #include <sound/core.h>
  43. #include <sound/jack.h>
  44. #include <sound/pcm.h>
  45. #include <sound/pcm_params.h>
  46. #include <sound/tlv.h>
  47. #include "xonar.h"
  48. #include "wm8776.h"
  49. #include "wm8766.h"
  50. #define GPIO_DS_HP_DETECT 0x0010
  51. #define GPIO_DS_INPUT_ROUTE 0x0040
  52. #define GPIO_DS_OUTPUT_FRONTLR 0x0080
  53. #define GPIO_DS_OUTPUT_ENABLE 0x0100
  54. #define LC_CONTROL_LIMITER 0x40000000
  55. #define LC_CONTROL_ALC 0x20000000
  56. struct xonar_wm87x6 {
  57. struct xonar_generic generic;
  58. u16 wm8776_regs[0x17];
  59. u16 wm8766_regs[0x10];
  60. struct snd_kcontrol *line_adcmux_control;
  61. struct snd_kcontrol *mic_adcmux_control;
  62. struct snd_kcontrol *lc_controls[13];
  63. struct snd_jack *hp_jack;
  64. };
  65. static void wm8776_write(struct oxygen *chip,
  66. unsigned int reg, unsigned int value)
  67. {
  68. struct xonar_wm87x6 *data = chip->model_data;
  69. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  70. OXYGEN_SPI_DATA_LENGTH_2 |
  71. OXYGEN_SPI_CLOCK_160 |
  72. (1 << OXYGEN_SPI_CODEC_SHIFT) |
  73. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  74. (reg << 9) | value);
  75. if (reg < ARRAY_SIZE(data->wm8776_regs)) {
  76. if (reg >= WM8776_HPLVOL && reg <= WM8776_DACMASTER)
  77. value &= ~WM8776_UPDATE;
  78. data->wm8776_regs[reg] = value;
  79. }
  80. }
  81. static void wm8776_write_cached(struct oxygen *chip,
  82. unsigned int reg, unsigned int value)
  83. {
  84. struct xonar_wm87x6 *data = chip->model_data;
  85. if (reg >= ARRAY_SIZE(data->wm8776_regs) ||
  86. value != data->wm8776_regs[reg])
  87. wm8776_write(chip, reg, value);
  88. }
  89. static void wm8766_write(struct oxygen *chip,
  90. unsigned int reg, unsigned int value)
  91. {
  92. struct xonar_wm87x6 *data = chip->model_data;
  93. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  94. OXYGEN_SPI_DATA_LENGTH_2 |
  95. OXYGEN_SPI_CLOCK_160 |
  96. (0 << OXYGEN_SPI_CODEC_SHIFT) |
  97. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  98. (reg << 9) | value);
  99. if (reg < ARRAY_SIZE(data->wm8766_regs)) {
  100. if ((reg >= WM8766_LDA1 && reg <= WM8766_RDA1) ||
  101. (reg >= WM8766_LDA2 && reg <= WM8766_MASTDA))
  102. value &= ~WM8766_UPDATE;
  103. data->wm8766_regs[reg] = value;
  104. }
  105. }
  106. static void wm8766_write_cached(struct oxygen *chip,
  107. unsigned int reg, unsigned int value)
  108. {
  109. struct xonar_wm87x6 *data = chip->model_data;
  110. if (reg >= ARRAY_SIZE(data->wm8766_regs) ||
  111. value != data->wm8766_regs[reg])
  112. wm8766_write(chip, reg, value);
  113. }
  114. static void wm8776_registers_init(struct oxygen *chip)
  115. {
  116. struct xonar_wm87x6 *data = chip->model_data;
  117. wm8776_write(chip, WM8776_RESET, 0);
  118. wm8776_write(chip, WM8776_DACCTRL1, WM8776_DZCEN |
  119. WM8776_PL_LEFT_LEFT | WM8776_PL_RIGHT_RIGHT);
  120. wm8776_write(chip, WM8776_DACMUTE, chip->dac_mute ? WM8776_DMUTE : 0);
  121. wm8776_write(chip, WM8776_DACIFCTRL,
  122. WM8776_DACFMT_LJUST | WM8776_DACWL_24);
  123. wm8776_write(chip, WM8776_ADCIFCTRL,
  124. data->wm8776_regs[WM8776_ADCIFCTRL]);
  125. wm8776_write(chip, WM8776_MSTRCTRL, data->wm8776_regs[WM8776_MSTRCTRL]);
  126. wm8776_write(chip, WM8776_PWRDOWN, data->wm8776_regs[WM8776_PWRDOWN]);
  127. wm8776_write(chip, WM8776_HPLVOL, data->wm8776_regs[WM8776_HPLVOL]);
  128. wm8776_write(chip, WM8776_HPRVOL, data->wm8776_regs[WM8776_HPRVOL] |
  129. WM8776_UPDATE);
  130. wm8776_write(chip, WM8776_ADCLVOL, data->wm8776_regs[WM8776_ADCLVOL]);
  131. wm8776_write(chip, WM8776_ADCRVOL, data->wm8776_regs[WM8776_ADCRVOL]);
  132. wm8776_write(chip, WM8776_ADCMUX, data->wm8776_regs[WM8776_ADCMUX]);
  133. wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0]);
  134. wm8776_write(chip, WM8776_DACRVOL, chip->dac_volume[1] | WM8776_UPDATE);
  135. }
  136. static void wm8766_registers_init(struct oxygen *chip)
  137. {
  138. struct xonar_wm87x6 *data = chip->model_data;
  139. wm8766_write(chip, WM8766_RESET, 0);
  140. wm8766_write(chip, WM8766_DAC_CTRL, data->wm8766_regs[WM8766_DAC_CTRL]);
  141. wm8766_write(chip, WM8766_INT_CTRL, WM8766_FMT_LJUST | WM8766_IWL_24);
  142. wm8766_write(chip, WM8766_DAC_CTRL2,
  143. WM8766_ZCD | (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
  144. wm8766_write(chip, WM8766_LDA1, chip->dac_volume[2]);
  145. wm8766_write(chip, WM8766_RDA1, chip->dac_volume[3]);
  146. wm8766_write(chip, WM8766_LDA2, chip->dac_volume[4]);
  147. wm8766_write(chip, WM8766_RDA2, chip->dac_volume[5]);
  148. wm8766_write(chip, WM8766_LDA3, chip->dac_volume[6]);
  149. wm8766_write(chip, WM8766_RDA3, chip->dac_volume[7] | WM8766_UPDATE);
  150. }
  151. static void wm8776_init(struct oxygen *chip)
  152. {
  153. struct xonar_wm87x6 *data = chip->model_data;
  154. data->wm8776_regs[WM8776_HPLVOL] = (0x79 - 60) | WM8776_HPZCEN;
  155. data->wm8776_regs[WM8776_HPRVOL] = (0x79 - 60) | WM8776_HPZCEN;
  156. data->wm8776_regs[WM8776_ADCIFCTRL] =
  157. WM8776_ADCFMT_LJUST | WM8776_ADCWL_24 | WM8776_ADCMCLK;
  158. data->wm8776_regs[WM8776_MSTRCTRL] =
  159. WM8776_ADCRATE_256 | WM8776_DACRATE_256;
  160. data->wm8776_regs[WM8776_PWRDOWN] = WM8776_HPPD;
  161. data->wm8776_regs[WM8776_ADCLVOL] = 0xa5 | WM8776_ZCA;
  162. data->wm8776_regs[WM8776_ADCRVOL] = 0xa5 | WM8776_ZCA;
  163. data->wm8776_regs[WM8776_ADCMUX] = 0x001;
  164. wm8776_registers_init(chip);
  165. }
  166. static void wm8766_init(struct oxygen *chip)
  167. {
  168. struct xonar_wm87x6 *data = chip->model_data;
  169. data->wm8766_regs[WM8766_DAC_CTRL] =
  170. WM8766_PL_LEFT_LEFT | WM8766_PL_RIGHT_RIGHT;
  171. wm8766_registers_init(chip);
  172. }
  173. static void xonar_ds_handle_hp_jack(struct oxygen *chip)
  174. {
  175. struct xonar_wm87x6 *data = chip->model_data;
  176. bool hp_plugged;
  177. unsigned int reg;
  178. mutex_lock(&chip->mutex);
  179. hp_plugged = !(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  180. GPIO_DS_HP_DETECT);
  181. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  182. hp_plugged ? 0 : GPIO_DS_OUTPUT_FRONTLR,
  183. GPIO_DS_OUTPUT_FRONTLR);
  184. reg = data->wm8766_regs[WM8766_DAC_CTRL] & ~WM8766_MUTEALL;
  185. if (hp_plugged)
  186. reg |= WM8766_MUTEALL;
  187. wm8766_write_cached(chip, WM8766_DAC_CTRL, reg);
  188. snd_jack_report(data->hp_jack, hp_plugged ? SND_JACK_HEADPHONE : 0);
  189. mutex_unlock(&chip->mutex);
  190. }
  191. static void xonar_ds_init(struct oxygen *chip)
  192. {
  193. struct xonar_wm87x6 *data = chip->model_data;
  194. data->generic.anti_pop_delay = 300;
  195. data->generic.output_enable_bit = GPIO_DS_OUTPUT_ENABLE;
  196. wm8776_init(chip);
  197. wm8766_init(chip);
  198. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  199. GPIO_DS_INPUT_ROUTE | GPIO_DS_OUTPUT_FRONTLR);
  200. oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL,
  201. GPIO_DS_HP_DETECT);
  202. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_DS_INPUT_ROUTE);
  203. oxygen_set_bits16(chip, OXYGEN_GPIO_INTERRUPT_MASK, GPIO_DS_HP_DETECT);
  204. chip->interrupt_mask |= OXYGEN_INT_GPIO;
  205. xonar_enable_output(chip);
  206. snd_jack_new(chip->card, "Headphone",
  207. SND_JACK_HEADPHONE, &data->hp_jack);
  208. xonar_ds_handle_hp_jack(chip);
  209. snd_component_add(chip->card, "WM8776");
  210. snd_component_add(chip->card, "WM8766");
  211. }
  212. static void xonar_ds_cleanup(struct oxygen *chip)
  213. {
  214. xonar_disable_output(chip);
  215. wm8776_write(chip, WM8776_RESET, 0);
  216. }
  217. static void xonar_ds_suspend(struct oxygen *chip)
  218. {
  219. xonar_ds_cleanup(chip);
  220. }
  221. static void xonar_ds_resume(struct oxygen *chip)
  222. {
  223. wm8776_registers_init(chip);
  224. wm8766_registers_init(chip);
  225. xonar_enable_output(chip);
  226. xonar_ds_handle_hp_jack(chip);
  227. }
  228. static void wm8776_adc_hardware_filter(unsigned int channel,
  229. struct snd_pcm_hardware *hardware)
  230. {
  231. if (channel == PCM_A) {
  232. hardware->rates = SNDRV_PCM_RATE_32000 |
  233. SNDRV_PCM_RATE_44100 |
  234. SNDRV_PCM_RATE_48000 |
  235. SNDRV_PCM_RATE_64000 |
  236. SNDRV_PCM_RATE_88200 |
  237. SNDRV_PCM_RATE_96000;
  238. hardware->rate_max = 96000;
  239. }
  240. }
  241. static void set_wm87x6_dac_params(struct oxygen *chip,
  242. struct snd_pcm_hw_params *params)
  243. {
  244. }
  245. static void set_wm8776_adc_params(struct oxygen *chip,
  246. struct snd_pcm_hw_params *params)
  247. {
  248. u16 reg;
  249. reg = WM8776_ADCRATE_256 | WM8776_DACRATE_256;
  250. if (params_rate(params) > 48000)
  251. reg |= WM8776_ADCOSR;
  252. wm8776_write_cached(chip, WM8776_MSTRCTRL, reg);
  253. }
  254. static void update_wm8776_volume(struct oxygen *chip)
  255. {
  256. struct xonar_wm87x6 *data = chip->model_data;
  257. u8 to_change;
  258. if (chip->dac_volume[0] == chip->dac_volume[1]) {
  259. if (chip->dac_volume[0] != data->wm8776_regs[WM8776_DACLVOL] ||
  260. chip->dac_volume[1] != data->wm8776_regs[WM8776_DACRVOL]) {
  261. wm8776_write(chip, WM8776_DACMASTER,
  262. chip->dac_volume[0] | WM8776_UPDATE);
  263. data->wm8776_regs[WM8776_DACLVOL] = chip->dac_volume[0];
  264. data->wm8776_regs[WM8776_DACRVOL] = chip->dac_volume[0];
  265. }
  266. } else {
  267. to_change = (chip->dac_volume[0] !=
  268. data->wm8776_regs[WM8776_DACLVOL]) << 0;
  269. to_change |= (chip->dac_volume[1] !=
  270. data->wm8776_regs[WM8776_DACLVOL]) << 1;
  271. if (to_change & 1)
  272. wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0] |
  273. ((to_change & 2) ? 0 : WM8776_UPDATE));
  274. if (to_change & 2)
  275. wm8776_write(chip, WM8776_DACRVOL,
  276. chip->dac_volume[1] | WM8776_UPDATE);
  277. }
  278. }
  279. static void update_wm87x6_volume(struct oxygen *chip)
  280. {
  281. static const u8 wm8766_regs[6] = {
  282. WM8766_LDA1, WM8766_RDA1,
  283. WM8766_LDA2, WM8766_RDA2,
  284. WM8766_LDA3, WM8766_RDA3,
  285. };
  286. struct xonar_wm87x6 *data = chip->model_data;
  287. unsigned int i;
  288. u8 to_change;
  289. update_wm8776_volume(chip);
  290. if (chip->dac_volume[2] == chip->dac_volume[3] &&
  291. chip->dac_volume[2] == chip->dac_volume[4] &&
  292. chip->dac_volume[2] == chip->dac_volume[5] &&
  293. chip->dac_volume[2] == chip->dac_volume[6] &&
  294. chip->dac_volume[2] == chip->dac_volume[7]) {
  295. to_change = 0;
  296. for (i = 0; i < 6; ++i)
  297. if (chip->dac_volume[2] !=
  298. data->wm8766_regs[wm8766_regs[i]])
  299. to_change = 1;
  300. if (to_change) {
  301. wm8766_write(chip, WM8766_MASTDA,
  302. chip->dac_volume[2] | WM8766_UPDATE);
  303. for (i = 0; i < 6; ++i)
  304. data->wm8766_regs[wm8766_regs[i]] =
  305. chip->dac_volume[2];
  306. }
  307. } else {
  308. to_change = 0;
  309. for (i = 0; i < 6; ++i)
  310. to_change |= (chip->dac_volume[2 + i] !=
  311. data->wm8766_regs[wm8766_regs[i]]) << i;
  312. for (i = 0; i < 6; ++i)
  313. if (to_change & (1 << i))
  314. wm8766_write(chip, wm8766_regs[i],
  315. chip->dac_volume[2 + i] |
  316. ((to_change & (0x3e << i))
  317. ? 0 : WM8766_UPDATE));
  318. }
  319. }
  320. static void update_wm8776_mute(struct oxygen *chip)
  321. {
  322. wm8776_write_cached(chip, WM8776_DACMUTE,
  323. chip->dac_mute ? WM8776_DMUTE : 0);
  324. }
  325. static void update_wm87x6_mute(struct oxygen *chip)
  326. {
  327. update_wm8776_mute(chip);
  328. wm8766_write_cached(chip, WM8766_DAC_CTRL2, WM8766_ZCD |
  329. (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
  330. }
  331. static void update_wm8766_center_lfe_mix(struct oxygen *chip, bool mixed)
  332. {
  333. struct xonar_wm87x6 *data = chip->model_data;
  334. unsigned int reg;
  335. /*
  336. * The WM8766 can mix left and right channels, but this setting
  337. * applies to all three stereo pairs.
  338. */
  339. reg = data->wm8766_regs[WM8766_DAC_CTRL] &
  340. ~(WM8766_PL_LEFT_MASK | WM8766_PL_RIGHT_MASK);
  341. if (mixed)
  342. reg |= WM8766_PL_LEFT_LRMIX | WM8766_PL_RIGHT_LRMIX;
  343. else
  344. reg |= WM8766_PL_LEFT_LEFT | WM8766_PL_RIGHT_RIGHT;
  345. wm8766_write_cached(chip, WM8766_DAC_CTRL, reg);
  346. }
  347. static void xonar_ds_gpio_changed(struct oxygen *chip)
  348. {
  349. xonar_ds_handle_hp_jack(chip);
  350. }
  351. static int wm8776_bit_switch_get(struct snd_kcontrol *ctl,
  352. struct snd_ctl_elem_value *value)
  353. {
  354. struct oxygen *chip = ctl->private_data;
  355. struct xonar_wm87x6 *data = chip->model_data;
  356. u16 bit = ctl->private_value & 0xffff;
  357. unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
  358. bool invert = (ctl->private_value >> 24) & 1;
  359. value->value.integer.value[0] =
  360. ((data->wm8776_regs[reg_index] & bit) != 0) ^ invert;
  361. return 0;
  362. }
  363. static int wm8776_bit_switch_put(struct snd_kcontrol *ctl,
  364. struct snd_ctl_elem_value *value)
  365. {
  366. struct oxygen *chip = ctl->private_data;
  367. struct xonar_wm87x6 *data = chip->model_data;
  368. u16 bit = ctl->private_value & 0xffff;
  369. u16 reg_value;
  370. unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
  371. bool invert = (ctl->private_value >> 24) & 1;
  372. int changed;
  373. mutex_lock(&chip->mutex);
  374. reg_value = data->wm8776_regs[reg_index] & ~bit;
  375. if (value->value.integer.value[0] ^ invert)
  376. reg_value |= bit;
  377. changed = reg_value != data->wm8776_regs[reg_index];
  378. if (changed)
  379. wm8776_write(chip, reg_index, reg_value);
  380. mutex_unlock(&chip->mutex);
  381. return changed;
  382. }
  383. static int wm8776_field_enum_info(struct snd_kcontrol *ctl,
  384. struct snd_ctl_elem_info *info)
  385. {
  386. static const char *const hld[16] = {
  387. "0 ms", "2.67 ms", "5.33 ms", "10.6 ms",
  388. "21.3 ms", "42.7 ms", "85.3 ms", "171 ms",
  389. "341 ms", "683 ms", "1.37 s", "2.73 s",
  390. "5.46 s", "10.9 s", "21.8 s", "43.7 s",
  391. };
  392. static const char *const atk_lim[11] = {
  393. "0.25 ms", "0.5 ms", "1 ms", "2 ms",
  394. "4 ms", "8 ms", "16 ms", "32 ms",
  395. "64 ms", "128 ms", "256 ms",
  396. };
  397. static const char *const atk_alc[11] = {
  398. "8.40 ms", "16.8 ms", "33.6 ms", "67.2 ms",
  399. "134 ms", "269 ms", "538 ms", "1.08 s",
  400. "2.15 s", "4.3 s", "8.6 s",
  401. };
  402. static const char *const dcy_lim[11] = {
  403. "1.2 ms", "2.4 ms", "4.8 ms", "9.6 ms",
  404. "19.2 ms", "38.4 ms", "76.8 ms", "154 ms",
  405. "307 ms", "614 ms", "1.23 s",
  406. };
  407. static const char *const dcy_alc[11] = {
  408. "33.5 ms", "67.0 ms", "134 ms", "268 ms",
  409. "536 ms", "1.07 s", "2.14 s", "4.29 s",
  410. "8.58 s", "17.2 s", "34.3 s",
  411. };
  412. static const char *const tranwin[8] = {
  413. "0 us", "62.5 us", "125 us", "250 us",
  414. "500 us", "1 ms", "2 ms", "4 ms",
  415. };
  416. u8 max;
  417. const char *const *names;
  418. max = (ctl->private_value >> 12) & 0xf;
  419. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  420. info->count = 1;
  421. info->value.enumerated.items = max + 1;
  422. if (info->value.enumerated.item > max)
  423. info->value.enumerated.item = max;
  424. switch ((ctl->private_value >> 24) & 0x1f) {
  425. case WM8776_ALCCTRL2:
  426. names = hld;
  427. break;
  428. case WM8776_ALCCTRL3:
  429. if (((ctl->private_value >> 20) & 0xf) == 0) {
  430. if (ctl->private_value & LC_CONTROL_LIMITER)
  431. names = atk_lim;
  432. else
  433. names = atk_alc;
  434. } else {
  435. if (ctl->private_value & LC_CONTROL_LIMITER)
  436. names = dcy_lim;
  437. else
  438. names = dcy_alc;
  439. }
  440. break;
  441. case WM8776_LIMITER:
  442. names = tranwin;
  443. break;
  444. default:
  445. return -ENXIO;
  446. }
  447. strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
  448. return 0;
  449. }
  450. static int wm8776_field_volume_info(struct snd_kcontrol *ctl,
  451. struct snd_ctl_elem_info *info)
  452. {
  453. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  454. info->count = 1;
  455. info->value.integer.min = (ctl->private_value >> 8) & 0xf;
  456. info->value.integer.max = (ctl->private_value >> 12) & 0xf;
  457. return 0;
  458. }
  459. static void wm8776_field_set_from_ctl(struct snd_kcontrol *ctl)
  460. {
  461. struct oxygen *chip = ctl->private_data;
  462. struct xonar_wm87x6 *data = chip->model_data;
  463. unsigned int value, reg_index, mode;
  464. u8 min, max, shift;
  465. u16 mask, reg_value;
  466. bool invert;
  467. if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
  468. WM8776_LCSEL_LIMITER)
  469. mode = LC_CONTROL_LIMITER;
  470. else
  471. mode = LC_CONTROL_ALC;
  472. if (!(ctl->private_value & mode))
  473. return;
  474. value = ctl->private_value & 0xf;
  475. min = (ctl->private_value >> 8) & 0xf;
  476. max = (ctl->private_value >> 12) & 0xf;
  477. mask = (ctl->private_value >> 16) & 0xf;
  478. shift = (ctl->private_value >> 20) & 0xf;
  479. reg_index = (ctl->private_value >> 24) & 0x1f;
  480. invert = (ctl->private_value >> 29) & 0x1;
  481. if (invert)
  482. value = max - (value - min);
  483. reg_value = data->wm8776_regs[reg_index];
  484. reg_value &= ~(mask << shift);
  485. reg_value |= value << shift;
  486. wm8776_write_cached(chip, reg_index, reg_value);
  487. }
  488. static int wm8776_field_set(struct snd_kcontrol *ctl, unsigned int value)
  489. {
  490. struct oxygen *chip = ctl->private_data;
  491. u8 min, max;
  492. int changed;
  493. min = (ctl->private_value >> 8) & 0xf;
  494. max = (ctl->private_value >> 12) & 0xf;
  495. if (value < min || value > max)
  496. return -EINVAL;
  497. mutex_lock(&chip->mutex);
  498. changed = value != (ctl->private_value & 0xf);
  499. if (changed) {
  500. ctl->private_value = (ctl->private_value & ~0xf) | value;
  501. wm8776_field_set_from_ctl(ctl);
  502. }
  503. mutex_unlock(&chip->mutex);
  504. return changed;
  505. }
  506. static int wm8776_field_enum_get(struct snd_kcontrol *ctl,
  507. struct snd_ctl_elem_value *value)
  508. {
  509. value->value.enumerated.item[0] = ctl->private_value & 0xf;
  510. return 0;
  511. }
  512. static int wm8776_field_volume_get(struct snd_kcontrol *ctl,
  513. struct snd_ctl_elem_value *value)
  514. {
  515. value->value.integer.value[0] = ctl->private_value & 0xf;
  516. return 0;
  517. }
  518. static int wm8776_field_enum_put(struct snd_kcontrol *ctl,
  519. struct snd_ctl_elem_value *value)
  520. {
  521. return wm8776_field_set(ctl, value->value.enumerated.item[0]);
  522. }
  523. static int wm8776_field_volume_put(struct snd_kcontrol *ctl,
  524. struct snd_ctl_elem_value *value)
  525. {
  526. return wm8776_field_set(ctl, value->value.integer.value[0]);
  527. }
  528. static int wm8776_hp_vol_info(struct snd_kcontrol *ctl,
  529. struct snd_ctl_elem_info *info)
  530. {
  531. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  532. info->count = 2;
  533. info->value.integer.min = 0x79 - 60;
  534. info->value.integer.max = 0x7f;
  535. return 0;
  536. }
  537. static int wm8776_hp_vol_get(struct snd_kcontrol *ctl,
  538. struct snd_ctl_elem_value *value)
  539. {
  540. struct oxygen *chip = ctl->private_data;
  541. struct xonar_wm87x6 *data = chip->model_data;
  542. mutex_lock(&chip->mutex);
  543. value->value.integer.value[0] =
  544. data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK;
  545. value->value.integer.value[1] =
  546. data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK;
  547. mutex_unlock(&chip->mutex);
  548. return 0;
  549. }
  550. static int wm8776_hp_vol_put(struct snd_kcontrol *ctl,
  551. struct snd_ctl_elem_value *value)
  552. {
  553. struct oxygen *chip = ctl->private_data;
  554. struct xonar_wm87x6 *data = chip->model_data;
  555. u8 to_update;
  556. mutex_lock(&chip->mutex);
  557. to_update = (value->value.integer.value[0] !=
  558. (data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK))
  559. << 0;
  560. to_update |= (value->value.integer.value[1] !=
  561. (data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK))
  562. << 1;
  563. if (value->value.integer.value[0] == value->value.integer.value[1]) {
  564. if (to_update) {
  565. wm8776_write(chip, WM8776_HPMASTER,
  566. value->value.integer.value[0] |
  567. WM8776_HPZCEN | WM8776_UPDATE);
  568. data->wm8776_regs[WM8776_HPLVOL] =
  569. value->value.integer.value[0] | WM8776_HPZCEN;
  570. data->wm8776_regs[WM8776_HPRVOL] =
  571. value->value.integer.value[0] | WM8776_HPZCEN;
  572. }
  573. } else {
  574. if (to_update & 1)
  575. wm8776_write(chip, WM8776_HPLVOL,
  576. value->value.integer.value[0] |
  577. WM8776_HPZCEN |
  578. ((to_update & 2) ? 0 : WM8776_UPDATE));
  579. if (to_update & 2)
  580. wm8776_write(chip, WM8776_HPRVOL,
  581. value->value.integer.value[1] |
  582. WM8776_HPZCEN | WM8776_UPDATE);
  583. }
  584. mutex_unlock(&chip->mutex);
  585. return to_update != 0;
  586. }
  587. static int wm8776_input_mux_get(struct snd_kcontrol *ctl,
  588. struct snd_ctl_elem_value *value)
  589. {
  590. struct oxygen *chip = ctl->private_data;
  591. struct xonar_wm87x6 *data = chip->model_data;
  592. unsigned int mux_bit = ctl->private_value;
  593. value->value.integer.value[0] =
  594. !!(data->wm8776_regs[WM8776_ADCMUX] & mux_bit);
  595. return 0;
  596. }
  597. static int wm8776_input_mux_put(struct snd_kcontrol *ctl,
  598. struct snd_ctl_elem_value *value)
  599. {
  600. struct oxygen *chip = ctl->private_data;
  601. struct xonar_wm87x6 *data = chip->model_data;
  602. struct snd_kcontrol *other_ctl;
  603. unsigned int mux_bit = ctl->private_value;
  604. u16 reg;
  605. int changed;
  606. mutex_lock(&chip->mutex);
  607. reg = data->wm8776_regs[WM8776_ADCMUX];
  608. if (value->value.integer.value[0]) {
  609. reg |= mux_bit;
  610. /* line-in and mic-in are exclusive */
  611. mux_bit ^= 3;
  612. if (reg & mux_bit) {
  613. reg &= ~mux_bit;
  614. if (mux_bit == 1)
  615. other_ctl = data->line_adcmux_control;
  616. else
  617. other_ctl = data->mic_adcmux_control;
  618. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
  619. &other_ctl->id);
  620. }
  621. } else
  622. reg &= ~mux_bit;
  623. changed = reg != data->wm8776_regs[WM8776_ADCMUX];
  624. if (changed) {
  625. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  626. reg & 1 ? GPIO_DS_INPUT_ROUTE : 0,
  627. GPIO_DS_INPUT_ROUTE);
  628. wm8776_write(chip, WM8776_ADCMUX, reg);
  629. }
  630. mutex_unlock(&chip->mutex);
  631. return changed;
  632. }
  633. static int wm8776_input_vol_info(struct snd_kcontrol *ctl,
  634. struct snd_ctl_elem_info *info)
  635. {
  636. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  637. info->count = 2;
  638. info->value.integer.min = 0xa5;
  639. info->value.integer.max = 0xff;
  640. return 0;
  641. }
  642. static int wm8776_input_vol_get(struct snd_kcontrol *ctl,
  643. struct snd_ctl_elem_value *value)
  644. {
  645. struct oxygen *chip = ctl->private_data;
  646. struct xonar_wm87x6 *data = chip->model_data;
  647. mutex_lock(&chip->mutex);
  648. value->value.integer.value[0] =
  649. data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK;
  650. value->value.integer.value[1] =
  651. data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK;
  652. mutex_unlock(&chip->mutex);
  653. return 0;
  654. }
  655. static int wm8776_input_vol_put(struct snd_kcontrol *ctl,
  656. struct snd_ctl_elem_value *value)
  657. {
  658. struct oxygen *chip = ctl->private_data;
  659. struct xonar_wm87x6 *data = chip->model_data;
  660. int changed = 0;
  661. mutex_lock(&chip->mutex);
  662. changed = (value->value.integer.value[0] !=
  663. (data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK)) ||
  664. (value->value.integer.value[1] !=
  665. (data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK));
  666. wm8776_write_cached(chip, WM8776_ADCLVOL,
  667. value->value.integer.value[0] | WM8776_ZCA);
  668. wm8776_write_cached(chip, WM8776_ADCRVOL,
  669. value->value.integer.value[1] | WM8776_ZCA);
  670. mutex_unlock(&chip->mutex);
  671. return changed;
  672. }
  673. static int wm8776_level_control_info(struct snd_kcontrol *ctl,
  674. struct snd_ctl_elem_info *info)
  675. {
  676. static const char *const names[3] = {
  677. "None", "Peak Limiter", "Automatic Level Control"
  678. };
  679. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  680. info->count = 1;
  681. info->value.enumerated.items = 3;
  682. if (info->value.enumerated.item >= 3)
  683. info->value.enumerated.item = 2;
  684. strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
  685. return 0;
  686. }
  687. static int wm8776_level_control_get(struct snd_kcontrol *ctl,
  688. struct snd_ctl_elem_value *value)
  689. {
  690. struct oxygen *chip = ctl->private_data;
  691. struct xonar_wm87x6 *data = chip->model_data;
  692. if (!(data->wm8776_regs[WM8776_ALCCTRL2] & WM8776_LCEN))
  693. value->value.enumerated.item[0] = 0;
  694. else if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
  695. WM8776_LCSEL_LIMITER)
  696. value->value.enumerated.item[0] = 1;
  697. else
  698. value->value.enumerated.item[0] = 2;
  699. return 0;
  700. }
  701. static void activate_control(struct oxygen *chip,
  702. struct snd_kcontrol *ctl, unsigned int mode)
  703. {
  704. unsigned int access;
  705. if (ctl->private_value & mode)
  706. access = 0;
  707. else
  708. access = SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  709. if ((ctl->vd[0].access & SNDRV_CTL_ELEM_ACCESS_INACTIVE) != access) {
  710. ctl->vd[0].access ^= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  711. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
  712. }
  713. }
  714. static int wm8776_level_control_put(struct snd_kcontrol *ctl,
  715. struct snd_ctl_elem_value *value)
  716. {
  717. struct oxygen *chip = ctl->private_data;
  718. struct xonar_wm87x6 *data = chip->model_data;
  719. unsigned int mode = 0, i;
  720. u16 ctrl1, ctrl2;
  721. int changed;
  722. if (value->value.enumerated.item[0] >= 3)
  723. return -EINVAL;
  724. mutex_lock(&chip->mutex);
  725. changed = value->value.enumerated.item[0] != ctl->private_value;
  726. if (changed) {
  727. ctl->private_value = value->value.enumerated.item[0];
  728. ctrl1 = data->wm8776_regs[WM8776_ALCCTRL1];
  729. ctrl2 = data->wm8776_regs[WM8776_ALCCTRL2];
  730. switch (value->value.enumerated.item[0]) {
  731. default:
  732. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  733. ctrl2 & ~WM8776_LCEN);
  734. break;
  735. case 1:
  736. wm8776_write_cached(chip, WM8776_ALCCTRL1,
  737. (ctrl1 & ~WM8776_LCSEL_MASK) |
  738. WM8776_LCSEL_LIMITER);
  739. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  740. ctrl2 | WM8776_LCEN);
  741. mode = LC_CONTROL_LIMITER;
  742. break;
  743. case 2:
  744. wm8776_write_cached(chip, WM8776_ALCCTRL1,
  745. (ctrl1 & ~WM8776_LCSEL_MASK) |
  746. WM8776_LCSEL_ALC_STEREO);
  747. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  748. ctrl2 | WM8776_LCEN);
  749. mode = LC_CONTROL_ALC;
  750. break;
  751. }
  752. for (i = 0; i < ARRAY_SIZE(data->lc_controls); ++i)
  753. activate_control(chip, data->lc_controls[i], mode);
  754. }
  755. mutex_unlock(&chip->mutex);
  756. return changed;
  757. }
  758. static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  759. {
  760. static const char *const names[2] = {
  761. "None", "High-pass Filter"
  762. };
  763. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  764. info->count = 1;
  765. info->value.enumerated.items = 2;
  766. if (info->value.enumerated.item >= 2)
  767. info->value.enumerated.item = 1;
  768. strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
  769. return 0;
  770. }
  771. static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  772. {
  773. struct oxygen *chip = ctl->private_data;
  774. struct xonar_wm87x6 *data = chip->model_data;
  775. value->value.enumerated.item[0] =
  776. !(data->wm8776_regs[WM8776_ADCIFCTRL] & WM8776_ADCHPD);
  777. return 0;
  778. }
  779. static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  780. {
  781. struct oxygen *chip = ctl->private_data;
  782. struct xonar_wm87x6 *data = chip->model_data;
  783. unsigned int reg;
  784. int changed;
  785. mutex_lock(&chip->mutex);
  786. reg = data->wm8776_regs[WM8776_ADCIFCTRL] & ~WM8776_ADCHPD;
  787. if (!value->value.enumerated.item[0])
  788. reg |= WM8776_ADCHPD;
  789. changed = reg != data->wm8776_regs[WM8776_ADCIFCTRL];
  790. if (changed)
  791. wm8776_write(chip, WM8776_ADCIFCTRL, reg);
  792. mutex_unlock(&chip->mutex);
  793. return changed;
  794. }
  795. #define WM8776_BIT_SWITCH(xname, reg, bit, invert, flags) { \
  796. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  797. .name = xname, \
  798. .info = snd_ctl_boolean_mono_info, \
  799. .get = wm8776_bit_switch_get, \
  800. .put = wm8776_bit_switch_put, \
  801. .private_value = ((reg) << 16) | (bit) | ((invert) << 24) | (flags), \
  802. }
  803. #define _WM8776_FIELD_CTL(xname, reg, shift, initval, min, max, mask, flags) \
  804. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  805. .name = xname, \
  806. .private_value = (initval) | ((min) << 8) | ((max) << 12) | \
  807. ((mask) << 16) | ((shift) << 20) | ((reg) << 24) | (flags)
  808. #define WM8776_FIELD_CTL_ENUM(xname, reg, shift, init, min, max, mask, flags) {\
  809. _WM8776_FIELD_CTL(xname " Capture Enum", \
  810. reg, shift, init, min, max, mask, flags), \
  811. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  812. SNDRV_CTL_ELEM_ACCESS_INACTIVE, \
  813. .info = wm8776_field_enum_info, \
  814. .get = wm8776_field_enum_get, \
  815. .put = wm8776_field_enum_put, \
  816. }
  817. #define WM8776_FIELD_CTL_VOLUME(a, b, c, d, e, f, g, h, tlv_p) { \
  818. _WM8776_FIELD_CTL(a " Capture Volume", b, c, d, e, f, g, h), \
  819. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  820. SNDRV_CTL_ELEM_ACCESS_INACTIVE | \
  821. SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  822. .info = wm8776_field_volume_info, \
  823. .get = wm8776_field_volume_get, \
  824. .put = wm8776_field_volume_put, \
  825. .tlv = { .p = tlv_p }, \
  826. }
  827. static const DECLARE_TLV_DB_SCALE(wm87x6_dac_db_scale, -6000, 50, 0);
  828. static const DECLARE_TLV_DB_SCALE(wm8776_adc_db_scale, -2100, 50, 0);
  829. static const DECLARE_TLV_DB_SCALE(wm8776_hp_db_scale, -6000, 100, 0);
  830. static const DECLARE_TLV_DB_SCALE(wm8776_lct_db_scale, -1600, 100, 0);
  831. static const DECLARE_TLV_DB_SCALE(wm8776_maxgain_db_scale, 0, 400, 0);
  832. static const DECLARE_TLV_DB_SCALE(wm8776_ngth_db_scale, -7800, 600, 0);
  833. static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_lim_db_scale, -1200, 100, 0);
  834. static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_alc_db_scale, -2100, 400, 0);
  835. static const struct snd_kcontrol_new ds_controls[] = {
  836. {
  837. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  838. .name = "Headphone Playback Volume",
  839. .info = wm8776_hp_vol_info,
  840. .get = wm8776_hp_vol_get,
  841. .put = wm8776_hp_vol_put,
  842. .tlv = { .p = wm8776_hp_db_scale },
  843. },
  844. WM8776_BIT_SWITCH("Headphone Playback Switch",
  845. WM8776_PWRDOWN, WM8776_HPPD, 1, 0),
  846. {
  847. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  848. .name = "Input Capture Volume",
  849. .info = wm8776_input_vol_info,
  850. .get = wm8776_input_vol_get,
  851. .put = wm8776_input_vol_put,
  852. .tlv = { .p = wm8776_adc_db_scale },
  853. },
  854. {
  855. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  856. .name = "Line Capture Switch",
  857. .info = snd_ctl_boolean_mono_info,
  858. .get = wm8776_input_mux_get,
  859. .put = wm8776_input_mux_put,
  860. .private_value = 1 << 0,
  861. },
  862. {
  863. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  864. .name = "Mic Capture Switch",
  865. .info = snd_ctl_boolean_mono_info,
  866. .get = wm8776_input_mux_get,
  867. .put = wm8776_input_mux_put,
  868. .private_value = 1 << 1,
  869. },
  870. WM8776_BIT_SWITCH("Front Mic Capture Switch",
  871. WM8776_ADCMUX, 1 << 2, 0, 0),
  872. WM8776_BIT_SWITCH("Aux Capture Switch",
  873. WM8776_ADCMUX, 1 << 3, 0, 0),
  874. {
  875. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  876. .name = "ADC Filter Capture Enum",
  877. .info = hpf_info,
  878. .get = hpf_get,
  879. .put = hpf_put,
  880. },
  881. {
  882. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  883. .name = "Level Control Capture Enum",
  884. .info = wm8776_level_control_info,
  885. .get = wm8776_level_control_get,
  886. .put = wm8776_level_control_put,
  887. .private_value = 0,
  888. },
  889. };
  890. static const struct snd_kcontrol_new lc_controls[] = {
  891. WM8776_FIELD_CTL_VOLUME("Limiter Threshold",
  892. WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
  893. LC_CONTROL_LIMITER, wm8776_lct_db_scale),
  894. WM8776_FIELD_CTL_ENUM("Limiter Attack Time",
  895. WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
  896. LC_CONTROL_LIMITER),
  897. WM8776_FIELD_CTL_ENUM("Limiter Decay Time",
  898. WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
  899. LC_CONTROL_LIMITER),
  900. WM8776_FIELD_CTL_ENUM("Limiter Transient Window",
  901. WM8776_LIMITER, 4, 2, 0, 7, 0x7,
  902. LC_CONTROL_LIMITER),
  903. WM8776_FIELD_CTL_VOLUME("Limiter Maximum Attenuation",
  904. WM8776_LIMITER, 0, 6, 3, 12, 0xf,
  905. LC_CONTROL_LIMITER,
  906. wm8776_maxatten_lim_db_scale),
  907. WM8776_FIELD_CTL_VOLUME("ALC Target Level",
  908. WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
  909. LC_CONTROL_ALC, wm8776_lct_db_scale),
  910. WM8776_FIELD_CTL_ENUM("ALC Attack Time",
  911. WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
  912. LC_CONTROL_ALC),
  913. WM8776_FIELD_CTL_ENUM("ALC Decay Time",
  914. WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
  915. LC_CONTROL_ALC),
  916. WM8776_FIELD_CTL_VOLUME("ALC Maximum Gain",
  917. WM8776_ALCCTRL1, 4, 7, 1, 7, 0x7,
  918. LC_CONTROL_ALC, wm8776_maxgain_db_scale),
  919. WM8776_FIELD_CTL_VOLUME("ALC Maximum Attenuation",
  920. WM8776_LIMITER, 0, 10, 10, 15, 0xf,
  921. LC_CONTROL_ALC, wm8776_maxatten_alc_db_scale),
  922. WM8776_FIELD_CTL_ENUM("ALC Hold Time",
  923. WM8776_ALCCTRL2, 0, 0, 0, 15, 0xf,
  924. LC_CONTROL_ALC),
  925. WM8776_BIT_SWITCH("Noise Gate Capture Switch",
  926. WM8776_NOISEGATE, WM8776_NGAT, 0,
  927. LC_CONTROL_ALC),
  928. WM8776_FIELD_CTL_VOLUME("Noise Gate Threshold",
  929. WM8776_NOISEGATE, 2, 0, 0, 7, 0x7,
  930. LC_CONTROL_ALC, wm8776_ngth_db_scale),
  931. };
  932. static int xonar_ds_mixer_init(struct oxygen *chip)
  933. {
  934. struct xonar_wm87x6 *data = chip->model_data;
  935. unsigned int i;
  936. struct snd_kcontrol *ctl;
  937. int err;
  938. for (i = 0; i < ARRAY_SIZE(ds_controls); ++i) {
  939. ctl = snd_ctl_new1(&ds_controls[i], chip);
  940. if (!ctl)
  941. return -ENOMEM;
  942. err = snd_ctl_add(chip->card, ctl);
  943. if (err < 0)
  944. return err;
  945. if (!strcmp(ctl->id.name, "Line Capture Switch"))
  946. data->line_adcmux_control = ctl;
  947. else if (!strcmp(ctl->id.name, "Mic Capture Switch"))
  948. data->mic_adcmux_control = ctl;
  949. }
  950. if (!data->line_adcmux_control || !data->mic_adcmux_control)
  951. return -ENXIO;
  952. BUILD_BUG_ON(ARRAY_SIZE(lc_controls) != ARRAY_SIZE(data->lc_controls));
  953. for (i = 0; i < ARRAY_SIZE(lc_controls); ++i) {
  954. ctl = snd_ctl_new1(&lc_controls[i], chip);
  955. if (!ctl)
  956. return -ENOMEM;
  957. err = snd_ctl_add(chip->card, ctl);
  958. if (err < 0)
  959. return err;
  960. data->lc_controls[i] = ctl;
  961. }
  962. return 0;
  963. }
  964. static const struct oxygen_model model_xonar_ds = {
  965. .shortname = "Xonar DS",
  966. .longname = "Asus Virtuoso 66",
  967. .chip = "AV200",
  968. .init = xonar_ds_init,
  969. .mixer_init = xonar_ds_mixer_init,
  970. .cleanup = xonar_ds_cleanup,
  971. .suspend = xonar_ds_suspend,
  972. .resume = xonar_ds_resume,
  973. .pcm_hardware_filter = wm8776_adc_hardware_filter,
  974. .get_i2s_mclk = oxygen_default_i2s_mclk,
  975. .set_dac_params = set_wm87x6_dac_params,
  976. .set_adc_params = set_wm8776_adc_params,
  977. .update_dac_volume = update_wm87x6_volume,
  978. .update_dac_mute = update_wm87x6_mute,
  979. .update_center_lfe_mix = update_wm8766_center_lfe_mix,
  980. .gpio_changed = xonar_ds_gpio_changed,
  981. .dac_tlv = wm87x6_dac_db_scale,
  982. .model_data_size = sizeof(struct xonar_wm87x6),
  983. .device_config = PLAYBACK_0_TO_I2S |
  984. PLAYBACK_1_TO_SPDIF |
  985. CAPTURE_0_FROM_I2S_1,
  986. .dac_channels = 8,
  987. .dac_volume_min = 255 - 2*60,
  988. .dac_volume_max = 255,
  989. .function_flags = OXYGEN_FUNCTION_SPI,
  990. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  991. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  992. };
  993. int __devinit get_xonar_wm87x6_model(struct oxygen *chip,
  994. const struct pci_device_id *id)
  995. {
  996. switch (id->subdevice) {
  997. case 0x838e:
  998. chip->model = model_xonar_ds;
  999. break;
  1000. default:
  1001. return -EINVAL;
  1002. }
  1003. return 0;
  1004. }