booke_wdt.c 6.6 KB

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  1. /*
  2. * Watchdog timer for PowerPC Book-E systems
  3. *
  4. * Author: Matthew McClintock
  5. * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  6. *
  7. * Copyright 2005, 2008, 2010 Freescale Semiconductor Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/fs.h>
  16. #include <linux/smp.h>
  17. #include <linux/miscdevice.h>
  18. #include <linux/notifier.h>
  19. #include <linux/watchdog.h>
  20. #include <linux/uaccess.h>
  21. #include <asm/reg_booke.h>
  22. #include <asm/system.h>
  23. #include <asm/time.h>
  24. #include <asm/div64.h>
  25. /* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
  26. * Also, the wdt_period sets the watchdog timer period timeout.
  27. * For E500 cpus the wdt_period sets which bit changing from 0->1 will
  28. * trigger a watchog timeout. This watchdog timeout will occur 3 times, the
  29. * first time nothing will happen, the second time a watchdog exception will
  30. * occur, and the final time the board will reset.
  31. */
  32. u32 booke_wdt_enabled;
  33. u32 booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
  34. #ifdef CONFIG_FSL_BOOKE
  35. #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
  36. #define WDTP_MASK (WDTP(0x3f))
  37. #else
  38. #define WDTP(x) (TCR_WP(x))
  39. #define WDTP_MASK (TCR_WP_MASK)
  40. #endif
  41. static DEFINE_SPINLOCK(booke_wdt_lock);
  42. /* For the specified period, determine the number of seconds
  43. * corresponding to the reset time. There will be a watchdog
  44. * exception at approximately 3/5 of this time.
  45. *
  46. * The formula to calculate this is given by:
  47. * 2.5 * (2^(63-period+1)) / timebase_freq
  48. *
  49. * In order to simplify things, we assume that period is
  50. * at least 1. This will still result in a very long timeout.
  51. */
  52. static unsigned long long period_to_sec(unsigned int period)
  53. {
  54. unsigned long long tmp = 1ULL << (64 - period);
  55. unsigned long tmp2 = ppc_tb_freq;
  56. /* tmp may be a very large number and we don't want to overflow,
  57. * so divide the timebase freq instead of multiplying tmp
  58. */
  59. tmp2 = tmp2 / 5 * 2;
  60. do_div(tmp, tmp2);
  61. return tmp;
  62. }
  63. /*
  64. * This procedure will find the highest period which will give a timeout
  65. * greater than the one required. e.g. for a bus speed of 66666666 and
  66. * and a parameter of 2 secs, then this procedure will return a value of 38.
  67. */
  68. static unsigned int sec_to_period(unsigned int secs)
  69. {
  70. unsigned int period;
  71. for (period = 63; period > 0; period--) {
  72. if (period_to_sec(period) >= secs)
  73. return period;
  74. }
  75. return 0;
  76. }
  77. static void __booke_wdt_ping(void *data)
  78. {
  79. mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
  80. }
  81. static void booke_wdt_ping(void)
  82. {
  83. on_each_cpu(__booke_wdt_ping, NULL, 0);
  84. }
  85. static void __booke_wdt_enable(void *data)
  86. {
  87. u32 val;
  88. /* clear status before enabling watchdog */
  89. __booke_wdt_ping(NULL);
  90. val = mfspr(SPRN_TCR);
  91. val &= ~WDTP_MASK;
  92. val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period));
  93. mtspr(SPRN_TCR, val);
  94. }
  95. /**
  96. * booke_wdt_disable - disable the watchdog on the given CPU
  97. *
  98. * This function is called on each CPU. It disables the watchdog on that CPU.
  99. *
  100. * TCR[WRC] cannot be changed once it has been set to non-zero, but we can
  101. * effectively disable the watchdog by setting its period to the maximum value.
  102. */
  103. static void __booke_wdt_disable(void *data)
  104. {
  105. u32 val;
  106. val = mfspr(SPRN_TCR);
  107. val &= ~(TCR_WIE | WDTP_MASK);
  108. mtspr(SPRN_TCR, val);
  109. /* clear status to make sure nothing is pending */
  110. __booke_wdt_ping(NULL);
  111. }
  112. static ssize_t booke_wdt_write(struct file *file, const char __user *buf,
  113. size_t count, loff_t *ppos)
  114. {
  115. booke_wdt_ping();
  116. return count;
  117. }
  118. static struct watchdog_info ident = {
  119. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
  120. .identity = "PowerPC Book-E Watchdog",
  121. };
  122. static long booke_wdt_ioctl(struct file *file,
  123. unsigned int cmd, unsigned long arg)
  124. {
  125. u32 tmp = 0;
  126. u32 __user *p = (u32 __user *)arg;
  127. switch (cmd) {
  128. case WDIOC_GETSUPPORT:
  129. if (copy_to_user((void *)arg, &ident, sizeof(ident)))
  130. return -EFAULT;
  131. case WDIOC_GETSTATUS:
  132. return put_user(0, p);
  133. case WDIOC_GETBOOTSTATUS:
  134. /* XXX: something is clearing TSR */
  135. tmp = mfspr(SPRN_TSR) & TSR_WRS(3);
  136. /* returns CARDRESET if last reset was caused by the WDT */
  137. return (tmp ? WDIOF_CARDRESET : 0);
  138. case WDIOC_SETOPTIONS:
  139. if (get_user(tmp, p))
  140. return -EINVAL;
  141. if (tmp == WDIOS_ENABLECARD) {
  142. booke_wdt_ping();
  143. break;
  144. } else
  145. return -EINVAL;
  146. return 0;
  147. case WDIOC_KEEPALIVE:
  148. booke_wdt_ping();
  149. return 0;
  150. case WDIOC_SETTIMEOUT:
  151. if (get_user(tmp, p))
  152. return -EFAULT;
  153. #ifdef CONFIG_FSL_BOOKE
  154. /* period of 1 gives the largest possible timeout */
  155. if (tmp > period_to_sec(1))
  156. return -EINVAL;
  157. booke_wdt_period = sec_to_period(tmp);
  158. #else
  159. booke_wdt_period = tmp;
  160. #endif
  161. mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WDTP_MASK) |
  162. WDTP(booke_wdt_period));
  163. return 0;
  164. case WDIOC_GETTIMEOUT:
  165. return put_user(booke_wdt_period, p);
  166. default:
  167. return -ENOTTY;
  168. }
  169. return 0;
  170. }
  171. static int booke_wdt_open(struct inode *inode, struct file *file)
  172. {
  173. spin_lock(&booke_wdt_lock);
  174. if (booke_wdt_enabled == 0) {
  175. booke_wdt_enabled = 1;
  176. on_each_cpu(__booke_wdt_enable, NULL, 0);
  177. printk(KERN_INFO
  178. "PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n",
  179. booke_wdt_period);
  180. }
  181. spin_unlock(&booke_wdt_lock);
  182. return nonseekable_open(inode, file);
  183. }
  184. static int booke_wdt_release(struct inode *inode, struct file *file)
  185. {
  186. on_each_cpu(__booke_wdt_disable, NULL, 0);
  187. booke_wdt_enabled = 0;
  188. return 0;
  189. }
  190. static const struct file_operations booke_wdt_fops = {
  191. .owner = THIS_MODULE,
  192. .llseek = no_llseek,
  193. .write = booke_wdt_write,
  194. .unlocked_ioctl = booke_wdt_ioctl,
  195. .open = booke_wdt_open,
  196. .release = booke_wdt_release,
  197. };
  198. static struct miscdevice booke_wdt_miscdev = {
  199. .minor = WATCHDOG_MINOR,
  200. .name = "watchdog",
  201. .fops = &booke_wdt_fops,
  202. };
  203. static void __exit booke_wdt_exit(void)
  204. {
  205. misc_deregister(&booke_wdt_miscdev);
  206. }
  207. static int __init booke_wdt_init(void)
  208. {
  209. int ret = 0;
  210. printk(KERN_INFO "PowerPC Book-E Watchdog Timer Loaded\n");
  211. ident.firmware_version = cur_cpu_spec->pvr_value;
  212. ret = misc_register(&booke_wdt_miscdev);
  213. if (ret) {
  214. printk(KERN_CRIT "Cannot register miscdev on minor=%d: %d\n",
  215. WATCHDOG_MINOR, ret);
  216. return ret;
  217. }
  218. spin_lock(&booke_wdt_lock);
  219. if (booke_wdt_enabled == 1) {
  220. printk(KERN_INFO
  221. "PowerPC Book-E Watchdog Timer Enabled (wdt_period=%d)\n",
  222. booke_wdt_period);
  223. on_each_cpu(__booke_wdt_enable, NULL, 0);
  224. }
  225. spin_unlock(&booke_wdt_lock);
  226. return ret;
  227. }
  228. module_init(booke_wdt_init);
  229. module_exit(booke_wdt_exit);
  230. MODULE_DESCRIPTION("PowerPC Book-E watchdog driver");
  231. MODULE_LICENSE("GPL");