sh_mobile_lcdcfb.c 35 KB

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  1. /*
  2. * SuperH Mobile LCDC Framebuffer
  3. *
  4. * Copyright (c) 2008 Magnus Damm
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/delay.h>
  13. #include <linux/mm.h>
  14. #include <linux/clk.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/vmalloc.h>
  20. #include <linux/ioctl.h>
  21. #include <linux/slab.h>
  22. #include <linux/console.h>
  23. #include <video/sh_mobile_lcdc.h>
  24. #include <asm/atomic.h>
  25. #include "sh_mobile_lcdcfb.h"
  26. #define SIDE_B_OFFSET 0x1000
  27. #define MIRROR_OFFSET 0x2000
  28. /* shared registers */
  29. #define _LDDCKR 0x410
  30. #define _LDDCKSTPR 0x414
  31. #define _LDINTR 0x468
  32. #define _LDSR 0x46c
  33. #define _LDCNT1R 0x470
  34. #define _LDCNT2R 0x474
  35. #define _LDRCNTR 0x478
  36. #define _LDDDSR 0x47c
  37. #define _LDDWD0R 0x800
  38. #define _LDDRDR 0x840
  39. #define _LDDWAR 0x900
  40. #define _LDDRAR 0x904
  41. /* shared registers and their order for context save/restore */
  42. static int lcdc_shared_regs[] = {
  43. _LDDCKR,
  44. _LDDCKSTPR,
  45. _LDINTR,
  46. _LDDDSR,
  47. _LDCNT1R,
  48. _LDCNT2R,
  49. };
  50. #define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs)
  51. #define MAX_XRES 1920
  52. #define MAX_YRES 1080
  53. static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
  54. [LDDCKPAT1R] = 0x400,
  55. [LDDCKPAT2R] = 0x404,
  56. [LDMT1R] = 0x418,
  57. [LDMT2R] = 0x41c,
  58. [LDMT3R] = 0x420,
  59. [LDDFR] = 0x424,
  60. [LDSM1R] = 0x428,
  61. [LDSM2R] = 0x42c,
  62. [LDSA1R] = 0x430,
  63. [LDMLSR] = 0x438,
  64. [LDHCNR] = 0x448,
  65. [LDHSYNR] = 0x44c,
  66. [LDVLNR] = 0x450,
  67. [LDVSYNR] = 0x454,
  68. [LDPMR] = 0x460,
  69. [LDHAJR] = 0x4a0,
  70. };
  71. static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
  72. [LDDCKPAT1R] = 0x408,
  73. [LDDCKPAT2R] = 0x40c,
  74. [LDMT1R] = 0x600,
  75. [LDMT2R] = 0x604,
  76. [LDMT3R] = 0x608,
  77. [LDDFR] = 0x60c,
  78. [LDSM1R] = 0x610,
  79. [LDSM2R] = 0x614,
  80. [LDSA1R] = 0x618,
  81. [LDMLSR] = 0x620,
  82. [LDHCNR] = 0x624,
  83. [LDHSYNR] = 0x628,
  84. [LDVLNR] = 0x62c,
  85. [LDVSYNR] = 0x630,
  86. [LDPMR] = 0x63c,
  87. };
  88. #define START_LCDC 0x00000001
  89. #define LCDC_RESET 0x00000100
  90. #define DISPLAY_BEU 0x00000008
  91. #define LCDC_ENABLE 0x00000001
  92. #define LDINTR_FE 0x00000400
  93. #define LDINTR_VSE 0x00000200
  94. #define LDINTR_VEE 0x00000100
  95. #define LDINTR_FS 0x00000004
  96. #define LDINTR_VSS 0x00000002
  97. #define LDINTR_VES 0x00000001
  98. #define LDRCNTR_SRS 0x00020000
  99. #define LDRCNTR_SRC 0x00010000
  100. #define LDRCNTR_MRS 0x00000002
  101. #define LDRCNTR_MRC 0x00000001
  102. #define LDSR_MRS 0x00000100
  103. static const struct fb_videomode default_720p = {
  104. .name = "HDMI 720p",
  105. .xres = 1280,
  106. .yres = 720,
  107. .left_margin = 220,
  108. .right_margin = 110,
  109. .hsync_len = 40,
  110. .upper_margin = 20,
  111. .lower_margin = 5,
  112. .vsync_len = 5,
  113. .pixclock = 13468,
  114. .refresh = 60,
  115. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  116. };
  117. struct sh_mobile_lcdc_priv {
  118. void __iomem *base;
  119. int irq;
  120. atomic_t hw_usecnt;
  121. struct device *dev;
  122. struct clk *dot_clk;
  123. unsigned long lddckr;
  124. struct sh_mobile_lcdc_chan ch[2];
  125. struct notifier_block notifier;
  126. unsigned long saved_shared_regs[NR_SHARED_REGS];
  127. int started;
  128. int forced_bpp; /* 2 channel LCDC must share bpp setting */
  129. };
  130. static bool banked(int reg_nr)
  131. {
  132. switch (reg_nr) {
  133. case LDMT1R:
  134. case LDMT2R:
  135. case LDMT3R:
  136. case LDDFR:
  137. case LDSM1R:
  138. case LDSA1R:
  139. case LDMLSR:
  140. case LDHCNR:
  141. case LDHSYNR:
  142. case LDVLNR:
  143. case LDVSYNR:
  144. return true;
  145. }
  146. return false;
  147. }
  148. static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
  149. int reg_nr, unsigned long data)
  150. {
  151. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
  152. if (banked(reg_nr))
  153. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  154. SIDE_B_OFFSET);
  155. }
  156. static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
  157. int reg_nr, unsigned long data)
  158. {
  159. iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
  160. MIRROR_OFFSET);
  161. }
  162. static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
  163. int reg_nr)
  164. {
  165. return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
  166. }
  167. static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
  168. unsigned long reg_offs, unsigned long data)
  169. {
  170. iowrite32(data, priv->base + reg_offs);
  171. }
  172. static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
  173. unsigned long reg_offs)
  174. {
  175. return ioread32(priv->base + reg_offs);
  176. }
  177. static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
  178. unsigned long reg_offs,
  179. unsigned long mask, unsigned long until)
  180. {
  181. while ((lcdc_read(priv, reg_offs) & mask) != until)
  182. cpu_relax();
  183. }
  184. static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
  185. {
  186. return chan->cfg.chan == LCDC_CHAN_SUBLCD;
  187. }
  188. static void lcdc_sys_write_index(void *handle, unsigned long data)
  189. {
  190. struct sh_mobile_lcdc_chan *ch = handle;
  191. lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000);
  192. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  193. lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  194. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  195. }
  196. static void lcdc_sys_write_data(void *handle, unsigned long data)
  197. {
  198. struct sh_mobile_lcdc_chan *ch = handle;
  199. lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000);
  200. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  201. lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  202. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  203. }
  204. static unsigned long lcdc_sys_read_data(void *handle)
  205. {
  206. struct sh_mobile_lcdc_chan *ch = handle;
  207. lcdc_write(ch->lcdc, _LDDRDR, 0x01000000);
  208. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  209. lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
  210. udelay(1);
  211. lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
  212. return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff;
  213. }
  214. struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
  215. lcdc_sys_write_index,
  216. lcdc_sys_write_data,
  217. lcdc_sys_read_data,
  218. };
  219. static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
  220. {
  221. if (atomic_inc_and_test(&priv->hw_usecnt)) {
  222. pm_runtime_get_sync(priv->dev);
  223. if (priv->dot_clk)
  224. clk_enable(priv->dot_clk);
  225. }
  226. }
  227. static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
  228. {
  229. if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
  230. if (priv->dot_clk)
  231. clk_disable(priv->dot_clk);
  232. pm_runtime_put(priv->dev);
  233. }
  234. }
  235. static int sh_mobile_lcdc_sginit(struct fb_info *info,
  236. struct list_head *pagelist)
  237. {
  238. struct sh_mobile_lcdc_chan *ch = info->par;
  239. unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
  240. struct page *page;
  241. int nr_pages = 0;
  242. sg_init_table(ch->sglist, nr_pages_max);
  243. list_for_each_entry(page, pagelist, lru)
  244. sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);
  245. return nr_pages;
  246. }
  247. static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
  248. struct list_head *pagelist)
  249. {
  250. struct sh_mobile_lcdc_chan *ch = info->par;
  251. struct sh_mobile_lcdc_board_cfg *bcfg = &ch->cfg.board_cfg;
  252. /* enable clocks before accessing hardware */
  253. sh_mobile_lcdc_clk_on(ch->lcdc);
  254. /*
  255. * It's possible to get here without anything on the pagelist via
  256. * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
  257. * invocation. In the former case, the acceleration routines are
  258. * stepped in to when using the framebuffer console causing the
  259. * workqueue to be scheduled without any dirty pages on the list.
  260. *
  261. * Despite this, a panel update is still needed given that the
  262. * acceleration routines have their own methods for writing in
  263. * that still need to be updated.
  264. *
  265. * The fsync() and empty pagelist case could be optimized for,
  266. * but we don't bother, as any application exhibiting such
  267. * behaviour is fundamentally broken anyways.
  268. */
  269. if (!list_empty(pagelist)) {
  270. unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);
  271. /* trigger panel update */
  272. dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  273. if (bcfg->start_transfer)
  274. bcfg->start_transfer(bcfg->board_data, ch,
  275. &sh_mobile_lcdc_sys_bus_ops);
  276. lcdc_write_chan(ch, LDSM2R, 1);
  277. dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
  278. } else {
  279. if (bcfg->start_transfer)
  280. bcfg->start_transfer(bcfg->board_data, ch,
  281. &sh_mobile_lcdc_sys_bus_ops);
  282. lcdc_write_chan(ch, LDSM2R, 1);
  283. }
  284. }
  285. static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
  286. {
  287. struct fb_deferred_io *fbdefio = info->fbdefio;
  288. if (fbdefio)
  289. schedule_delayed_work(&info->deferred_work, fbdefio->delay);
  290. }
  291. static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
  292. {
  293. struct sh_mobile_lcdc_priv *priv = data;
  294. struct sh_mobile_lcdc_chan *ch;
  295. unsigned long tmp;
  296. unsigned long ldintr;
  297. int is_sub;
  298. int k;
  299. /* acknowledge interrupt */
  300. ldintr = tmp = lcdc_read(priv, _LDINTR);
  301. /*
  302. * disable further VSYNC End IRQs, preserve all other enabled IRQs,
  303. * write 0 to bits 0-6 to ack all triggered IRQs.
  304. */
  305. tmp &= 0xffffff00 & ~LDINTR_VEE;
  306. lcdc_write(priv, _LDINTR, tmp);
  307. /* figure out if this interrupt is for main or sub lcd */
  308. is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0;
  309. /* wake up channel and disable clocks */
  310. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  311. ch = &priv->ch[k];
  312. if (!ch->enabled)
  313. continue;
  314. /* Frame Start */
  315. if (ldintr & LDINTR_FS) {
  316. if (is_sub == lcdc_chan_is_sublcd(ch)) {
  317. ch->frame_end = 1;
  318. wake_up(&ch->frame_end_wait);
  319. sh_mobile_lcdc_clk_off(priv);
  320. }
  321. }
  322. /* VSYNC End */
  323. if (ldintr & LDINTR_VES)
  324. complete(&ch->vsync_completion);
  325. }
  326. return IRQ_HANDLED;
  327. }
  328. static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
  329. int start)
  330. {
  331. unsigned long tmp = lcdc_read(priv, _LDCNT2R);
  332. int k;
  333. /* start or stop the lcdc */
  334. if (start)
  335. lcdc_write(priv, _LDCNT2R, tmp | START_LCDC);
  336. else
  337. lcdc_write(priv, _LDCNT2R, tmp & ~START_LCDC);
  338. /* wait until power is applied/stopped on all channels */
  339. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  340. if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
  341. while (1) {
  342. tmp = lcdc_read_chan(&priv->ch[k], LDPMR) & 3;
  343. if (start && tmp == 3)
  344. break;
  345. if (!start && tmp == 0)
  346. break;
  347. cpu_relax();
  348. }
  349. if (!start)
  350. lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
  351. }
  352. static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
  353. {
  354. struct fb_var_screeninfo *var = &ch->info->var, *display_var = &ch->display_var;
  355. unsigned long h_total, hsync_pos, display_h_total;
  356. u32 tmp;
  357. tmp = ch->ldmt1r_value;
  358. tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1 << 28;
  359. tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1 << 27;
  360. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? 1 << 26 : 0;
  361. tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? 1 << 25 : 0;
  362. tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? 1 << 24 : 0;
  363. tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? 1 << 17 : 0;
  364. tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? 1 << 16 : 0;
  365. lcdc_write_chan(ch, LDMT1R, tmp);
  366. /* setup SYS bus */
  367. lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
  368. lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
  369. /* horizontal configuration */
  370. h_total = display_var->xres + display_var->hsync_len +
  371. display_var->left_margin + display_var->right_margin;
  372. tmp = h_total / 8; /* HTCN */
  373. tmp |= (min(display_var->xres, var->xres) / 8) << 16; /* HDCN */
  374. lcdc_write_chan(ch, LDHCNR, tmp);
  375. hsync_pos = display_var->xres + display_var->right_margin;
  376. tmp = hsync_pos / 8; /* HSYNP */
  377. tmp |= (display_var->hsync_len / 8) << 16; /* HSYNW */
  378. lcdc_write_chan(ch, LDHSYNR, tmp);
  379. /* vertical configuration */
  380. tmp = display_var->yres + display_var->vsync_len +
  381. display_var->upper_margin + display_var->lower_margin; /* VTLN */
  382. tmp |= min(display_var->yres, var->yres) << 16; /* VDLN */
  383. lcdc_write_chan(ch, LDVLNR, tmp);
  384. tmp = display_var->yres + display_var->lower_margin; /* VSYNP */
  385. tmp |= display_var->vsync_len << 16; /* VSYNW */
  386. lcdc_write_chan(ch, LDVSYNR, tmp);
  387. /* Adjust horizontal synchronisation for HDMI */
  388. display_h_total = display_var->xres + display_var->hsync_len +
  389. display_var->left_margin + display_var->right_margin;
  390. tmp = ((display_var->xres & 7) << 24) |
  391. ((display_h_total & 7) << 16) |
  392. ((display_var->hsync_len & 7) << 8) |
  393. hsync_pos;
  394. lcdc_write_chan(ch, LDHAJR, tmp);
  395. }
  396. static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
  397. {
  398. struct sh_mobile_lcdc_chan *ch;
  399. struct sh_mobile_lcdc_board_cfg *board_cfg;
  400. unsigned long tmp;
  401. int bpp = 0;
  402. int k, m;
  403. int ret = 0;
  404. /* enable clocks before accessing the hardware */
  405. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  406. if (priv->ch[k].enabled) {
  407. sh_mobile_lcdc_clk_on(priv);
  408. if (!bpp)
  409. bpp = priv->ch[k].info->var.bits_per_pixel;
  410. }
  411. }
  412. /* reset */
  413. lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET);
  414. lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0);
  415. /* enable LCDC channels */
  416. tmp = lcdc_read(priv, _LDCNT2R);
  417. tmp |= priv->ch[0].enabled;
  418. tmp |= priv->ch[1].enabled;
  419. lcdc_write(priv, _LDCNT2R, tmp);
  420. /* read data from external memory, avoid using the BEU for now */
  421. lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) & ~DISPLAY_BEU);
  422. /* stop the lcdc first */
  423. sh_mobile_lcdc_start_stop(priv, 0);
  424. /* configure clocks */
  425. tmp = priv->lddckr;
  426. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  427. ch = &priv->ch[k];
  428. if (!priv->ch[k].enabled)
  429. continue;
  430. m = ch->cfg.clock_divider;
  431. if (!m)
  432. continue;
  433. if (m == 1)
  434. m = 1 << 6;
  435. tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);
  436. /* FIXME: sh7724 can only use 42, 48, 54 and 60 for the divider denominator */
  437. lcdc_write_chan(ch, LDDCKPAT1R, 0);
  438. lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
  439. }
  440. lcdc_write(priv, _LDDCKR, tmp);
  441. /* start dotclock again */
  442. lcdc_write(priv, _LDDCKSTPR, 0);
  443. lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);
  444. /* interrupts are disabled to begin with */
  445. lcdc_write(priv, _LDINTR, 0);
  446. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  447. ch = &priv->ch[k];
  448. if (!ch->enabled)
  449. continue;
  450. sh_mobile_lcdc_geometry(ch);
  451. /* power supply */
  452. lcdc_write_chan(ch, LDPMR, 0);
  453. board_cfg = &ch->cfg.board_cfg;
  454. if (board_cfg->setup_sys)
  455. ret = board_cfg->setup_sys(board_cfg->board_data, ch,
  456. &sh_mobile_lcdc_sys_bus_ops);
  457. if (ret)
  458. return ret;
  459. }
  460. /* word and long word swap */
  461. switch (bpp) {
  462. case 16:
  463. lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6);
  464. break;
  465. case 24:
  466. lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 7);
  467. break;
  468. case 32:
  469. lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 4);
  470. break;
  471. }
  472. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  473. ch = &priv->ch[k];
  474. if (!priv->ch[k].enabled)
  475. continue;
  476. /* set bpp format in PKF[4:0] */
  477. tmp = lcdc_read_chan(ch, LDDFR);
  478. tmp &= ~0x0001001f;
  479. switch (ch->info->var.bits_per_pixel) {
  480. case 16:
  481. tmp |= 0x03;
  482. break;
  483. case 24:
  484. tmp |= 0x0b;
  485. break;
  486. case 32:
  487. break;
  488. }
  489. lcdc_write_chan(ch, LDDFR, tmp);
  490. /* point out our frame buffer */
  491. lcdc_write_chan(ch, LDSA1R, ch->info->fix.smem_start);
  492. /* set line size */
  493. lcdc_write_chan(ch, LDMLSR, ch->info->fix.line_length);
  494. /* setup deferred io if SYS bus */
  495. tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
  496. if (ch->ldmt1r_value & (1 << 12) && tmp) {
  497. ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
  498. ch->defio.delay = msecs_to_jiffies(tmp);
  499. ch->info->fbdefio = &ch->defio;
  500. fb_deferred_io_init(ch->info);
  501. /* one-shot mode */
  502. lcdc_write_chan(ch, LDSM1R, 1);
  503. /* enable "Frame End Interrupt Enable" bit */
  504. lcdc_write(priv, _LDINTR, LDINTR_FE);
  505. } else {
  506. /* continuous read mode */
  507. lcdc_write_chan(ch, LDSM1R, 0);
  508. }
  509. }
  510. /* display output */
  511. lcdc_write(priv, _LDCNT1R, LCDC_ENABLE);
  512. /* start the lcdc */
  513. sh_mobile_lcdc_start_stop(priv, 1);
  514. priv->started = 1;
  515. /* tell the board code to enable the panel */
  516. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  517. ch = &priv->ch[k];
  518. if (!ch->enabled)
  519. continue;
  520. board_cfg = &ch->cfg.board_cfg;
  521. if (try_module_get(board_cfg->owner) && board_cfg->display_on) {
  522. board_cfg->display_on(board_cfg->board_data, ch->info);
  523. module_put(board_cfg->owner);
  524. }
  525. }
  526. return 0;
  527. }
  528. static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
  529. {
  530. struct sh_mobile_lcdc_chan *ch;
  531. struct sh_mobile_lcdc_board_cfg *board_cfg;
  532. int k;
  533. /* clean up deferred io and ask board code to disable panel */
  534. for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
  535. ch = &priv->ch[k];
  536. if (!ch->enabled)
  537. continue;
  538. /* deferred io mode:
  539. * flush frame, and wait for frame end interrupt
  540. * clean up deferred io and enable clock
  541. */
  542. if (ch->info && ch->info->fbdefio) {
  543. ch->frame_end = 0;
  544. schedule_delayed_work(&ch->info->deferred_work, 0);
  545. wait_event(ch->frame_end_wait, ch->frame_end);
  546. fb_deferred_io_cleanup(ch->info);
  547. ch->info->fbdefio = NULL;
  548. sh_mobile_lcdc_clk_on(priv);
  549. }
  550. board_cfg = &ch->cfg.board_cfg;
  551. if (try_module_get(board_cfg->owner) && board_cfg->display_off) {
  552. board_cfg->display_off(board_cfg->board_data);
  553. module_put(board_cfg->owner);
  554. }
  555. }
  556. /* stop the lcdc */
  557. if (priv->started) {
  558. sh_mobile_lcdc_start_stop(priv, 0);
  559. priv->started = 0;
  560. }
  561. /* stop clocks */
  562. for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
  563. if (priv->ch[k].enabled)
  564. sh_mobile_lcdc_clk_off(priv);
  565. }
  566. static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
  567. {
  568. int ifm, miftyp;
  569. switch (ch->cfg.interface_type) {
  570. case RGB8: ifm = 0; miftyp = 0; break;
  571. case RGB9: ifm = 0; miftyp = 4; break;
  572. case RGB12A: ifm = 0; miftyp = 5; break;
  573. case RGB12B: ifm = 0; miftyp = 6; break;
  574. case RGB16: ifm = 0; miftyp = 7; break;
  575. case RGB18: ifm = 0; miftyp = 10; break;
  576. case RGB24: ifm = 0; miftyp = 11; break;
  577. case SYS8A: ifm = 1; miftyp = 0; break;
  578. case SYS8B: ifm = 1; miftyp = 1; break;
  579. case SYS8C: ifm = 1; miftyp = 2; break;
  580. case SYS8D: ifm = 1; miftyp = 3; break;
  581. case SYS9: ifm = 1; miftyp = 4; break;
  582. case SYS12: ifm = 1; miftyp = 5; break;
  583. case SYS16A: ifm = 1; miftyp = 7; break;
  584. case SYS16B: ifm = 1; miftyp = 8; break;
  585. case SYS16C: ifm = 1; miftyp = 9; break;
  586. case SYS18: ifm = 1; miftyp = 10; break;
  587. case SYS24: ifm = 1; miftyp = 11; break;
  588. default: goto bad;
  589. }
  590. /* SUBLCD only supports SYS interface */
  591. if (lcdc_chan_is_sublcd(ch)) {
  592. if (ifm == 0)
  593. goto bad;
  594. else
  595. ifm = 0;
  596. }
  597. ch->ldmt1r_value = (ifm << 12) | miftyp;
  598. return 0;
  599. bad:
  600. return -EINVAL;
  601. }
  602. static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
  603. int clock_source,
  604. struct sh_mobile_lcdc_priv *priv)
  605. {
  606. char *str;
  607. int icksel;
  608. switch (clock_source) {
  609. case LCDC_CLK_BUS: str = "bus_clk"; icksel = 0; break;
  610. case LCDC_CLK_PERIPHERAL: str = "peripheral_clk"; icksel = 1; break;
  611. case LCDC_CLK_EXTERNAL: str = NULL; icksel = 2; break;
  612. default:
  613. return -EINVAL;
  614. }
  615. priv->lddckr = icksel << 16;
  616. if (str) {
  617. priv->dot_clk = clk_get(&pdev->dev, str);
  618. if (IS_ERR(priv->dot_clk)) {
  619. dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
  620. return PTR_ERR(priv->dot_clk);
  621. }
  622. }
  623. /* Runtime PM support involves two step for this driver:
  624. * 1) Enable Runtime PM
  625. * 2) Force Runtime PM Resume since hardware is accessed from probe()
  626. */
  627. priv->dev = &pdev->dev;
  628. pm_runtime_enable(priv->dev);
  629. pm_runtime_resume(priv->dev);
  630. return 0;
  631. }
  632. static int sh_mobile_lcdc_setcolreg(u_int regno,
  633. u_int red, u_int green, u_int blue,
  634. u_int transp, struct fb_info *info)
  635. {
  636. u32 *palette = info->pseudo_palette;
  637. if (regno >= PALETTE_NR)
  638. return -EINVAL;
  639. /* only FB_VISUAL_TRUECOLOR supported */
  640. red >>= 16 - info->var.red.length;
  641. green >>= 16 - info->var.green.length;
  642. blue >>= 16 - info->var.blue.length;
  643. transp >>= 16 - info->var.transp.length;
  644. palette[regno] = (red << info->var.red.offset) |
  645. (green << info->var.green.offset) |
  646. (blue << info->var.blue.offset) |
  647. (transp << info->var.transp.offset);
  648. return 0;
  649. }
  650. static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
  651. .id = "SH Mobile LCDC",
  652. .type = FB_TYPE_PACKED_PIXELS,
  653. .visual = FB_VISUAL_TRUECOLOR,
  654. .accel = FB_ACCEL_NONE,
  655. .xpanstep = 0,
  656. .ypanstep = 1,
  657. .ywrapstep = 0,
  658. };
  659. static void sh_mobile_lcdc_fillrect(struct fb_info *info,
  660. const struct fb_fillrect *rect)
  661. {
  662. sys_fillrect(info, rect);
  663. sh_mobile_lcdc_deferred_io_touch(info);
  664. }
  665. static void sh_mobile_lcdc_copyarea(struct fb_info *info,
  666. const struct fb_copyarea *area)
  667. {
  668. sys_copyarea(info, area);
  669. sh_mobile_lcdc_deferred_io_touch(info);
  670. }
  671. static void sh_mobile_lcdc_imageblit(struct fb_info *info,
  672. const struct fb_image *image)
  673. {
  674. sys_imageblit(info, image);
  675. sh_mobile_lcdc_deferred_io_touch(info);
  676. }
  677. static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
  678. struct fb_info *info)
  679. {
  680. struct sh_mobile_lcdc_chan *ch = info->par;
  681. struct sh_mobile_lcdc_priv *priv = ch->lcdc;
  682. unsigned long ldrcntr;
  683. unsigned long new_pan_offset;
  684. new_pan_offset = (var->yoffset * info->fix.line_length) +
  685. (var->xoffset * (info->var.bits_per_pixel / 8));
  686. if (new_pan_offset == ch->pan_offset)
  687. return 0; /* No change, do nothing */
  688. ldrcntr = lcdc_read(priv, _LDRCNTR);
  689. /* Set the source address for the next refresh */
  690. lcdc_write_chan_mirror(ch, LDSA1R, ch->dma_handle + new_pan_offset);
  691. if (lcdc_chan_is_sublcd(ch))
  692. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
  693. else
  694. lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
  695. ch->pan_offset = new_pan_offset;
  696. sh_mobile_lcdc_deferred_io_touch(info);
  697. return 0;
  698. }
  699. static int sh_mobile_wait_for_vsync(struct fb_info *info)
  700. {
  701. struct sh_mobile_lcdc_chan *ch = info->par;
  702. unsigned long ldintr;
  703. int ret;
  704. /* Enable VSync End interrupt */
  705. ldintr = lcdc_read(ch->lcdc, _LDINTR);
  706. ldintr |= LDINTR_VEE;
  707. lcdc_write(ch->lcdc, _LDINTR, ldintr);
  708. ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
  709. msecs_to_jiffies(100));
  710. if (!ret)
  711. return -ETIMEDOUT;
  712. return 0;
  713. }
  714. static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
  715. unsigned long arg)
  716. {
  717. int retval;
  718. switch (cmd) {
  719. case FBIO_WAITFORVSYNC:
  720. retval = sh_mobile_wait_for_vsync(info);
  721. break;
  722. default:
  723. retval = -ENOIOCTLCMD;
  724. break;
  725. }
  726. return retval;
  727. }
  728. static void sh_mobile_fb_reconfig(struct fb_info *info)
  729. {
  730. struct sh_mobile_lcdc_chan *ch = info->par;
  731. struct fb_videomode mode1, mode2;
  732. struct fb_event event;
  733. int evnt = FB_EVENT_MODE_CHANGE_ALL;
  734. if (ch->use_count > 1 || (ch->use_count == 1 && !info->fbcon_par))
  735. /* More framebuffer users are active */
  736. return;
  737. fb_var_to_videomode(&mode1, &ch->display_var);
  738. fb_var_to_videomode(&mode2, &info->var);
  739. if (fb_mode_is_equal(&mode1, &mode2))
  740. return;
  741. /* Display has been re-plugged, framebuffer is free now, reconfigure */
  742. if (fb_set_var(info, &ch->display_var) < 0)
  743. /* Couldn't reconfigure, hopefully, can continue as before */
  744. return;
  745. info->fix.line_length = mode1.xres * (ch->cfg.bpp / 8);
  746. /*
  747. * fb_set_var() calls the notifier change internally, only if
  748. * FBINFO_MISC_USEREVENT flag is set. Since we do not want to fake a
  749. * user event, we have to call the chain ourselves.
  750. */
  751. event.info = info;
  752. event.data = &mode1;
  753. fb_notifier_call_chain(evnt, &event);
  754. }
  755. /*
  756. * Locking: both .fb_release() and .fb_open() are called with info->lock held if
  757. * user == 1, or with console sem held, if user == 0.
  758. */
  759. static int sh_mobile_release(struct fb_info *info, int user)
  760. {
  761. struct sh_mobile_lcdc_chan *ch = info->par;
  762. mutex_lock(&ch->open_lock);
  763. dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
  764. ch->use_count--;
  765. /* Nothing to reconfigure, when called from fbcon */
  766. if (user) {
  767. acquire_console_sem();
  768. sh_mobile_fb_reconfig(info);
  769. release_console_sem();
  770. }
  771. mutex_unlock(&ch->open_lock);
  772. return 0;
  773. }
  774. static int sh_mobile_open(struct fb_info *info, int user)
  775. {
  776. struct sh_mobile_lcdc_chan *ch = info->par;
  777. mutex_lock(&ch->open_lock);
  778. ch->use_count++;
  779. dev_dbg(info->dev, "%s(): %d users\n", __func__, ch->use_count);
  780. mutex_unlock(&ch->open_lock);
  781. return 0;
  782. }
  783. static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  784. {
  785. struct sh_mobile_lcdc_chan *ch = info->par;
  786. struct sh_mobile_lcdc_priv *p = ch->lcdc;
  787. if (var->xres > MAX_XRES || var->yres > MAX_YRES ||
  788. var->xres * var->yres * (ch->cfg.bpp / 8) * 2 > info->fix.smem_len) {
  789. dev_warn(info->dev, "Invalid info: %u-%u-%u-%u x %u-%u-%u-%u @ %lukHz!\n",
  790. var->left_margin, var->xres, var->right_margin, var->hsync_len,
  791. var->upper_margin, var->yres, var->lower_margin, var->vsync_len,
  792. PICOS2KHZ(var->pixclock));
  793. return -EINVAL;
  794. }
  795. /* only accept the forced_bpp for dual channel configurations */
  796. if (p->forced_bpp && p->forced_bpp != var->bits_per_pixel)
  797. return -EINVAL;
  798. switch (var->bits_per_pixel) {
  799. case 16: /* PKF[4:0] = 00011 - RGB 565 */
  800. case 24: /* PKF[4:0] = 01011 - RGB 888 */
  801. case 32: /* PKF[4:0] = 00000 - RGBA 888 */
  802. break;
  803. default:
  804. return -EINVAL;
  805. }
  806. return 0;
  807. }
  808. static struct fb_ops sh_mobile_lcdc_ops = {
  809. .owner = THIS_MODULE,
  810. .fb_setcolreg = sh_mobile_lcdc_setcolreg,
  811. .fb_read = fb_sys_read,
  812. .fb_write = fb_sys_write,
  813. .fb_fillrect = sh_mobile_lcdc_fillrect,
  814. .fb_copyarea = sh_mobile_lcdc_copyarea,
  815. .fb_imageblit = sh_mobile_lcdc_imageblit,
  816. .fb_pan_display = sh_mobile_fb_pan_display,
  817. .fb_ioctl = sh_mobile_ioctl,
  818. .fb_open = sh_mobile_open,
  819. .fb_release = sh_mobile_release,
  820. .fb_check_var = sh_mobile_check_var,
  821. };
  822. static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
  823. {
  824. switch (bpp) {
  825. case 16: /* PKF[4:0] = 00011 - RGB 565 */
  826. var->red.offset = 11;
  827. var->red.length = 5;
  828. var->green.offset = 5;
  829. var->green.length = 6;
  830. var->blue.offset = 0;
  831. var->blue.length = 5;
  832. var->transp.offset = 0;
  833. var->transp.length = 0;
  834. break;
  835. case 24: /* PKF[4:0] = 01011 - RGB 888 */
  836. var->red.offset = 16;
  837. var->red.length = 8;
  838. var->green.offset = 8;
  839. var->green.length = 8;
  840. var->blue.offset = 0;
  841. var->blue.length = 8;
  842. var->transp.offset = 0;
  843. var->transp.length = 0;
  844. break;
  845. case 32: /* PKF[4:0] = 00000 - RGBA 888 */
  846. var->red.offset = 16;
  847. var->red.length = 8;
  848. var->green.offset = 8;
  849. var->green.length = 8;
  850. var->blue.offset = 0;
  851. var->blue.length = 8;
  852. var->transp.offset = 24;
  853. var->transp.length = 8;
  854. break;
  855. default:
  856. return -EINVAL;
  857. }
  858. var->bits_per_pixel = bpp;
  859. var->red.msb_right = 0;
  860. var->green.msb_right = 0;
  861. var->blue.msb_right = 0;
  862. var->transp.msb_right = 0;
  863. return 0;
  864. }
  865. static int sh_mobile_lcdc_suspend(struct device *dev)
  866. {
  867. struct platform_device *pdev = to_platform_device(dev);
  868. sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
  869. return 0;
  870. }
  871. static int sh_mobile_lcdc_resume(struct device *dev)
  872. {
  873. struct platform_device *pdev = to_platform_device(dev);
  874. return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
  875. }
  876. static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
  877. {
  878. struct platform_device *pdev = to_platform_device(dev);
  879. struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
  880. struct sh_mobile_lcdc_chan *ch;
  881. int k, n;
  882. /* save per-channel registers */
  883. for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
  884. ch = &p->ch[k];
  885. if (!ch->enabled)
  886. continue;
  887. for (n = 0; n < NR_CH_REGS; n++)
  888. ch->saved_ch_regs[n] = lcdc_read_chan(ch, n);
  889. }
  890. /* save shared registers */
  891. for (n = 0; n < NR_SHARED_REGS; n++)
  892. p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]);
  893. /* turn off LCDC hardware */
  894. lcdc_write(p, _LDCNT1R, 0);
  895. return 0;
  896. }
  897. static int sh_mobile_lcdc_runtime_resume(struct device *dev)
  898. {
  899. struct platform_device *pdev = to_platform_device(dev);
  900. struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
  901. struct sh_mobile_lcdc_chan *ch;
  902. int k, n;
  903. /* restore per-channel registers */
  904. for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
  905. ch = &p->ch[k];
  906. if (!ch->enabled)
  907. continue;
  908. for (n = 0; n < NR_CH_REGS; n++)
  909. lcdc_write_chan(ch, n, ch->saved_ch_regs[n]);
  910. }
  911. /* restore shared registers */
  912. for (n = 0; n < NR_SHARED_REGS; n++)
  913. lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]);
  914. return 0;
  915. }
  916. static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
  917. .suspend = sh_mobile_lcdc_suspend,
  918. .resume = sh_mobile_lcdc_resume,
  919. .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
  920. .runtime_resume = sh_mobile_lcdc_runtime_resume,
  921. };
  922. /* locking: called with info->lock held */
  923. static int sh_mobile_lcdc_notify(struct notifier_block *nb,
  924. unsigned long action, void *data)
  925. {
  926. struct fb_event *event = data;
  927. struct fb_info *info = event->info;
  928. struct sh_mobile_lcdc_chan *ch = info->par;
  929. struct sh_mobile_lcdc_board_cfg *board_cfg = &ch->cfg.board_cfg;
  930. int ret;
  931. if (&ch->lcdc->notifier != nb)
  932. return NOTIFY_DONE;
  933. dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
  934. __func__, action, event->data);
  935. switch(action) {
  936. case FB_EVENT_SUSPEND:
  937. if (try_module_get(board_cfg->owner) && board_cfg->display_off) {
  938. board_cfg->display_off(board_cfg->board_data);
  939. module_put(board_cfg->owner);
  940. }
  941. pm_runtime_put(info->device);
  942. sh_mobile_lcdc_stop(ch->lcdc);
  943. break;
  944. case FB_EVENT_RESUME:
  945. mutex_lock(&ch->open_lock);
  946. sh_mobile_fb_reconfig(info);
  947. mutex_unlock(&ch->open_lock);
  948. /* HDMI must be enabled before LCDC configuration */
  949. if (try_module_get(board_cfg->owner) && board_cfg->display_on) {
  950. board_cfg->display_on(board_cfg->board_data, info);
  951. module_put(board_cfg->owner);
  952. }
  953. ret = sh_mobile_lcdc_start(ch->lcdc);
  954. if (!ret)
  955. pm_runtime_get_sync(info->device);
  956. }
  957. return NOTIFY_OK;
  958. }
  959. static int sh_mobile_lcdc_remove(struct platform_device *pdev);
  960. static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
  961. {
  962. struct fb_info *info;
  963. struct sh_mobile_lcdc_priv *priv;
  964. struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
  965. struct resource *res;
  966. int error;
  967. void *buf;
  968. int i, j;
  969. if (!pdata) {
  970. dev_err(&pdev->dev, "no platform data defined\n");
  971. return -EINVAL;
  972. }
  973. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  974. i = platform_get_irq(pdev, 0);
  975. if (!res || i < 0) {
  976. dev_err(&pdev->dev, "cannot get platform resources\n");
  977. return -ENOENT;
  978. }
  979. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  980. if (!priv) {
  981. dev_err(&pdev->dev, "cannot allocate device data\n");
  982. return -ENOMEM;
  983. }
  984. platform_set_drvdata(pdev, priv);
  985. error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED,
  986. dev_name(&pdev->dev), priv);
  987. if (error) {
  988. dev_err(&pdev->dev, "unable to request irq\n");
  989. goto err1;
  990. }
  991. priv->irq = i;
  992. atomic_set(&priv->hw_usecnt, -1);
  993. j = 0;
  994. for (i = 0; i < ARRAY_SIZE(pdata->ch); i++) {
  995. struct sh_mobile_lcdc_chan *ch = priv->ch + j;
  996. ch->lcdc = priv;
  997. memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));
  998. error = sh_mobile_lcdc_check_interface(ch);
  999. if (error) {
  1000. dev_err(&pdev->dev, "unsupported interface type\n");
  1001. goto err1;
  1002. }
  1003. init_waitqueue_head(&ch->frame_end_wait);
  1004. init_completion(&ch->vsync_completion);
  1005. ch->pan_offset = 0;
  1006. switch (pdata->ch[i].chan) {
  1007. case LCDC_CHAN_MAINLCD:
  1008. ch->enabled = 1 << 1;
  1009. ch->reg_offs = lcdc_offs_mainlcd;
  1010. j++;
  1011. break;
  1012. case LCDC_CHAN_SUBLCD:
  1013. ch->enabled = 1 << 2;
  1014. ch->reg_offs = lcdc_offs_sublcd;
  1015. j++;
  1016. break;
  1017. }
  1018. }
  1019. if (!j) {
  1020. dev_err(&pdev->dev, "no channels defined\n");
  1021. error = -EINVAL;
  1022. goto err1;
  1023. }
  1024. /* for dual channel LCDC (MAIN + SUB) force shared bpp setting */
  1025. if (j == 2)
  1026. priv->forced_bpp = pdata->ch[0].bpp;
  1027. priv->base = ioremap_nocache(res->start, resource_size(res));
  1028. if (!priv->base)
  1029. goto err1;
  1030. error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
  1031. if (error) {
  1032. dev_err(&pdev->dev, "unable to setup clocks\n");
  1033. goto err1;
  1034. }
  1035. for (i = 0; i < j; i++) {
  1036. struct fb_var_screeninfo *var;
  1037. const struct fb_videomode *lcd_cfg, *max_cfg = NULL;
  1038. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  1039. struct sh_mobile_lcdc_chan_cfg *cfg = &ch->cfg;
  1040. const struct fb_videomode *mode = cfg->lcd_cfg;
  1041. unsigned long max_size = 0;
  1042. int k;
  1043. int num_cfg;
  1044. ch->info = framebuffer_alloc(0, &pdev->dev);
  1045. if (!ch->info) {
  1046. dev_err(&pdev->dev, "unable to allocate fb_info\n");
  1047. error = -ENOMEM;
  1048. break;
  1049. }
  1050. info = ch->info;
  1051. var = &info->var;
  1052. info->fbops = &sh_mobile_lcdc_ops;
  1053. info->par = ch;
  1054. mutex_init(&ch->open_lock);
  1055. for (k = 0, lcd_cfg = mode;
  1056. k < cfg->num_cfg && lcd_cfg;
  1057. k++, lcd_cfg++) {
  1058. unsigned long size = lcd_cfg->yres * lcd_cfg->xres;
  1059. if (size > max_size) {
  1060. max_cfg = lcd_cfg;
  1061. max_size = size;
  1062. }
  1063. }
  1064. if (!mode)
  1065. max_size = MAX_XRES * MAX_YRES;
  1066. else if (max_cfg)
  1067. dev_dbg(&pdev->dev, "Found largest videomode %ux%u\n",
  1068. max_cfg->xres, max_cfg->yres);
  1069. info->fix = sh_mobile_lcdc_fix;
  1070. info->fix.smem_len = max_size * (cfg->bpp / 8) * 2;
  1071. if (!mode) {
  1072. mode = &default_720p;
  1073. num_cfg = 1;
  1074. } else {
  1075. num_cfg = cfg->num_cfg;
  1076. }
  1077. fb_videomode_to_modelist(mode, num_cfg, &info->modelist);
  1078. fb_videomode_to_var(var, mode);
  1079. var->width = cfg->lcd_size_cfg.width;
  1080. var->height = cfg->lcd_size_cfg.height;
  1081. /* Default Y virtual resolution is 2x panel size */
  1082. var->yres_virtual = var->yres * 2;
  1083. var->activate = FB_ACTIVATE_NOW;
  1084. error = sh_mobile_lcdc_set_bpp(var, cfg->bpp);
  1085. if (error)
  1086. break;
  1087. buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
  1088. &ch->dma_handle, GFP_KERNEL);
  1089. if (!buf) {
  1090. dev_err(&pdev->dev, "unable to allocate buffer\n");
  1091. error = -ENOMEM;
  1092. break;
  1093. }
  1094. info->pseudo_palette = &ch->pseudo_palette;
  1095. info->flags = FBINFO_FLAG_DEFAULT;
  1096. error = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
  1097. if (error < 0) {
  1098. dev_err(&pdev->dev, "unable to allocate cmap\n");
  1099. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  1100. buf, ch->dma_handle);
  1101. break;
  1102. }
  1103. info->fix.smem_start = ch->dma_handle;
  1104. info->fix.line_length = var->xres * (cfg->bpp / 8);
  1105. info->screen_base = buf;
  1106. info->device = &pdev->dev;
  1107. ch->display_var = *var;
  1108. }
  1109. if (error)
  1110. goto err1;
  1111. error = sh_mobile_lcdc_start(priv);
  1112. if (error) {
  1113. dev_err(&pdev->dev, "unable to start hardware\n");
  1114. goto err1;
  1115. }
  1116. for (i = 0; i < j; i++) {
  1117. struct sh_mobile_lcdc_chan *ch = priv->ch + i;
  1118. info = ch->info;
  1119. if (info->fbdefio) {
  1120. ch->sglist = vmalloc(sizeof(struct scatterlist) *
  1121. info->fix.smem_len >> PAGE_SHIFT);
  1122. if (!ch->sglist) {
  1123. dev_err(&pdev->dev, "cannot allocate sglist\n");
  1124. goto err1;
  1125. }
  1126. }
  1127. error = register_framebuffer(info);
  1128. if (error < 0)
  1129. goto err1;
  1130. dev_info(info->dev,
  1131. "registered %s/%s as %dx%d %dbpp.\n",
  1132. pdev->name,
  1133. (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
  1134. "mainlcd" : "sublcd",
  1135. info->var.xres, info->var.yres,
  1136. ch->cfg.bpp);
  1137. /* deferred io mode: disable clock to save power */
  1138. if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
  1139. sh_mobile_lcdc_clk_off(priv);
  1140. }
  1141. /* Failure ignored */
  1142. priv->notifier.notifier_call = sh_mobile_lcdc_notify;
  1143. fb_register_client(&priv->notifier);
  1144. return 0;
  1145. err1:
  1146. sh_mobile_lcdc_remove(pdev);
  1147. return error;
  1148. }
  1149. static int sh_mobile_lcdc_remove(struct platform_device *pdev)
  1150. {
  1151. struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
  1152. struct fb_info *info;
  1153. int i;
  1154. fb_unregister_client(&priv->notifier);
  1155. for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
  1156. if (priv->ch[i].info && priv->ch[i].info->dev)
  1157. unregister_framebuffer(priv->ch[i].info);
  1158. sh_mobile_lcdc_stop(priv);
  1159. for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
  1160. info = priv->ch[i].info;
  1161. if (!info || !info->device)
  1162. continue;
  1163. if (priv->ch[i].sglist)
  1164. vfree(priv->ch[i].sglist);
  1165. if (info->screen_base)
  1166. dma_free_coherent(&pdev->dev, info->fix.smem_len,
  1167. info->screen_base,
  1168. priv->ch[i].dma_handle);
  1169. fb_dealloc_cmap(&info->cmap);
  1170. framebuffer_release(info);
  1171. }
  1172. if (priv->dot_clk)
  1173. clk_put(priv->dot_clk);
  1174. if (priv->dev)
  1175. pm_runtime_disable(priv->dev);
  1176. if (priv->base)
  1177. iounmap(priv->base);
  1178. if (priv->irq)
  1179. free_irq(priv->irq, priv);
  1180. kfree(priv);
  1181. return 0;
  1182. }
  1183. static struct platform_driver sh_mobile_lcdc_driver = {
  1184. .driver = {
  1185. .name = "sh_mobile_lcdc_fb",
  1186. .owner = THIS_MODULE,
  1187. .pm = &sh_mobile_lcdc_dev_pm_ops,
  1188. },
  1189. .probe = sh_mobile_lcdc_probe,
  1190. .remove = sh_mobile_lcdc_remove,
  1191. };
  1192. static int __init sh_mobile_lcdc_init(void)
  1193. {
  1194. return platform_driver_register(&sh_mobile_lcdc_driver);
  1195. }
  1196. static void __exit sh_mobile_lcdc_exit(void)
  1197. {
  1198. platform_driver_unregister(&sh_mobile_lcdc_driver);
  1199. }
  1200. module_init(sh_mobile_lcdc_init);
  1201. module_exit(sh_mobile_lcdc_exit);
  1202. MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
  1203. MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
  1204. MODULE_LICENSE("GPL v2");