omap2430.c 13 KB

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  1. /*
  2. * Copyright (C) 2005-2007 by Texas Instruments
  3. * Some code has been taken from tusb6010.c
  4. * Copyrights for that are attributable to:
  5. * Copyright (C) 2006 Nokia Corporation
  6. * Tony Lindgren <tony@atomide.com>
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * The Inventra Controller Driver for Linux is free software; you
  11. * can redistribute it and/or modify it under the terms of the GNU
  12. * General Public License version 2 as published by the Free Software
  13. * Foundation.
  14. *
  15. * The Inventra Controller Driver for Linux is distributed in
  16. * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17. * without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  19. * License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with The Inventra Controller Driver for Linux ; if not,
  23. * write to the Free Software Foundation, Inc., 59 Temple Place,
  24. * Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/sched.h>
  30. #include <linux/init.h>
  31. #include <linux/list.h>
  32. #include <linux/clk.h>
  33. #include <linux/io.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/dma-mapping.h>
  36. #include "musb_core.h"
  37. #include "omap2430.h"
  38. struct omap2430_glue {
  39. struct device *dev;
  40. struct platform_device *musb;
  41. struct clk *clk;
  42. };
  43. #define glue_to_musb(g) platform_get_drvdata(g->musb)
  44. static struct timer_list musb_idle_timer;
  45. static void musb_do_idle(unsigned long _musb)
  46. {
  47. struct musb *musb = (void *)_musb;
  48. unsigned long flags;
  49. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  50. u8 power;
  51. #endif
  52. u8 devctl;
  53. spin_lock_irqsave(&musb->lock, flags);
  54. switch (musb->xceiv->state) {
  55. case OTG_STATE_A_WAIT_BCON:
  56. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  57. if (devctl & MUSB_DEVCTL_BDEVICE) {
  58. musb->xceiv->state = OTG_STATE_B_IDLE;
  59. MUSB_DEV_MODE(musb);
  60. } else {
  61. musb->xceiv->state = OTG_STATE_A_IDLE;
  62. MUSB_HST_MODE(musb);
  63. }
  64. break;
  65. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  66. case OTG_STATE_A_SUSPEND:
  67. /* finish RESUME signaling? */
  68. if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  69. power = musb_readb(musb->mregs, MUSB_POWER);
  70. power &= ~MUSB_POWER_RESUME;
  71. DBG(1, "root port resume stopped, power %02x\n", power);
  72. musb_writeb(musb->mregs, MUSB_POWER, power);
  73. musb->is_active = 1;
  74. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  75. | MUSB_PORT_STAT_RESUME);
  76. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  77. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  78. /* NOTE: it might really be A_WAIT_BCON ... */
  79. musb->xceiv->state = OTG_STATE_A_HOST;
  80. }
  81. break;
  82. #endif
  83. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  84. case OTG_STATE_A_HOST:
  85. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  86. if (devctl & MUSB_DEVCTL_BDEVICE)
  87. musb->xceiv->state = OTG_STATE_B_IDLE;
  88. else
  89. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  90. #endif
  91. default:
  92. break;
  93. }
  94. spin_unlock_irqrestore(&musb->lock, flags);
  95. }
  96. static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
  97. {
  98. unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
  99. static unsigned long last_timer;
  100. if (timeout == 0)
  101. timeout = default_timeout;
  102. /* Never idle if active, or when VBUS timeout is not set as host */
  103. if (musb->is_active || ((musb->a_wait_bcon == 0)
  104. && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
  105. DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
  106. del_timer(&musb_idle_timer);
  107. last_timer = jiffies;
  108. return;
  109. }
  110. if (time_after(last_timer, timeout)) {
  111. if (!timer_pending(&musb_idle_timer))
  112. last_timer = timeout;
  113. else {
  114. DBG(4, "Longer idle timer already pending, ignoring\n");
  115. return;
  116. }
  117. }
  118. last_timer = timeout;
  119. DBG(4, "%s inactive, for idle timer for %lu ms\n",
  120. otg_state_string(musb),
  121. (unsigned long)jiffies_to_msecs(timeout - jiffies));
  122. mod_timer(&musb_idle_timer, timeout);
  123. }
  124. static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
  125. {
  126. u8 devctl;
  127. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  128. int ret = 1;
  129. /* HDRC controls CPEN, but beware current surges during device
  130. * connect. They can trigger transient overcurrent conditions
  131. * that must be ignored.
  132. */
  133. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  134. if (is_on) {
  135. if (musb->xceiv->state == OTG_STATE_A_IDLE) {
  136. /* start the session */
  137. devctl |= MUSB_DEVCTL_SESSION;
  138. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  139. /*
  140. * Wait for the musb to set as A device to enable the
  141. * VBUS
  142. */
  143. while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
  144. cpu_relax();
  145. if (time_after(jiffies, timeout)) {
  146. dev_err(musb->controller,
  147. "configured as A device timeout");
  148. ret = -EINVAL;
  149. break;
  150. }
  151. }
  152. if (ret && musb->xceiv->set_vbus)
  153. otg_set_vbus(musb->xceiv, 1);
  154. } else {
  155. musb->is_active = 1;
  156. musb->xceiv->default_a = 1;
  157. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  158. devctl |= MUSB_DEVCTL_SESSION;
  159. MUSB_HST_MODE(musb);
  160. }
  161. } else {
  162. musb->is_active = 0;
  163. /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
  164. * jumping right to B_IDLE...
  165. */
  166. musb->xceiv->default_a = 0;
  167. musb->xceiv->state = OTG_STATE_B_IDLE;
  168. devctl &= ~MUSB_DEVCTL_SESSION;
  169. MUSB_DEV_MODE(musb);
  170. }
  171. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  172. DBG(1, "VBUS %s, devctl %02x "
  173. /* otg %3x conf %08x prcm %08x */ "\n",
  174. otg_state_string(musb),
  175. musb_readb(musb->mregs, MUSB_DEVCTL));
  176. }
  177. static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
  178. {
  179. u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  180. devctl |= MUSB_DEVCTL_SESSION;
  181. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  182. return 0;
  183. }
  184. static inline void omap2430_low_level_exit(struct musb *musb)
  185. {
  186. u32 l;
  187. /* in any role */
  188. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  189. l |= ENABLEFORCE; /* enable MSTANDBY */
  190. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  191. l = musb_readl(musb->mregs, OTG_SYSCONFIG);
  192. l |= ENABLEWAKEUP; /* enable wakeup */
  193. musb_writel(musb->mregs, OTG_SYSCONFIG, l);
  194. }
  195. static inline void omap2430_low_level_init(struct musb *musb)
  196. {
  197. u32 l;
  198. l = musb_readl(musb->mregs, OTG_SYSCONFIG);
  199. l &= ~ENABLEWAKEUP; /* disable wakeup */
  200. musb_writel(musb->mregs, OTG_SYSCONFIG, l);
  201. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  202. l &= ~ENABLEFORCE; /* disable MSTANDBY */
  203. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  204. }
  205. /* blocking notifier support */
  206. static int musb_otg_notifications(struct notifier_block *nb,
  207. unsigned long event, void *unused)
  208. {
  209. struct musb *musb = container_of(nb, struct musb, nb);
  210. struct device *dev = musb->controller;
  211. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  212. struct omap_musb_board_data *data = pdata->board_data;
  213. switch (event) {
  214. case USB_EVENT_ID:
  215. DBG(4, "ID GND\n");
  216. if (is_otg_enabled(musb)) {
  217. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  218. if (musb->gadget_driver) {
  219. otg_init(musb->xceiv);
  220. if (data->interface_type ==
  221. MUSB_INTERFACE_UTMI)
  222. omap2430_musb_set_vbus(musb, 1);
  223. }
  224. #endif
  225. } else {
  226. otg_init(musb->xceiv);
  227. if (data->interface_type ==
  228. MUSB_INTERFACE_UTMI)
  229. omap2430_musb_set_vbus(musb, 1);
  230. }
  231. break;
  232. case USB_EVENT_VBUS:
  233. DBG(4, "VBUS Connect\n");
  234. otg_init(musb->xceiv);
  235. break;
  236. case USB_EVENT_NONE:
  237. DBG(4, "VBUS Disconnect\n");
  238. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  239. if (musb->xceiv->set_vbus)
  240. otg_set_vbus(musb->xceiv, 0);
  241. }
  242. otg_shutdown(musb->xceiv);
  243. break;
  244. default:
  245. DBG(4, "ID float\n");
  246. return NOTIFY_DONE;
  247. }
  248. return NOTIFY_OK;
  249. }
  250. static int omap2430_musb_init(struct musb *musb)
  251. {
  252. u32 l, status = 0;
  253. struct device *dev = musb->controller;
  254. struct musb_hdrc_platform_data *plat = dev->platform_data;
  255. struct omap_musb_board_data *data = plat->board_data;
  256. /* We require some kind of external transceiver, hooked
  257. * up through ULPI. TWL4030-family PMICs include one,
  258. * which needs a driver, drivers aren't always needed.
  259. */
  260. musb->xceiv = otg_get_transceiver();
  261. if (!musb->xceiv) {
  262. pr_err("HS USB OTG: no transceiver configured\n");
  263. return -ENODEV;
  264. }
  265. omap2430_low_level_init(musb);
  266. l = musb_readl(musb->mregs, OTG_SYSCONFIG);
  267. l &= ~ENABLEWAKEUP; /* disable wakeup */
  268. l &= ~NOSTDBY; /* remove possible nostdby */
  269. l |= SMARTSTDBY; /* enable smart standby */
  270. l &= ~AUTOIDLE; /* disable auto idle */
  271. l &= ~NOIDLE; /* remove possible noidle */
  272. l |= SMARTIDLE; /* enable smart idle */
  273. /*
  274. * MUSB AUTOIDLE don't work in 3430.
  275. * Workaround by Richard Woodruff/TI
  276. */
  277. if (!cpu_is_omap3430())
  278. l |= AUTOIDLE; /* enable auto idle */
  279. musb_writel(musb->mregs, OTG_SYSCONFIG, l);
  280. l = musb_readl(musb->mregs, OTG_INTERFSEL);
  281. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  282. /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
  283. l &= ~ULPI_12PIN; /* Disable ULPI */
  284. l |= UTMI_8BIT; /* Enable UTMI */
  285. } else {
  286. l |= ULPI_12PIN;
  287. }
  288. musb_writel(musb->mregs, OTG_INTERFSEL, l);
  289. pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
  290. "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
  291. musb_readl(musb->mregs, OTG_REVISION),
  292. musb_readl(musb->mregs, OTG_SYSCONFIG),
  293. musb_readl(musb->mregs, OTG_SYSSTATUS),
  294. musb_readl(musb->mregs, OTG_INTERFSEL),
  295. musb_readl(musb->mregs, OTG_SIMENABLE));
  296. musb->nb.notifier_call = musb_otg_notifications;
  297. status = otg_register_notifier(musb->xceiv, &musb->nb);
  298. if (status)
  299. DBG(1, "notification register failed\n");
  300. /* check whether cable is already connected */
  301. if (musb->xceiv->state ==OTG_STATE_B_IDLE)
  302. musb_otg_notifications(&musb->nb, 1,
  303. musb->xceiv->gadget);
  304. setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
  305. return 0;
  306. }
  307. static int omap2430_musb_exit(struct musb *musb)
  308. {
  309. omap2430_low_level_exit(musb);
  310. otg_put_transceiver(musb->xceiv);
  311. return 0;
  312. }
  313. static const struct musb_platform_ops omap2430_ops = {
  314. .init = omap2430_musb_init,
  315. .exit = omap2430_musb_exit,
  316. .set_mode = omap2430_musb_set_mode,
  317. .try_idle = omap2430_musb_try_idle,
  318. .set_vbus = omap2430_musb_set_vbus,
  319. };
  320. static u64 omap2430_dmamask = DMA_BIT_MASK(32);
  321. static int __init omap2430_probe(struct platform_device *pdev)
  322. {
  323. struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
  324. struct platform_device *musb;
  325. struct omap2430_glue *glue;
  326. struct clk *clk;
  327. int ret = -ENOMEM;
  328. glue = kzalloc(sizeof(*glue), GFP_KERNEL);
  329. if (!glue) {
  330. dev_err(&pdev->dev, "failed to allocate glue context\n");
  331. goto err0;
  332. }
  333. musb = platform_device_alloc("musb-hdrc", -1);
  334. if (!musb) {
  335. dev_err(&pdev->dev, "failed to allocate musb device\n");
  336. goto err1;
  337. }
  338. clk = clk_get(&pdev->dev, "ick");
  339. if (IS_ERR(clk)) {
  340. dev_err(&pdev->dev, "failed to get clock\n");
  341. ret = PTR_ERR(clk);
  342. goto err2;
  343. }
  344. ret = clk_enable(clk);
  345. if (ret) {
  346. dev_err(&pdev->dev, "failed to enable clock\n");
  347. goto err3;
  348. }
  349. musb->dev.parent = &pdev->dev;
  350. musb->dev.dma_mask = &omap2430_dmamask;
  351. musb->dev.coherent_dma_mask = omap2430_dmamask;
  352. glue->dev = &pdev->dev;
  353. glue->musb = musb;
  354. glue->clk = clk;
  355. pdata->platform_ops = &omap2430_ops;
  356. platform_set_drvdata(pdev, glue);
  357. ret = platform_device_add_resources(musb, pdev->resource,
  358. pdev->num_resources);
  359. if (ret) {
  360. dev_err(&pdev->dev, "failed to add resources\n");
  361. goto err4;
  362. }
  363. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  364. if (ret) {
  365. dev_err(&pdev->dev, "failed to add platform_data\n");
  366. goto err4;
  367. }
  368. ret = platform_device_add(musb);
  369. if (ret) {
  370. dev_err(&pdev->dev, "failed to register musb device\n");
  371. goto err4;
  372. }
  373. return 0;
  374. err4:
  375. clk_disable(clk);
  376. err3:
  377. clk_put(clk);
  378. err2:
  379. platform_device_put(musb);
  380. err1:
  381. kfree(glue);
  382. err0:
  383. return ret;
  384. }
  385. static int __exit omap2430_remove(struct platform_device *pdev)
  386. {
  387. struct omap2430_glue *glue = platform_get_drvdata(pdev);
  388. platform_device_del(glue->musb);
  389. platform_device_put(glue->musb);
  390. clk_disable(glue->clk);
  391. clk_put(glue->clk);
  392. kfree(glue);
  393. return 0;
  394. }
  395. #ifdef CONFIG_PM
  396. static void omap2430_save_context(struct musb *musb)
  397. {
  398. musb->context.otg_sysconfig = musb_readl(musb->mregs, OTG_SYSCONFIG);
  399. musb->context.otg_forcestandby = musb_readl(musb->mregs, OTG_FORCESTDBY);
  400. }
  401. static void omap2430_restore_context(struct musb *musb)
  402. {
  403. musb_writel(musb->mregs, OTG_SYSCONFIG, musb->context.otg_sysconfig);
  404. musb_writel(musb->mregs, OTG_FORCESTDBY, musb->context.otg_forcestandby);
  405. }
  406. static int omap2430_suspend(struct device *dev)
  407. {
  408. struct omap2430_glue *glue = dev_get_drvdata(dev);
  409. struct musb *musb = glue_to_musb(glue);
  410. omap2430_low_level_exit(musb);
  411. otg_set_suspend(musb->xceiv, 1);
  412. omap2430_save_context(musb);
  413. clk_disable(glue->clk);
  414. return 0;
  415. }
  416. static int omap2430_resume(struct device *dev)
  417. {
  418. struct omap2430_glue *glue = dev_get_drvdata(dev);
  419. struct musb *musb = glue_to_musb(glue);
  420. int ret;
  421. ret = clk_enable(glue->clk);
  422. if (ret) {
  423. dev_err(dev, "faled to enable clock\n");
  424. return ret;
  425. }
  426. omap2430_low_level_init(musb);
  427. omap2430_restore_context(musb);
  428. otg_set_suspend(musb->xceiv, 0);
  429. return 0;
  430. }
  431. static struct dev_pm_ops omap2430_pm_ops = {
  432. .suspend = omap2430_suspend,
  433. .resume = omap2430_resume,
  434. };
  435. #define DEV_PM_OPS (&omap2430_pm_ops)
  436. #else
  437. #define DEV_PM_OPS NULL
  438. #endif
  439. static struct platform_driver omap2430_driver = {
  440. .remove = __exit_p(omap2430_remove),
  441. .driver = {
  442. .name = "musb-omap2430",
  443. .pm = DEV_PM_OPS,
  444. },
  445. };
  446. MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
  447. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  448. MODULE_LICENSE("GPL v2");
  449. static int __init omap2430_init(void)
  450. {
  451. return platform_driver_probe(&omap2430_driver, omap2430_probe);
  452. }
  453. subsys_initcall(omap2430_init);
  454. static void __exit omap2430_exit(void)
  455. {
  456. platform_driver_unregister(&omap2430_driver);
  457. }
  458. module_exit(omap2430_exit);