musb_core.h 17 KB

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  1. /*
  2. * MUSB OTG driver defines
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  25. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. */
  34. #ifndef __MUSB_CORE_H__
  35. #define __MUSB_CORE_H__
  36. #include <linux/slab.h>
  37. #include <linux/list.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/errno.h>
  40. #include <linux/timer.h>
  41. #include <linux/clk.h>
  42. #include <linux/device.h>
  43. #include <linux/usb/ch9.h>
  44. #include <linux/usb/gadget.h>
  45. #include <linux/usb.h>
  46. #include <linux/usb/otg.h>
  47. #include <linux/usb/musb.h>
  48. struct musb;
  49. struct musb_hw_ep;
  50. struct musb_ep;
  51. /* Helper defines for struct musb->hwvers */
  52. #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
  53. #define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
  54. #define MUSB_HWVERS_RC 0x8000
  55. #define MUSB_HWVERS_1300 0x52C
  56. #define MUSB_HWVERS_1400 0x590
  57. #define MUSB_HWVERS_1800 0x720
  58. #define MUSB_HWVERS_1900 0x784
  59. #define MUSB_HWVERS_2000 0x800
  60. #include "musb_debug.h"
  61. #include "musb_dma.h"
  62. #include "musb_io.h"
  63. #include "musb_regs.h"
  64. #include "musb_gadget.h"
  65. #include <linux/usb/hcd.h>
  66. #include "musb_host.h"
  67. #ifdef CONFIG_USB_MUSB_OTG
  68. #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
  69. #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
  70. #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
  71. /* NOTE: otg and peripheral-only state machines start at B_IDLE.
  72. * OTG or host-only go to A_IDLE when ID is sensed.
  73. */
  74. #define is_peripheral_active(m) (!(m)->is_host)
  75. #define is_host_active(m) ((m)->is_host)
  76. #else
  77. #define is_peripheral_enabled(musb) is_peripheral_capable()
  78. #define is_host_enabled(musb) is_host_capable()
  79. #define is_otg_enabled(musb) 0
  80. #define is_peripheral_active(musb) is_peripheral_capable()
  81. #define is_host_active(musb) is_host_capable()
  82. #endif
  83. #if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL)
  84. /* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
  85. * override that choice selection (often USB_GADGET_DUMMY_HCD).
  86. */
  87. #ifndef CONFIG_USB_GADGET_MUSB_HDRC
  88. #error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
  89. #endif
  90. #endif /* need MUSB gadget selection */
  91. #ifndef CONFIG_HAVE_CLK
  92. /* Dummy stub for clk framework */
  93. #define clk_get(dev, id) NULL
  94. #define clk_put(clock) do {} while (0)
  95. #define clk_enable(clock) do {} while (0)
  96. #define clk_disable(clock) do {} while (0)
  97. #endif
  98. #ifdef CONFIG_PROC_FS
  99. #include <linux/fs.h>
  100. #define MUSB_CONFIG_PROC_FS
  101. #endif
  102. /****************************** PERIPHERAL ROLE *****************************/
  103. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  104. #define is_peripheral_capable() (1)
  105. extern irqreturn_t musb_g_ep0_irq(struct musb *);
  106. extern void musb_g_tx(struct musb *, u8);
  107. extern void musb_g_rx(struct musb *, u8);
  108. extern void musb_g_reset(struct musb *);
  109. extern void musb_g_suspend(struct musb *);
  110. extern void musb_g_resume(struct musb *);
  111. extern void musb_g_wakeup(struct musb *);
  112. extern void musb_g_disconnect(struct musb *);
  113. #else
  114. #define is_peripheral_capable() (0)
  115. static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
  116. static inline void musb_g_reset(struct musb *m) {}
  117. static inline void musb_g_suspend(struct musb *m) {}
  118. static inline void musb_g_resume(struct musb *m) {}
  119. static inline void musb_g_wakeup(struct musb *m) {}
  120. static inline void musb_g_disconnect(struct musb *m) {}
  121. #endif
  122. /****************************** HOST ROLE ***********************************/
  123. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  124. #define is_host_capable() (1)
  125. extern irqreturn_t musb_h_ep0_irq(struct musb *);
  126. extern void musb_host_tx(struct musb *, u8);
  127. extern void musb_host_rx(struct musb *, u8);
  128. #else
  129. #define is_host_capable() (0)
  130. static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
  131. static inline void musb_host_tx(struct musb *m, u8 e) {}
  132. static inline void musb_host_rx(struct musb *m, u8 e) {}
  133. #endif
  134. /****************************** CONSTANTS ********************************/
  135. #ifndef MUSB_C_NUM_EPS
  136. #define MUSB_C_NUM_EPS ((u8)16)
  137. #endif
  138. #ifndef MUSB_MAX_END0_PACKET
  139. #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
  140. #endif
  141. /* host side ep0 states */
  142. enum musb_h_ep0_state {
  143. MUSB_EP0_IDLE,
  144. MUSB_EP0_START, /* expect ack of setup */
  145. MUSB_EP0_IN, /* expect IN DATA */
  146. MUSB_EP0_OUT, /* expect ack of OUT DATA */
  147. MUSB_EP0_STATUS, /* expect ack of STATUS */
  148. } __attribute__ ((packed));
  149. /* peripheral side ep0 states */
  150. enum musb_g_ep0_state {
  151. MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
  152. MUSB_EP0_STAGE_SETUP, /* received SETUP */
  153. MUSB_EP0_STAGE_TX, /* IN data */
  154. MUSB_EP0_STAGE_RX, /* OUT data */
  155. MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
  156. MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
  157. MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
  158. } __attribute__ ((packed));
  159. /*
  160. * OTG protocol constants. See USB OTG 1.3 spec,
  161. * sections 5.5 "Device Timings" and 6.6.5 "Timers".
  162. */
  163. #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
  164. #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
  165. #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
  166. #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
  167. /*************************** REGISTER ACCESS ********************************/
  168. /* Endpoint registers (other than dynfifo setup) can be accessed either
  169. * directly with the "flat" model, or after setting up an index register.
  170. */
  171. #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \
  172. || defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN) \
  173. || defined(CONFIG_ARCH_OMAP4)
  174. /* REVISIT indexed access seemed to
  175. * misbehave (on DaVinci) for at least peripheral IN ...
  176. */
  177. #define MUSB_FLAT_REG
  178. #endif
  179. /* TUSB mapping: "flat" plus ep0 special cases */
  180. #if defined(CONFIG_USB_MUSB_TUSB6010)
  181. #define musb_ep_select(_mbase, _epnum) \
  182. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  183. #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
  184. /* "flat" mapping: each endpoint has its own i/o address */
  185. #elif defined(MUSB_FLAT_REG)
  186. #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
  187. #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
  188. /* "indexed" mapping: INDEX register controls register bank select */
  189. #else
  190. #define musb_ep_select(_mbase, _epnum) \
  191. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  192. #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
  193. #endif
  194. /****************************** FUNCTIONS ********************************/
  195. #define MUSB_HST_MODE(_musb)\
  196. { (_musb)->is_host = true; }
  197. #define MUSB_DEV_MODE(_musb) \
  198. { (_musb)->is_host = false; }
  199. #define test_devctl_hst_mode(_x) \
  200. (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
  201. #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
  202. /******************************** TYPES *************************************/
  203. /**
  204. * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
  205. * @init: turns on clocks, sets up platform-specific registers, etc
  206. * @exit: undoes @init
  207. * @set_mode: forcefully changes operating mode
  208. * @try_ilde: tries to idle the IP
  209. * @vbus_status: returns vbus status if possible
  210. * @set_vbus: forces vbus status
  211. */
  212. struct musb_platform_ops {
  213. int (*init)(struct musb *musb);
  214. int (*exit)(struct musb *musb);
  215. void (*enable)(struct musb *musb);
  216. void (*disable)(struct musb *musb);
  217. int (*set_mode)(struct musb *musb, u8 mode);
  218. void (*try_idle)(struct musb *musb, unsigned long timeout);
  219. int (*vbus_status)(struct musb *musb);
  220. void (*set_vbus)(struct musb *musb, int on);
  221. };
  222. /*
  223. * struct musb_hw_ep - endpoint hardware (bidirectional)
  224. *
  225. * Ordered slightly for better cacheline locality.
  226. */
  227. struct musb_hw_ep {
  228. struct musb *musb;
  229. void __iomem *fifo;
  230. void __iomem *regs;
  231. #ifdef CONFIG_USB_MUSB_TUSB6010
  232. void __iomem *conf;
  233. #endif
  234. /* index in musb->endpoints[] */
  235. u8 epnum;
  236. /* hardware configuration, possibly dynamic */
  237. bool is_shared_fifo;
  238. bool tx_double_buffered;
  239. bool rx_double_buffered;
  240. u16 max_packet_sz_tx;
  241. u16 max_packet_sz_rx;
  242. struct dma_channel *tx_channel;
  243. struct dma_channel *rx_channel;
  244. #ifdef CONFIG_USB_MUSB_TUSB6010
  245. /* TUSB has "asynchronous" and "synchronous" dma modes */
  246. dma_addr_t fifo_async;
  247. dma_addr_t fifo_sync;
  248. void __iomem *fifo_sync_va;
  249. #endif
  250. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  251. void __iomem *target_regs;
  252. /* currently scheduled peripheral endpoint */
  253. struct musb_qh *in_qh;
  254. struct musb_qh *out_qh;
  255. u8 rx_reinit;
  256. u8 tx_reinit;
  257. #endif
  258. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  259. /* peripheral side */
  260. struct musb_ep ep_in; /* TX */
  261. struct musb_ep ep_out; /* RX */
  262. #endif
  263. };
  264. static inline struct usb_request *next_in_request(struct musb_hw_ep *hw_ep)
  265. {
  266. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  267. return next_request(&hw_ep->ep_in);
  268. #else
  269. return NULL;
  270. #endif
  271. }
  272. static inline struct usb_request *next_out_request(struct musb_hw_ep *hw_ep)
  273. {
  274. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  275. return next_request(&hw_ep->ep_out);
  276. #else
  277. return NULL;
  278. #endif
  279. }
  280. struct musb_csr_regs {
  281. /* FIFO registers */
  282. u16 txmaxp, txcsr, rxmaxp, rxcsr;
  283. u16 rxfifoadd, txfifoadd;
  284. u8 txtype, txinterval, rxtype, rxinterval;
  285. u8 rxfifosz, txfifosz;
  286. u8 txfunaddr, txhubaddr, txhubport;
  287. u8 rxfunaddr, rxhubaddr, rxhubport;
  288. };
  289. struct musb_context_registers {
  290. #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
  291. defined(CONFIG_ARCH_OMAP4)
  292. u32 otg_sysconfig, otg_forcestandby;
  293. #endif
  294. u8 power;
  295. u16 intrtxe, intrrxe;
  296. u8 intrusbe;
  297. u16 frame;
  298. u8 index, testmode;
  299. u8 devctl, busctl, misc;
  300. struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
  301. };
  302. /*
  303. * struct musb - Driver instance data.
  304. */
  305. struct musb {
  306. /* device lock */
  307. spinlock_t lock;
  308. const struct musb_platform_ops *ops;
  309. struct musb_context_registers context;
  310. irqreturn_t (*isr)(int, void *);
  311. struct work_struct irq_work;
  312. u16 hwvers;
  313. /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
  314. #define MUSB_PORT_STAT_RESUME (1 << 31)
  315. u32 port1_status;
  316. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  317. unsigned long rh_timer;
  318. enum musb_h_ep0_state ep0_stage;
  319. /* bulk traffic normally dedicates endpoint hardware, and each
  320. * direction has its own ring of host side endpoints.
  321. * we try to progress the transfer at the head of each endpoint's
  322. * queue until it completes or NAKs too much; then we try the next
  323. * endpoint.
  324. */
  325. struct musb_hw_ep *bulk_ep;
  326. struct list_head control; /* of musb_qh */
  327. struct list_head in_bulk; /* of musb_qh */
  328. struct list_head out_bulk; /* of musb_qh */
  329. struct timer_list otg_timer;
  330. #endif
  331. struct notifier_block nb;
  332. struct dma_controller *dma_controller;
  333. struct device *controller;
  334. void __iomem *ctrl_base;
  335. void __iomem *mregs;
  336. #ifdef CONFIG_USB_MUSB_TUSB6010
  337. dma_addr_t async;
  338. dma_addr_t sync;
  339. void __iomem *sync_va;
  340. #endif
  341. /* passed down from chip/board specific irq handlers */
  342. u8 int_usb;
  343. u16 int_rx;
  344. u16 int_tx;
  345. struct otg_transceiver *xceiv;
  346. int nIrq;
  347. unsigned irq_wake:1;
  348. struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
  349. #define control_ep endpoints
  350. #define VBUSERR_RETRY_COUNT 3
  351. u16 vbuserr_retry;
  352. u16 epmask;
  353. u8 nr_endpoints;
  354. u8 board_mode; /* enum musb_mode */
  355. int (*board_set_power)(int state);
  356. u8 min_power; /* vbus for periph, in mA/2 */
  357. bool is_host;
  358. int a_wait_bcon; /* VBUS timeout in msecs */
  359. unsigned long idle_timeout; /* Next timeout in jiffies */
  360. /* active means connected and not suspended */
  361. unsigned is_active:1;
  362. unsigned is_multipoint:1;
  363. unsigned ignore_disconnect:1; /* during bus resets */
  364. unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
  365. unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
  366. unsigned dyn_fifo:1; /* dynamic FIFO supported? */
  367. unsigned bulk_split:1;
  368. #define can_bulk_split(musb,type) \
  369. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
  370. unsigned bulk_combine:1;
  371. #define can_bulk_combine(musb,type) \
  372. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
  373. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  374. /* is_suspended means USB B_PERIPHERAL suspend */
  375. unsigned is_suspended:1;
  376. /* may_wakeup means remote wakeup is enabled */
  377. unsigned may_wakeup:1;
  378. /* is_self_powered is reported in device status and the
  379. * config descriptor. is_bus_powered means B_PERIPHERAL
  380. * draws some VBUS current; both can be true.
  381. */
  382. unsigned is_self_powered:1;
  383. unsigned is_bus_powered:1;
  384. unsigned set_address:1;
  385. unsigned test_mode:1;
  386. unsigned softconnect:1;
  387. u8 address;
  388. u8 test_mode_nr;
  389. u16 ackpend; /* ep0 */
  390. enum musb_g_ep0_state ep0_state;
  391. struct usb_gadget g; /* the gadget */
  392. struct usb_gadget_driver *gadget_driver; /* its driver */
  393. #endif
  394. struct musb_hdrc_config *config;
  395. #ifdef MUSB_CONFIG_PROC_FS
  396. struct proc_dir_entry *proc_entry;
  397. #endif
  398. };
  399. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  400. static inline struct musb *gadget_to_musb(struct usb_gadget *g)
  401. {
  402. return container_of(g, struct musb, g);
  403. }
  404. #endif
  405. #ifdef CONFIG_BLACKFIN
  406. static inline int musb_read_fifosize(struct musb *musb,
  407. struct musb_hw_ep *hw_ep, u8 epnum)
  408. {
  409. musb->nr_endpoints++;
  410. musb->epmask |= (1 << epnum);
  411. if (epnum < 5) {
  412. hw_ep->max_packet_sz_tx = 128;
  413. hw_ep->max_packet_sz_rx = 128;
  414. } else {
  415. hw_ep->max_packet_sz_tx = 1024;
  416. hw_ep->max_packet_sz_rx = 1024;
  417. }
  418. hw_ep->is_shared_fifo = false;
  419. return 0;
  420. }
  421. static inline void musb_configure_ep0(struct musb *musb)
  422. {
  423. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  424. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  425. musb->endpoints[0].is_shared_fifo = true;
  426. }
  427. #else
  428. static inline int musb_read_fifosize(struct musb *musb,
  429. struct musb_hw_ep *hw_ep, u8 epnum)
  430. {
  431. void *mbase = musb->mregs;
  432. u8 reg = 0;
  433. /* read from core using indexed model */
  434. reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
  435. /* 0's returned when no more endpoints */
  436. if (!reg)
  437. return -ENODEV;
  438. musb->nr_endpoints++;
  439. musb->epmask |= (1 << epnum);
  440. hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
  441. /* shared TX/RX FIFO? */
  442. if ((reg & 0xf0) == 0xf0) {
  443. hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
  444. hw_ep->is_shared_fifo = true;
  445. return 0;
  446. } else {
  447. hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
  448. hw_ep->is_shared_fifo = false;
  449. }
  450. return 0;
  451. }
  452. static inline void musb_configure_ep0(struct musb *musb)
  453. {
  454. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  455. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  456. musb->endpoints[0].is_shared_fifo = true;
  457. }
  458. #endif /* CONFIG_BLACKFIN */
  459. /***************************** Glue it together *****************************/
  460. extern const char musb_driver_name[];
  461. extern void musb_start(struct musb *musb);
  462. extern void musb_stop(struct musb *musb);
  463. extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
  464. extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
  465. extern void musb_load_testpacket(struct musb *);
  466. extern irqreturn_t musb_interrupt(struct musb *);
  467. extern void musb_hnp_stop(struct musb *musb);
  468. static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
  469. {
  470. if (musb->ops->set_vbus)
  471. musb->ops->set_vbus(musb, is_on);
  472. }
  473. static inline void musb_platform_enable(struct musb *musb)
  474. {
  475. if (musb->ops->enable)
  476. musb->ops->enable(musb);
  477. }
  478. static inline void musb_platform_disable(struct musb *musb)
  479. {
  480. if (musb->ops->disable)
  481. musb->ops->disable(musb);
  482. }
  483. static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
  484. {
  485. if (!musb->ops->set_mode)
  486. return 0;
  487. return musb->ops->set_mode(musb, mode);
  488. }
  489. static inline void musb_platform_try_idle(struct musb *musb,
  490. unsigned long timeout)
  491. {
  492. if (musb->ops->try_idle)
  493. musb->ops->try_idle(musb, timeout);
  494. }
  495. static inline int musb_platform_get_vbus_status(struct musb *musb)
  496. {
  497. if (!musb->ops->vbus_status)
  498. return 0;
  499. return musb->ops->vbus_status(musb);
  500. }
  501. static inline int musb_platform_init(struct musb *musb)
  502. {
  503. if (!musb->ops->init)
  504. return -EINVAL;
  505. return musb->ops->init(musb);
  506. }
  507. static inline int musb_platform_exit(struct musb *musb)
  508. {
  509. if (!musb->ops->exit)
  510. return -EINVAL;
  511. return musb->ops->exit(musb);
  512. }
  513. #endif /* __MUSB_CORE_H__ */