xhci-pci.c 6.4 KB

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  1. /*
  2. * xHCI host controller driver PCI Bus Glue.
  3. *
  4. * Copyright (C) 2008 Intel Corp.
  5. *
  6. * Author: Sarah Sharp
  7. * Some code borrowed from the Linux EHCI driver.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  16. * for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software Foundation,
  20. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/pci.h>
  23. #include "xhci.h"
  24. /* Device for a quirk */
  25. #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
  26. #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
  27. static const char hcd_name[] = "xhci_hcd";
  28. /* called after powerup, by probe or system-pm "wakeup" */
  29. static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
  30. {
  31. /*
  32. * TODO: Implement finding debug ports later.
  33. * TODO: see if there are any quirks that need to be added to handle
  34. * new extended capabilities.
  35. */
  36. /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
  37. if (!pci_set_mwi(pdev))
  38. xhci_dbg(xhci, "MWI active\n");
  39. xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
  40. return 0;
  41. }
  42. /* called during probe() after chip reset completes */
  43. static int xhci_pci_setup(struct usb_hcd *hcd)
  44. {
  45. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  46. struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  47. int retval;
  48. u32 temp;
  49. hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
  50. xhci->cap_regs = hcd->regs;
  51. xhci->op_regs = hcd->regs +
  52. HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
  53. xhci->run_regs = hcd->regs +
  54. (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
  55. /* Cache read-only capability registers */
  56. xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
  57. xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
  58. xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
  59. xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
  60. xhci->hci_version = HC_VERSION(xhci->hcc_params);
  61. xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
  62. xhci_print_registers(xhci);
  63. /* Look for vendor-specific quirks */
  64. if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
  65. pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
  66. pdev->revision == 0x0) {
  67. xhci->quirks |= XHCI_RESET_EP_QUIRK;
  68. xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
  69. " endpoint cmd after reset endpoint\n");
  70. }
  71. if (pdev->vendor == PCI_VENDOR_ID_NEC)
  72. xhci->quirks |= XHCI_NEC_HOST;
  73. /* Make sure the HC is halted. */
  74. retval = xhci_halt(xhci);
  75. if (retval)
  76. return retval;
  77. xhci_dbg(xhci, "Resetting HCD\n");
  78. /* Reset the internal HC memory state and registers. */
  79. retval = xhci_reset(xhci);
  80. if (retval)
  81. return retval;
  82. xhci_dbg(xhci, "Reset complete\n");
  83. temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
  84. if (HCC_64BIT_ADDR(temp)) {
  85. xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
  86. dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
  87. } else {
  88. dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
  89. }
  90. xhci_dbg(xhci, "Calling HCD init\n");
  91. /* Initialize HCD and host controller data structures. */
  92. retval = xhci_init(hcd);
  93. if (retval)
  94. return retval;
  95. xhci_dbg(xhci, "Called HCD init\n");
  96. pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
  97. xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
  98. /* Find any debug ports */
  99. return xhci_pci_reinit(xhci, pdev);
  100. }
  101. #ifdef CONFIG_PM
  102. static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
  103. {
  104. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  105. int retval = 0;
  106. if (hcd->state != HC_STATE_SUSPENDED)
  107. return -EINVAL;
  108. retval = xhci_suspend(xhci);
  109. return retval;
  110. }
  111. static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
  112. {
  113. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  114. int retval = 0;
  115. retval = xhci_resume(xhci, hibernated);
  116. return retval;
  117. }
  118. #endif /* CONFIG_PM */
  119. static const struct hc_driver xhci_pci_hc_driver = {
  120. .description = hcd_name,
  121. .product_desc = "xHCI Host Controller",
  122. .hcd_priv_size = sizeof(struct xhci_hcd),
  123. /*
  124. * generic hardware linkage
  125. */
  126. .irq = xhci_irq,
  127. .flags = HCD_MEMORY | HCD_USB3,
  128. /*
  129. * basic lifecycle operations
  130. */
  131. .reset = xhci_pci_setup,
  132. .start = xhci_run,
  133. #ifdef CONFIG_PM
  134. .pci_suspend = xhci_pci_suspend,
  135. .pci_resume = xhci_pci_resume,
  136. #endif
  137. .stop = xhci_stop,
  138. .shutdown = xhci_shutdown,
  139. /*
  140. * managing i/o requests and associated device resources
  141. */
  142. .urb_enqueue = xhci_urb_enqueue,
  143. .urb_dequeue = xhci_urb_dequeue,
  144. .alloc_dev = xhci_alloc_dev,
  145. .free_dev = xhci_free_dev,
  146. .alloc_streams = xhci_alloc_streams,
  147. .free_streams = xhci_free_streams,
  148. .add_endpoint = xhci_add_endpoint,
  149. .drop_endpoint = xhci_drop_endpoint,
  150. .endpoint_reset = xhci_endpoint_reset,
  151. .check_bandwidth = xhci_check_bandwidth,
  152. .reset_bandwidth = xhci_reset_bandwidth,
  153. .address_device = xhci_address_device,
  154. .update_hub_device = xhci_update_hub_device,
  155. .reset_device = xhci_discover_or_reset_device,
  156. /*
  157. * scheduling support
  158. */
  159. .get_frame_number = xhci_get_frame,
  160. /* Root hub support */
  161. .hub_control = xhci_hub_control,
  162. .hub_status_data = xhci_hub_status_data,
  163. .bus_suspend = xhci_bus_suspend,
  164. .bus_resume = xhci_bus_resume,
  165. };
  166. /*-------------------------------------------------------------------------*/
  167. /* PCI driver selection metadata; PCI hotplugging uses this */
  168. static const struct pci_device_id pci_ids[] = { {
  169. /* handle any USB 3.0 xHCI controller */
  170. PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
  171. .driver_data = (unsigned long) &xhci_pci_hc_driver,
  172. },
  173. { /* end: all zeroes */ }
  174. };
  175. MODULE_DEVICE_TABLE(pci, pci_ids);
  176. /* pci driver glue; this is a "new style" PCI driver module */
  177. static struct pci_driver xhci_pci_driver = {
  178. .name = (char *) hcd_name,
  179. .id_table = pci_ids,
  180. .probe = usb_hcd_pci_probe,
  181. .remove = usb_hcd_pci_remove,
  182. /* suspend and resume implemented later */
  183. .shutdown = usb_hcd_pci_shutdown,
  184. #ifdef CONFIG_PM_SLEEP
  185. .driver = {
  186. .pm = &usb_hcd_pci_pm_ops
  187. },
  188. #endif
  189. };
  190. int xhci_register_pci(void)
  191. {
  192. return pci_register_driver(&xhci_pci_driver);
  193. }
  194. void xhci_unregister_pci(void)
  195. {
  196. pci_unregister_driver(&xhci_pci_driver);
  197. }