ehci-q.c 36 KB

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  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
  22. *
  23. * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
  24. * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  25. * buffers needed for the larger number). We use one QH per endpoint, queue
  26. * multiple urbs (all three types) per endpoint. URBs may need several qtds.
  27. *
  28. * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  29. * interrupts) needs careful scheduling. Performance improvements can be
  30. * an ongoing challenge. That's in "ehci-sched.c".
  31. *
  32. * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  33. * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  34. * (b) special fields in qh entries or (c) split iso entries. TTs will
  35. * buffer low/full speed data so the host collects it at high speed.
  36. */
  37. /*-------------------------------------------------------------------------*/
  38. /* fill a qtd, returning how much of the buffer we were able to queue up */
  39. static int
  40. qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  41. size_t len, int token, int maxpacket)
  42. {
  43. int i, count;
  44. u64 addr = buf;
  45. /* one buffer entry per 4K ... first might be short or unaligned */
  46. qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  47. qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  48. count = 0x1000 - (buf & 0x0fff); /* rest of that page */
  49. if (likely (len < count)) /* ... iff needed */
  50. count = len;
  51. else {
  52. buf += 0x1000;
  53. buf &= ~0x0fff;
  54. /* per-qtd limit: from 16K to 20K (best alignment) */
  55. for (i = 1; count < len && i < 5; i++) {
  56. addr = buf;
  57. qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  58. qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  59. (u32)(addr >> 32));
  60. buf += 0x1000;
  61. if ((count + 0x1000) < len)
  62. count += 0x1000;
  63. else
  64. count = len;
  65. }
  66. /* short packets may only terminate transfers */
  67. if (count != len)
  68. count -= (count % maxpacket);
  69. }
  70. qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  71. qtd->length = count;
  72. return count;
  73. }
  74. /*-------------------------------------------------------------------------*/
  75. static inline void
  76. qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  77. {
  78. struct ehci_qh_hw *hw = qh->hw;
  79. /* writes to an active overlay are unsafe */
  80. BUG_ON(qh->qh_state != QH_STATE_IDLE);
  81. hw->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
  82. hw->hw_alt_next = EHCI_LIST_END(ehci);
  83. /* Except for control endpoints, we make hardware maintain data
  84. * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  85. * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  86. * ever clear it.
  87. */
  88. if (!(hw->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
  89. unsigned is_out, epnum;
  90. is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
  91. epnum = (hc32_to_cpup(ehci, &hw->hw_info1) >> 8) & 0x0f;
  92. if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
  93. hw->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
  94. usb_settoggle (qh->dev, epnum, is_out, 1);
  95. }
  96. }
  97. /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
  98. wmb ();
  99. hw->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
  100. }
  101. /* if it weren't for a common silicon quirk (writing the dummy into the qh
  102. * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
  103. * recovery (including urb dequeue) would need software changes to a QH...
  104. */
  105. static void
  106. qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
  107. {
  108. struct ehci_qtd *qtd;
  109. if (list_empty (&qh->qtd_list))
  110. qtd = qh->dummy;
  111. else {
  112. qtd = list_entry (qh->qtd_list.next,
  113. struct ehci_qtd, qtd_list);
  114. /* first qtd may already be partially processed */
  115. if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current)
  116. qtd = NULL;
  117. }
  118. if (qtd)
  119. qh_update (ehci, qh, qtd);
  120. }
  121. /*-------------------------------------------------------------------------*/
  122. static void qh_link_async(struct ehci_hcd *ehci, struct ehci_qh *qh);
  123. static void ehci_clear_tt_buffer_complete(struct usb_hcd *hcd,
  124. struct usb_host_endpoint *ep)
  125. {
  126. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  127. struct ehci_qh *qh = ep->hcpriv;
  128. unsigned long flags;
  129. spin_lock_irqsave(&ehci->lock, flags);
  130. qh->clearing_tt = 0;
  131. if (qh->qh_state == QH_STATE_IDLE && !list_empty(&qh->qtd_list)
  132. && HC_IS_RUNNING(hcd->state))
  133. qh_link_async(ehci, qh);
  134. spin_unlock_irqrestore(&ehci->lock, flags);
  135. }
  136. static void ehci_clear_tt_buffer(struct ehci_hcd *ehci, struct ehci_qh *qh,
  137. struct urb *urb, u32 token)
  138. {
  139. /* If an async split transaction gets an error or is unlinked,
  140. * the TT buffer may be left in an indeterminate state. We
  141. * have to clear the TT buffer.
  142. *
  143. * Note: this routine is never called for Isochronous transfers.
  144. */
  145. if (urb->dev->tt && !usb_pipeint(urb->pipe) && !qh->clearing_tt) {
  146. #ifdef DEBUG
  147. struct usb_device *tt = urb->dev->tt->hub;
  148. dev_dbg(&tt->dev,
  149. "clear tt buffer port %d, a%d ep%d t%08x\n",
  150. urb->dev->ttport, urb->dev->devnum,
  151. usb_pipeendpoint(urb->pipe), token);
  152. #endif /* DEBUG */
  153. if (!ehci_is_TDI(ehci)
  154. || urb->dev->tt->hub !=
  155. ehci_to_hcd(ehci)->self.root_hub) {
  156. if (usb_hub_clear_tt_buffer(urb) == 0)
  157. qh->clearing_tt = 1;
  158. } else {
  159. /* REVISIT ARC-derived cores don't clear the root
  160. * hub TT buffer in this way...
  161. */
  162. }
  163. }
  164. }
  165. static int qtd_copy_status (
  166. struct ehci_hcd *ehci,
  167. struct urb *urb,
  168. size_t length,
  169. u32 token
  170. )
  171. {
  172. int status = -EINPROGRESS;
  173. /* count IN/OUT bytes, not SETUP (even short packets) */
  174. if (likely (QTD_PID (token) != 2))
  175. urb->actual_length += length - QTD_LENGTH (token);
  176. /* don't modify error codes */
  177. if (unlikely(urb->unlinked))
  178. return status;
  179. /* force cleanup after short read; not always an error */
  180. if (unlikely (IS_SHORT_READ (token)))
  181. status = -EREMOTEIO;
  182. /* serious "can't proceed" faults reported by the hardware */
  183. if (token & QTD_STS_HALT) {
  184. if (token & QTD_STS_BABBLE) {
  185. /* FIXME "must" disable babbling device's port too */
  186. status = -EOVERFLOW;
  187. /* CERR nonzero + halt --> stall */
  188. } else if (QTD_CERR(token)) {
  189. status = -EPIPE;
  190. /* In theory, more than one of the following bits can be set
  191. * since they are sticky and the transaction is retried.
  192. * Which to test first is rather arbitrary.
  193. */
  194. } else if (token & QTD_STS_MMF) {
  195. /* fs/ls interrupt xfer missed the complete-split */
  196. status = -EPROTO;
  197. } else if (token & QTD_STS_DBE) {
  198. status = (QTD_PID (token) == 1) /* IN ? */
  199. ? -ENOSR /* hc couldn't read data */
  200. : -ECOMM; /* hc couldn't write data */
  201. } else if (token & QTD_STS_XACT) {
  202. /* timeout, bad CRC, wrong PID, etc */
  203. ehci_dbg(ehci, "devpath %s ep%d%s 3strikes\n",
  204. urb->dev->devpath,
  205. usb_pipeendpoint(urb->pipe),
  206. usb_pipein(urb->pipe) ? "in" : "out");
  207. status = -EPROTO;
  208. } else { /* unknown */
  209. status = -EPROTO;
  210. }
  211. ehci_vdbg (ehci,
  212. "dev%d ep%d%s qtd token %08x --> status %d\n",
  213. usb_pipedevice (urb->pipe),
  214. usb_pipeendpoint (urb->pipe),
  215. usb_pipein (urb->pipe) ? "in" : "out",
  216. token, status);
  217. }
  218. return status;
  219. }
  220. static void
  221. ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
  222. __releases(ehci->lock)
  223. __acquires(ehci->lock)
  224. {
  225. if (likely (urb->hcpriv != NULL)) {
  226. struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
  227. /* S-mask in a QH means it's an interrupt urb */
  228. if ((qh->hw->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
  229. /* ... update hc-wide periodic stats (for usbfs) */
  230. ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
  231. }
  232. qh_put (qh);
  233. }
  234. if (unlikely(urb->unlinked)) {
  235. COUNT(ehci->stats.unlink);
  236. } else {
  237. /* report non-error and short read status as zero */
  238. if (status == -EINPROGRESS || status == -EREMOTEIO)
  239. status = 0;
  240. COUNT(ehci->stats.complete);
  241. }
  242. #ifdef EHCI_URB_TRACE
  243. ehci_dbg (ehci,
  244. "%s %s urb %p ep%d%s status %d len %d/%d\n",
  245. __func__, urb->dev->devpath, urb,
  246. usb_pipeendpoint (urb->pipe),
  247. usb_pipein (urb->pipe) ? "in" : "out",
  248. status,
  249. urb->actual_length, urb->transfer_buffer_length);
  250. #endif
  251. /* complete() can reenter this HCD */
  252. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  253. spin_unlock (&ehci->lock);
  254. usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
  255. spin_lock (&ehci->lock);
  256. }
  257. static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
  258. static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
  259. static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
  260. /*
  261. * Process and free completed qtds for a qh, returning URBs to drivers.
  262. * Chases up to qh->hw_current. Returns number of completions called,
  263. * indicating how much "real" work we did.
  264. */
  265. static unsigned
  266. qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
  267. {
  268. struct ehci_qtd *last, *end = qh->dummy;
  269. struct list_head *entry, *tmp;
  270. int last_status;
  271. int stopped;
  272. unsigned count = 0;
  273. u8 state;
  274. const __le32 halt = HALT_BIT(ehci);
  275. struct ehci_qh_hw *hw = qh->hw;
  276. if (unlikely (list_empty (&qh->qtd_list)))
  277. return count;
  278. /* completions (or tasks on other cpus) must never clobber HALT
  279. * till we've gone through and cleaned everything up, even when
  280. * they add urbs to this qh's queue or mark them for unlinking.
  281. *
  282. * NOTE: unlinking expects to be done in queue order.
  283. *
  284. * It's a bug for qh->qh_state to be anything other than
  285. * QH_STATE_IDLE, unless our caller is scan_async() or
  286. * scan_periodic().
  287. */
  288. state = qh->qh_state;
  289. qh->qh_state = QH_STATE_COMPLETING;
  290. stopped = (state == QH_STATE_IDLE);
  291. rescan:
  292. last = NULL;
  293. last_status = -EINPROGRESS;
  294. qh->needs_rescan = 0;
  295. /* remove de-activated QTDs from front of queue.
  296. * after faults (including short reads), cleanup this urb
  297. * then let the queue advance.
  298. * if queue is stopped, handles unlinks.
  299. */
  300. list_for_each_safe (entry, tmp, &qh->qtd_list) {
  301. struct ehci_qtd *qtd;
  302. struct urb *urb;
  303. u32 token = 0;
  304. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  305. urb = qtd->urb;
  306. /* clean up any state from previous QTD ...*/
  307. if (last) {
  308. if (likely (last->urb != urb)) {
  309. ehci_urb_done(ehci, last->urb, last_status);
  310. count++;
  311. last_status = -EINPROGRESS;
  312. }
  313. ehci_qtd_free (ehci, last);
  314. last = NULL;
  315. }
  316. /* ignore urbs submitted during completions we reported */
  317. if (qtd == end)
  318. break;
  319. /* hardware copies qtd out of qh overlay */
  320. rmb ();
  321. token = hc32_to_cpu(ehci, qtd->hw_token);
  322. /* always clean up qtds the hc de-activated */
  323. retry_xacterr:
  324. if ((token & QTD_STS_ACTIVE) == 0) {
  325. /* on STALL, error, and short reads this urb must
  326. * complete and all its qtds must be recycled.
  327. */
  328. if ((token & QTD_STS_HALT) != 0) {
  329. /* retry transaction errors until we
  330. * reach the software xacterr limit
  331. */
  332. if ((token & QTD_STS_XACT) &&
  333. QTD_CERR(token) == 0 &&
  334. ++qh->xacterrs < QH_XACTERR_MAX &&
  335. !urb->unlinked) {
  336. ehci_dbg(ehci,
  337. "detected XactErr len %zu/%zu retry %d\n",
  338. qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
  339. /* reset the token in the qtd and the
  340. * qh overlay (which still contains
  341. * the qtd) so that we pick up from
  342. * where we left off
  343. */
  344. token &= ~QTD_STS_HALT;
  345. token |= QTD_STS_ACTIVE |
  346. (EHCI_TUNE_CERR << 10);
  347. qtd->hw_token = cpu_to_hc32(ehci,
  348. token);
  349. wmb();
  350. hw->hw_token = cpu_to_hc32(ehci,
  351. token);
  352. goto retry_xacterr;
  353. }
  354. stopped = 1;
  355. /* magic dummy for some short reads; qh won't advance.
  356. * that silicon quirk can kick in with this dummy too.
  357. *
  358. * other short reads won't stop the queue, including
  359. * control transfers (status stage handles that) or
  360. * most other single-qtd reads ... the queue stops if
  361. * URB_SHORT_NOT_OK was set so the driver submitting
  362. * the urbs could clean it up.
  363. */
  364. } else if (IS_SHORT_READ (token)
  365. && !(qtd->hw_alt_next
  366. & EHCI_LIST_END(ehci))) {
  367. stopped = 1;
  368. goto halt;
  369. }
  370. /* stop scanning when we reach qtds the hc is using */
  371. } else if (likely (!stopped
  372. && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
  373. break;
  374. /* scan the whole queue for unlinks whenever it stops */
  375. } else {
  376. stopped = 1;
  377. /* cancel everything if we halt, suspend, etc */
  378. if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))
  379. last_status = -ESHUTDOWN;
  380. /* this qtd is active; skip it unless a previous qtd
  381. * for its urb faulted, or its urb was canceled.
  382. */
  383. else if (last_status == -EINPROGRESS && !urb->unlinked)
  384. continue;
  385. /* qh unlinked; token in overlay may be most current */
  386. if (state == QH_STATE_IDLE
  387. && cpu_to_hc32(ehci, qtd->qtd_dma)
  388. == hw->hw_current) {
  389. token = hc32_to_cpu(ehci, hw->hw_token);
  390. /* An unlink may leave an incomplete
  391. * async transaction in the TT buffer.
  392. * We have to clear it.
  393. */
  394. ehci_clear_tt_buffer(ehci, qh, urb, token);
  395. }
  396. /* force halt for unlinked or blocked qh, so we'll
  397. * patch the qh later and so that completions can't
  398. * activate it while we "know" it's stopped.
  399. */
  400. if ((halt & hw->hw_token) == 0) {
  401. halt:
  402. hw->hw_token |= halt;
  403. wmb ();
  404. }
  405. }
  406. /* unless we already know the urb's status, collect qtd status
  407. * and update count of bytes transferred. in common short read
  408. * cases with only one data qtd (including control transfers),
  409. * queue processing won't halt. but with two or more qtds (for
  410. * example, with a 32 KB transfer), when the first qtd gets a
  411. * short read the second must be removed by hand.
  412. */
  413. if (last_status == -EINPROGRESS) {
  414. last_status = qtd_copy_status(ehci, urb,
  415. qtd->length, token);
  416. if (last_status == -EREMOTEIO
  417. && (qtd->hw_alt_next
  418. & EHCI_LIST_END(ehci)))
  419. last_status = -EINPROGRESS;
  420. /* As part of low/full-speed endpoint-halt processing
  421. * we must clear the TT buffer (11.17.5).
  422. */
  423. if (unlikely(last_status != -EINPROGRESS &&
  424. last_status != -EREMOTEIO)) {
  425. /* The TT's in some hubs malfunction when they
  426. * receive this request following a STALL (they
  427. * stop sending isochronous packets). Since a
  428. * STALL can't leave the TT buffer in a busy
  429. * state (if you believe Figures 11-48 - 11-51
  430. * in the USB 2.0 spec), we won't clear the TT
  431. * buffer in this case. Strictly speaking this
  432. * is a violation of the spec.
  433. */
  434. if (last_status != -EPIPE)
  435. ehci_clear_tt_buffer(ehci, qh, urb,
  436. token);
  437. }
  438. }
  439. /* if we're removing something not at the queue head,
  440. * patch the hardware queue pointer.
  441. */
  442. if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
  443. last = list_entry (qtd->qtd_list.prev,
  444. struct ehci_qtd, qtd_list);
  445. last->hw_next = qtd->hw_next;
  446. }
  447. /* remove qtd; it's recycled after possible urb completion */
  448. list_del (&qtd->qtd_list);
  449. last = qtd;
  450. /* reinit the xacterr counter for the next qtd */
  451. qh->xacterrs = 0;
  452. }
  453. /* last urb's completion might still need calling */
  454. if (likely (last != NULL)) {
  455. ehci_urb_done(ehci, last->urb, last_status);
  456. count++;
  457. ehci_qtd_free (ehci, last);
  458. }
  459. /* Do we need to rescan for URBs dequeued during a giveback? */
  460. if (unlikely(qh->needs_rescan)) {
  461. /* If the QH is already unlinked, do the rescan now. */
  462. if (state == QH_STATE_IDLE)
  463. goto rescan;
  464. /* Otherwise we have to wait until the QH is fully unlinked.
  465. * Our caller will start an unlink if qh->needs_rescan is
  466. * set. But if an unlink has already started, nothing needs
  467. * to be done.
  468. */
  469. if (state != QH_STATE_LINKED)
  470. qh->needs_rescan = 0;
  471. }
  472. /* restore original state; caller must unlink or relink */
  473. qh->qh_state = state;
  474. /* be sure the hardware's done with the qh before refreshing
  475. * it after fault cleanup, or recovering from silicon wrongly
  476. * overlaying the dummy qtd (which reduces DMA chatter).
  477. */
  478. if (stopped != 0 || hw->hw_qtd_next == EHCI_LIST_END(ehci)) {
  479. switch (state) {
  480. case QH_STATE_IDLE:
  481. qh_refresh(ehci, qh);
  482. break;
  483. case QH_STATE_LINKED:
  484. /* We won't refresh a QH that's linked (after the HC
  485. * stopped the queue). That avoids a race:
  486. * - HC reads first part of QH;
  487. * - CPU updates that first part and the token;
  488. * - HC reads rest of that QH, including token
  489. * Result: HC gets an inconsistent image, and then
  490. * DMAs to/from the wrong memory (corrupting it).
  491. *
  492. * That should be rare for interrupt transfers,
  493. * except maybe high bandwidth ...
  494. */
  495. /* Tell the caller to start an unlink */
  496. qh->needs_rescan = 1;
  497. break;
  498. /* otherwise, unlink already started */
  499. }
  500. }
  501. return count;
  502. }
  503. /*-------------------------------------------------------------------------*/
  504. // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
  505. #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
  506. // ... and packet size, for any kind of endpoint descriptor
  507. #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
  508. /*
  509. * reverse of qh_urb_transaction: free a list of TDs.
  510. * used for cleanup after errors, before HC sees an URB's TDs.
  511. */
  512. static void qtd_list_free (
  513. struct ehci_hcd *ehci,
  514. struct urb *urb,
  515. struct list_head *qtd_list
  516. ) {
  517. struct list_head *entry, *temp;
  518. list_for_each_safe (entry, temp, qtd_list) {
  519. struct ehci_qtd *qtd;
  520. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  521. list_del (&qtd->qtd_list);
  522. ehci_qtd_free (ehci, qtd);
  523. }
  524. }
  525. /*
  526. * create a list of filled qtds for this URB; won't link into qh.
  527. */
  528. static struct list_head *
  529. qh_urb_transaction (
  530. struct ehci_hcd *ehci,
  531. struct urb *urb,
  532. struct list_head *head,
  533. gfp_t flags
  534. ) {
  535. struct ehci_qtd *qtd, *qtd_prev;
  536. dma_addr_t buf;
  537. int len, this_sg_len, maxpacket;
  538. int is_input;
  539. u32 token;
  540. int i;
  541. struct scatterlist *sg;
  542. /*
  543. * URBs map to sequences of QTDs: one logical transaction
  544. */
  545. qtd = ehci_qtd_alloc (ehci, flags);
  546. if (unlikely (!qtd))
  547. return NULL;
  548. list_add_tail (&qtd->qtd_list, head);
  549. qtd->urb = urb;
  550. token = QTD_STS_ACTIVE;
  551. token |= (EHCI_TUNE_CERR << 10);
  552. /* for split transactions, SplitXState initialized to zero */
  553. len = urb->transfer_buffer_length;
  554. is_input = usb_pipein (urb->pipe);
  555. if (usb_pipecontrol (urb->pipe)) {
  556. /* SETUP pid */
  557. qtd_fill(ehci, qtd, urb->setup_dma,
  558. sizeof (struct usb_ctrlrequest),
  559. token | (2 /* "setup" */ << 8), 8);
  560. /* ... and always at least one more pid */
  561. token ^= QTD_TOGGLE;
  562. qtd_prev = qtd;
  563. qtd = ehci_qtd_alloc (ehci, flags);
  564. if (unlikely (!qtd))
  565. goto cleanup;
  566. qtd->urb = urb;
  567. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  568. list_add_tail (&qtd->qtd_list, head);
  569. /* for zero length DATA stages, STATUS is always IN */
  570. if (len == 0)
  571. token |= (1 /* "in" */ << 8);
  572. }
  573. /*
  574. * data transfer stage: buffer setup
  575. */
  576. i = urb->num_sgs;
  577. if (len > 0 && i > 0) {
  578. sg = urb->sg;
  579. buf = sg_dma_address(sg);
  580. /* urb->transfer_buffer_length may be smaller than the
  581. * size of the scatterlist (or vice versa)
  582. */
  583. this_sg_len = min_t(int, sg_dma_len(sg), len);
  584. } else {
  585. sg = NULL;
  586. buf = urb->transfer_dma;
  587. this_sg_len = len;
  588. }
  589. if (is_input)
  590. token |= (1 /* "in" */ << 8);
  591. /* else it's already initted to "out" pid (0 << 8) */
  592. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
  593. /*
  594. * buffer gets wrapped in one or more qtds;
  595. * last one may be "short" (including zero len)
  596. * and may serve as a control status ack
  597. */
  598. for (;;) {
  599. int this_qtd_len;
  600. this_qtd_len = qtd_fill(ehci, qtd, buf, this_sg_len, token,
  601. maxpacket);
  602. this_sg_len -= this_qtd_len;
  603. len -= this_qtd_len;
  604. buf += this_qtd_len;
  605. /*
  606. * short reads advance to a "magic" dummy instead of the next
  607. * qtd ... that forces the queue to stop, for manual cleanup.
  608. * (this will usually be overridden later.)
  609. */
  610. if (is_input)
  611. qtd->hw_alt_next = ehci->async->hw->hw_alt_next;
  612. /* qh makes control packets use qtd toggle; maybe switch it */
  613. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  614. token ^= QTD_TOGGLE;
  615. if (likely(this_sg_len <= 0)) {
  616. if (--i <= 0 || len <= 0)
  617. break;
  618. sg = sg_next(sg);
  619. buf = sg_dma_address(sg);
  620. this_sg_len = min_t(int, sg_dma_len(sg), len);
  621. }
  622. qtd_prev = qtd;
  623. qtd = ehci_qtd_alloc (ehci, flags);
  624. if (unlikely (!qtd))
  625. goto cleanup;
  626. qtd->urb = urb;
  627. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  628. list_add_tail (&qtd->qtd_list, head);
  629. }
  630. /*
  631. * unless the caller requires manual cleanup after short reads,
  632. * have the alt_next mechanism keep the queue running after the
  633. * last data qtd (the only one, for control and most other cases).
  634. */
  635. if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
  636. || usb_pipecontrol (urb->pipe)))
  637. qtd->hw_alt_next = EHCI_LIST_END(ehci);
  638. /*
  639. * control requests may need a terminating data "status" ack;
  640. * bulk ones may need a terminating short packet (zero length).
  641. */
  642. if (likely (urb->transfer_buffer_length != 0)) {
  643. int one_more = 0;
  644. if (usb_pipecontrol (urb->pipe)) {
  645. one_more = 1;
  646. token ^= 0x0100; /* "in" <--> "out" */
  647. token |= QTD_TOGGLE; /* force DATA1 */
  648. } else if (usb_pipebulk (urb->pipe)
  649. && (urb->transfer_flags & URB_ZERO_PACKET)
  650. && !(urb->transfer_buffer_length % maxpacket)) {
  651. one_more = 1;
  652. }
  653. if (one_more) {
  654. qtd_prev = qtd;
  655. qtd = ehci_qtd_alloc (ehci, flags);
  656. if (unlikely (!qtd))
  657. goto cleanup;
  658. qtd->urb = urb;
  659. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  660. list_add_tail (&qtd->qtd_list, head);
  661. /* never any data in such packets */
  662. qtd_fill(ehci, qtd, 0, 0, token, 0);
  663. }
  664. }
  665. /* by default, enable interrupt on urb completion */
  666. if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
  667. qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
  668. return head;
  669. cleanup:
  670. qtd_list_free (ehci, urb, head);
  671. return NULL;
  672. }
  673. /*-------------------------------------------------------------------------*/
  674. // Would be best to create all qh's from config descriptors,
  675. // when each interface/altsetting is established. Unlink
  676. // any previous qh and cancel its urbs first; endpoints are
  677. // implicitly reset then (data toggle too).
  678. // That'd mean updating how usbcore talks to HCDs. (2.7?)
  679. /*
  680. * Each QH holds a qtd list; a QH is used for everything except iso.
  681. *
  682. * For interrupt urbs, the scheduler must set the microframe scheduling
  683. * mask(s) each time the QH gets scheduled. For highspeed, that's
  684. * just one microframe in the s-mask. For split interrupt transactions
  685. * there are additional complications: c-mask, maybe FSTNs.
  686. */
  687. static struct ehci_qh *
  688. qh_make (
  689. struct ehci_hcd *ehci,
  690. struct urb *urb,
  691. gfp_t flags
  692. ) {
  693. struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
  694. u32 info1 = 0, info2 = 0;
  695. int is_input, type;
  696. int maxp = 0;
  697. struct usb_tt *tt = urb->dev->tt;
  698. struct ehci_qh_hw *hw;
  699. if (!qh)
  700. return qh;
  701. /*
  702. * init endpoint/device data for this QH
  703. */
  704. info1 |= usb_pipeendpoint (urb->pipe) << 8;
  705. info1 |= usb_pipedevice (urb->pipe) << 0;
  706. is_input = usb_pipein (urb->pipe);
  707. type = usb_pipetype (urb->pipe);
  708. maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
  709. /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
  710. * acts like up to 3KB, but is built from smaller packets.
  711. */
  712. if (max_packet(maxp) > 1024) {
  713. ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
  714. goto done;
  715. }
  716. /* Compute interrupt scheduling parameters just once, and save.
  717. * - allowing for high bandwidth, how many nsec/uframe are used?
  718. * - split transactions need a second CSPLIT uframe; same question
  719. * - splits also need a schedule gap (for full/low speed I/O)
  720. * - qh has a polling interval
  721. *
  722. * For control/bulk requests, the HC or TT handles these.
  723. */
  724. if (type == PIPE_INTERRUPT) {
  725. qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
  726. is_input, 0,
  727. hb_mult(maxp) * max_packet(maxp)));
  728. qh->start = NO_FRAME;
  729. if (urb->dev->speed == USB_SPEED_HIGH) {
  730. qh->c_usecs = 0;
  731. qh->gap_uf = 0;
  732. qh->period = urb->interval >> 3;
  733. if (qh->period == 0 && urb->interval != 1) {
  734. /* NOTE interval 2 or 4 uframes could work.
  735. * But interval 1 scheduling is simpler, and
  736. * includes high bandwidth.
  737. */
  738. urb->interval = 1;
  739. } else if (qh->period > ehci->periodic_size) {
  740. qh->period = ehci->periodic_size;
  741. urb->interval = qh->period << 3;
  742. }
  743. } else {
  744. int think_time;
  745. /* gap is f(FS/LS transfer times) */
  746. qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
  747. is_input, 0, maxp) / (125 * 1000);
  748. /* FIXME this just approximates SPLIT/CSPLIT times */
  749. if (is_input) { // SPLIT, gap, CSPLIT+DATA
  750. qh->c_usecs = qh->usecs + HS_USECS (0);
  751. qh->usecs = HS_USECS (1);
  752. } else { // SPLIT+DATA, gap, CSPLIT
  753. qh->usecs += HS_USECS (1);
  754. qh->c_usecs = HS_USECS (0);
  755. }
  756. think_time = tt ? tt->think_time : 0;
  757. qh->tt_usecs = NS_TO_US (think_time +
  758. usb_calc_bus_time (urb->dev->speed,
  759. is_input, 0, max_packet (maxp)));
  760. qh->period = urb->interval;
  761. if (qh->period > ehci->periodic_size) {
  762. qh->period = ehci->periodic_size;
  763. urb->interval = qh->period;
  764. }
  765. }
  766. }
  767. /* support for tt scheduling, and access to toggles */
  768. qh->dev = urb->dev;
  769. /* using TT? */
  770. switch (urb->dev->speed) {
  771. case USB_SPEED_LOW:
  772. info1 |= (1 << 12); /* EPS "low" */
  773. /* FALL THROUGH */
  774. case USB_SPEED_FULL:
  775. /* EPS 0 means "full" */
  776. if (type != PIPE_INTERRUPT)
  777. info1 |= (EHCI_TUNE_RL_TT << 28);
  778. if (type == PIPE_CONTROL) {
  779. info1 |= (1 << 27); /* for TT */
  780. info1 |= 1 << 14; /* toggle from qtd */
  781. }
  782. info1 |= maxp << 16;
  783. info2 |= (EHCI_TUNE_MULT_TT << 30);
  784. /* Some Freescale processors have an erratum in which the
  785. * port number in the queue head was 0..N-1 instead of 1..N.
  786. */
  787. if (ehci_has_fsl_portno_bug(ehci))
  788. info2 |= (urb->dev->ttport-1) << 23;
  789. else
  790. info2 |= urb->dev->ttport << 23;
  791. /* set the address of the TT; for TDI's integrated
  792. * root hub tt, leave it zeroed.
  793. */
  794. if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
  795. info2 |= tt->hub->devnum << 16;
  796. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
  797. break;
  798. case USB_SPEED_HIGH: /* no TT involved */
  799. info1 |= (2 << 12); /* EPS "high" */
  800. if (type == PIPE_CONTROL) {
  801. info1 |= (EHCI_TUNE_RL_HS << 28);
  802. info1 |= 64 << 16; /* usb2 fixed maxpacket */
  803. info1 |= 1 << 14; /* toggle from qtd */
  804. info2 |= (EHCI_TUNE_MULT_HS << 30);
  805. } else if (type == PIPE_BULK) {
  806. info1 |= (EHCI_TUNE_RL_HS << 28);
  807. /* The USB spec says that high speed bulk endpoints
  808. * always use 512 byte maxpacket. But some device
  809. * vendors decided to ignore that, and MSFT is happy
  810. * to help them do so. So now people expect to use
  811. * such nonconformant devices with Linux too; sigh.
  812. */
  813. info1 |= max_packet(maxp) << 16;
  814. info2 |= (EHCI_TUNE_MULT_HS << 30);
  815. } else { /* PIPE_INTERRUPT */
  816. info1 |= max_packet (maxp) << 16;
  817. info2 |= hb_mult (maxp) << 30;
  818. }
  819. break;
  820. default:
  821. dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
  822. done:
  823. qh_put (qh);
  824. return NULL;
  825. }
  826. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
  827. /* init as live, toggle clear, advance to dummy */
  828. qh->qh_state = QH_STATE_IDLE;
  829. hw = qh->hw;
  830. hw->hw_info1 = cpu_to_hc32(ehci, info1);
  831. hw->hw_info2 = cpu_to_hc32(ehci, info2);
  832. usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
  833. qh_refresh (ehci, qh);
  834. return qh;
  835. }
  836. /*-------------------------------------------------------------------------*/
  837. /* move qh (and its qtds) onto async queue; maybe enable queue. */
  838. static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  839. {
  840. __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
  841. struct ehci_qh *head;
  842. /* Don't link a QH if there's a Clear-TT-Buffer pending */
  843. if (unlikely(qh->clearing_tt))
  844. return;
  845. WARN_ON(qh->qh_state != QH_STATE_IDLE);
  846. /* (re)start the async schedule? */
  847. head = ehci->async;
  848. timer_action_done (ehci, TIMER_ASYNC_OFF);
  849. if (!head->qh_next.qh) {
  850. u32 cmd = ehci_readl(ehci, &ehci->regs->command);
  851. if (!(cmd & CMD_ASE)) {
  852. /* in case a clear of CMD_ASE didn't take yet */
  853. (void)handshake(ehci, &ehci->regs->status,
  854. STS_ASS, 0, 150);
  855. cmd |= CMD_ASE | CMD_RUN;
  856. ehci_writel(ehci, cmd, &ehci->regs->command);
  857. ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
  858. /* posted write need not be known to HC yet ... */
  859. }
  860. }
  861. /* clear halt and/or toggle; and maybe recover from silicon quirk */
  862. qh_refresh(ehci, qh);
  863. /* splice right after start */
  864. qh->qh_next = head->qh_next;
  865. qh->hw->hw_next = head->hw->hw_next;
  866. wmb ();
  867. head->qh_next.qh = qh;
  868. head->hw->hw_next = dma;
  869. qh_get(qh);
  870. qh->xacterrs = 0;
  871. qh->qh_state = QH_STATE_LINKED;
  872. /* qtd completions reported later by interrupt */
  873. }
  874. /*-------------------------------------------------------------------------*/
  875. /*
  876. * For control/bulk/interrupt, return QH with these TDs appended.
  877. * Allocates and initializes the QH if necessary.
  878. * Returns null if it can't allocate a QH it needs to.
  879. * If the QH has TDs (urbs) already, that's great.
  880. */
  881. static struct ehci_qh *qh_append_tds (
  882. struct ehci_hcd *ehci,
  883. struct urb *urb,
  884. struct list_head *qtd_list,
  885. int epnum,
  886. void **ptr
  887. )
  888. {
  889. struct ehci_qh *qh = NULL;
  890. __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
  891. qh = (struct ehci_qh *) *ptr;
  892. if (unlikely (qh == NULL)) {
  893. /* can't sleep here, we have ehci->lock... */
  894. qh = qh_make (ehci, urb, GFP_ATOMIC);
  895. *ptr = qh;
  896. }
  897. if (likely (qh != NULL)) {
  898. struct ehci_qtd *qtd;
  899. if (unlikely (list_empty (qtd_list)))
  900. qtd = NULL;
  901. else
  902. qtd = list_entry (qtd_list->next, struct ehci_qtd,
  903. qtd_list);
  904. /* control qh may need patching ... */
  905. if (unlikely (epnum == 0)) {
  906. /* usb_reset_device() briefly reverts to address 0 */
  907. if (usb_pipedevice (urb->pipe) == 0)
  908. qh->hw->hw_info1 &= ~qh_addr_mask;
  909. }
  910. /* just one way to queue requests: swap with the dummy qtd.
  911. * only hc or qh_refresh() ever modify the overlay.
  912. */
  913. if (likely (qtd != NULL)) {
  914. struct ehci_qtd *dummy;
  915. dma_addr_t dma;
  916. __hc32 token;
  917. /* to avoid racing the HC, use the dummy td instead of
  918. * the first td of our list (becomes new dummy). both
  919. * tds stay deactivated until we're done, when the
  920. * HC is allowed to fetch the old dummy (4.10.2).
  921. */
  922. token = qtd->hw_token;
  923. qtd->hw_token = HALT_BIT(ehci);
  924. wmb ();
  925. dummy = qh->dummy;
  926. dma = dummy->qtd_dma;
  927. *dummy = *qtd;
  928. dummy->qtd_dma = dma;
  929. list_del (&qtd->qtd_list);
  930. list_add (&dummy->qtd_list, qtd_list);
  931. list_splice_tail(qtd_list, &qh->qtd_list);
  932. ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
  933. qh->dummy = qtd;
  934. /* hc must see the new dummy at list end */
  935. dma = qtd->qtd_dma;
  936. qtd = list_entry (qh->qtd_list.prev,
  937. struct ehci_qtd, qtd_list);
  938. qtd->hw_next = QTD_NEXT(ehci, dma);
  939. /* let the hc process these next qtds */
  940. wmb ();
  941. dummy->hw_token = token;
  942. urb->hcpriv = qh_get (qh);
  943. }
  944. }
  945. return qh;
  946. }
  947. /*-------------------------------------------------------------------------*/
  948. static int
  949. submit_async (
  950. struct ehci_hcd *ehci,
  951. struct urb *urb,
  952. struct list_head *qtd_list,
  953. gfp_t mem_flags
  954. ) {
  955. struct ehci_qtd *qtd;
  956. int epnum;
  957. unsigned long flags;
  958. struct ehci_qh *qh = NULL;
  959. int rc;
  960. qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
  961. epnum = urb->ep->desc.bEndpointAddress;
  962. #ifdef EHCI_URB_TRACE
  963. ehci_dbg (ehci,
  964. "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  965. __func__, urb->dev->devpath, urb,
  966. epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
  967. urb->transfer_buffer_length,
  968. qtd, urb->ep->hcpriv);
  969. #endif
  970. spin_lock_irqsave (&ehci->lock, flags);
  971. if (unlikely(!HCD_HW_ACCESSIBLE(ehci_to_hcd(ehci)))) {
  972. rc = -ESHUTDOWN;
  973. goto done;
  974. }
  975. rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
  976. if (unlikely(rc))
  977. goto done;
  978. qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
  979. if (unlikely(qh == NULL)) {
  980. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  981. rc = -ENOMEM;
  982. goto done;
  983. }
  984. /* Control/bulk operations through TTs don't need scheduling,
  985. * the HC and TT handle it when the TT has a buffer ready.
  986. */
  987. if (likely (qh->qh_state == QH_STATE_IDLE))
  988. qh_link_async(ehci, qh);
  989. done:
  990. spin_unlock_irqrestore (&ehci->lock, flags);
  991. if (unlikely (qh == NULL))
  992. qtd_list_free (ehci, urb, qtd_list);
  993. return rc;
  994. }
  995. /*-------------------------------------------------------------------------*/
  996. /* the async qh for the qtds being reclaimed are now unlinked from the HC */
  997. static void end_unlink_async (struct ehci_hcd *ehci)
  998. {
  999. struct ehci_qh *qh = ehci->reclaim;
  1000. struct ehci_qh *next;
  1001. iaa_watchdog_done(ehci);
  1002. // qh->hw_next = cpu_to_hc32(qh->qh_dma);
  1003. qh->qh_state = QH_STATE_IDLE;
  1004. qh->qh_next.qh = NULL;
  1005. qh_put (qh); // refcount from reclaim
  1006. /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
  1007. next = qh->reclaim;
  1008. ehci->reclaim = next;
  1009. qh->reclaim = NULL;
  1010. qh_completions (ehci, qh);
  1011. if (!list_empty (&qh->qtd_list)
  1012. && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
  1013. qh_link_async (ehci, qh);
  1014. else {
  1015. /* it's not free to turn the async schedule on/off; leave it
  1016. * active but idle for a while once it empties.
  1017. */
  1018. if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
  1019. && ehci->async->qh_next.qh == NULL)
  1020. timer_action (ehci, TIMER_ASYNC_OFF);
  1021. }
  1022. qh_put(qh); /* refcount from async list */
  1023. if (next) {
  1024. ehci->reclaim = NULL;
  1025. start_unlink_async (ehci, next);
  1026. }
  1027. }
  1028. /* makes sure the async qh will become idle */
  1029. /* caller must own ehci->lock */
  1030. static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  1031. {
  1032. int cmd = ehci_readl(ehci, &ehci->regs->command);
  1033. struct ehci_qh *prev;
  1034. #ifdef DEBUG
  1035. assert_spin_locked(&ehci->lock);
  1036. if (ehci->reclaim
  1037. || (qh->qh_state != QH_STATE_LINKED
  1038. && qh->qh_state != QH_STATE_UNLINK_WAIT)
  1039. )
  1040. BUG ();
  1041. #endif
  1042. /* stop async schedule right now? */
  1043. if (unlikely (qh == ehci->async)) {
  1044. /* can't get here without STS_ASS set */
  1045. if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
  1046. && !ehci->reclaim) {
  1047. /* ... and CMD_IAAD clear */
  1048. ehci_writel(ehci, cmd & ~CMD_ASE,
  1049. &ehci->regs->command);
  1050. wmb ();
  1051. // handshake later, if we need to
  1052. timer_action_done (ehci, TIMER_ASYNC_OFF);
  1053. }
  1054. return;
  1055. }
  1056. qh->qh_state = QH_STATE_UNLINK;
  1057. ehci->reclaim = qh = qh_get (qh);
  1058. prev = ehci->async;
  1059. while (prev->qh_next.qh != qh)
  1060. prev = prev->qh_next.qh;
  1061. prev->hw->hw_next = qh->hw->hw_next;
  1062. prev->qh_next = qh->qh_next;
  1063. wmb ();
  1064. /* If the controller isn't running, we don't have to wait for it */
  1065. if (unlikely(!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))) {
  1066. /* if (unlikely (qh->reclaim != 0))
  1067. * this will recurse, probably not much
  1068. */
  1069. end_unlink_async (ehci);
  1070. return;
  1071. }
  1072. cmd |= CMD_IAAD;
  1073. ehci_writel(ehci, cmd, &ehci->regs->command);
  1074. (void)ehci_readl(ehci, &ehci->regs->command);
  1075. iaa_watchdog_start(ehci);
  1076. }
  1077. /*-------------------------------------------------------------------------*/
  1078. static void scan_async (struct ehci_hcd *ehci)
  1079. {
  1080. struct ehci_qh *qh;
  1081. enum ehci_timer_action action = TIMER_IO_WATCHDOG;
  1082. ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index);
  1083. timer_action_done (ehci, TIMER_ASYNC_SHRINK);
  1084. rescan:
  1085. qh = ehci->async->qh_next.qh;
  1086. if (likely (qh != NULL)) {
  1087. do {
  1088. /* clean any finished work for this qh */
  1089. if (!list_empty (&qh->qtd_list)
  1090. && qh->stamp != ehci->stamp) {
  1091. int temp;
  1092. /* unlinks could happen here; completion
  1093. * reporting drops the lock. rescan using
  1094. * the latest schedule, but don't rescan
  1095. * qhs we already finished (no looping).
  1096. */
  1097. qh = qh_get (qh);
  1098. qh->stamp = ehci->stamp;
  1099. temp = qh_completions (ehci, qh);
  1100. if (qh->needs_rescan)
  1101. unlink_async(ehci, qh);
  1102. qh_put (qh);
  1103. if (temp != 0) {
  1104. goto rescan;
  1105. }
  1106. }
  1107. /* unlink idle entries, reducing DMA usage as well
  1108. * as HCD schedule-scanning costs. delay for any qh
  1109. * we just scanned, there's a not-unusual case that it
  1110. * doesn't stay idle for long.
  1111. * (plus, avoids some kind of re-activation race.)
  1112. */
  1113. if (list_empty(&qh->qtd_list)
  1114. && qh->qh_state == QH_STATE_LINKED) {
  1115. if (!ehci->reclaim
  1116. && ((ehci->stamp - qh->stamp) & 0x1fff)
  1117. >= (EHCI_SHRINK_FRAMES * 8))
  1118. start_unlink_async(ehci, qh);
  1119. else
  1120. action = TIMER_ASYNC_SHRINK;
  1121. }
  1122. qh = qh->qh_next.qh;
  1123. } while (qh);
  1124. }
  1125. if (action == TIMER_ASYNC_SHRINK)
  1126. timer_action (ehci, TIMER_ASYNC_SHRINK);
  1127. }