lh7a40x_udc.c 50 KB

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  1. /*
  2. * linux/drivers/usb/gadget/lh7a40x_udc.c
  3. * Sharp LH7A40x on-chip full speed USB device controllers
  4. *
  5. * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
  6. * Copyright (C) 2004 Bo Henriksen, Nordic ID
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/platform_device.h>
  24. #include <linux/slab.h>
  25. #include "lh7a40x_udc.h"
  26. //#define DEBUG printk
  27. //#define DEBUG_EP0 printk
  28. //#define DEBUG_SETUP printk
  29. #ifndef DEBUG_EP0
  30. # define DEBUG_EP0(fmt,args...)
  31. #endif
  32. #ifndef DEBUG_SETUP
  33. # define DEBUG_SETUP(fmt,args...)
  34. #endif
  35. #ifndef DEBUG
  36. # define NO_STATES
  37. # define DEBUG(fmt,args...)
  38. #endif
  39. #define DRIVER_DESC "LH7A40x USB Device Controller"
  40. #define DRIVER_VERSION __DATE__
  41. #ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */
  42. #define _BIT(x) (1<<(x))
  43. #endif
  44. struct lh7a40x_udc *the_controller;
  45. static const char driver_name[] = "lh7a40x_udc";
  46. static const char driver_desc[] = DRIVER_DESC;
  47. static const char ep0name[] = "ep0-control";
  48. /*
  49. Local definintions.
  50. */
  51. #ifndef NO_STATES
  52. static char *state_names[] = {
  53. "WAIT_FOR_SETUP",
  54. "DATA_STATE_XMIT",
  55. "DATA_STATE_NEED_ZLP",
  56. "WAIT_FOR_OUT_STATUS",
  57. "DATA_STATE_RECV"
  58. };
  59. #endif
  60. /*
  61. Local declarations.
  62. */
  63. static int lh7a40x_ep_enable(struct usb_ep *ep,
  64. const struct usb_endpoint_descriptor *);
  65. static int lh7a40x_ep_disable(struct usb_ep *ep);
  66. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t);
  67. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *);
  68. static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t);
  69. static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *);
  70. static int lh7a40x_set_halt(struct usb_ep *ep, int);
  71. static int lh7a40x_fifo_status(struct usb_ep *ep);
  72. static void lh7a40x_fifo_flush(struct usb_ep *ep);
  73. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep);
  74. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr);
  75. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req,
  76. int status);
  77. static void pio_irq_enable(int bEndpointAddress);
  78. static void pio_irq_disable(int bEndpointAddress);
  79. static void stop_activity(struct lh7a40x_udc *dev,
  80. struct usb_gadget_driver *driver);
  81. static void flush(struct lh7a40x_ep *ep);
  82. static void udc_enable(struct lh7a40x_udc *dev);
  83. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address);
  84. static struct usb_ep_ops lh7a40x_ep_ops = {
  85. .enable = lh7a40x_ep_enable,
  86. .disable = lh7a40x_ep_disable,
  87. .alloc_request = lh7a40x_alloc_request,
  88. .free_request = lh7a40x_free_request,
  89. .queue = lh7a40x_queue,
  90. .dequeue = lh7a40x_dequeue,
  91. .set_halt = lh7a40x_set_halt,
  92. .fifo_status = lh7a40x_fifo_status,
  93. .fifo_flush = lh7a40x_fifo_flush,
  94. };
  95. /* Inline code */
  96. static __inline__ int write_packet(struct lh7a40x_ep *ep,
  97. struct lh7a40x_request *req, int max)
  98. {
  99. u8 *buf;
  100. int length, count;
  101. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  102. buf = req->req.buf + req->req.actual;
  103. prefetch(buf);
  104. length = req->req.length - req->req.actual;
  105. length = min(length, max);
  106. req->req.actual += length;
  107. DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo);
  108. count = length;
  109. while (count--) {
  110. *fifo = *buf++;
  111. }
  112. return length;
  113. }
  114. static __inline__ void usb_set_index(u32 ep)
  115. {
  116. *(volatile u32 *)io_p2v(USB_INDEX) = ep;
  117. }
  118. static __inline__ u32 usb_read(u32 port)
  119. {
  120. return *(volatile u32 *)io_p2v(port);
  121. }
  122. static __inline__ void usb_write(u32 val, u32 port)
  123. {
  124. *(volatile u32 *)io_p2v(port) = val;
  125. }
  126. static __inline__ void usb_set(u32 val, u32 port)
  127. {
  128. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  129. u32 after = (*ioport) | val;
  130. *ioport = after;
  131. }
  132. static __inline__ void usb_clear(u32 val, u32 port)
  133. {
  134. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  135. u32 after = (*ioport) & ~val;
  136. *ioport = after;
  137. }
  138. /*-------------------------------------------------------------------------*/
  139. #define GPIO_PORTC_DR (0x80000E08)
  140. #define GPIO_PORTC_DDR (0x80000E18)
  141. #define GPIO_PORTC_PDR (0x80000E70)
  142. /* get port C pin data register */
  143. #define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0)
  144. /* get port C data direction register */
  145. #define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0)
  146. /* set port C data register */
  147. #define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR))
  148. /* set port C data direction register */
  149. #define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR))
  150. /*
  151. * LPD7A404 GPIO's:
  152. * Port C bit 1 = USB Port 1 Power Enable
  153. * Port C bit 2 = USB Port 1 Data Carrier Detect
  154. */
  155. #define is_usb_connected() get_portc_pdr(2)
  156. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  157. static const char proc_node_name[] = "driver/udc";
  158. static int
  159. udc_proc_read(char *page, char **start, off_t off, int count,
  160. int *eof, void *_dev)
  161. {
  162. char *buf = page;
  163. struct lh7a40x_udc *dev = _dev;
  164. char *next = buf;
  165. unsigned size = count;
  166. unsigned long flags;
  167. int t;
  168. if (off != 0)
  169. return 0;
  170. local_irq_save(flags);
  171. /* basic device status */
  172. t = scnprintf(next, size,
  173. DRIVER_DESC "\n"
  174. "%s version: %s\n"
  175. "Gadget driver: %s\n"
  176. "Host: %s\n\n",
  177. driver_name, DRIVER_VERSION,
  178. dev->driver ? dev->driver->driver.name : "(none)",
  179. is_usb_connected()? "full speed" : "disconnected");
  180. size -= t;
  181. next += t;
  182. t = scnprintf(next, size,
  183. "GPIO:\n"
  184. " Port C bit 1: %d, dir %d\n"
  185. " Port C bit 2: %d, dir %d\n\n",
  186. get_portc_pdr(1), get_portc_ddr(1),
  187. get_portc_pdr(2), get_portc_ddr(2)
  188. );
  189. size -= t;
  190. next += t;
  191. t = scnprintf(next, size,
  192. "DCP pullup: %d\n\n",
  193. (usb_read(USB_PM) & PM_USB_DCP) != 0);
  194. size -= t;
  195. next += t;
  196. local_irq_restore(flags);
  197. *eof = 1;
  198. return count - size;
  199. }
  200. #define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
  201. #define remove_proc_files() remove_proc_entry(proc_node_name, NULL)
  202. #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
  203. #define create_proc_files() do {} while (0)
  204. #define remove_proc_files() do {} while (0)
  205. #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
  206. /*
  207. * udc_disable - disable USB device controller
  208. */
  209. static void udc_disable(struct lh7a40x_udc *dev)
  210. {
  211. DEBUG("%s, %p\n", __func__, dev);
  212. udc_set_address(dev, 0);
  213. /* Disable interrupts */
  214. usb_write(0, USB_IN_INT_EN);
  215. usb_write(0, USB_OUT_INT_EN);
  216. usb_write(0, USB_INT_EN);
  217. /* Disable the USB */
  218. usb_write(0, USB_PM);
  219. #ifdef CONFIG_ARCH_LH7A404
  220. /* Disable USB power */
  221. set_portc_dr(1, 0);
  222. #endif
  223. /* if hardware supports it, disconnect from usb */
  224. /* make_usb_disappear(); */
  225. dev->ep0state = WAIT_FOR_SETUP;
  226. dev->gadget.speed = USB_SPEED_UNKNOWN;
  227. dev->usb_address = 0;
  228. }
  229. /*
  230. * udc_reinit - initialize software state
  231. */
  232. static void udc_reinit(struct lh7a40x_udc *dev)
  233. {
  234. u32 i;
  235. DEBUG("%s, %p\n", __func__, dev);
  236. /* device/ep0 records init */
  237. INIT_LIST_HEAD(&dev->gadget.ep_list);
  238. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  239. dev->ep0state = WAIT_FOR_SETUP;
  240. /* basic endpoint records init */
  241. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  242. struct lh7a40x_ep *ep = &dev->ep[i];
  243. if (i != 0)
  244. list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
  245. ep->desc = 0;
  246. ep->stopped = 0;
  247. INIT_LIST_HEAD(&ep->queue);
  248. ep->pio_irqs = 0;
  249. }
  250. /* the rest was statically initialized, and is read-only */
  251. }
  252. #define BYTES2MAXP(x) (x / 8)
  253. #define MAXP2BYTES(x) (x * 8)
  254. /* until it's enabled, this UDC should be completely invisible
  255. * to any USB host.
  256. */
  257. static void udc_enable(struct lh7a40x_udc *dev)
  258. {
  259. int ep;
  260. DEBUG("%s, %p\n", __func__, dev);
  261. dev->gadget.speed = USB_SPEED_UNKNOWN;
  262. #ifdef CONFIG_ARCH_LH7A404
  263. /* Set Port C bit 1 & 2 as output */
  264. set_portc_ddr(1, 1);
  265. set_portc_ddr(2, 1);
  266. /* Enable USB power */
  267. set_portc_dr(1, 0);
  268. #endif
  269. /*
  270. * C.f Chapter 18.1.3.1 Initializing the USB
  271. */
  272. /* Disable the USB */
  273. usb_clear(PM_USB_ENABLE, USB_PM);
  274. /* Reset APB & I/O sides of the USB */
  275. usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  276. mdelay(5);
  277. usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  278. /* Set MAXP values for each */
  279. for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) {
  280. struct lh7a40x_ep *ep_reg = &dev->ep[ep];
  281. u32 csr;
  282. usb_set_index(ep);
  283. switch (ep_reg->ep_type) {
  284. case ep_bulk_in:
  285. case ep_interrupt:
  286. usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET,
  287. ep_reg->csr2);
  288. /* Fall through */
  289. case ep_control:
  290. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  291. USB_IN_MAXP);
  292. break;
  293. case ep_bulk_out:
  294. usb_clear(USB_OUT_CSR2_USB_DMA_EN |
  295. USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2);
  296. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  297. USB_OUT_MAXP);
  298. break;
  299. }
  300. /* Read & Write CSR1, just in case */
  301. csr = usb_read(ep_reg->csr1);
  302. usb_write(csr, ep_reg->csr1);
  303. flush(ep_reg);
  304. }
  305. /* Disable interrupts */
  306. usb_write(0, USB_IN_INT_EN);
  307. usb_write(0, USB_OUT_INT_EN);
  308. usb_write(0, USB_INT_EN);
  309. /* Enable interrupts */
  310. usb_set(USB_IN_INT_EP0, USB_IN_INT_EN);
  311. usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN);
  312. /* Dont enable rest of the interrupts */
  313. /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN);
  314. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */
  315. /* Enable SUSPEND */
  316. usb_set(PM_ENABLE_SUSPEND, USB_PM);
  317. /* Enable the USB */
  318. usb_set(PM_USB_ENABLE, USB_PM);
  319. #ifdef CONFIG_ARCH_LH7A404
  320. /* NOTE: DOES NOT WORK! */
  321. /* Let host detect UDC:
  322. * Software must write a 0 to the PMR:DCP_CTRL bit to turn this
  323. * transistor on and pull the USBDP pin HIGH.
  324. */
  325. /* usb_clear(PM_USB_DCP, USB_PM);
  326. usb_set(PM_USB_DCP, USB_PM); */
  327. #endif
  328. }
  329. /*
  330. Register entry point for the peripheral controller driver.
  331. */
  332. int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
  333. int (*bind)(struct usb_gadget *))
  334. {
  335. struct lh7a40x_udc *dev = the_controller;
  336. int retval;
  337. DEBUG("%s: %s\n", __func__, driver->driver.name);
  338. if (!driver
  339. || driver->speed != USB_SPEED_FULL
  340. || !bind
  341. || !driver->disconnect
  342. || !driver->setup)
  343. return -EINVAL;
  344. if (!dev)
  345. return -ENODEV;
  346. if (dev->driver)
  347. return -EBUSY;
  348. /* first hook up the driver ... */
  349. dev->driver = driver;
  350. dev->gadget.dev.driver = &driver->driver;
  351. device_add(&dev->gadget.dev);
  352. retval = bind(&dev->gadget);
  353. if (retval) {
  354. printk(KERN_WARNING "%s: bind to driver %s --> error %d\n",
  355. dev->gadget.name, driver->driver.name, retval);
  356. device_del(&dev->gadget.dev);
  357. dev->driver = 0;
  358. dev->gadget.dev.driver = 0;
  359. return retval;
  360. }
  361. /* ... then enable host detection and ep0; and we're ready
  362. * for set_configuration as well as eventual disconnect.
  363. * NOTE: this shouldn't power up until later.
  364. */
  365. printk(KERN_WARNING "%s: registered gadget driver '%s'\n",
  366. dev->gadget.name, driver->driver.name);
  367. udc_enable(dev);
  368. return 0;
  369. }
  370. EXPORT_SYMBOL(usb_gadget_probe_driver);
  371. /*
  372. Unregister entry point for the peripheral controller driver.
  373. */
  374. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  375. {
  376. struct lh7a40x_udc *dev = the_controller;
  377. unsigned long flags;
  378. if (!dev)
  379. return -ENODEV;
  380. if (!driver || driver != dev->driver || !driver->unbind)
  381. return -EINVAL;
  382. spin_lock_irqsave(&dev->lock, flags);
  383. dev->driver = 0;
  384. stop_activity(dev, driver);
  385. spin_unlock_irqrestore(&dev->lock, flags);
  386. driver->unbind(&dev->gadget);
  387. dev->gadget.dev.driver = NULL;
  388. device_del(&dev->gadget.dev);
  389. udc_disable(dev);
  390. DEBUG("unregistered gadget driver '%s'\n", driver->driver.name);
  391. return 0;
  392. }
  393. EXPORT_SYMBOL(usb_gadget_unregister_driver);
  394. /*-------------------------------------------------------------------------*/
  395. /** Write request to FIFO (max write == maxp size)
  396. * Return: 0 = still running, 1 = completed, negative = errno
  397. * NOTE: INDEX register must be set for EP
  398. */
  399. static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  400. {
  401. u32 max;
  402. u32 csr;
  403. max = le16_to_cpu(ep->desc->wMaxPacketSize);
  404. csr = usb_read(ep->csr1);
  405. DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY);
  406. if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) {
  407. unsigned count;
  408. int is_last, is_short;
  409. count = write_packet(ep, req, max);
  410. usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1);
  411. /* last packet is usually short (or a zlp) */
  412. if (unlikely(count != max))
  413. is_last = is_short = 1;
  414. else {
  415. if (likely(req->req.length != req->req.actual)
  416. || req->req.zero)
  417. is_last = 0;
  418. else
  419. is_last = 1;
  420. /* interrupt/iso maxpacket may not fill the fifo */
  421. is_short = unlikely(max < ep_maxpacket(ep));
  422. }
  423. DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __func__,
  424. ep->ep.name, count,
  425. is_last ? "/L" : "", is_short ? "/S" : "",
  426. req->req.length - req->req.actual, req);
  427. /* requests complete when all IN data is in the FIFO */
  428. if (is_last) {
  429. done(ep, req, 0);
  430. if (list_empty(&ep->queue)) {
  431. pio_irq_disable(ep_index(ep));
  432. }
  433. return 1;
  434. }
  435. } else {
  436. DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep));
  437. }
  438. return 0;
  439. }
  440. /** Read to request from FIFO (max read == bytes in fifo)
  441. * Return: 0 = still running, 1 = completed, negative = errno
  442. * NOTE: INDEX register must be set for EP
  443. */
  444. static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  445. {
  446. u32 csr;
  447. u8 *buf;
  448. unsigned bufferspace, count, is_short;
  449. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  450. /* make sure there's a packet in the FIFO. */
  451. csr = usb_read(ep->csr1);
  452. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) {
  453. DEBUG("%s: Packet NOT ready!\n", __func__);
  454. return -EINVAL;
  455. }
  456. buf = req->req.buf + req->req.actual;
  457. prefetchw(buf);
  458. bufferspace = req->req.length - req->req.actual;
  459. /* read all bytes from this packet */
  460. count = usb_read(USB_OUT_FIFO_WC1);
  461. req->req.actual += min(count, bufferspace);
  462. is_short = (count < ep->ep.maxpacket);
  463. DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n",
  464. ep->ep.name, csr, count,
  465. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  466. while (likely(count-- != 0)) {
  467. u8 byte = (u8) (*fifo & 0xff);
  468. if (unlikely(bufferspace == 0)) {
  469. /* this happens when the driver's buffer
  470. * is smaller than what the host sent.
  471. * discard the extra data.
  472. */
  473. if (req->req.status != -EOVERFLOW)
  474. printk(KERN_WARNING "%s overflow %d\n",
  475. ep->ep.name, count);
  476. req->req.status = -EOVERFLOW;
  477. } else {
  478. *buf++ = byte;
  479. bufferspace--;
  480. }
  481. }
  482. usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1);
  483. /* completion */
  484. if (is_short || req->req.actual == req->req.length) {
  485. done(ep, req, 0);
  486. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  487. if (list_empty(&ep->queue))
  488. pio_irq_disable(ep_index(ep));
  489. return 1;
  490. }
  491. /* finished that packet. the next one may be waiting... */
  492. return 0;
  493. }
  494. /*
  495. * done - retire a request; caller blocked irqs
  496. * INDEX register is preserved to keep same
  497. */
  498. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status)
  499. {
  500. unsigned int stopped = ep->stopped;
  501. u32 index;
  502. DEBUG("%s, %p\n", __func__, ep);
  503. list_del_init(&req->queue);
  504. if (likely(req->req.status == -EINPROGRESS))
  505. req->req.status = status;
  506. else
  507. status = req->req.status;
  508. if (status && status != -ESHUTDOWN)
  509. DEBUG("complete %s req %p stat %d len %u/%u\n",
  510. ep->ep.name, &req->req, status,
  511. req->req.actual, req->req.length);
  512. /* don't modify queue heads during completion callback */
  513. ep->stopped = 1;
  514. /* Read current index (completion may modify it) */
  515. index = usb_read(USB_INDEX);
  516. spin_unlock(&ep->dev->lock);
  517. req->req.complete(&ep->ep, &req->req);
  518. spin_lock(&ep->dev->lock);
  519. /* Restore index */
  520. usb_set_index(index);
  521. ep->stopped = stopped;
  522. }
  523. /** Enable EP interrupt */
  524. static void pio_irq_enable(int ep)
  525. {
  526. DEBUG("%s: %d\n", __func__, ep);
  527. switch (ep) {
  528. case 1:
  529. usb_set(USB_IN_INT_EP1, USB_IN_INT_EN);
  530. break;
  531. case 2:
  532. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  533. break;
  534. case 3:
  535. usb_set(USB_IN_INT_EP3, USB_IN_INT_EN);
  536. break;
  537. default:
  538. DEBUG("Unknown endpoint: %d\n", ep);
  539. break;
  540. }
  541. }
  542. /** Disable EP interrupt */
  543. static void pio_irq_disable(int ep)
  544. {
  545. DEBUG("%s: %d\n", __func__, ep);
  546. switch (ep) {
  547. case 1:
  548. usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN);
  549. break;
  550. case 2:
  551. usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  552. break;
  553. case 3:
  554. usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN);
  555. break;
  556. default:
  557. DEBUG("Unknown endpoint: %d\n", ep);
  558. break;
  559. }
  560. }
  561. /*
  562. * nuke - dequeue ALL requests
  563. */
  564. void nuke(struct lh7a40x_ep *ep, int status)
  565. {
  566. struct lh7a40x_request *req;
  567. DEBUG("%s, %p\n", __func__, ep);
  568. /* Flush FIFO */
  569. flush(ep);
  570. /* called with irqs blocked */
  571. while (!list_empty(&ep->queue)) {
  572. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  573. done(ep, req, status);
  574. }
  575. /* Disable IRQ if EP is enabled (has descriptor) */
  576. if (ep->desc)
  577. pio_irq_disable(ep_index(ep));
  578. }
  579. /*
  580. void nuke_all(struct lh7a40x_udc *dev)
  581. {
  582. int n;
  583. for(n=0; n<UDC_MAX_ENDPOINTS; n++) {
  584. struct lh7a40x_ep *ep = &dev->ep[n];
  585. usb_set_index(n);
  586. nuke(ep, 0);
  587. }
  588. }*/
  589. /*
  590. static void flush_all(struct lh7a40x_udc *dev)
  591. {
  592. int n;
  593. for (n = 0; n < UDC_MAX_ENDPOINTS; n++)
  594. {
  595. struct lh7a40x_ep *ep = &dev->ep[n];
  596. flush(ep);
  597. }
  598. }
  599. */
  600. /** Flush EP
  601. * NOTE: INDEX register must be set before this call
  602. */
  603. static void flush(struct lh7a40x_ep *ep)
  604. {
  605. DEBUG("%s, %p\n", __func__, ep);
  606. switch (ep->ep_type) {
  607. case ep_control:
  608. /* check, by implication c.f. 15.1.2.11 */
  609. break;
  610. case ep_bulk_in:
  611. case ep_interrupt:
  612. /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */
  613. usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1);
  614. break;
  615. case ep_bulk_out:
  616. /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */
  617. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  618. break;
  619. }
  620. }
  621. /**
  622. * lh7a40x_in_epn - handle IN interrupt
  623. */
  624. static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  625. {
  626. u32 csr;
  627. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  628. struct lh7a40x_request *req;
  629. usb_set_index(ep_idx);
  630. csr = usb_read(ep->csr1);
  631. DEBUG("%s: %d, csr %x\n", __func__, ep_idx, csr);
  632. if (csr & USB_IN_CSR1_SENT_STALL) {
  633. DEBUG("USB_IN_CSR1_SENT_STALL\n");
  634. usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ ,
  635. ep->csr1);
  636. return;
  637. }
  638. if (!ep->desc) {
  639. DEBUG("%s: NO EP DESC\n", __func__);
  640. return;
  641. }
  642. if (list_empty(&ep->queue))
  643. req = 0;
  644. else
  645. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  646. DEBUG("req: %p\n", req);
  647. if (!req)
  648. return;
  649. write_fifo(ep, req);
  650. }
  651. /* ********************************************************************************************* */
  652. /* Bulk OUT (recv)
  653. */
  654. static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  655. {
  656. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  657. struct lh7a40x_request *req;
  658. DEBUG("%s: %d\n", __func__, ep_idx);
  659. usb_set_index(ep_idx);
  660. if (ep->desc) {
  661. u32 csr;
  662. csr = usb_read(ep->csr1);
  663. while ((csr =
  664. usb_read(ep->
  665. csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY |
  666. USB_OUT_CSR1_SENT_STALL)) {
  667. DEBUG("%s: %x\n", __func__, csr);
  668. if (csr & USB_OUT_CSR1_SENT_STALL) {
  669. DEBUG("%s: stall sent, flush fifo\n",
  670. __func__);
  671. /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */
  672. flush(ep);
  673. } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  674. if (list_empty(&ep->queue))
  675. req = 0;
  676. else
  677. req =
  678. list_entry(ep->queue.next,
  679. struct lh7a40x_request,
  680. queue);
  681. if (!req) {
  682. printk(KERN_WARNING
  683. "%s: NULL REQ %d\n",
  684. __func__, ep_idx);
  685. flush(ep);
  686. break;
  687. } else {
  688. read_fifo(ep, req);
  689. }
  690. }
  691. }
  692. } else {
  693. /* Throw packet away.. */
  694. printk(KERN_WARNING "%s: No descriptor?!?\n", __func__);
  695. flush(ep);
  696. }
  697. }
  698. static void stop_activity(struct lh7a40x_udc *dev,
  699. struct usb_gadget_driver *driver)
  700. {
  701. int i;
  702. /* don't disconnect drivers more than once */
  703. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  704. driver = 0;
  705. dev->gadget.speed = USB_SPEED_UNKNOWN;
  706. /* prevent new request submissions, kill any outstanding requests */
  707. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  708. struct lh7a40x_ep *ep = &dev->ep[i];
  709. ep->stopped = 1;
  710. usb_set_index(i);
  711. nuke(ep, -ESHUTDOWN);
  712. }
  713. /* report disconnect; the driver is already quiesced */
  714. if (driver) {
  715. spin_unlock(&dev->lock);
  716. driver->disconnect(&dev->gadget);
  717. spin_lock(&dev->lock);
  718. }
  719. /* re-init driver-visible data structures */
  720. udc_reinit(dev);
  721. }
  722. /** Handle USB RESET interrupt
  723. */
  724. static void lh7a40x_reset_intr(struct lh7a40x_udc *dev)
  725. {
  726. #if 0 /* def CONFIG_ARCH_LH7A404 */
  727. /* Does not work always... */
  728. DEBUG("%s: %d\n", __func__, dev->usb_address);
  729. if (!dev->usb_address) {
  730. /*usb_set(USB_RESET_IO, USB_RESET);
  731. mdelay(5);
  732. usb_clear(USB_RESET_IO, USB_RESET); */
  733. return;
  734. }
  735. /* Put the USB controller into reset. */
  736. usb_set(USB_RESET_IO, USB_RESET);
  737. /* Set Device ID to 0 */
  738. udc_set_address(dev, 0);
  739. /* Let PLL2 settle down */
  740. mdelay(5);
  741. /* Release the USB controller from reset */
  742. usb_clear(USB_RESET_IO, USB_RESET);
  743. /* Re-enable UDC */
  744. udc_enable(dev);
  745. #endif
  746. dev->gadget.speed = USB_SPEED_FULL;
  747. }
  748. /*
  749. * lh7a40x usb client interrupt handler.
  750. */
  751. static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev)
  752. {
  753. struct lh7a40x_udc *dev = _dev;
  754. DEBUG("\n\n");
  755. spin_lock(&dev->lock);
  756. for (;;) {
  757. u32 intr_in = usb_read(USB_IN_INT);
  758. u32 intr_out = usb_read(USB_OUT_INT);
  759. u32 intr_int = usb_read(USB_INT);
  760. /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */
  761. u32 in_en = usb_read(USB_IN_INT_EN);
  762. u32 out_en = usb_read(USB_OUT_INT_EN);
  763. if (!intr_out && !intr_in && !intr_int)
  764. break;
  765. DEBUG("%s (on state %s)\n", __func__,
  766. state_names[dev->ep0state]);
  767. DEBUG("intr_out = %x\n", intr_out);
  768. DEBUG("intr_in = %x\n", intr_in);
  769. DEBUG("intr_int = %x\n", intr_int);
  770. if (intr_in) {
  771. usb_write(intr_in, USB_IN_INT);
  772. if ((intr_in & USB_IN_INT_EP1)
  773. && (in_en & USB_IN_INT_EP1)) {
  774. DEBUG("USB_IN_INT_EP1\n");
  775. lh7a40x_in_epn(dev, 1, intr_in);
  776. }
  777. if ((intr_in & USB_IN_INT_EP3)
  778. && (in_en & USB_IN_INT_EP3)) {
  779. DEBUG("USB_IN_INT_EP3\n");
  780. lh7a40x_in_epn(dev, 3, intr_in);
  781. }
  782. if (intr_in & USB_IN_INT_EP0) {
  783. DEBUG("USB_IN_INT_EP0 (control)\n");
  784. lh7a40x_handle_ep0(dev, intr_in);
  785. }
  786. }
  787. if (intr_out) {
  788. usb_write(intr_out, USB_OUT_INT);
  789. if ((intr_out & USB_OUT_INT_EP2)
  790. && (out_en & USB_OUT_INT_EP2)) {
  791. DEBUG("USB_OUT_INT_EP2\n");
  792. lh7a40x_out_epn(dev, 2, intr_out);
  793. }
  794. }
  795. if (intr_int) {
  796. usb_write(intr_int, USB_INT);
  797. if (intr_int & USB_INT_RESET_INT) {
  798. lh7a40x_reset_intr(dev);
  799. }
  800. if (intr_int & USB_INT_RESUME_INT) {
  801. DEBUG("USB resume\n");
  802. if (dev->gadget.speed != USB_SPEED_UNKNOWN
  803. && dev->driver
  804. && dev->driver->resume
  805. && is_usb_connected()) {
  806. dev->driver->resume(&dev->gadget);
  807. }
  808. }
  809. if (intr_int & USB_INT_SUSPEND_INT) {
  810. DEBUG("USB suspend%s\n",
  811. is_usb_connected()? "" : "+disconnect");
  812. if (!is_usb_connected()) {
  813. stop_activity(dev, dev->driver);
  814. } else if (dev->gadget.speed !=
  815. USB_SPEED_UNKNOWN && dev->driver
  816. && dev->driver->suspend) {
  817. dev->driver->suspend(&dev->gadget);
  818. }
  819. }
  820. }
  821. }
  822. spin_unlock(&dev->lock);
  823. return IRQ_HANDLED;
  824. }
  825. static int lh7a40x_ep_enable(struct usb_ep *_ep,
  826. const struct usb_endpoint_descriptor *desc)
  827. {
  828. struct lh7a40x_ep *ep;
  829. struct lh7a40x_udc *dev;
  830. unsigned long flags;
  831. DEBUG("%s, %p\n", __func__, _ep);
  832. ep = container_of(_ep, struct lh7a40x_ep, ep);
  833. if (!_ep || !desc || ep->desc || _ep->name == ep0name
  834. || desc->bDescriptorType != USB_DT_ENDPOINT
  835. || ep->bEndpointAddress != desc->bEndpointAddress
  836. || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) {
  837. DEBUG("%s, bad ep or descriptor\n", __func__);
  838. return -EINVAL;
  839. }
  840. /* xfer types must match, except that interrupt ~= bulk */
  841. if (ep->bmAttributes != desc->bmAttributes
  842. && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
  843. && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
  844. DEBUG("%s, %s type mismatch\n", __func__, _ep->name);
  845. return -EINVAL;
  846. }
  847. /* hardware _could_ do smaller, but driver doesn't */
  848. if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
  849. && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep))
  850. || !desc->wMaxPacketSize) {
  851. DEBUG("%s, bad %s maxpacket\n", __func__, _ep->name);
  852. return -ERANGE;
  853. }
  854. dev = ep->dev;
  855. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  856. DEBUG("%s, bogus device state\n", __func__);
  857. return -ESHUTDOWN;
  858. }
  859. spin_lock_irqsave(&ep->dev->lock, flags);
  860. ep->stopped = 0;
  861. ep->desc = desc;
  862. ep->pio_irqs = 0;
  863. ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
  864. spin_unlock_irqrestore(&ep->dev->lock, flags);
  865. /* Reset halt state (does flush) */
  866. lh7a40x_set_halt(_ep, 0);
  867. DEBUG("%s: enabled %s\n", __func__, _ep->name);
  868. return 0;
  869. }
  870. /** Disable EP
  871. * NOTE: Sets INDEX register
  872. */
  873. static int lh7a40x_ep_disable(struct usb_ep *_ep)
  874. {
  875. struct lh7a40x_ep *ep;
  876. unsigned long flags;
  877. DEBUG("%s, %p\n", __func__, _ep);
  878. ep = container_of(_ep, struct lh7a40x_ep, ep);
  879. if (!_ep || !ep->desc) {
  880. DEBUG("%s, %s not enabled\n", __func__,
  881. _ep ? ep->ep.name : NULL);
  882. return -EINVAL;
  883. }
  884. spin_lock_irqsave(&ep->dev->lock, flags);
  885. usb_set_index(ep_index(ep));
  886. /* Nuke all pending requests (does flush) */
  887. nuke(ep, -ESHUTDOWN);
  888. /* Disable ep IRQ */
  889. pio_irq_disable(ep_index(ep));
  890. ep->desc = 0;
  891. ep->stopped = 1;
  892. spin_unlock_irqrestore(&ep->dev->lock, flags);
  893. DEBUG("%s: disabled %s\n", __func__, _ep->name);
  894. return 0;
  895. }
  896. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep,
  897. gfp_t gfp_flags)
  898. {
  899. struct lh7a40x_request *req;
  900. DEBUG("%s, %p\n", __func__, ep);
  901. req = kzalloc(sizeof(*req), gfp_flags);
  902. if (!req)
  903. return 0;
  904. INIT_LIST_HEAD(&req->queue);
  905. return &req->req;
  906. }
  907. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req)
  908. {
  909. struct lh7a40x_request *req;
  910. DEBUG("%s, %p\n", __func__, ep);
  911. req = container_of(_req, struct lh7a40x_request, req);
  912. WARN_ON(!list_empty(&req->queue));
  913. kfree(req);
  914. }
  915. /** Queue one request
  916. * Kickstart transfer if needed
  917. * NOTE: Sets INDEX register
  918. */
  919. static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req,
  920. gfp_t gfp_flags)
  921. {
  922. struct lh7a40x_request *req;
  923. struct lh7a40x_ep *ep;
  924. struct lh7a40x_udc *dev;
  925. unsigned long flags;
  926. DEBUG("\n\n\n%s, %p\n", __func__, _ep);
  927. req = container_of(_req, struct lh7a40x_request, req);
  928. if (unlikely
  929. (!_req || !_req->complete || !_req->buf
  930. || !list_empty(&req->queue))) {
  931. DEBUG("%s, bad params\n", __func__);
  932. return -EINVAL;
  933. }
  934. ep = container_of(_ep, struct lh7a40x_ep, ep);
  935. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  936. DEBUG("%s, bad ep\n", __func__);
  937. return -EINVAL;
  938. }
  939. dev = ep->dev;
  940. if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
  941. DEBUG("%s, bogus device state %p\n", __func__, dev->driver);
  942. return -ESHUTDOWN;
  943. }
  944. DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length,
  945. _req->buf);
  946. spin_lock_irqsave(&dev->lock, flags);
  947. _req->status = -EINPROGRESS;
  948. _req->actual = 0;
  949. /* kickstart this i/o queue? */
  950. DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue),
  951. ep->stopped);
  952. if (list_empty(&ep->queue) && likely(!ep->stopped)) {
  953. u32 csr;
  954. if (unlikely(ep_index(ep) == 0)) {
  955. /* EP0 */
  956. list_add_tail(&req->queue, &ep->queue);
  957. lh7a40x_ep0_kick(dev, ep);
  958. req = 0;
  959. } else if (ep_is_in(ep)) {
  960. /* EP1 & EP3 */
  961. usb_set_index(ep_index(ep));
  962. csr = usb_read(ep->csr1);
  963. pio_irq_enable(ep_index(ep));
  964. if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) {
  965. if (write_fifo(ep, req) == 1)
  966. req = 0;
  967. }
  968. } else {
  969. /* EP2 */
  970. usb_set_index(ep_index(ep));
  971. csr = usb_read(ep->csr1);
  972. pio_irq_enable(ep_index(ep));
  973. if (!(csr & USB_OUT_CSR1_FIFO_FULL)) {
  974. if (read_fifo(ep, req) == 1)
  975. req = 0;
  976. }
  977. }
  978. }
  979. /* pio or dma irq handler advances the queue. */
  980. if (likely(req != 0))
  981. list_add_tail(&req->queue, &ep->queue);
  982. spin_unlock_irqrestore(&dev->lock, flags);
  983. return 0;
  984. }
  985. /* dequeue JUST ONE request */
  986. static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  987. {
  988. struct lh7a40x_ep *ep;
  989. struct lh7a40x_request *req;
  990. unsigned long flags;
  991. DEBUG("%s, %p\n", __func__, _ep);
  992. ep = container_of(_ep, struct lh7a40x_ep, ep);
  993. if (!_ep || ep->ep.name == ep0name)
  994. return -EINVAL;
  995. spin_lock_irqsave(&ep->dev->lock, flags);
  996. /* make sure it's actually queued on this endpoint */
  997. list_for_each_entry(req, &ep->queue, queue) {
  998. if (&req->req == _req)
  999. break;
  1000. }
  1001. if (&req->req != _req) {
  1002. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1003. return -EINVAL;
  1004. }
  1005. done(ep, req, -ECONNRESET);
  1006. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1007. return 0;
  1008. }
  1009. /** Halt specific EP
  1010. * Return 0 if success
  1011. * NOTE: Sets INDEX register to EP !
  1012. */
  1013. static int lh7a40x_set_halt(struct usb_ep *_ep, int value)
  1014. {
  1015. struct lh7a40x_ep *ep;
  1016. unsigned long flags;
  1017. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1018. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1019. DEBUG("%s, bad ep\n", __func__);
  1020. return -EINVAL;
  1021. }
  1022. usb_set_index(ep_index(ep));
  1023. DEBUG("%s, ep %d, val %d\n", __func__, ep_index(ep), value);
  1024. spin_lock_irqsave(&ep->dev->lock, flags);
  1025. if (ep_index(ep) == 0) {
  1026. /* EP0 */
  1027. usb_set(EP0_SEND_STALL, ep->csr1);
  1028. } else if (ep_is_in(ep)) {
  1029. u32 csr = usb_read(ep->csr1);
  1030. if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY)
  1031. || !list_empty(&ep->queue))) {
  1032. /*
  1033. * Attempts to halt IN endpoints will fail (returning -EAGAIN)
  1034. * if any transfer requests are still queued, or if the controller
  1035. * FIFO still holds bytes that the host hasn't collected.
  1036. */
  1037. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1038. DEBUG
  1039. ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n",
  1040. (csr & USB_IN_CSR1_FIFO_NOT_EMPTY),
  1041. !list_empty(&ep->queue));
  1042. return -EAGAIN;
  1043. }
  1044. flush(ep);
  1045. if (value)
  1046. usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1047. else {
  1048. usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1049. usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1);
  1050. }
  1051. } else {
  1052. flush(ep);
  1053. if (value)
  1054. usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1055. else {
  1056. usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1057. usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1);
  1058. }
  1059. }
  1060. if (value) {
  1061. ep->stopped = 1;
  1062. } else {
  1063. ep->stopped = 0;
  1064. }
  1065. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1066. DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS");
  1067. return 0;
  1068. }
  1069. /** Return bytes in EP FIFO
  1070. * NOTE: Sets INDEX register to EP
  1071. */
  1072. static int lh7a40x_fifo_status(struct usb_ep *_ep)
  1073. {
  1074. u32 csr;
  1075. int count = 0;
  1076. struct lh7a40x_ep *ep;
  1077. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1078. if (!_ep) {
  1079. DEBUG("%s, bad ep\n", __func__);
  1080. return -ENODEV;
  1081. }
  1082. DEBUG("%s, %d\n", __func__, ep_index(ep));
  1083. /* LPD can't report unclaimed bytes from IN fifos */
  1084. if (ep_is_in(ep))
  1085. return -EOPNOTSUPP;
  1086. usb_set_index(ep_index(ep));
  1087. csr = usb_read(ep->csr1);
  1088. if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN ||
  1089. csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  1090. count = usb_read(USB_OUT_FIFO_WC1);
  1091. }
  1092. return count;
  1093. }
  1094. /** Flush EP FIFO
  1095. * NOTE: Sets INDEX register to EP
  1096. */
  1097. static void lh7a40x_fifo_flush(struct usb_ep *_ep)
  1098. {
  1099. struct lh7a40x_ep *ep;
  1100. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1101. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1102. DEBUG("%s, bad ep\n", __func__);
  1103. return;
  1104. }
  1105. usb_set_index(ep_index(ep));
  1106. flush(ep);
  1107. }
  1108. /****************************************************************/
  1109. /* End Point 0 related functions */
  1110. /****************************************************************/
  1111. /* return: 0 = still running, 1 = completed, negative = errno */
  1112. static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1113. {
  1114. u32 max;
  1115. unsigned count;
  1116. int is_last;
  1117. max = ep_maxpacket(ep);
  1118. DEBUG_EP0("%s\n", __func__);
  1119. count = write_packet(ep, req, max);
  1120. /* last packet is usually short (or a zlp) */
  1121. if (unlikely(count != max))
  1122. is_last = 1;
  1123. else {
  1124. if (likely(req->req.length != req->req.actual) || req->req.zero)
  1125. is_last = 0;
  1126. else
  1127. is_last = 1;
  1128. }
  1129. DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __func__,
  1130. ep->ep.name, count,
  1131. is_last ? "/L" : "", req->req.length - req->req.actual, req);
  1132. /* requests complete when all IN data is in the FIFO */
  1133. if (is_last) {
  1134. done(ep, req, 0);
  1135. return 1;
  1136. }
  1137. return 0;
  1138. }
  1139. static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep,
  1140. unsigned char *cp, int max)
  1141. {
  1142. int bytes;
  1143. int count = usb_read(USB_OUT_FIFO_WC1);
  1144. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1145. if (count > max)
  1146. count = max;
  1147. bytes = count;
  1148. while (count--)
  1149. *cp++ = *fifo & 0xFF;
  1150. return bytes;
  1151. }
  1152. static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep,
  1153. unsigned char *cp, int count)
  1154. {
  1155. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1156. DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count);
  1157. while (count--)
  1158. *fifo = *cp++;
  1159. }
  1160. static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1161. {
  1162. u32 csr;
  1163. u8 *buf;
  1164. unsigned bufferspace, count, is_short;
  1165. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1166. DEBUG_EP0("%s\n", __func__);
  1167. csr = usb_read(USB_EP0_CSR);
  1168. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY))
  1169. return 0;
  1170. buf = req->req.buf + req->req.actual;
  1171. prefetchw(buf);
  1172. bufferspace = req->req.length - req->req.actual;
  1173. /* read all bytes from this packet */
  1174. if (likely(csr & EP0_OUT_PKT_RDY)) {
  1175. count = usb_read(USB_OUT_FIFO_WC1);
  1176. req->req.actual += min(count, bufferspace);
  1177. } else /* zlp */
  1178. count = 0;
  1179. is_short = (count < ep->ep.maxpacket);
  1180. DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n",
  1181. ep->ep.name, csr, count,
  1182. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  1183. while (likely(count-- != 0)) {
  1184. u8 byte = (u8) (*fifo & 0xff);
  1185. if (unlikely(bufferspace == 0)) {
  1186. /* this happens when the driver's buffer
  1187. * is smaller than what the host sent.
  1188. * discard the extra data.
  1189. */
  1190. if (req->req.status != -EOVERFLOW)
  1191. DEBUG_EP0("%s overflow %d\n", ep->ep.name,
  1192. count);
  1193. req->req.status = -EOVERFLOW;
  1194. } else {
  1195. *buf++ = byte;
  1196. bufferspace--;
  1197. }
  1198. }
  1199. /* completion */
  1200. if (is_short || req->req.actual == req->req.length) {
  1201. done(ep, req, 0);
  1202. return 1;
  1203. }
  1204. /* finished that packet. the next one may be waiting... */
  1205. return 0;
  1206. }
  1207. /**
  1208. * udc_set_address - set the USB address for this device
  1209. * @address:
  1210. *
  1211. * Called from control endpoint function after it decodes a set address setup packet.
  1212. */
  1213. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address)
  1214. {
  1215. DEBUG_EP0("%s: %d\n", __func__, address);
  1216. /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */
  1217. dev->usb_address = address;
  1218. usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA);
  1219. usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA);
  1220. /* usb_read(USB_FA); */
  1221. }
  1222. /*
  1223. * DATA_STATE_RECV (OUT_PKT_RDY)
  1224. * - if error
  1225. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1226. * - else
  1227. * set EP0_CLR_OUT bit
  1228. if last set EP0_DATA_END bit
  1229. */
  1230. static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr)
  1231. {
  1232. struct lh7a40x_request *req;
  1233. struct lh7a40x_ep *ep = &dev->ep[0];
  1234. int ret;
  1235. DEBUG_EP0("%s: %x\n", __func__, csr);
  1236. if (list_empty(&ep->queue))
  1237. req = 0;
  1238. else
  1239. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1240. if (req) {
  1241. if (req->req.length == 0) {
  1242. DEBUG_EP0("ZERO LENGTH OUT!\n");
  1243. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1244. dev->ep0state = WAIT_FOR_SETUP;
  1245. return;
  1246. }
  1247. ret = read_fifo_ep0(ep, req);
  1248. if (ret) {
  1249. /* Done! */
  1250. DEBUG_EP0("%s: finished, waiting for status\n",
  1251. __func__);
  1252. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1253. dev->ep0state = WAIT_FOR_SETUP;
  1254. } else {
  1255. /* Not done yet.. */
  1256. DEBUG_EP0("%s: not finished\n", __func__);
  1257. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1258. }
  1259. } else {
  1260. DEBUG_EP0("NO REQ??!\n");
  1261. }
  1262. }
  1263. /*
  1264. * DATA_STATE_XMIT
  1265. */
  1266. static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr)
  1267. {
  1268. struct lh7a40x_request *req;
  1269. struct lh7a40x_ep *ep = &dev->ep[0];
  1270. int ret, need_zlp = 0;
  1271. DEBUG_EP0("%s: %x\n", __func__, csr);
  1272. if (list_empty(&ep->queue))
  1273. req = 0;
  1274. else
  1275. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1276. if (!req) {
  1277. DEBUG_EP0("%s: NULL REQ\n", __func__);
  1278. return 0;
  1279. }
  1280. if (req->req.length == 0) {
  1281. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1282. dev->ep0state = WAIT_FOR_SETUP;
  1283. return 1;
  1284. }
  1285. if (req->req.length - req->req.actual == EP0_PACKETSIZE) {
  1286. /* Next write will end with the packet size, */
  1287. /* so we need Zero-length-packet */
  1288. need_zlp = 1;
  1289. }
  1290. ret = write_fifo_ep0(ep, req);
  1291. if (ret == 1 && !need_zlp) {
  1292. /* Last packet */
  1293. DEBUG_EP0("%s: finished, waiting for status\n", __func__);
  1294. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1295. dev->ep0state = WAIT_FOR_SETUP;
  1296. } else {
  1297. DEBUG_EP0("%s: not finished\n", __func__);
  1298. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1299. }
  1300. if (need_zlp) {
  1301. DEBUG_EP0("%s: Need ZLP!\n", __func__);
  1302. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1303. dev->ep0state = DATA_STATE_NEED_ZLP;
  1304. }
  1305. return 1;
  1306. }
  1307. static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev,
  1308. struct usb_ctrlrequest *ctrl)
  1309. {
  1310. struct lh7a40x_ep *ep0 = &dev->ep[0];
  1311. struct lh7a40x_ep *qep;
  1312. int reqtype = (ctrl->bRequestType & USB_RECIP_MASK);
  1313. u16 val = 0;
  1314. if (reqtype == USB_RECIP_INTERFACE) {
  1315. /* This is not supported.
  1316. * And according to the USB spec, this one does nothing..
  1317. * Just return 0
  1318. */
  1319. DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n");
  1320. } else if (reqtype == USB_RECIP_DEVICE) {
  1321. DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n");
  1322. val |= (1 << 0); /* Self powered */
  1323. /*val |= (1<<1); *//* Remote wakeup */
  1324. } else if (reqtype == USB_RECIP_ENDPOINT) {
  1325. int ep_num = (ctrl->wIndex & ~USB_DIR_IN);
  1326. DEBUG_SETUP
  1327. ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n",
  1328. ep_num, ctrl->wLength);
  1329. if (ctrl->wLength > 2 || ep_num > 3)
  1330. return -EOPNOTSUPP;
  1331. qep = &dev->ep[ep_num];
  1332. if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0)
  1333. && ep_index(qep) != 0) {
  1334. return -EOPNOTSUPP;
  1335. }
  1336. usb_set_index(ep_index(qep));
  1337. /* Return status on next IN token */
  1338. switch (qep->ep_type) {
  1339. case ep_control:
  1340. val =
  1341. (usb_read(qep->csr1) & EP0_SEND_STALL) ==
  1342. EP0_SEND_STALL;
  1343. break;
  1344. case ep_bulk_in:
  1345. case ep_interrupt:
  1346. val =
  1347. (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) ==
  1348. USB_IN_CSR1_SEND_STALL;
  1349. break;
  1350. case ep_bulk_out:
  1351. val =
  1352. (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) ==
  1353. USB_OUT_CSR1_SEND_STALL;
  1354. break;
  1355. }
  1356. /* Back to EP0 index */
  1357. usb_set_index(0);
  1358. DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num,
  1359. ctrl->wIndex, val);
  1360. } else {
  1361. DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype);
  1362. return -EOPNOTSUPP;
  1363. }
  1364. /* Clear "out packet ready" */
  1365. usb_set((EP0_CLR_OUT), USB_EP0_CSR);
  1366. /* Put status to FIFO */
  1367. lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val));
  1368. /* Issue "In packet ready" */
  1369. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1370. return 0;
  1371. }
  1372. /*
  1373. * WAIT_FOR_SETUP (OUT_PKT_RDY)
  1374. * - read data packet from EP0 FIFO
  1375. * - decode command
  1376. * - if error
  1377. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1378. * - else
  1379. * set EP0_CLR_OUT | EP0_DATA_END bits
  1380. */
  1381. static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr)
  1382. {
  1383. struct lh7a40x_ep *ep = &dev->ep[0];
  1384. struct usb_ctrlrequest ctrl;
  1385. int i, bytes, is_in;
  1386. DEBUG_SETUP("%s: %x\n", __func__, csr);
  1387. /* Nuke all previous transfers */
  1388. nuke(ep, -EPROTO);
  1389. /* read control req from fifo (8 bytes) */
  1390. bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8);
  1391. DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes);
  1392. DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType,
  1393. ctrl.bRequestType == USB_DIR_IN);
  1394. DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest);
  1395. DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength);
  1396. DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8);
  1397. DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex);
  1398. /* Set direction of EP0 */
  1399. if (likely(ctrl.bRequestType & USB_DIR_IN)) {
  1400. ep->bEndpointAddress |= USB_DIR_IN;
  1401. is_in = 1;
  1402. } else {
  1403. ep->bEndpointAddress &= ~USB_DIR_IN;
  1404. is_in = 0;
  1405. }
  1406. dev->req_pending = 1;
  1407. /* Handle some SETUP packets ourselves */
  1408. switch (ctrl.bRequest) {
  1409. case USB_REQ_SET_ADDRESS:
  1410. if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
  1411. break;
  1412. DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue);
  1413. udc_set_address(dev, ctrl.wValue);
  1414. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1415. return;
  1416. case USB_REQ_GET_STATUS:{
  1417. if (lh7a40x_handle_get_status(dev, &ctrl) == 0)
  1418. return;
  1419. case USB_REQ_CLEAR_FEATURE:
  1420. case USB_REQ_SET_FEATURE:
  1421. if (ctrl.bRequestType == USB_RECIP_ENDPOINT) {
  1422. struct lh7a40x_ep *qep;
  1423. int ep_num = (ctrl.wIndex & 0x0f);
  1424. /* Support only HALT feature */
  1425. if (ctrl.wValue != 0 || ctrl.wLength != 0
  1426. || ep_num > 3 || ep_num < 1)
  1427. break;
  1428. qep = &dev->ep[ep_num];
  1429. spin_unlock(&dev->lock);
  1430. if (ctrl.bRequest == USB_REQ_SET_FEATURE) {
  1431. DEBUG_SETUP("SET_FEATURE (%d)\n",
  1432. ep_num);
  1433. lh7a40x_set_halt(&qep->ep, 1);
  1434. } else {
  1435. DEBUG_SETUP("CLR_FEATURE (%d)\n",
  1436. ep_num);
  1437. lh7a40x_set_halt(&qep->ep, 0);
  1438. }
  1439. spin_lock(&dev->lock);
  1440. usb_set_index(0);
  1441. /* Reply with a ZLP on next IN token */
  1442. usb_set((EP0_CLR_OUT | EP0_DATA_END),
  1443. USB_EP0_CSR);
  1444. return;
  1445. }
  1446. break;
  1447. }
  1448. default:
  1449. break;
  1450. }
  1451. if (likely(dev->driver)) {
  1452. /* device-2-host (IN) or no data setup command, process immediately */
  1453. spin_unlock(&dev->lock);
  1454. i = dev->driver->setup(&dev->gadget, &ctrl);
  1455. spin_lock(&dev->lock);
  1456. if (i < 0) {
  1457. /* setup processing failed, force stall */
  1458. DEBUG_SETUP
  1459. (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n",
  1460. i);
  1461. usb_set_index(0);
  1462. usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL),
  1463. USB_EP0_CSR);
  1464. /* ep->stopped = 1; */
  1465. dev->ep0state = WAIT_FOR_SETUP;
  1466. }
  1467. }
  1468. }
  1469. /*
  1470. * DATA_STATE_NEED_ZLP
  1471. */
  1472. static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr)
  1473. {
  1474. DEBUG_EP0("%s: %x\n", __func__, csr);
  1475. /* c.f. Table 15-14 */
  1476. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1477. dev->ep0state = WAIT_FOR_SETUP;
  1478. }
  1479. /*
  1480. * handle ep0 interrupt
  1481. */
  1482. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr)
  1483. {
  1484. struct lh7a40x_ep *ep = &dev->ep[0];
  1485. u32 csr;
  1486. /* Set index 0 */
  1487. usb_set_index(0);
  1488. csr = usb_read(USB_EP0_CSR);
  1489. DEBUG_EP0("%s: csr = %x\n", __func__, csr);
  1490. /*
  1491. * For overview of what we should be doing see c.f. Chapter 18.1.2.4
  1492. * We will follow that outline here modified by our own global state
  1493. * indication which provides hints as to what we think should be
  1494. * happening..
  1495. */
  1496. /*
  1497. * if SENT_STALL is set
  1498. * - clear the SENT_STALL bit
  1499. */
  1500. if (csr & EP0_SENT_STALL) {
  1501. DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __func__, csr);
  1502. usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR);
  1503. nuke(ep, -ECONNABORTED);
  1504. dev->ep0state = WAIT_FOR_SETUP;
  1505. return;
  1506. }
  1507. /*
  1508. * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear
  1509. * - fill EP0 FIFO
  1510. * - if last packet
  1511. * - set IN_PKT_RDY | DATA_END
  1512. * - else
  1513. * set IN_PKT_RDY
  1514. */
  1515. if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) {
  1516. DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n",
  1517. __func__);
  1518. switch (dev->ep0state) {
  1519. case DATA_STATE_XMIT:
  1520. DEBUG_EP0("continue with DATA_STATE_XMIT\n");
  1521. lh7a40x_ep0_in(dev, csr);
  1522. return;
  1523. case DATA_STATE_NEED_ZLP:
  1524. DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n");
  1525. lh7a40x_ep0_in_zlp(dev, csr);
  1526. return;
  1527. default:
  1528. /* Stall? */
  1529. DEBUG_EP0("Odd state!! state = %s\n",
  1530. state_names[dev->ep0state]);
  1531. dev->ep0state = WAIT_FOR_SETUP;
  1532. /* nuke(ep, 0); */
  1533. /* usb_set(EP0_SEND_STALL, ep->csr1); */
  1534. break;
  1535. }
  1536. }
  1537. /*
  1538. * if SETUP_END is set
  1539. * - abort the last transfer
  1540. * - set SERVICED_SETUP_END_BIT
  1541. */
  1542. if (csr & EP0_SETUP_END) {
  1543. DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __func__, csr);
  1544. usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR);
  1545. nuke(ep, 0);
  1546. dev->ep0state = WAIT_FOR_SETUP;
  1547. }
  1548. /*
  1549. * if EP0_OUT_PKT_RDY is set
  1550. * - read data packet from EP0 FIFO
  1551. * - decode command
  1552. * - if error
  1553. * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL
  1554. * - else
  1555. * set SERVICED_OUT_PKT_RDY | DATA_END bits
  1556. */
  1557. if (csr & EP0_OUT_PKT_RDY) {
  1558. DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __func__,
  1559. csr);
  1560. switch (dev->ep0state) {
  1561. case WAIT_FOR_SETUP:
  1562. DEBUG_EP0("WAIT_FOR_SETUP\n");
  1563. lh7a40x_ep0_setup(dev, csr);
  1564. break;
  1565. case DATA_STATE_RECV:
  1566. DEBUG_EP0("DATA_STATE_RECV\n");
  1567. lh7a40x_ep0_out(dev, csr);
  1568. break;
  1569. default:
  1570. /* send stall? */
  1571. DEBUG_EP0("strange state!! 2. send stall? state = %d\n",
  1572. dev->ep0state);
  1573. break;
  1574. }
  1575. }
  1576. }
  1577. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep)
  1578. {
  1579. u32 csr;
  1580. usb_set_index(0);
  1581. csr = usb_read(USB_EP0_CSR);
  1582. DEBUG_EP0("%s: %x\n", __func__, csr);
  1583. /* Clear "out packet ready" */
  1584. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1585. if (ep_is_in(ep)) {
  1586. dev->ep0state = DATA_STATE_XMIT;
  1587. lh7a40x_ep0_in(dev, csr);
  1588. } else {
  1589. dev->ep0state = DATA_STATE_RECV;
  1590. lh7a40x_ep0_out(dev, csr);
  1591. }
  1592. }
  1593. /* ---------------------------------------------------------------------------
  1594. * device-scoped parts of the api to the usb controller hardware
  1595. * ---------------------------------------------------------------------------
  1596. */
  1597. static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget)
  1598. {
  1599. u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */
  1600. u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */
  1601. DEBUG("%s, %p\n", __func__, _gadget);
  1602. return ((frame2 & 0x07) << 8) | (frame1 & 0xff);
  1603. }
  1604. static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget)
  1605. {
  1606. /* host may not have enabled remote wakeup */
  1607. /*if ((UDCCS0 & UDCCS0_DRWF) == 0)
  1608. return -EHOSTUNREACH;
  1609. udc_set_mask_UDCCR(UDCCR_RSM); */
  1610. return -ENOTSUPP;
  1611. }
  1612. static const struct usb_gadget_ops lh7a40x_udc_ops = {
  1613. .get_frame = lh7a40x_udc_get_frame,
  1614. .wakeup = lh7a40x_udc_wakeup,
  1615. /* current versions must always be self-powered */
  1616. };
  1617. static void nop_release(struct device *dev)
  1618. {
  1619. DEBUG("%s %s\n", __func__, dev_name(dev));
  1620. }
  1621. static struct lh7a40x_udc memory = {
  1622. .usb_address = 0,
  1623. .gadget = {
  1624. .ops = &lh7a40x_udc_ops,
  1625. .ep0 = &memory.ep[0].ep,
  1626. .name = driver_name,
  1627. .dev = {
  1628. .init_name = "gadget",
  1629. .release = nop_release,
  1630. },
  1631. },
  1632. /* control endpoint */
  1633. .ep[0] = {
  1634. .ep = {
  1635. .name = ep0name,
  1636. .ops = &lh7a40x_ep_ops,
  1637. .maxpacket = EP0_PACKETSIZE,
  1638. },
  1639. .dev = &memory,
  1640. .bEndpointAddress = 0,
  1641. .bmAttributes = 0,
  1642. .ep_type = ep_control,
  1643. .fifo = io_p2v(USB_EP0_FIFO),
  1644. .csr1 = USB_EP0_CSR,
  1645. .csr2 = USB_EP0_CSR,
  1646. },
  1647. /* first group of endpoints */
  1648. .ep[1] = {
  1649. .ep = {
  1650. .name = "ep1in-bulk",
  1651. .ops = &lh7a40x_ep_ops,
  1652. .maxpacket = 64,
  1653. },
  1654. .dev = &memory,
  1655. .bEndpointAddress = USB_DIR_IN | 1,
  1656. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1657. .ep_type = ep_bulk_in,
  1658. .fifo = io_p2v(USB_EP1_FIFO),
  1659. .csr1 = USB_IN_CSR1,
  1660. .csr2 = USB_IN_CSR2,
  1661. },
  1662. .ep[2] = {
  1663. .ep = {
  1664. .name = "ep2out-bulk",
  1665. .ops = &lh7a40x_ep_ops,
  1666. .maxpacket = 64,
  1667. },
  1668. .dev = &memory,
  1669. .bEndpointAddress = 2,
  1670. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1671. .ep_type = ep_bulk_out,
  1672. .fifo = io_p2v(USB_EP2_FIFO),
  1673. .csr1 = USB_OUT_CSR1,
  1674. .csr2 = USB_OUT_CSR2,
  1675. },
  1676. .ep[3] = {
  1677. .ep = {
  1678. .name = "ep3in-int",
  1679. .ops = &lh7a40x_ep_ops,
  1680. .maxpacket = 64,
  1681. },
  1682. .dev = &memory,
  1683. .bEndpointAddress = USB_DIR_IN | 3,
  1684. .bmAttributes = USB_ENDPOINT_XFER_INT,
  1685. .ep_type = ep_interrupt,
  1686. .fifo = io_p2v(USB_EP3_FIFO),
  1687. .csr1 = USB_IN_CSR1,
  1688. .csr2 = USB_IN_CSR2,
  1689. },
  1690. };
  1691. /*
  1692. * probe - binds to the platform device
  1693. */
  1694. static int lh7a40x_udc_probe(struct platform_device *pdev)
  1695. {
  1696. struct lh7a40x_udc *dev = &memory;
  1697. int retval;
  1698. DEBUG("%s: %p\n", __func__, pdev);
  1699. spin_lock_init(&dev->lock);
  1700. dev->dev = &pdev->dev;
  1701. device_initialize(&dev->gadget.dev);
  1702. dev->gadget.dev.parent = &pdev->dev;
  1703. the_controller = dev;
  1704. platform_set_drvdata(pdev, dev);
  1705. udc_disable(dev);
  1706. udc_reinit(dev);
  1707. /* irq setup after old hardware state is cleaned up */
  1708. retval =
  1709. request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name,
  1710. dev);
  1711. if (retval != 0) {
  1712. DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name,
  1713. IRQ_USBINTR, retval);
  1714. return -EBUSY;
  1715. }
  1716. create_proc_files();
  1717. return retval;
  1718. }
  1719. static int lh7a40x_udc_remove(struct platform_device *pdev)
  1720. {
  1721. struct lh7a40x_udc *dev = platform_get_drvdata(pdev);
  1722. DEBUG("%s: %p\n", __func__, pdev);
  1723. if (dev->driver)
  1724. return -EBUSY;
  1725. udc_disable(dev);
  1726. remove_proc_files();
  1727. free_irq(IRQ_USBINTR, dev);
  1728. platform_set_drvdata(pdev, 0);
  1729. the_controller = 0;
  1730. return 0;
  1731. }
  1732. /*-------------------------------------------------------------------------*/
  1733. static struct platform_driver udc_driver = {
  1734. .probe = lh7a40x_udc_probe,
  1735. .remove = lh7a40x_udc_remove,
  1736. /* FIXME power management support */
  1737. /* .suspend = ... disable UDC */
  1738. /* .resume = ... re-enable UDC */
  1739. .driver = {
  1740. .name = (char *)driver_name,
  1741. .owner = THIS_MODULE,
  1742. },
  1743. };
  1744. static int __init udc_init(void)
  1745. {
  1746. DEBUG("%s: %s version %s\n", __func__, driver_name, DRIVER_VERSION);
  1747. return platform_driver_register(&udc_driver);
  1748. }
  1749. static void __exit udc_exit(void)
  1750. {
  1751. platform_driver_unregister(&udc_driver);
  1752. }
  1753. module_init(udc_init);
  1754. module_exit(udc_exit);
  1755. MODULE_DESCRIPTION(DRIVER_DESC);
  1756. MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen");
  1757. MODULE_LICENSE("GPL");
  1758. MODULE_ALIAS("platform:lh7a40x_udc");