ehci-dbgp.c 26 KB

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  1. /*
  2. * Standalone EHCI usb debug driver
  3. *
  4. * Originally written by:
  5. * Eric W. Biederman" <ebiederm@xmission.com> and
  6. * Yinghai Lu <yhlu.kernel@gmail.com>
  7. *
  8. * Changes for early/late printk and HW errata:
  9. * Jason Wessel <jason.wessel@windriver.com>
  10. * Copyright (C) 2009 Wind River Systems, Inc.
  11. *
  12. */
  13. #include <linux/console.h>
  14. #include <linux/errno.h>
  15. #include <linux/module.h>
  16. #include <linux/pci_regs.h>
  17. #include <linux/pci_ids.h>
  18. #include <linux/usb/ch9.h>
  19. #include <linux/usb/ehci_def.h>
  20. #include <linux/delay.h>
  21. #include <linux/serial_core.h>
  22. #include <linux/kgdb.h>
  23. #include <linux/kthread.h>
  24. #include <asm/io.h>
  25. #include <asm/pci-direct.h>
  26. #include <asm/fixmap.h>
  27. /* The code here is intended to talk directly to the EHCI debug port
  28. * and does not require that you have any kind of USB host controller
  29. * drivers or USB device drivers compiled into the kernel.
  30. *
  31. * If you make a change to anything in here, the following test cases
  32. * need to pass where a USB debug device works in the following
  33. * configurations.
  34. *
  35. * 1. boot args: earlyprintk=dbgp
  36. * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
  37. * o kernel compiled with CONFIG_USB_EHCI_HCD=y
  38. * 2. boot args: earlyprintk=dbgp,keep
  39. * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
  40. * o kernel compiled with CONFIG_USB_EHCI_HCD=y
  41. * 3. boot args: earlyprintk=dbgp console=ttyUSB0
  42. * o kernel has CONFIG_USB_EHCI_HCD=y and
  43. * CONFIG_USB_SERIAL_DEBUG=y
  44. * 4. boot args: earlyprintk=vga,dbgp
  45. * o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
  46. * o kernel compiled with CONFIG_USB_EHCI_HCD=y
  47. *
  48. * For the 4th configuration you can turn on or off the DBGP_DEBUG
  49. * such that you can debug the dbgp device's driver code.
  50. */
  51. static int dbgp_phys_port = 1;
  52. static struct ehci_caps __iomem *ehci_caps;
  53. static struct ehci_regs __iomem *ehci_regs;
  54. static struct ehci_dbg_port __iomem *ehci_debug;
  55. static int dbgp_not_safe; /* Cannot use debug device during ehci reset */
  56. static unsigned int dbgp_endpoint_out;
  57. static unsigned int dbgp_endpoint_in;
  58. struct ehci_dev {
  59. u32 bus;
  60. u32 slot;
  61. u32 func;
  62. };
  63. static struct ehci_dev ehci_dev;
  64. #define USB_DEBUG_DEVNUM 127
  65. #ifdef DBGP_DEBUG
  66. #define dbgp_printk printk
  67. static void dbgp_ehci_status(char *str)
  68. {
  69. if (!ehci_debug)
  70. return;
  71. dbgp_printk("dbgp: %s\n", str);
  72. dbgp_printk(" Debug control: %08x", readl(&ehci_debug->control));
  73. dbgp_printk(" ehci cmd : %08x", readl(&ehci_regs->command));
  74. dbgp_printk(" ehci conf flg: %08x\n",
  75. readl(&ehci_regs->configured_flag));
  76. dbgp_printk(" ehci status : %08x", readl(&ehci_regs->status));
  77. dbgp_printk(" ehci portsc : %08x\n",
  78. readl(&ehci_regs->port_status[dbgp_phys_port - 1]));
  79. }
  80. #else
  81. static inline void dbgp_ehci_status(char *str) { }
  82. static inline void dbgp_printk(const char *fmt, ...) { }
  83. #endif
  84. static inline u32 dbgp_len_update(u32 x, u32 len)
  85. {
  86. return (x & ~0x0f) | (len & 0x0f);
  87. }
  88. #ifdef CONFIG_KGDB
  89. static struct kgdb_io kgdbdbgp_io_ops;
  90. #define dbgp_kgdb_mode (dbg_io_ops == &kgdbdbgp_io_ops)
  91. #else
  92. #define dbgp_kgdb_mode (0)
  93. #endif
  94. /*
  95. * USB Packet IDs (PIDs)
  96. */
  97. /* token */
  98. #define USB_PID_OUT 0xe1
  99. #define USB_PID_IN 0x69
  100. #define USB_PID_SOF 0xa5
  101. #define USB_PID_SETUP 0x2d
  102. /* handshake */
  103. #define USB_PID_ACK 0xd2
  104. #define USB_PID_NAK 0x5a
  105. #define USB_PID_STALL 0x1e
  106. #define USB_PID_NYET 0x96
  107. /* data */
  108. #define USB_PID_DATA0 0xc3
  109. #define USB_PID_DATA1 0x4b
  110. #define USB_PID_DATA2 0x87
  111. #define USB_PID_MDATA 0x0f
  112. /* Special */
  113. #define USB_PID_PREAMBLE 0x3c
  114. #define USB_PID_ERR 0x3c
  115. #define USB_PID_SPLIT 0x78
  116. #define USB_PID_PING 0xb4
  117. #define USB_PID_UNDEF_0 0xf0
  118. #define USB_PID_DATA_TOGGLE 0x88
  119. #define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
  120. #define PCI_CAP_ID_EHCI_DEBUG 0xa
  121. #define HUB_ROOT_RESET_TIME 50 /* times are in msec */
  122. #define HUB_SHORT_RESET_TIME 10
  123. #define HUB_LONG_RESET_TIME 200
  124. #define HUB_RESET_TIMEOUT 500
  125. #define DBGP_MAX_PACKET 8
  126. #define DBGP_TIMEOUT (250 * 1000)
  127. #define DBGP_LOOPS 1000
  128. static inline u32 dbgp_pid_write_update(u32 x, u32 tok)
  129. {
  130. static int data0 = USB_PID_DATA1;
  131. data0 ^= USB_PID_DATA_TOGGLE;
  132. return (x & 0xffff0000) | (data0 << 8) | (tok & 0xff);
  133. }
  134. static inline u32 dbgp_pid_read_update(u32 x, u32 tok)
  135. {
  136. return (x & 0xffff0000) | (USB_PID_DATA0 << 8) | (tok & 0xff);
  137. }
  138. static int dbgp_wait_until_complete(void)
  139. {
  140. u32 ctrl;
  141. int loop = DBGP_TIMEOUT;
  142. do {
  143. ctrl = readl(&ehci_debug->control);
  144. /* Stop when the transaction is finished */
  145. if (ctrl & DBGP_DONE)
  146. break;
  147. udelay(1);
  148. } while (--loop > 0);
  149. if (!loop)
  150. return -DBGP_TIMEOUT;
  151. /*
  152. * Now that we have observed the completed transaction,
  153. * clear the done bit.
  154. */
  155. writel(ctrl | DBGP_DONE, &ehci_debug->control);
  156. return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
  157. }
  158. static inline void dbgp_mdelay(int ms)
  159. {
  160. int i;
  161. while (ms--) {
  162. for (i = 0; i < 1000; i++)
  163. outb(0x1, 0x80);
  164. }
  165. }
  166. static void dbgp_breath(void)
  167. {
  168. /* Sleep to give the debug port a chance to breathe */
  169. }
  170. static int dbgp_wait_until_done(unsigned ctrl, int loop)
  171. {
  172. u32 pids, lpid;
  173. int ret;
  174. retry:
  175. writel(ctrl | DBGP_GO, &ehci_debug->control);
  176. ret = dbgp_wait_until_complete();
  177. pids = readl(&ehci_debug->pids);
  178. lpid = DBGP_PID_GET(pids);
  179. if (ret < 0) {
  180. /* A -DBGP_TIMEOUT failure here means the device has
  181. * failed, perhaps because it was unplugged, in which
  182. * case we do not want to hang the system so the dbgp
  183. * will be marked as unsafe to use. EHCI reset is the
  184. * only way to recover if you unplug the dbgp device.
  185. */
  186. if (ret == -DBGP_TIMEOUT && !dbgp_not_safe)
  187. dbgp_not_safe = 1;
  188. if (ret == -DBGP_ERR_BAD && --loop > 0)
  189. goto retry;
  190. return ret;
  191. }
  192. /*
  193. * If the port is getting full or it has dropped data
  194. * start pacing ourselves, not necessary but it's friendly.
  195. */
  196. if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
  197. dbgp_breath();
  198. /* If I get a NACK reissue the transmission */
  199. if (lpid == USB_PID_NAK) {
  200. if (--loop > 0)
  201. goto retry;
  202. }
  203. return ret;
  204. }
  205. static inline void dbgp_set_data(const void *buf, int size)
  206. {
  207. const unsigned char *bytes = buf;
  208. u32 lo, hi;
  209. int i;
  210. lo = hi = 0;
  211. for (i = 0; i < 4 && i < size; i++)
  212. lo |= bytes[i] << (8*i);
  213. for (; i < 8 && i < size; i++)
  214. hi |= bytes[i] << (8*(i - 4));
  215. writel(lo, &ehci_debug->data03);
  216. writel(hi, &ehci_debug->data47);
  217. }
  218. static inline void dbgp_get_data(void *buf, int size)
  219. {
  220. unsigned char *bytes = buf;
  221. u32 lo, hi;
  222. int i;
  223. lo = readl(&ehci_debug->data03);
  224. hi = readl(&ehci_debug->data47);
  225. for (i = 0; i < 4 && i < size; i++)
  226. bytes[i] = (lo >> (8*i)) & 0xff;
  227. for (; i < 8 && i < size; i++)
  228. bytes[i] = (hi >> (8*(i - 4))) & 0xff;
  229. }
  230. static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
  231. const char *bytes, int size)
  232. {
  233. int ret;
  234. u32 addr;
  235. u32 pids, ctrl;
  236. if (size > DBGP_MAX_PACKET)
  237. return -1;
  238. addr = DBGP_EPADDR(devnum, endpoint);
  239. pids = readl(&ehci_debug->pids);
  240. pids = dbgp_pid_write_update(pids, USB_PID_OUT);
  241. ctrl = readl(&ehci_debug->control);
  242. ctrl = dbgp_len_update(ctrl, size);
  243. ctrl |= DBGP_OUT;
  244. ctrl |= DBGP_GO;
  245. dbgp_set_data(bytes, size);
  246. writel(addr, &ehci_debug->address);
  247. writel(pids, &ehci_debug->pids);
  248. ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
  249. return ret;
  250. }
  251. static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
  252. int size, int loops)
  253. {
  254. u32 pids, addr, ctrl;
  255. int ret;
  256. if (size > DBGP_MAX_PACKET)
  257. return -1;
  258. addr = DBGP_EPADDR(devnum, endpoint);
  259. pids = readl(&ehci_debug->pids);
  260. pids = dbgp_pid_read_update(pids, USB_PID_IN);
  261. ctrl = readl(&ehci_debug->control);
  262. ctrl = dbgp_len_update(ctrl, size);
  263. ctrl &= ~DBGP_OUT;
  264. ctrl |= DBGP_GO;
  265. writel(addr, &ehci_debug->address);
  266. writel(pids, &ehci_debug->pids);
  267. ret = dbgp_wait_until_done(ctrl, loops);
  268. if (ret < 0)
  269. return ret;
  270. if (size > ret)
  271. size = ret;
  272. dbgp_get_data(data, size);
  273. return ret;
  274. }
  275. static int dbgp_control_msg(unsigned devnum, int requesttype,
  276. int request, int value, int index, void *data, int size)
  277. {
  278. u32 pids, addr, ctrl;
  279. struct usb_ctrlrequest req;
  280. int read;
  281. int ret;
  282. read = (requesttype & USB_DIR_IN) != 0;
  283. if (size > (read ? DBGP_MAX_PACKET:0))
  284. return -1;
  285. /* Compute the control message */
  286. req.bRequestType = requesttype;
  287. req.bRequest = request;
  288. req.wValue = cpu_to_le16(value);
  289. req.wIndex = cpu_to_le16(index);
  290. req.wLength = cpu_to_le16(size);
  291. pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
  292. addr = DBGP_EPADDR(devnum, 0);
  293. ctrl = readl(&ehci_debug->control);
  294. ctrl = dbgp_len_update(ctrl, sizeof(req));
  295. ctrl |= DBGP_OUT;
  296. ctrl |= DBGP_GO;
  297. /* Send the setup message */
  298. dbgp_set_data(&req, sizeof(req));
  299. writel(addr, &ehci_debug->address);
  300. writel(pids, &ehci_debug->pids);
  301. ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
  302. if (ret < 0)
  303. return ret;
  304. /* Read the result */
  305. return dbgp_bulk_read(devnum, 0, data, size, DBGP_LOOPS);
  306. }
  307. /* Find a PCI capability */
  308. static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap)
  309. {
  310. u8 pos;
  311. int bytes;
  312. if (!(read_pci_config_16(num, slot, func, PCI_STATUS) &
  313. PCI_STATUS_CAP_LIST))
  314. return 0;
  315. pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
  316. for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
  317. u8 id;
  318. pos &= ~3;
  319. id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID);
  320. if (id == 0xff)
  321. break;
  322. if (id == cap)
  323. return pos;
  324. pos = read_pci_config_byte(num, slot, func,
  325. pos+PCI_CAP_LIST_NEXT);
  326. }
  327. return 0;
  328. }
  329. static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func)
  330. {
  331. u32 class;
  332. class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
  333. if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI)
  334. return 0;
  335. return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
  336. }
  337. static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
  338. {
  339. u32 bus, slot, func;
  340. for (bus = 0; bus < 256; bus++) {
  341. for (slot = 0; slot < 32; slot++) {
  342. for (func = 0; func < 8; func++) {
  343. unsigned cap;
  344. cap = __find_dbgp(bus, slot, func);
  345. if (!cap)
  346. continue;
  347. if (ehci_num-- != 0)
  348. continue;
  349. *rbus = bus;
  350. *rslot = slot;
  351. *rfunc = func;
  352. return cap;
  353. }
  354. }
  355. }
  356. return 0;
  357. }
  358. static int dbgp_ehci_startup(void)
  359. {
  360. u32 ctrl, cmd, status;
  361. int loop;
  362. /* Claim ownership, but do not enable yet */
  363. ctrl = readl(&ehci_debug->control);
  364. ctrl |= DBGP_OWNER;
  365. ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
  366. writel(ctrl, &ehci_debug->control);
  367. udelay(1);
  368. dbgp_ehci_status("EHCI startup");
  369. /* Start the ehci running */
  370. cmd = readl(&ehci_regs->command);
  371. cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
  372. cmd |= CMD_RUN;
  373. writel(cmd, &ehci_regs->command);
  374. /* Ensure everything is routed to the EHCI */
  375. writel(FLAG_CF, &ehci_regs->configured_flag);
  376. /* Wait until the controller is no longer halted */
  377. loop = 10;
  378. do {
  379. status = readl(&ehci_regs->status);
  380. if (!(status & STS_HALT))
  381. break;
  382. udelay(1);
  383. } while (--loop > 0);
  384. if (!loop) {
  385. dbgp_printk("ehci can not be started\n");
  386. return -ENODEV;
  387. }
  388. dbgp_printk("ehci started\n");
  389. return 0;
  390. }
  391. static int dbgp_ehci_controller_reset(void)
  392. {
  393. int loop = 250 * 1000;
  394. u32 cmd;
  395. /* Reset the EHCI controller */
  396. cmd = readl(&ehci_regs->command);
  397. cmd |= CMD_RESET;
  398. writel(cmd, &ehci_regs->command);
  399. do {
  400. cmd = readl(&ehci_regs->command);
  401. } while ((cmd & CMD_RESET) && (--loop > 0));
  402. if (!loop) {
  403. dbgp_printk("can not reset ehci\n");
  404. return -1;
  405. }
  406. dbgp_ehci_status("ehci reset done");
  407. return 0;
  408. }
  409. static int ehci_wait_for_port(int port);
  410. /* Return 0 on success
  411. * Return -ENODEV for any general failure
  412. * Return -EIO if wait for port fails
  413. */
  414. int dbgp_external_startup(void)
  415. {
  416. int devnum;
  417. struct usb_debug_descriptor dbgp_desc;
  418. int ret;
  419. u32 ctrl, portsc, cmd;
  420. int dbg_port = dbgp_phys_port;
  421. int tries = 3;
  422. int reset_port_tries = 1;
  423. int try_hard_once = 1;
  424. try_port_reset_again:
  425. ret = dbgp_ehci_startup();
  426. if (ret)
  427. return ret;
  428. /* Wait for a device to show up in the debug port */
  429. ret = ehci_wait_for_port(dbg_port);
  430. if (ret < 0) {
  431. portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
  432. if (!(portsc & PORT_CONNECT) && try_hard_once) {
  433. /* Last ditch effort to try to force enable
  434. * the debug device by using the packet test
  435. * ehci command to try and wake it up. */
  436. try_hard_once = 0;
  437. cmd = readl(&ehci_regs->command);
  438. cmd &= ~CMD_RUN;
  439. writel(cmd, &ehci_regs->command);
  440. portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
  441. portsc |= PORT_TEST_PKT;
  442. writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
  443. dbgp_ehci_status("Trying to force debug port online");
  444. mdelay(50);
  445. dbgp_ehci_controller_reset();
  446. goto try_port_reset_again;
  447. } else if (reset_port_tries--) {
  448. goto try_port_reset_again;
  449. }
  450. dbgp_printk("No device found in debug port\n");
  451. return -EIO;
  452. }
  453. dbgp_ehci_status("wait for port done");
  454. /* Enable the debug port */
  455. ctrl = readl(&ehci_debug->control);
  456. ctrl |= DBGP_CLAIM;
  457. writel(ctrl, &ehci_debug->control);
  458. ctrl = readl(&ehci_debug->control);
  459. if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
  460. dbgp_printk("No device in debug port\n");
  461. writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
  462. return -ENODEV;
  463. }
  464. dbgp_ehci_status("debug ported enabled");
  465. /* Completely transfer the debug device to the debug controller */
  466. portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
  467. portsc &= ~PORT_PE;
  468. writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
  469. dbgp_mdelay(100);
  470. try_again:
  471. /* Find the debug device and make it device number 127 */
  472. for (devnum = 0; devnum <= 127; devnum++) {
  473. ret = dbgp_control_msg(devnum,
  474. USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
  475. USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
  476. &dbgp_desc, sizeof(dbgp_desc));
  477. if (ret > 0)
  478. break;
  479. }
  480. if (devnum > 127) {
  481. dbgp_printk("Could not find attached debug device\n");
  482. goto err;
  483. }
  484. if (ret < 0) {
  485. dbgp_printk("Attached device is not a debug device\n");
  486. goto err;
  487. }
  488. dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
  489. dbgp_endpoint_in = dbgp_desc.bDebugInEndpoint;
  490. /* Move the device to 127 if it isn't already there */
  491. if (devnum != USB_DEBUG_DEVNUM) {
  492. ret = dbgp_control_msg(devnum,
  493. USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
  494. USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
  495. if (ret < 0) {
  496. dbgp_printk("Could not move attached device to %d\n",
  497. USB_DEBUG_DEVNUM);
  498. goto err;
  499. }
  500. devnum = USB_DEBUG_DEVNUM;
  501. dbgp_printk("debug device renamed to 127\n");
  502. }
  503. /* Enable the debug interface */
  504. ret = dbgp_control_msg(USB_DEBUG_DEVNUM,
  505. USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
  506. USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
  507. if (ret < 0) {
  508. dbgp_printk(" Could not enable the debug device\n");
  509. goto err;
  510. }
  511. dbgp_printk("debug interface enabled\n");
  512. /* Perform a small write to get the even/odd data state in sync
  513. */
  514. ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1);
  515. if (ret < 0) {
  516. dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
  517. goto err;
  518. }
  519. dbgp_printk("small write doned\n");
  520. dbgp_not_safe = 0;
  521. return 0;
  522. err:
  523. if (tries--)
  524. goto try_again;
  525. return -ENODEV;
  526. }
  527. EXPORT_SYMBOL_GPL(dbgp_external_startup);
  528. static int ehci_reset_port(int port)
  529. {
  530. u32 portsc;
  531. u32 delay_time, delay;
  532. int loop;
  533. dbgp_ehci_status("reset port");
  534. /* Reset the usb debug port */
  535. portsc = readl(&ehci_regs->port_status[port - 1]);
  536. portsc &= ~PORT_PE;
  537. portsc |= PORT_RESET;
  538. writel(portsc, &ehci_regs->port_status[port - 1]);
  539. delay = HUB_ROOT_RESET_TIME;
  540. for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
  541. delay_time += delay) {
  542. dbgp_mdelay(delay);
  543. portsc = readl(&ehci_regs->port_status[port - 1]);
  544. if (!(portsc & PORT_RESET))
  545. break;
  546. }
  547. if (portsc & PORT_RESET) {
  548. /* force reset to complete */
  549. loop = 100 * 1000;
  550. writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
  551. &ehci_regs->port_status[port - 1]);
  552. do {
  553. udelay(1);
  554. portsc = readl(&ehci_regs->port_status[port-1]);
  555. } while ((portsc & PORT_RESET) && (--loop > 0));
  556. }
  557. /* Device went away? */
  558. if (!(portsc & PORT_CONNECT))
  559. return -ENOTCONN;
  560. /* bomb out completely if something weird happend */
  561. if ((portsc & PORT_CSC))
  562. return -EINVAL;
  563. /* If we've finished resetting, then break out of the loop */
  564. if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
  565. return 0;
  566. return -EBUSY;
  567. }
  568. static int ehci_wait_for_port(int port)
  569. {
  570. u32 status;
  571. int ret, reps;
  572. for (reps = 0; reps < 300; reps++) {
  573. status = readl(&ehci_regs->status);
  574. if (status & STS_PCD)
  575. break;
  576. dbgp_mdelay(1);
  577. }
  578. ret = ehci_reset_port(port);
  579. if (ret == 0)
  580. return 0;
  581. return -ENOTCONN;
  582. }
  583. typedef void (*set_debug_port_t)(int port);
  584. static void __init default_set_debug_port(int port)
  585. {
  586. }
  587. static set_debug_port_t __initdata set_debug_port = default_set_debug_port;
  588. static void __init nvidia_set_debug_port(int port)
  589. {
  590. u32 dword;
  591. dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
  592. 0x74);
  593. dword &= ~(0x0f<<12);
  594. dword |= ((port & 0x0f)<<12);
  595. write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74,
  596. dword);
  597. dbgp_printk("set debug port to %d\n", port);
  598. }
  599. static void __init detect_set_debug_port(void)
  600. {
  601. u32 vendorid;
  602. vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
  603. 0x00);
  604. if ((vendorid & 0xffff) == 0x10de) {
  605. dbgp_printk("using nvidia set_debug_port\n");
  606. set_debug_port = nvidia_set_debug_port;
  607. }
  608. }
  609. /* The code in early_ehci_bios_handoff() is derived from the usb pci
  610. * quirk initialization, but altered so as to use the early PCI
  611. * routines. */
  612. #define EHCI_USBLEGSUP_BIOS (1 << 16) /* BIOS semaphore */
  613. #define EHCI_USBLEGCTLSTS 4 /* legacy control/status */
  614. static void __init early_ehci_bios_handoff(void)
  615. {
  616. u32 hcc_params = readl(&ehci_caps->hcc_params);
  617. int offset = (hcc_params >> 8) & 0xff;
  618. u32 cap;
  619. int msec;
  620. if (!offset)
  621. return;
  622. cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
  623. ehci_dev.func, offset);
  624. dbgp_printk("dbgp: ehci BIOS state %08x\n", cap);
  625. if ((cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS)) {
  626. dbgp_printk("dbgp: BIOS handoff\n");
  627. write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
  628. ehci_dev.func, offset + 3, 1);
  629. }
  630. /* if boot firmware now owns EHCI, spin till it hands it over. */
  631. msec = 1000;
  632. while ((cap & EHCI_USBLEGSUP_BIOS) && (msec > 0)) {
  633. mdelay(10);
  634. msec -= 10;
  635. cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
  636. ehci_dev.func, offset);
  637. }
  638. if (cap & EHCI_USBLEGSUP_BIOS) {
  639. /* well, possibly buggy BIOS... try to shut it down,
  640. * and hope nothing goes too wrong */
  641. dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap);
  642. write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
  643. ehci_dev.func, offset + 2, 0);
  644. }
  645. /* just in case, always disable EHCI SMIs */
  646. write_pci_config_byte(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
  647. offset + EHCI_USBLEGCTLSTS, 0);
  648. }
  649. static int __init ehci_setup(void)
  650. {
  651. u32 ctrl, portsc, hcs_params;
  652. u32 debug_port, new_debug_port = 0, n_ports;
  653. int ret, i;
  654. int port_map_tried;
  655. int playtimes = 3;
  656. early_ehci_bios_handoff();
  657. try_next_time:
  658. port_map_tried = 0;
  659. try_next_port:
  660. hcs_params = readl(&ehci_caps->hcs_params);
  661. debug_port = HCS_DEBUG_PORT(hcs_params);
  662. dbgp_phys_port = debug_port;
  663. n_ports = HCS_N_PORTS(hcs_params);
  664. dbgp_printk("debug_port: %d\n", debug_port);
  665. dbgp_printk("n_ports: %d\n", n_ports);
  666. dbgp_ehci_status("");
  667. for (i = 1; i <= n_ports; i++) {
  668. portsc = readl(&ehci_regs->port_status[i-1]);
  669. dbgp_printk("portstatus%d: %08x\n", i, portsc);
  670. }
  671. if (port_map_tried && (new_debug_port != debug_port)) {
  672. if (--playtimes) {
  673. set_debug_port(new_debug_port);
  674. goto try_next_time;
  675. }
  676. return -1;
  677. }
  678. /* Only reset the controller if it is not already in the
  679. * configured state */
  680. if (!(readl(&ehci_regs->configured_flag) & FLAG_CF)) {
  681. if (dbgp_ehci_controller_reset() != 0)
  682. return -1;
  683. } else {
  684. dbgp_ehci_status("ehci skip - already configured");
  685. }
  686. ret = dbgp_external_startup();
  687. if (ret == -EIO)
  688. goto next_debug_port;
  689. if (ret < 0) {
  690. /* Things didn't work so remove my claim */
  691. ctrl = readl(&ehci_debug->control);
  692. ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
  693. writel(ctrl, &ehci_debug->control);
  694. return -1;
  695. }
  696. return 0;
  697. next_debug_port:
  698. port_map_tried |= (1<<(debug_port - 1));
  699. new_debug_port = ((debug_port-1+1)%n_ports) + 1;
  700. if (port_map_tried != ((1<<n_ports) - 1)) {
  701. set_debug_port(new_debug_port);
  702. goto try_next_port;
  703. }
  704. if (--playtimes) {
  705. set_debug_port(new_debug_port);
  706. goto try_next_time;
  707. }
  708. return -1;
  709. }
  710. int __init early_dbgp_init(char *s)
  711. {
  712. u32 debug_port, bar, offset;
  713. u32 bus, slot, func, cap;
  714. void __iomem *ehci_bar;
  715. u32 dbgp_num;
  716. u32 bar_val;
  717. char *e;
  718. int ret;
  719. u8 byte;
  720. if (!early_pci_allowed())
  721. return -1;
  722. dbgp_num = 0;
  723. if (*s)
  724. dbgp_num = simple_strtoul(s, &e, 10);
  725. dbgp_printk("dbgp_num: %d\n", dbgp_num);
  726. cap = find_dbgp(dbgp_num, &bus, &slot, &func);
  727. if (!cap)
  728. return -1;
  729. dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot,
  730. func);
  731. debug_port = read_pci_config(bus, slot, func, cap);
  732. bar = (debug_port >> 29) & 0x7;
  733. bar = (bar * 4) + 0xc;
  734. offset = (debug_port >> 16) & 0xfff;
  735. dbgp_printk("bar: %02x offset: %03x\n", bar, offset);
  736. if (bar != PCI_BASE_ADDRESS_0) {
  737. dbgp_printk("only debug ports on bar 1 handled.\n");
  738. return -1;
  739. }
  740. bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
  741. dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset);
  742. if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) {
  743. dbgp_printk("only simple 32bit mmio bars supported\n");
  744. return -1;
  745. }
  746. /* double check if the mem space is enabled */
  747. byte = read_pci_config_byte(bus, slot, func, 0x04);
  748. if (!(byte & 0x2)) {
  749. byte |= 0x02;
  750. write_pci_config_byte(bus, slot, func, 0x04, byte);
  751. dbgp_printk("mmio for ehci enabled\n");
  752. }
  753. /*
  754. * FIXME I don't have the bar size so just guess PAGE_SIZE is more
  755. * than enough. 1K is the biggest I have seen.
  756. */
  757. set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK);
  758. ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE);
  759. ehci_bar += bar_val & ~PAGE_MASK;
  760. dbgp_printk("ehci_bar: %p\n", ehci_bar);
  761. ehci_caps = ehci_bar;
  762. ehci_regs = ehci_bar + HC_LENGTH(readl(&ehci_caps->hc_capbase));
  763. ehci_debug = ehci_bar + offset;
  764. ehci_dev.bus = bus;
  765. ehci_dev.slot = slot;
  766. ehci_dev.func = func;
  767. detect_set_debug_port();
  768. ret = ehci_setup();
  769. if (ret < 0) {
  770. dbgp_printk("ehci_setup failed\n");
  771. ehci_debug = NULL;
  772. return -1;
  773. }
  774. dbgp_ehci_status("early_init_complete");
  775. return 0;
  776. }
  777. static void early_dbgp_write(struct console *con, const char *str, u32 n)
  778. {
  779. int chunk, ret;
  780. char buf[DBGP_MAX_PACKET];
  781. int use_cr = 0;
  782. u32 cmd, ctrl;
  783. int reset_run = 0;
  784. if (!ehci_debug || dbgp_not_safe)
  785. return;
  786. cmd = readl(&ehci_regs->command);
  787. if (unlikely(!(cmd & CMD_RUN))) {
  788. /* If the ehci controller is not in the run state do extended
  789. * checks to see if the acpi or some other initialization also
  790. * reset the ehci debug port */
  791. ctrl = readl(&ehci_debug->control);
  792. if (!(ctrl & DBGP_ENABLED)) {
  793. dbgp_not_safe = 1;
  794. dbgp_external_startup();
  795. } else {
  796. cmd |= CMD_RUN;
  797. writel(cmd, &ehci_regs->command);
  798. reset_run = 1;
  799. }
  800. }
  801. while (n > 0) {
  802. for (chunk = 0; chunk < DBGP_MAX_PACKET && n > 0;
  803. str++, chunk++, n--) {
  804. if (!use_cr && *str == '\n') {
  805. use_cr = 1;
  806. buf[chunk] = '\r';
  807. str--;
  808. n++;
  809. continue;
  810. }
  811. if (use_cr)
  812. use_cr = 0;
  813. buf[chunk] = *str;
  814. }
  815. if (chunk > 0) {
  816. ret = dbgp_bulk_write(USB_DEBUG_DEVNUM,
  817. dbgp_endpoint_out, buf, chunk);
  818. }
  819. }
  820. if (unlikely(reset_run)) {
  821. cmd = readl(&ehci_regs->command);
  822. cmd &= ~CMD_RUN;
  823. writel(cmd, &ehci_regs->command);
  824. }
  825. }
  826. struct console early_dbgp_console = {
  827. .name = "earlydbg",
  828. .write = early_dbgp_write,
  829. .flags = CON_PRINTBUFFER,
  830. .index = -1,
  831. };
  832. int dbgp_reset_prep(void)
  833. {
  834. u32 ctrl;
  835. dbgp_not_safe = 1;
  836. if (!ehci_debug)
  837. return 0;
  838. if ((early_dbgp_console.index != -1 &&
  839. !(early_dbgp_console.flags & CON_BOOT)) ||
  840. dbgp_kgdb_mode)
  841. return 1;
  842. /* This means the console is not initialized, or should get
  843. * shutdown so as to allow for reuse of the usb device, which
  844. * means it is time to shutdown the usb debug port. */
  845. ctrl = readl(&ehci_debug->control);
  846. if (ctrl & DBGP_ENABLED) {
  847. ctrl &= ~(DBGP_CLAIM);
  848. writel(ctrl, &ehci_debug->control);
  849. }
  850. return 0;
  851. }
  852. EXPORT_SYMBOL_GPL(dbgp_reset_prep);
  853. #ifdef CONFIG_KGDB
  854. static char kgdbdbgp_buf[DBGP_MAX_PACKET];
  855. static int kgdbdbgp_buf_sz;
  856. static int kgdbdbgp_buf_idx;
  857. static int kgdbdbgp_loop_cnt = DBGP_LOOPS;
  858. static int kgdbdbgp_read_char(void)
  859. {
  860. int ret;
  861. if (kgdbdbgp_buf_idx < kgdbdbgp_buf_sz) {
  862. char ch = kgdbdbgp_buf[kgdbdbgp_buf_idx++];
  863. return ch;
  864. }
  865. ret = dbgp_bulk_read(USB_DEBUG_DEVNUM, dbgp_endpoint_in,
  866. &kgdbdbgp_buf, DBGP_MAX_PACKET,
  867. kgdbdbgp_loop_cnt);
  868. if (ret <= 0)
  869. return NO_POLL_CHAR;
  870. kgdbdbgp_buf_sz = ret;
  871. kgdbdbgp_buf_idx = 1;
  872. return kgdbdbgp_buf[0];
  873. }
  874. static void kgdbdbgp_write_char(u8 chr)
  875. {
  876. early_dbgp_write(NULL, &chr, 1);
  877. }
  878. static struct kgdb_io kgdbdbgp_io_ops = {
  879. .name = "kgdbdbgp",
  880. .read_char = kgdbdbgp_read_char,
  881. .write_char = kgdbdbgp_write_char,
  882. };
  883. static int kgdbdbgp_wait_time;
  884. static int __init kgdbdbgp_parse_config(char *str)
  885. {
  886. char *ptr;
  887. if (!ehci_debug) {
  888. if (early_dbgp_init(str))
  889. return -1;
  890. }
  891. ptr = strchr(str, ',');
  892. if (ptr) {
  893. ptr++;
  894. kgdbdbgp_wait_time = simple_strtoul(ptr, &ptr, 10);
  895. }
  896. kgdb_register_io_module(&kgdbdbgp_io_ops);
  897. kgdbdbgp_io_ops.is_console = early_dbgp_console.index != -1;
  898. return 0;
  899. }
  900. early_param("kgdbdbgp", kgdbdbgp_parse_config);
  901. static int kgdbdbgp_reader_thread(void *ptr)
  902. {
  903. int ret;
  904. while (readl(&ehci_debug->control) & DBGP_ENABLED) {
  905. kgdbdbgp_loop_cnt = 1;
  906. ret = kgdbdbgp_read_char();
  907. kgdbdbgp_loop_cnt = DBGP_LOOPS;
  908. if (ret != NO_POLL_CHAR) {
  909. if (ret == 0x3 || ret == '$') {
  910. if (ret == '$')
  911. kgdbdbgp_buf_idx--;
  912. kgdb_breakpoint();
  913. }
  914. continue;
  915. }
  916. schedule_timeout_interruptible(kgdbdbgp_wait_time * HZ);
  917. }
  918. return 0;
  919. }
  920. static int __init kgdbdbgp_start_thread(void)
  921. {
  922. if (dbgp_kgdb_mode && kgdbdbgp_wait_time)
  923. kthread_run(kgdbdbgp_reader_thread, NULL, "%s", "dbgp");
  924. return 0;
  925. }
  926. module_init(kgdbdbgp_start_thread);
  927. #endif /* CONFIG_KGDB */