vt8500_serial.c 16 KB

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  1. /*
  2. * drivers/serial/vt8500_serial.c
  3. *
  4. * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
  5. *
  6. * Based on msm_serial.c, which is:
  7. * Copyright (C) 2007 Google, Inc.
  8. * Author: Robert Love <rlove@google.com>
  9. *
  10. * This software is licensed under the terms of the GNU General Public
  11. * License version 2, as published by the Free Software Foundation, and
  12. * may be copied, distributed, and modified under those terms.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. */
  19. #if defined(CONFIG_SERIAL_VT8500_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  20. # define SUPPORT_SYSRQ
  21. #endif
  22. #include <linux/hrtimer.h>
  23. #include <linux/delay.h>
  24. #include <linux/module.h>
  25. #include <linux/io.h>
  26. #include <linux/ioport.h>
  27. #include <linux/irq.h>
  28. #include <linux/init.h>
  29. #include <linux/console.h>
  30. #include <linux/tty.h>
  31. #include <linux/tty_flip.h>
  32. #include <linux/serial_core.h>
  33. #include <linux/serial.h>
  34. #include <linux/slab.h>
  35. #include <linux/clk.h>
  36. #include <linux/platform_device.h>
  37. /*
  38. * UART Register offsets
  39. */
  40. #define VT8500_URTDR 0x0000 /* Transmit data */
  41. #define VT8500_URRDR 0x0004 /* Receive data */
  42. #define VT8500_URDIV 0x0008 /* Clock/Baud rate divisor */
  43. #define VT8500_URLCR 0x000C /* Line control */
  44. #define VT8500_URICR 0x0010 /* IrDA control */
  45. #define VT8500_URIER 0x0014 /* Interrupt enable */
  46. #define VT8500_URISR 0x0018 /* Interrupt status */
  47. #define VT8500_URUSR 0x001c /* UART status */
  48. #define VT8500_URFCR 0x0020 /* FIFO control */
  49. #define VT8500_URFIDX 0x0024 /* FIFO index */
  50. #define VT8500_URBKR 0x0028 /* Break signal count */
  51. #define VT8500_URTOD 0x002c /* Time out divisor */
  52. #define VT8500_TXFIFO 0x1000 /* Transmit FIFO (16x8) */
  53. #define VT8500_RXFIFO 0x1020 /* Receive FIFO (16x10) */
  54. /*
  55. * Interrupt enable and status bits
  56. */
  57. #define TXDE (1 << 0) /* Tx Data empty */
  58. #define RXDF (1 << 1) /* Rx Data full */
  59. #define TXFAE (1 << 2) /* Tx FIFO almost empty */
  60. #define TXFE (1 << 3) /* Tx FIFO empty */
  61. #define RXFAF (1 << 4) /* Rx FIFO almost full */
  62. #define RXFF (1 << 5) /* Rx FIFO full */
  63. #define TXUDR (1 << 6) /* Tx underrun */
  64. #define RXOVER (1 << 7) /* Rx overrun */
  65. #define PER (1 << 8) /* Parity error */
  66. #define FER (1 << 9) /* Frame error */
  67. #define TCTS (1 << 10) /* Toggle of CTS */
  68. #define RXTOUT (1 << 11) /* Rx timeout */
  69. #define BKDONE (1 << 12) /* Break signal done */
  70. #define ERR (1 << 13) /* AHB error response */
  71. #define RX_FIFO_INTS (RXFAF | RXFF | RXOVER | PER | FER | RXTOUT)
  72. #define TX_FIFO_INTS (TXFAE | TXFE | TXUDR)
  73. struct vt8500_port {
  74. struct uart_port uart;
  75. char name[16];
  76. struct clk *clk;
  77. unsigned int ier;
  78. };
  79. static inline void vt8500_write(struct uart_port *port, unsigned int val,
  80. unsigned int off)
  81. {
  82. writel(val, port->membase + off);
  83. }
  84. static inline unsigned int vt8500_read(struct uart_port *port, unsigned int off)
  85. {
  86. return readl(port->membase + off);
  87. }
  88. static void vt8500_stop_tx(struct uart_port *port)
  89. {
  90. struct vt8500_port *vt8500_port = container_of(port,
  91. struct vt8500_port,
  92. uart);
  93. vt8500_port->ier &= ~TX_FIFO_INTS;
  94. vt8500_write(port, vt8500_port->ier, VT8500_URIER);
  95. }
  96. static void vt8500_stop_rx(struct uart_port *port)
  97. {
  98. struct vt8500_port *vt8500_port = container_of(port,
  99. struct vt8500_port,
  100. uart);
  101. vt8500_port->ier &= ~RX_FIFO_INTS;
  102. vt8500_write(port, vt8500_port->ier, VT8500_URIER);
  103. }
  104. static void vt8500_enable_ms(struct uart_port *port)
  105. {
  106. struct vt8500_port *vt8500_port = container_of(port,
  107. struct vt8500_port,
  108. uart);
  109. vt8500_port->ier |= TCTS;
  110. vt8500_write(port, vt8500_port->ier, VT8500_URIER);
  111. }
  112. static void handle_rx(struct uart_port *port)
  113. {
  114. struct tty_struct *tty = tty_port_tty_get(&port->state->port);
  115. if (!tty) {
  116. /* Discard data: no tty available */
  117. int count = (vt8500_read(port, VT8500_URFIDX) & 0x1f00) >> 8;
  118. u16 ch;
  119. while (count--)
  120. ch = readw(port->membase + VT8500_RXFIFO);
  121. return;
  122. }
  123. /*
  124. * Handle overrun
  125. */
  126. if ((vt8500_read(port, VT8500_URISR) & RXOVER)) {
  127. port->icount.overrun++;
  128. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  129. }
  130. /* and now the main RX loop */
  131. while (vt8500_read(port, VT8500_URFIDX) & 0x1f00) {
  132. unsigned int c;
  133. char flag = TTY_NORMAL;
  134. c = readw(port->membase + VT8500_RXFIFO) & 0x3ff;
  135. /* Mask conditions we're ignorning. */
  136. c &= ~port->read_status_mask;
  137. if (c & FER) {
  138. port->icount.frame++;
  139. flag = TTY_FRAME;
  140. } else if (c & PER) {
  141. port->icount.parity++;
  142. flag = TTY_PARITY;
  143. }
  144. port->icount.rx++;
  145. if (!uart_handle_sysrq_char(port, c))
  146. tty_insert_flip_char(tty, c, flag);
  147. }
  148. tty_flip_buffer_push(tty);
  149. tty_kref_put(tty);
  150. }
  151. static void handle_tx(struct uart_port *port)
  152. {
  153. struct circ_buf *xmit = &port->state->xmit;
  154. if (port->x_char) {
  155. writeb(port->x_char, port->membase + VT8500_TXFIFO);
  156. port->icount.tx++;
  157. port->x_char = 0;
  158. }
  159. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  160. vt8500_stop_tx(port);
  161. return;
  162. }
  163. while ((vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16) {
  164. if (uart_circ_empty(xmit))
  165. break;
  166. writeb(xmit->buf[xmit->tail], port->membase + VT8500_TXFIFO);
  167. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  168. port->icount.tx++;
  169. }
  170. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  171. uart_write_wakeup(port);
  172. if (uart_circ_empty(xmit))
  173. vt8500_stop_tx(port);
  174. }
  175. static void vt8500_start_tx(struct uart_port *port)
  176. {
  177. struct vt8500_port *vt8500_port = container_of(port,
  178. struct vt8500_port,
  179. uart);
  180. vt8500_port->ier &= ~TX_FIFO_INTS;
  181. vt8500_write(port, vt8500_port->ier, VT8500_URIER);
  182. handle_tx(port);
  183. vt8500_port->ier |= TX_FIFO_INTS;
  184. vt8500_write(port, vt8500_port->ier, VT8500_URIER);
  185. }
  186. static void handle_delta_cts(struct uart_port *port)
  187. {
  188. port->icount.cts++;
  189. wake_up_interruptible(&port->state->port.delta_msr_wait);
  190. }
  191. static irqreturn_t vt8500_irq(int irq, void *dev_id)
  192. {
  193. struct uart_port *port = dev_id;
  194. unsigned long isr;
  195. spin_lock(&port->lock);
  196. isr = vt8500_read(port, VT8500_URISR);
  197. /* Acknowledge active status bits */
  198. vt8500_write(port, isr, VT8500_URISR);
  199. if (isr & RX_FIFO_INTS)
  200. handle_rx(port);
  201. if (isr & TX_FIFO_INTS)
  202. handle_tx(port);
  203. if (isr & TCTS)
  204. handle_delta_cts(port);
  205. spin_unlock(&port->lock);
  206. return IRQ_HANDLED;
  207. }
  208. static unsigned int vt8500_tx_empty(struct uart_port *port)
  209. {
  210. return (vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16 ?
  211. TIOCSER_TEMT : 0;
  212. }
  213. static unsigned int vt8500_get_mctrl(struct uart_port *port)
  214. {
  215. unsigned int usr;
  216. usr = vt8500_read(port, VT8500_URUSR);
  217. if (usr & (1 << 4))
  218. return TIOCM_CTS;
  219. else
  220. return 0;
  221. }
  222. static void vt8500_set_mctrl(struct uart_port *port, unsigned int mctrl)
  223. {
  224. }
  225. static void vt8500_break_ctl(struct uart_port *port, int break_ctl)
  226. {
  227. if (break_ctl)
  228. vt8500_write(port, vt8500_read(port, VT8500_URLCR) | (1 << 9),
  229. VT8500_URLCR);
  230. }
  231. static int vt8500_set_baud_rate(struct uart_port *port, unsigned int baud)
  232. {
  233. unsigned long div;
  234. unsigned int loops = 1000;
  235. div = vt8500_read(port, VT8500_URDIV) & ~(0x3ff);
  236. if (unlikely((baud < 900) || (baud > 921600)))
  237. div |= 7;
  238. else
  239. div |= (921600 / baud) - 1;
  240. while ((vt8500_read(port, VT8500_URUSR) & (1 << 5)) && --loops)
  241. cpu_relax();
  242. vt8500_write(port, div, VT8500_URDIV);
  243. return baud;
  244. }
  245. static int vt8500_startup(struct uart_port *port)
  246. {
  247. struct vt8500_port *vt8500_port =
  248. container_of(port, struct vt8500_port, uart);
  249. int ret;
  250. snprintf(vt8500_port->name, sizeof(vt8500_port->name),
  251. "vt8500_serial%d", port->line);
  252. ret = request_irq(port->irq, vt8500_irq, IRQF_TRIGGER_HIGH,
  253. vt8500_port->name, port);
  254. if (unlikely(ret))
  255. return ret;
  256. vt8500_write(port, 0x03, VT8500_URLCR); /* enable TX & RX */
  257. return 0;
  258. }
  259. static void vt8500_shutdown(struct uart_port *port)
  260. {
  261. struct vt8500_port *vt8500_port =
  262. container_of(port, struct vt8500_port, uart);
  263. vt8500_port->ier = 0;
  264. /* disable interrupts and FIFOs */
  265. vt8500_write(&vt8500_port->uart, 0, VT8500_URIER);
  266. vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR);
  267. free_irq(port->irq, port);
  268. }
  269. static void vt8500_set_termios(struct uart_port *port,
  270. struct ktermios *termios,
  271. struct ktermios *old)
  272. {
  273. struct vt8500_port *vt8500_port =
  274. container_of(port, struct vt8500_port, uart);
  275. unsigned long flags;
  276. unsigned int baud, lcr;
  277. unsigned int loops = 1000;
  278. spin_lock_irqsave(&port->lock, flags);
  279. /* calculate and set baud rate */
  280. baud = uart_get_baud_rate(port, termios, old, 900, 921600);
  281. baud = vt8500_set_baud_rate(port, baud);
  282. if (tty_termios_baud_rate(termios))
  283. tty_termios_encode_baud_rate(termios, baud, baud);
  284. /* calculate parity */
  285. lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR);
  286. lcr &= ~((1 << 5) | (1 << 4));
  287. if (termios->c_cflag & PARENB) {
  288. lcr |= (1 << 4);
  289. termios->c_cflag &= ~CMSPAR;
  290. if (termios->c_cflag & PARODD)
  291. lcr |= (1 << 5);
  292. }
  293. /* calculate bits per char */
  294. lcr &= ~(1 << 2);
  295. switch (termios->c_cflag & CSIZE) {
  296. case CS7:
  297. break;
  298. case CS8:
  299. default:
  300. lcr |= (1 << 2);
  301. termios->c_cflag &= ~CSIZE;
  302. termios->c_cflag |= CS8;
  303. break;
  304. }
  305. /* calculate stop bits */
  306. lcr &= ~(1 << 3);
  307. if (termios->c_cflag & CSTOPB)
  308. lcr |= (1 << 3);
  309. /* set parity, bits per char, and stop bit */
  310. vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR);
  311. /* Configure status bits to ignore based on termio flags. */
  312. port->read_status_mask = 0;
  313. if (termios->c_iflag & IGNPAR)
  314. port->read_status_mask = FER | PER;
  315. uart_update_timeout(port, termios->c_cflag, baud);
  316. /* Reset FIFOs */
  317. vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR);
  318. while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc)
  319. && --loops)
  320. cpu_relax();
  321. /* Every possible FIFO-related interrupt */
  322. vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS;
  323. /*
  324. * CTS flow control
  325. */
  326. if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag))
  327. vt8500_port->ier |= TCTS;
  328. vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR);
  329. vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER);
  330. spin_unlock_irqrestore(&port->lock, flags);
  331. }
  332. static const char *vt8500_type(struct uart_port *port)
  333. {
  334. struct vt8500_port *vt8500_port =
  335. container_of(port, struct vt8500_port, uart);
  336. return vt8500_port->name;
  337. }
  338. static void vt8500_release_port(struct uart_port *port)
  339. {
  340. }
  341. static int vt8500_request_port(struct uart_port *port)
  342. {
  343. return 0;
  344. }
  345. static void vt8500_config_port(struct uart_port *port, int flags)
  346. {
  347. port->type = PORT_VT8500;
  348. }
  349. static int vt8500_verify_port(struct uart_port *port,
  350. struct serial_struct *ser)
  351. {
  352. if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_VT8500))
  353. return -EINVAL;
  354. if (unlikely(port->irq != ser->irq))
  355. return -EINVAL;
  356. return 0;
  357. }
  358. static struct vt8500_port *vt8500_uart_ports[4];
  359. static struct uart_driver vt8500_uart_driver;
  360. #ifdef CONFIG_SERIAL_VT8500_CONSOLE
  361. static inline void wait_for_xmitr(struct uart_port *port)
  362. {
  363. unsigned int status, tmout = 10000;
  364. /* Wait up to 10ms for the character(s) to be sent. */
  365. do {
  366. status = vt8500_read(port, VT8500_URFIDX);
  367. if (--tmout == 0)
  368. break;
  369. udelay(1);
  370. } while (status & 0x10);
  371. }
  372. static void vt8500_console_putchar(struct uart_port *port, int c)
  373. {
  374. wait_for_xmitr(port);
  375. writeb(c, port->membase + VT8500_TXFIFO);
  376. }
  377. static void vt8500_console_write(struct console *co, const char *s,
  378. unsigned int count)
  379. {
  380. struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index];
  381. unsigned long ier;
  382. BUG_ON(co->index < 0 || co->index >= vt8500_uart_driver.nr);
  383. ier = vt8500_read(&vt8500_port->uart, VT8500_URIER);
  384. vt8500_write(&vt8500_port->uart, VT8500_URIER, 0);
  385. uart_console_write(&vt8500_port->uart, s, count,
  386. vt8500_console_putchar);
  387. /*
  388. * Finally, wait for transmitter to become empty
  389. * and switch back to FIFO
  390. */
  391. wait_for_xmitr(&vt8500_port->uart);
  392. vt8500_write(&vt8500_port->uart, VT8500_URIER, ier);
  393. }
  394. static int __init vt8500_console_setup(struct console *co, char *options)
  395. {
  396. struct vt8500_port *vt8500_port;
  397. int baud = 9600;
  398. int bits = 8;
  399. int parity = 'n';
  400. int flow = 'n';
  401. if (unlikely(co->index >= vt8500_uart_driver.nr || co->index < 0))
  402. return -ENXIO;
  403. vt8500_port = vt8500_uart_ports[co->index];
  404. if (!vt8500_port)
  405. return -ENODEV;
  406. if (options)
  407. uart_parse_options(options, &baud, &parity, &bits, &flow);
  408. return uart_set_options(&vt8500_port->uart,
  409. co, baud, parity, bits, flow);
  410. }
  411. static struct console vt8500_console = {
  412. .name = "ttyWMT",
  413. .write = vt8500_console_write,
  414. .device = uart_console_device,
  415. .setup = vt8500_console_setup,
  416. .flags = CON_PRINTBUFFER,
  417. .index = -1,
  418. .data = &vt8500_uart_driver,
  419. };
  420. #define VT8500_CONSOLE (&vt8500_console)
  421. #else
  422. #define VT8500_CONSOLE NULL
  423. #endif
  424. static struct uart_ops vt8500_uart_pops = {
  425. .tx_empty = vt8500_tx_empty,
  426. .set_mctrl = vt8500_set_mctrl,
  427. .get_mctrl = vt8500_get_mctrl,
  428. .stop_tx = vt8500_stop_tx,
  429. .start_tx = vt8500_start_tx,
  430. .stop_rx = vt8500_stop_rx,
  431. .enable_ms = vt8500_enable_ms,
  432. .break_ctl = vt8500_break_ctl,
  433. .startup = vt8500_startup,
  434. .shutdown = vt8500_shutdown,
  435. .set_termios = vt8500_set_termios,
  436. .type = vt8500_type,
  437. .release_port = vt8500_release_port,
  438. .request_port = vt8500_request_port,
  439. .config_port = vt8500_config_port,
  440. .verify_port = vt8500_verify_port,
  441. };
  442. static struct uart_driver vt8500_uart_driver = {
  443. .owner = THIS_MODULE,
  444. .driver_name = "vt8500_serial",
  445. .dev_name = "ttyWMT",
  446. .nr = 6,
  447. .cons = VT8500_CONSOLE,
  448. };
  449. static int __init vt8500_serial_probe(struct platform_device *pdev)
  450. {
  451. struct vt8500_port *vt8500_port;
  452. struct resource *mmres, *irqres;
  453. int ret;
  454. mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  455. irqres = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  456. if (!mmres || !irqres)
  457. return -ENODEV;
  458. vt8500_port = kzalloc(sizeof(struct vt8500_port), GFP_KERNEL);
  459. if (!vt8500_port)
  460. return -ENOMEM;
  461. vt8500_port->uart.type = PORT_VT8500;
  462. vt8500_port->uart.iotype = UPIO_MEM;
  463. vt8500_port->uart.mapbase = mmres->start;
  464. vt8500_port->uart.irq = irqres->start;
  465. vt8500_port->uart.fifosize = 16;
  466. vt8500_port->uart.ops = &vt8500_uart_pops;
  467. vt8500_port->uart.line = pdev->id;
  468. vt8500_port->uart.dev = &pdev->dev;
  469. vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
  470. vt8500_port->uart.uartclk = 24000000;
  471. snprintf(vt8500_port->name, sizeof(vt8500_port->name),
  472. "VT8500 UART%d", pdev->id);
  473. vt8500_port->uart.membase = ioremap(mmres->start,
  474. mmres->end - mmres->start + 1);
  475. if (!vt8500_port->uart.membase) {
  476. ret = -ENOMEM;
  477. goto err;
  478. }
  479. vt8500_uart_ports[pdev->id] = vt8500_port;
  480. uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart);
  481. platform_set_drvdata(pdev, vt8500_port);
  482. return 0;
  483. err:
  484. kfree(vt8500_port);
  485. return ret;
  486. }
  487. static int __devexit vt8500_serial_remove(struct platform_device *pdev)
  488. {
  489. struct vt8500_port *vt8500_port = platform_get_drvdata(pdev);
  490. platform_set_drvdata(pdev, NULL);
  491. uart_remove_one_port(&vt8500_uart_driver, &vt8500_port->uart);
  492. kfree(vt8500_port);
  493. return 0;
  494. }
  495. static struct platform_driver vt8500_platform_driver = {
  496. .probe = vt8500_serial_probe,
  497. .remove = vt8500_serial_remove,
  498. .driver = {
  499. .name = "vt8500_serial",
  500. .owner = THIS_MODULE,
  501. },
  502. };
  503. static int __init vt8500_serial_init(void)
  504. {
  505. int ret;
  506. ret = uart_register_driver(&vt8500_uart_driver);
  507. if (unlikely(ret))
  508. return ret;
  509. ret = platform_driver_register(&vt8500_platform_driver);
  510. if (unlikely(ret))
  511. uart_unregister_driver(&vt8500_uart_driver);
  512. return ret;
  513. }
  514. static void __exit vt8500_serial_exit(void)
  515. {
  516. #ifdef CONFIG_SERIAL_VT8500_CONSOLE
  517. unregister_console(&vt8500_console);
  518. #endif
  519. platform_driver_unregister(&vt8500_platform_driver);
  520. uart_unregister_driver(&vt8500_uart_driver);
  521. }
  522. module_init(vt8500_serial_init);
  523. module_exit(vt8500_serial_exit);
  524. MODULE_AUTHOR("Alexey Charkov <alchark@gmail.com>");
  525. MODULE_DESCRIPTION("Driver for vt8500 serial device");
  526. MODULE_LICENSE("GPL");