pxa.c 21 KB

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  1. /*
  2. * linux/drivers/serial/pxa.c
  3. *
  4. * Based on drivers/serial/8250.c by Russell King.
  5. *
  6. * Author: Nicolas Pitre
  7. * Created: Feb 20, 2003
  8. * Copyright: (C) 2003 Monta Vista Software, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * Note 1: This driver is made separate from the already too overloaded
  16. * 8250.c because it needs some kirks of its own and that'll make it
  17. * easier to add DMA support.
  18. *
  19. * Note 2: I'm too sick of device allocation policies for serial ports.
  20. * If someone else wants to request an "official" allocation of major/minor
  21. * for this driver please be my guest. And don't forget that new hardware
  22. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  23. * hope for a better port registration and dynamic device allocation scheme
  24. * with the serial core maintainer satisfaction to appear soon.
  25. */
  26. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  27. #define SUPPORT_SYSRQ
  28. #endif
  29. #include <linux/module.h>
  30. #include <linux/ioport.h>
  31. #include <linux/init.h>
  32. #include <linux/console.h>
  33. #include <linux/sysrq.h>
  34. #include <linux/serial_reg.h>
  35. #include <linux/circ_buf.h>
  36. #include <linux/delay.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/platform_device.h>
  39. #include <linux/tty.h>
  40. #include <linux/tty_flip.h>
  41. #include <linux/serial_core.h>
  42. #include <linux/clk.h>
  43. #include <linux/io.h>
  44. #include <linux/slab.h>
  45. struct uart_pxa_port {
  46. struct uart_port port;
  47. unsigned char ier;
  48. unsigned char lcr;
  49. unsigned char mcr;
  50. unsigned int lsr_break_flag;
  51. struct clk *clk;
  52. char *name;
  53. };
  54. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  55. {
  56. offset <<= 2;
  57. return readl(up->port.membase + offset);
  58. }
  59. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  60. {
  61. offset <<= 2;
  62. writel(value, up->port.membase + offset);
  63. }
  64. static void serial_pxa_enable_ms(struct uart_port *port)
  65. {
  66. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  67. up->ier |= UART_IER_MSI;
  68. serial_out(up, UART_IER, up->ier);
  69. }
  70. static void serial_pxa_stop_tx(struct uart_port *port)
  71. {
  72. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  73. if (up->ier & UART_IER_THRI) {
  74. up->ier &= ~UART_IER_THRI;
  75. serial_out(up, UART_IER, up->ier);
  76. }
  77. }
  78. static void serial_pxa_stop_rx(struct uart_port *port)
  79. {
  80. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  81. up->ier &= ~UART_IER_RLSI;
  82. up->port.read_status_mask &= ~UART_LSR_DR;
  83. serial_out(up, UART_IER, up->ier);
  84. }
  85. static inline void receive_chars(struct uart_pxa_port *up, int *status)
  86. {
  87. struct tty_struct *tty = up->port.state->port.tty;
  88. unsigned int ch, flag;
  89. int max_count = 256;
  90. do {
  91. ch = serial_in(up, UART_RX);
  92. flag = TTY_NORMAL;
  93. up->port.icount.rx++;
  94. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  95. UART_LSR_FE | UART_LSR_OE))) {
  96. /*
  97. * For statistics only
  98. */
  99. if (*status & UART_LSR_BI) {
  100. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  101. up->port.icount.brk++;
  102. /*
  103. * We do the SysRQ and SAK checking
  104. * here because otherwise the break
  105. * may get masked by ignore_status_mask
  106. * or read_status_mask.
  107. */
  108. if (uart_handle_break(&up->port))
  109. goto ignore_char;
  110. } else if (*status & UART_LSR_PE)
  111. up->port.icount.parity++;
  112. else if (*status & UART_LSR_FE)
  113. up->port.icount.frame++;
  114. if (*status & UART_LSR_OE)
  115. up->port.icount.overrun++;
  116. /*
  117. * Mask off conditions which should be ignored.
  118. */
  119. *status &= up->port.read_status_mask;
  120. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  121. if (up->port.line == up->port.cons->index) {
  122. /* Recover the break flag from console xmit */
  123. *status |= up->lsr_break_flag;
  124. up->lsr_break_flag = 0;
  125. }
  126. #endif
  127. if (*status & UART_LSR_BI) {
  128. flag = TTY_BREAK;
  129. } else if (*status & UART_LSR_PE)
  130. flag = TTY_PARITY;
  131. else if (*status & UART_LSR_FE)
  132. flag = TTY_FRAME;
  133. }
  134. if (uart_handle_sysrq_char(&up->port, ch))
  135. goto ignore_char;
  136. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  137. ignore_char:
  138. *status = serial_in(up, UART_LSR);
  139. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  140. tty_flip_buffer_push(tty);
  141. }
  142. static void transmit_chars(struct uart_pxa_port *up)
  143. {
  144. struct circ_buf *xmit = &up->port.state->xmit;
  145. int count;
  146. if (up->port.x_char) {
  147. serial_out(up, UART_TX, up->port.x_char);
  148. up->port.icount.tx++;
  149. up->port.x_char = 0;
  150. return;
  151. }
  152. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  153. serial_pxa_stop_tx(&up->port);
  154. return;
  155. }
  156. count = up->port.fifosize / 2;
  157. do {
  158. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  159. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  160. up->port.icount.tx++;
  161. if (uart_circ_empty(xmit))
  162. break;
  163. } while (--count > 0);
  164. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  165. uart_write_wakeup(&up->port);
  166. if (uart_circ_empty(xmit))
  167. serial_pxa_stop_tx(&up->port);
  168. }
  169. static void serial_pxa_start_tx(struct uart_port *port)
  170. {
  171. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  172. if (!(up->ier & UART_IER_THRI)) {
  173. up->ier |= UART_IER_THRI;
  174. serial_out(up, UART_IER, up->ier);
  175. }
  176. }
  177. static inline void check_modem_status(struct uart_pxa_port *up)
  178. {
  179. int status;
  180. status = serial_in(up, UART_MSR);
  181. if ((status & UART_MSR_ANY_DELTA) == 0)
  182. return;
  183. if (status & UART_MSR_TERI)
  184. up->port.icount.rng++;
  185. if (status & UART_MSR_DDSR)
  186. up->port.icount.dsr++;
  187. if (status & UART_MSR_DDCD)
  188. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  189. if (status & UART_MSR_DCTS)
  190. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  191. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  192. }
  193. /*
  194. * This handles the interrupt from one port.
  195. */
  196. static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
  197. {
  198. struct uart_pxa_port *up = dev_id;
  199. unsigned int iir, lsr;
  200. iir = serial_in(up, UART_IIR);
  201. if (iir & UART_IIR_NO_INT)
  202. return IRQ_NONE;
  203. lsr = serial_in(up, UART_LSR);
  204. if (lsr & UART_LSR_DR)
  205. receive_chars(up, &lsr);
  206. check_modem_status(up);
  207. if (lsr & UART_LSR_THRE)
  208. transmit_chars(up);
  209. return IRQ_HANDLED;
  210. }
  211. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  212. {
  213. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  214. unsigned long flags;
  215. unsigned int ret;
  216. spin_lock_irqsave(&up->port.lock, flags);
  217. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  218. spin_unlock_irqrestore(&up->port.lock, flags);
  219. return ret;
  220. }
  221. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  222. {
  223. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  224. unsigned char status;
  225. unsigned int ret;
  226. status = serial_in(up, UART_MSR);
  227. ret = 0;
  228. if (status & UART_MSR_DCD)
  229. ret |= TIOCM_CAR;
  230. if (status & UART_MSR_RI)
  231. ret |= TIOCM_RNG;
  232. if (status & UART_MSR_DSR)
  233. ret |= TIOCM_DSR;
  234. if (status & UART_MSR_CTS)
  235. ret |= TIOCM_CTS;
  236. return ret;
  237. }
  238. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  239. {
  240. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  241. unsigned char mcr = 0;
  242. if (mctrl & TIOCM_RTS)
  243. mcr |= UART_MCR_RTS;
  244. if (mctrl & TIOCM_DTR)
  245. mcr |= UART_MCR_DTR;
  246. if (mctrl & TIOCM_OUT1)
  247. mcr |= UART_MCR_OUT1;
  248. if (mctrl & TIOCM_OUT2)
  249. mcr |= UART_MCR_OUT2;
  250. if (mctrl & TIOCM_LOOP)
  251. mcr |= UART_MCR_LOOP;
  252. mcr |= up->mcr;
  253. serial_out(up, UART_MCR, mcr);
  254. }
  255. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  256. {
  257. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  258. unsigned long flags;
  259. spin_lock_irqsave(&up->port.lock, flags);
  260. if (break_state == -1)
  261. up->lcr |= UART_LCR_SBC;
  262. else
  263. up->lcr &= ~UART_LCR_SBC;
  264. serial_out(up, UART_LCR, up->lcr);
  265. spin_unlock_irqrestore(&up->port.lock, flags);
  266. }
  267. #if 0
  268. static void serial_pxa_dma_init(struct pxa_uart *up)
  269. {
  270. up->rxdma =
  271. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
  272. if (up->rxdma < 0)
  273. goto out;
  274. up->txdma =
  275. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
  276. if (up->txdma < 0)
  277. goto err_txdma;
  278. up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
  279. if (!up->dmadesc)
  280. goto err_alloc;
  281. /* ... */
  282. err_alloc:
  283. pxa_free_dma(up->txdma);
  284. err_rxdma:
  285. pxa_free_dma(up->rxdma);
  286. out:
  287. return;
  288. }
  289. #endif
  290. static int serial_pxa_startup(struct uart_port *port)
  291. {
  292. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  293. unsigned long flags;
  294. int retval;
  295. if (port->line == 3) /* HWUART */
  296. up->mcr |= UART_MCR_AFE;
  297. else
  298. up->mcr = 0;
  299. up->port.uartclk = clk_get_rate(up->clk);
  300. /*
  301. * Allocate the IRQ
  302. */
  303. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  304. if (retval)
  305. return retval;
  306. /*
  307. * Clear the FIFO buffers and disable them.
  308. * (they will be reenabled in set_termios())
  309. */
  310. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  311. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  312. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  313. serial_out(up, UART_FCR, 0);
  314. /*
  315. * Clear the interrupt registers.
  316. */
  317. (void) serial_in(up, UART_LSR);
  318. (void) serial_in(up, UART_RX);
  319. (void) serial_in(up, UART_IIR);
  320. (void) serial_in(up, UART_MSR);
  321. /*
  322. * Now, initialize the UART
  323. */
  324. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  325. spin_lock_irqsave(&up->port.lock, flags);
  326. up->port.mctrl |= TIOCM_OUT2;
  327. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  328. spin_unlock_irqrestore(&up->port.lock, flags);
  329. /*
  330. * Finally, enable interrupts. Note: Modem status interrupts
  331. * are set via set_termios(), which will be occurring imminently
  332. * anyway, so we don't enable them here.
  333. */
  334. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  335. serial_out(up, UART_IER, up->ier);
  336. /*
  337. * And clear the interrupt registers again for luck.
  338. */
  339. (void) serial_in(up, UART_LSR);
  340. (void) serial_in(up, UART_RX);
  341. (void) serial_in(up, UART_IIR);
  342. (void) serial_in(up, UART_MSR);
  343. return 0;
  344. }
  345. static void serial_pxa_shutdown(struct uart_port *port)
  346. {
  347. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  348. unsigned long flags;
  349. free_irq(up->port.irq, up);
  350. /*
  351. * Disable interrupts from this port
  352. */
  353. up->ier = 0;
  354. serial_out(up, UART_IER, 0);
  355. spin_lock_irqsave(&up->port.lock, flags);
  356. up->port.mctrl &= ~TIOCM_OUT2;
  357. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  358. spin_unlock_irqrestore(&up->port.lock, flags);
  359. /*
  360. * Disable break condition and FIFOs
  361. */
  362. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  363. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  364. UART_FCR_CLEAR_RCVR |
  365. UART_FCR_CLEAR_XMIT);
  366. serial_out(up, UART_FCR, 0);
  367. }
  368. static void
  369. serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
  370. struct ktermios *old)
  371. {
  372. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  373. unsigned char cval, fcr = 0;
  374. unsigned long flags;
  375. unsigned int baud, quot;
  376. unsigned int dll;
  377. switch (termios->c_cflag & CSIZE) {
  378. case CS5:
  379. cval = UART_LCR_WLEN5;
  380. break;
  381. case CS6:
  382. cval = UART_LCR_WLEN6;
  383. break;
  384. case CS7:
  385. cval = UART_LCR_WLEN7;
  386. break;
  387. default:
  388. case CS8:
  389. cval = UART_LCR_WLEN8;
  390. break;
  391. }
  392. if (termios->c_cflag & CSTOPB)
  393. cval |= UART_LCR_STOP;
  394. if (termios->c_cflag & PARENB)
  395. cval |= UART_LCR_PARITY;
  396. if (!(termios->c_cflag & PARODD))
  397. cval |= UART_LCR_EPAR;
  398. /*
  399. * Ask the core to calculate the divisor for us.
  400. */
  401. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  402. quot = uart_get_divisor(port, baud);
  403. if ((up->port.uartclk / quot) < (2400 * 16))
  404. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  405. else if ((up->port.uartclk / quot) < (230400 * 16))
  406. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  407. else
  408. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
  409. /*
  410. * Ok, we're now changing the port state. Do it with
  411. * interrupts disabled.
  412. */
  413. spin_lock_irqsave(&up->port.lock, flags);
  414. /*
  415. * Ensure the port will be enabled.
  416. * This is required especially for serial console.
  417. */
  418. up->ier |= UART_IER_UUE;
  419. /*
  420. * Update the per-port timeout.
  421. */
  422. uart_update_timeout(port, termios->c_cflag, baud);
  423. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  424. if (termios->c_iflag & INPCK)
  425. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  426. if (termios->c_iflag & (BRKINT | PARMRK))
  427. up->port.read_status_mask |= UART_LSR_BI;
  428. /*
  429. * Characters to ignore
  430. */
  431. up->port.ignore_status_mask = 0;
  432. if (termios->c_iflag & IGNPAR)
  433. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  434. if (termios->c_iflag & IGNBRK) {
  435. up->port.ignore_status_mask |= UART_LSR_BI;
  436. /*
  437. * If we're ignoring parity and break indicators,
  438. * ignore overruns too (for real raw support).
  439. */
  440. if (termios->c_iflag & IGNPAR)
  441. up->port.ignore_status_mask |= UART_LSR_OE;
  442. }
  443. /*
  444. * ignore all characters if CREAD is not set
  445. */
  446. if ((termios->c_cflag & CREAD) == 0)
  447. up->port.ignore_status_mask |= UART_LSR_DR;
  448. /*
  449. * CTS flow control flag and modem status interrupts
  450. */
  451. up->ier &= ~UART_IER_MSI;
  452. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  453. up->ier |= UART_IER_MSI;
  454. serial_out(up, UART_IER, up->ier);
  455. if (termios->c_cflag & CRTSCTS)
  456. up->mcr |= UART_MCR_AFE;
  457. else
  458. up->mcr &= ~UART_MCR_AFE;
  459. serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
  460. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  461. /*
  462. * work around Errata #75 according to Intel(R) PXA27x Processor Family
  463. * Specification Update (Nov 2005)
  464. */
  465. dll = serial_in(up, UART_DLL);
  466. WARN_ON(dll != (quot & 0xff));
  467. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  468. serial_out(up, UART_LCR, cval); /* reset DLAB */
  469. up->lcr = cval; /* Save LCR */
  470. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  471. serial_out(up, UART_FCR, fcr);
  472. spin_unlock_irqrestore(&up->port.lock, flags);
  473. }
  474. static void
  475. serial_pxa_pm(struct uart_port *port, unsigned int state,
  476. unsigned int oldstate)
  477. {
  478. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  479. if (!state)
  480. clk_enable(up->clk);
  481. else
  482. clk_disable(up->clk);
  483. }
  484. static void serial_pxa_release_port(struct uart_port *port)
  485. {
  486. }
  487. static int serial_pxa_request_port(struct uart_port *port)
  488. {
  489. return 0;
  490. }
  491. static void serial_pxa_config_port(struct uart_port *port, int flags)
  492. {
  493. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  494. up->port.type = PORT_PXA;
  495. }
  496. static int
  497. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  498. {
  499. /* we don't want the core code to modify any port params */
  500. return -EINVAL;
  501. }
  502. static const char *
  503. serial_pxa_type(struct uart_port *port)
  504. {
  505. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  506. return up->name;
  507. }
  508. static struct uart_pxa_port *serial_pxa_ports[4];
  509. static struct uart_driver serial_pxa_reg;
  510. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  511. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  512. /*
  513. * Wait for transmitter & holding register to empty
  514. */
  515. static inline void wait_for_xmitr(struct uart_pxa_port *up)
  516. {
  517. unsigned int status, tmout = 10000;
  518. /* Wait up to 10ms for the character(s) to be sent. */
  519. do {
  520. status = serial_in(up, UART_LSR);
  521. if (status & UART_LSR_BI)
  522. up->lsr_break_flag = UART_LSR_BI;
  523. if (--tmout == 0)
  524. break;
  525. udelay(1);
  526. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  527. /* Wait up to 1s for flow control if necessary */
  528. if (up->port.flags & UPF_CONS_FLOW) {
  529. tmout = 1000000;
  530. while (--tmout &&
  531. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  532. udelay(1);
  533. }
  534. }
  535. static void serial_pxa_console_putchar(struct uart_port *port, int ch)
  536. {
  537. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  538. wait_for_xmitr(up);
  539. serial_out(up, UART_TX, ch);
  540. }
  541. /*
  542. * Print a string to the serial port trying not to disturb
  543. * any possible real use of the port...
  544. *
  545. * The console_lock must be held when we get here.
  546. */
  547. static void
  548. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  549. {
  550. struct uart_pxa_port *up = serial_pxa_ports[co->index];
  551. unsigned int ier;
  552. clk_enable(up->clk);
  553. /*
  554. * First save the IER then disable the interrupts
  555. */
  556. ier = serial_in(up, UART_IER);
  557. serial_out(up, UART_IER, UART_IER_UUE);
  558. uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
  559. /*
  560. * Finally, wait for transmitter to become empty
  561. * and restore the IER
  562. */
  563. wait_for_xmitr(up);
  564. serial_out(up, UART_IER, ier);
  565. clk_disable(up->clk);
  566. }
  567. static int __init
  568. serial_pxa_console_setup(struct console *co, char *options)
  569. {
  570. struct uart_pxa_port *up;
  571. int baud = 9600;
  572. int bits = 8;
  573. int parity = 'n';
  574. int flow = 'n';
  575. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  576. co->index = 0;
  577. up = serial_pxa_ports[co->index];
  578. if (!up)
  579. return -ENODEV;
  580. if (options)
  581. uart_parse_options(options, &baud, &parity, &bits, &flow);
  582. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  583. }
  584. static struct console serial_pxa_console = {
  585. .name = "ttyS",
  586. .write = serial_pxa_console_write,
  587. .device = uart_console_device,
  588. .setup = serial_pxa_console_setup,
  589. .flags = CON_PRINTBUFFER,
  590. .index = -1,
  591. .data = &serial_pxa_reg,
  592. };
  593. #define PXA_CONSOLE &serial_pxa_console
  594. #else
  595. #define PXA_CONSOLE NULL
  596. #endif
  597. struct uart_ops serial_pxa_pops = {
  598. .tx_empty = serial_pxa_tx_empty,
  599. .set_mctrl = serial_pxa_set_mctrl,
  600. .get_mctrl = serial_pxa_get_mctrl,
  601. .stop_tx = serial_pxa_stop_tx,
  602. .start_tx = serial_pxa_start_tx,
  603. .stop_rx = serial_pxa_stop_rx,
  604. .enable_ms = serial_pxa_enable_ms,
  605. .break_ctl = serial_pxa_break_ctl,
  606. .startup = serial_pxa_startup,
  607. .shutdown = serial_pxa_shutdown,
  608. .set_termios = serial_pxa_set_termios,
  609. .pm = serial_pxa_pm,
  610. .type = serial_pxa_type,
  611. .release_port = serial_pxa_release_port,
  612. .request_port = serial_pxa_request_port,
  613. .config_port = serial_pxa_config_port,
  614. .verify_port = serial_pxa_verify_port,
  615. };
  616. static struct uart_driver serial_pxa_reg = {
  617. .owner = THIS_MODULE,
  618. .driver_name = "PXA serial",
  619. .dev_name = "ttyS",
  620. .major = TTY_MAJOR,
  621. .minor = 64,
  622. .nr = 4,
  623. .cons = PXA_CONSOLE,
  624. };
  625. #ifdef CONFIG_PM
  626. static int serial_pxa_suspend(struct device *dev)
  627. {
  628. struct uart_pxa_port *sport = dev_get_drvdata(dev);
  629. if (sport)
  630. uart_suspend_port(&serial_pxa_reg, &sport->port);
  631. return 0;
  632. }
  633. static int serial_pxa_resume(struct device *dev)
  634. {
  635. struct uart_pxa_port *sport = dev_get_drvdata(dev);
  636. if (sport)
  637. uart_resume_port(&serial_pxa_reg, &sport->port);
  638. return 0;
  639. }
  640. static const struct dev_pm_ops serial_pxa_pm_ops = {
  641. .suspend = serial_pxa_suspend,
  642. .resume = serial_pxa_resume,
  643. };
  644. #endif
  645. static int serial_pxa_probe(struct platform_device *dev)
  646. {
  647. struct uart_pxa_port *sport;
  648. struct resource *mmres, *irqres;
  649. int ret;
  650. mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
  651. irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
  652. if (!mmres || !irqres)
  653. return -ENODEV;
  654. sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
  655. if (!sport)
  656. return -ENOMEM;
  657. sport->clk = clk_get(&dev->dev, NULL);
  658. if (IS_ERR(sport->clk)) {
  659. ret = PTR_ERR(sport->clk);
  660. goto err_free;
  661. }
  662. sport->port.type = PORT_PXA;
  663. sport->port.iotype = UPIO_MEM;
  664. sport->port.mapbase = mmres->start;
  665. sport->port.irq = irqres->start;
  666. sport->port.fifosize = 64;
  667. sport->port.ops = &serial_pxa_pops;
  668. sport->port.line = dev->id;
  669. sport->port.dev = &dev->dev;
  670. sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
  671. sport->port.uartclk = clk_get_rate(sport->clk);
  672. switch (dev->id) {
  673. case 0: sport->name = "FFUART"; break;
  674. case 1: sport->name = "BTUART"; break;
  675. case 2: sport->name = "STUART"; break;
  676. case 3: sport->name = "HWUART"; break;
  677. default:
  678. sport->name = "???";
  679. break;
  680. }
  681. sport->port.membase = ioremap(mmres->start, mmres->end - mmres->start + 1);
  682. if (!sport->port.membase) {
  683. ret = -ENOMEM;
  684. goto err_clk;
  685. }
  686. serial_pxa_ports[dev->id] = sport;
  687. uart_add_one_port(&serial_pxa_reg, &sport->port);
  688. platform_set_drvdata(dev, sport);
  689. return 0;
  690. err_clk:
  691. clk_put(sport->clk);
  692. err_free:
  693. kfree(sport);
  694. return ret;
  695. }
  696. static int serial_pxa_remove(struct platform_device *dev)
  697. {
  698. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  699. platform_set_drvdata(dev, NULL);
  700. uart_remove_one_port(&serial_pxa_reg, &sport->port);
  701. clk_put(sport->clk);
  702. kfree(sport);
  703. return 0;
  704. }
  705. static struct platform_driver serial_pxa_driver = {
  706. .probe = serial_pxa_probe,
  707. .remove = serial_pxa_remove,
  708. .driver = {
  709. .name = "pxa2xx-uart",
  710. .owner = THIS_MODULE,
  711. #ifdef CONFIG_PM
  712. .pm = &serial_pxa_pm_ops,
  713. #endif
  714. },
  715. };
  716. int __init serial_pxa_init(void)
  717. {
  718. int ret;
  719. ret = uart_register_driver(&serial_pxa_reg);
  720. if (ret != 0)
  721. return ret;
  722. ret = platform_driver_register(&serial_pxa_driver);
  723. if (ret != 0)
  724. uart_unregister_driver(&serial_pxa_reg);
  725. return ret;
  726. }
  727. void __exit serial_pxa_exit(void)
  728. {
  729. platform_driver_unregister(&serial_pxa_driver);
  730. uart_unregister_driver(&serial_pxa_reg);
  731. }
  732. module_init(serial_pxa_init);
  733. module_exit(serial_pxa_exit);
  734. MODULE_LICENSE("GPL");
  735. MODULE_ALIAS("platform:pxa2xx-uart");