bfin_5xx.c 40 KB

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  1. /*
  2. * Blackfin On-Chip Serial Driver
  3. *
  4. * Copyright 2006-2010 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  11. #define SUPPORT_SYSRQ
  12. #endif
  13. #define DRIVER_NAME "bfin-uart"
  14. #define pr_fmt(fmt) DRIVER_NAME ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/ioport.h>
  17. #include <linux/gfp.h>
  18. #include <linux/io.h>
  19. #include <linux/init.h>
  20. #include <linux/console.h>
  21. #include <linux/sysrq.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/tty.h>
  24. #include <linux/tty_flip.h>
  25. #include <linux/serial_core.h>
  26. #include <linux/gpio.h>
  27. #include <linux/irq.h>
  28. #include <linux/kgdb.h>
  29. #include <linux/slab.h>
  30. #include <linux/dma-mapping.h>
  31. #include <asm/portmux.h>
  32. #include <asm/cacheflush.h>
  33. #include <asm/dma.h>
  34. #define port_membase(uart) (((struct bfin_serial_port *)(uart))->port.membase)
  35. #define get_lsr_cache(uart) (((struct bfin_serial_port *)(uart))->lsr)
  36. #define put_lsr_cache(uart, v) (((struct bfin_serial_port *)(uart))->lsr = (v))
  37. #include <asm/bfin_serial.h>
  38. #ifdef CONFIG_SERIAL_BFIN_MODULE
  39. # undef CONFIG_EARLY_PRINTK
  40. #endif
  41. #ifdef CONFIG_SERIAL_BFIN_MODULE
  42. # undef CONFIG_EARLY_PRINTK
  43. #endif
  44. /* UART name and device definitions */
  45. #define BFIN_SERIAL_DEV_NAME "ttyBF"
  46. #define BFIN_SERIAL_MAJOR 204
  47. #define BFIN_SERIAL_MINOR 64
  48. static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
  49. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  50. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  51. # ifndef CONFIG_SERIAL_BFIN_PIO
  52. # error KGDB only support UART in PIO mode.
  53. # endif
  54. static int kgdboc_port_line;
  55. static int kgdboc_break_enabled;
  56. #endif
  57. /*
  58. * Setup for console. Argument comes from the menuconfig
  59. */
  60. #define DMA_RX_XCOUNT 512
  61. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  62. #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
  63. #ifdef CONFIG_SERIAL_BFIN_DMA
  64. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  65. #else
  66. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  67. #endif
  68. static void bfin_serial_reset_irda(struct uart_port *port);
  69. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  70. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  71. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  72. {
  73. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  74. if (uart->cts_pin < 0)
  75. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  76. /* CTS PIN is negative assertive. */
  77. if (UART_GET_CTS(uart))
  78. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  79. else
  80. return TIOCM_DSR | TIOCM_CAR;
  81. }
  82. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  83. {
  84. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  85. if (uart->rts_pin < 0)
  86. return;
  87. /* RTS PIN is negative assertive. */
  88. if (mctrl & TIOCM_RTS)
  89. UART_ENABLE_RTS(uart);
  90. else
  91. UART_DISABLE_RTS(uart);
  92. }
  93. /*
  94. * Handle any change of modem status signal.
  95. */
  96. static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
  97. {
  98. struct bfin_serial_port *uart = dev_id;
  99. unsigned int status;
  100. status = bfin_serial_get_mctrl(&uart->port);
  101. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  102. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  103. uart->scts = 1;
  104. UART_CLEAR_SCTS(uart);
  105. UART_CLEAR_IER(uart, EDSSI);
  106. #endif
  107. return IRQ_HANDLED;
  108. }
  109. #else
  110. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  111. {
  112. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  113. }
  114. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  115. {
  116. }
  117. #endif
  118. /*
  119. * interrupts are disabled on entry
  120. */
  121. static void bfin_serial_stop_tx(struct uart_port *port)
  122. {
  123. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  124. #ifdef CONFIG_SERIAL_BFIN_DMA
  125. struct circ_buf *xmit = &uart->port.state->xmit;
  126. #endif
  127. while (!(UART_GET_LSR(uart) & TEMT))
  128. cpu_relax();
  129. #ifdef CONFIG_SERIAL_BFIN_DMA
  130. disable_dma(uart->tx_dma_channel);
  131. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  132. uart->port.icount.tx += uart->tx_count;
  133. uart->tx_count = 0;
  134. uart->tx_done = 1;
  135. #else
  136. #ifdef CONFIG_BF54x
  137. /* Clear TFI bit */
  138. UART_PUT_LSR(uart, TFI);
  139. #endif
  140. UART_CLEAR_IER(uart, ETBEI);
  141. #endif
  142. }
  143. /*
  144. * port is locked and interrupts are disabled
  145. */
  146. static void bfin_serial_start_tx(struct uart_port *port)
  147. {
  148. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  149. struct tty_struct *tty = uart->port.state->port.tty;
  150. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  151. if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
  152. uart->scts = 0;
  153. uart_handle_cts_change(&uart->port, uart->scts);
  154. }
  155. #endif
  156. /*
  157. * To avoid losting RX interrupt, we reset IR function
  158. * before sending data.
  159. */
  160. if (tty->termios->c_line == N_IRDA)
  161. bfin_serial_reset_irda(port);
  162. #ifdef CONFIG_SERIAL_BFIN_DMA
  163. if (uart->tx_done)
  164. bfin_serial_dma_tx_chars(uart);
  165. #else
  166. UART_SET_IER(uart, ETBEI);
  167. bfin_serial_tx_chars(uart);
  168. #endif
  169. }
  170. /*
  171. * Interrupts are enabled
  172. */
  173. static void bfin_serial_stop_rx(struct uart_port *port)
  174. {
  175. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  176. UART_CLEAR_IER(uart, ERBFI);
  177. }
  178. /*
  179. * Set the modem control timer to fire immediately.
  180. */
  181. static void bfin_serial_enable_ms(struct uart_port *port)
  182. {
  183. }
  184. #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
  185. # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
  186. # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
  187. #else
  188. # define UART_GET_ANOMALY_THRESHOLD(uart) 0
  189. # define UART_SET_ANOMALY_THRESHOLD(uart, v)
  190. #endif
  191. #ifdef CONFIG_SERIAL_BFIN_PIO
  192. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  193. {
  194. struct tty_struct *tty = NULL;
  195. unsigned int status, ch, flg;
  196. static struct timeval anomaly_start = { .tv_sec = 0 };
  197. status = UART_GET_LSR(uart);
  198. UART_CLEAR_LSR(uart);
  199. ch = UART_GET_CHAR(uart);
  200. uart->port.icount.rx++;
  201. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  202. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  203. if (kgdb_connected && kgdboc_port_line == uart->port.line
  204. && kgdboc_break_enabled)
  205. if (ch == 0x3) {/* Ctrl + C */
  206. kgdb_breakpoint();
  207. return;
  208. }
  209. if (!uart->port.state || !uart->port.state->port.tty)
  210. return;
  211. #endif
  212. tty = uart->port.state->port.tty;
  213. if (ANOMALY_05000363) {
  214. /* The BF533 (and BF561) family of processors have a nice anomaly
  215. * where they continuously generate characters for a "single" break.
  216. * We have to basically ignore this flood until the "next" valid
  217. * character comes across. Due to the nature of the flood, it is
  218. * not possible to reliably catch bytes that are sent too quickly
  219. * after this break. So application code talking to the Blackfin
  220. * which sends a break signal must allow at least 1.5 character
  221. * times after the end of the break for things to stabilize. This
  222. * timeout was picked as it must absolutely be larger than 1
  223. * character time +/- some percent. So 1.5 sounds good. All other
  224. * Blackfin families operate properly. Woo.
  225. */
  226. if (anomaly_start.tv_sec) {
  227. struct timeval curr;
  228. suseconds_t usecs;
  229. if ((~ch & (~ch + 1)) & 0xff)
  230. goto known_good_char;
  231. do_gettimeofday(&curr);
  232. if (curr.tv_sec - anomaly_start.tv_sec > 1)
  233. goto known_good_char;
  234. usecs = 0;
  235. if (curr.tv_sec != anomaly_start.tv_sec)
  236. usecs += USEC_PER_SEC;
  237. usecs += curr.tv_usec - anomaly_start.tv_usec;
  238. if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
  239. goto known_good_char;
  240. if (ch)
  241. anomaly_start.tv_sec = 0;
  242. else
  243. anomaly_start = curr;
  244. return;
  245. known_good_char:
  246. status &= ~BI;
  247. anomaly_start.tv_sec = 0;
  248. }
  249. }
  250. if (status & BI) {
  251. if (ANOMALY_05000363)
  252. if (bfin_revid() < 5)
  253. do_gettimeofday(&anomaly_start);
  254. uart->port.icount.brk++;
  255. if (uart_handle_break(&uart->port))
  256. goto ignore_char;
  257. status &= ~(PE | FE);
  258. }
  259. if (status & PE)
  260. uart->port.icount.parity++;
  261. if (status & OE)
  262. uart->port.icount.overrun++;
  263. if (status & FE)
  264. uart->port.icount.frame++;
  265. status &= uart->port.read_status_mask;
  266. if (status & BI)
  267. flg = TTY_BREAK;
  268. else if (status & PE)
  269. flg = TTY_PARITY;
  270. else if (status & FE)
  271. flg = TTY_FRAME;
  272. else
  273. flg = TTY_NORMAL;
  274. if (uart_handle_sysrq_char(&uart->port, ch))
  275. goto ignore_char;
  276. uart_insert_char(&uart->port, status, OE, ch, flg);
  277. ignore_char:
  278. tty_flip_buffer_push(tty);
  279. }
  280. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  281. {
  282. struct circ_buf *xmit = &uart->port.state->xmit;
  283. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  284. #ifdef CONFIG_BF54x
  285. /* Clear TFI bit */
  286. UART_PUT_LSR(uart, TFI);
  287. #endif
  288. /* Anomaly notes:
  289. * 05000215 - we always clear ETBEI within last UART TX
  290. * interrupt to end a string. It is always set
  291. * when start a new tx.
  292. */
  293. UART_CLEAR_IER(uart, ETBEI);
  294. return;
  295. }
  296. if (uart->port.x_char) {
  297. UART_PUT_CHAR(uart, uart->port.x_char);
  298. uart->port.icount.tx++;
  299. uart->port.x_char = 0;
  300. }
  301. while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
  302. UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
  303. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  304. uart->port.icount.tx++;
  305. }
  306. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  307. uart_write_wakeup(&uart->port);
  308. }
  309. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  310. {
  311. struct bfin_serial_port *uart = dev_id;
  312. spin_lock(&uart->port.lock);
  313. while (UART_GET_LSR(uart) & DR)
  314. bfin_serial_rx_chars(uart);
  315. spin_unlock(&uart->port.lock);
  316. return IRQ_HANDLED;
  317. }
  318. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  319. {
  320. struct bfin_serial_port *uart = dev_id;
  321. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  322. if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
  323. uart->scts = 0;
  324. uart_handle_cts_change(&uart->port, uart->scts);
  325. }
  326. #endif
  327. spin_lock(&uart->port.lock);
  328. if (UART_GET_LSR(uart) & THRE)
  329. bfin_serial_tx_chars(uart);
  330. spin_unlock(&uart->port.lock);
  331. return IRQ_HANDLED;
  332. }
  333. #endif
  334. #ifdef CONFIG_SERIAL_BFIN_DMA
  335. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  336. {
  337. struct circ_buf *xmit = &uart->port.state->xmit;
  338. uart->tx_done = 0;
  339. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  340. uart->tx_count = 0;
  341. uart->tx_done = 1;
  342. return;
  343. }
  344. if (uart->port.x_char) {
  345. UART_PUT_CHAR(uart, uart->port.x_char);
  346. uart->port.icount.tx++;
  347. uart->port.x_char = 0;
  348. }
  349. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  350. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  351. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  352. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  353. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  354. set_dma_config(uart->tx_dma_channel,
  355. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  356. INTR_ON_BUF,
  357. DIMENSION_LINEAR,
  358. DATA_SIZE_8,
  359. DMA_SYNC_RESTART));
  360. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  361. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  362. set_dma_x_modify(uart->tx_dma_channel, 1);
  363. SSYNC();
  364. enable_dma(uart->tx_dma_channel);
  365. UART_SET_IER(uart, ETBEI);
  366. }
  367. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  368. {
  369. struct tty_struct *tty = uart->port.state->port.tty;
  370. int i, flg, status;
  371. status = UART_GET_LSR(uart);
  372. UART_CLEAR_LSR(uart);
  373. uart->port.icount.rx +=
  374. CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
  375. UART_XMIT_SIZE);
  376. if (status & BI) {
  377. uart->port.icount.brk++;
  378. if (uart_handle_break(&uart->port))
  379. goto dma_ignore_char;
  380. status &= ~(PE | FE);
  381. }
  382. if (status & PE)
  383. uart->port.icount.parity++;
  384. if (status & OE)
  385. uart->port.icount.overrun++;
  386. if (status & FE)
  387. uart->port.icount.frame++;
  388. status &= uart->port.read_status_mask;
  389. if (status & BI)
  390. flg = TTY_BREAK;
  391. else if (status & PE)
  392. flg = TTY_PARITY;
  393. else if (status & FE)
  394. flg = TTY_FRAME;
  395. else
  396. flg = TTY_NORMAL;
  397. for (i = uart->rx_dma_buf.tail; ; i++) {
  398. if (i >= UART_XMIT_SIZE)
  399. i = 0;
  400. if (i == uart->rx_dma_buf.head)
  401. break;
  402. if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  403. uart_insert_char(&uart->port, status, OE,
  404. uart->rx_dma_buf.buf[i], flg);
  405. }
  406. dma_ignore_char:
  407. tty_flip_buffer_push(tty);
  408. }
  409. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  410. {
  411. int x_pos, pos;
  412. dma_disable_irq(uart->tx_dma_channel);
  413. dma_disable_irq(uart->rx_dma_channel);
  414. spin_lock_bh(&uart->port.lock);
  415. /* 2D DMA RX buffer ring is used. Because curr_y_count and
  416. * curr_x_count can't be read as an atomic operation,
  417. * curr_y_count should be read before curr_x_count. When
  418. * curr_x_count is read, curr_y_count may already indicate
  419. * next buffer line. But, the position calculated here is
  420. * still indicate the old line. The wrong position data may
  421. * be smaller than current buffer tail, which cause garbages
  422. * are received if it is not prohibit.
  423. */
  424. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  425. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  426. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  427. if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
  428. uart->rx_dma_nrows = 0;
  429. x_pos = DMA_RX_XCOUNT - x_pos;
  430. if (x_pos == DMA_RX_XCOUNT)
  431. x_pos = 0;
  432. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  433. /* Ignore receiving data if new position is in the same line of
  434. * current buffer tail and small.
  435. */
  436. if (pos > uart->rx_dma_buf.tail ||
  437. uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
  438. uart->rx_dma_buf.head = pos;
  439. bfin_serial_dma_rx_chars(uart);
  440. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  441. }
  442. spin_unlock_bh(&uart->port.lock);
  443. dma_enable_irq(uart->tx_dma_channel);
  444. dma_enable_irq(uart->rx_dma_channel);
  445. mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
  446. }
  447. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  448. {
  449. struct bfin_serial_port *uart = dev_id;
  450. struct circ_buf *xmit = &uart->port.state->xmit;
  451. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  452. if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
  453. uart->scts = 0;
  454. uart_handle_cts_change(&uart->port, uart->scts);
  455. }
  456. #endif
  457. spin_lock(&uart->port.lock);
  458. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  459. disable_dma(uart->tx_dma_channel);
  460. clear_dma_irqstat(uart->tx_dma_channel);
  461. /* Anomaly notes:
  462. * 05000215 - we always clear ETBEI within last UART TX
  463. * interrupt to end a string. It is always set
  464. * when start a new tx.
  465. */
  466. UART_CLEAR_IER(uart, ETBEI);
  467. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  468. uart->port.icount.tx += uart->tx_count;
  469. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  470. uart_write_wakeup(&uart->port);
  471. bfin_serial_dma_tx_chars(uart);
  472. }
  473. spin_unlock(&uart->port.lock);
  474. return IRQ_HANDLED;
  475. }
  476. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  477. {
  478. struct bfin_serial_port *uart = dev_id;
  479. unsigned short irqstat;
  480. int x_pos, pos;
  481. spin_lock(&uart->port.lock);
  482. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  483. clear_dma_irqstat(uart->rx_dma_channel);
  484. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  485. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  486. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  487. if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
  488. uart->rx_dma_nrows = 0;
  489. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
  490. if (pos > uart->rx_dma_buf.tail ||
  491. uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
  492. uart->rx_dma_buf.head = pos;
  493. bfin_serial_dma_rx_chars(uart);
  494. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  495. }
  496. spin_unlock(&uart->port.lock);
  497. return IRQ_HANDLED;
  498. }
  499. #endif
  500. /*
  501. * Return TIOCSER_TEMT when transmitter is not busy.
  502. */
  503. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  504. {
  505. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  506. unsigned short lsr;
  507. lsr = UART_GET_LSR(uart);
  508. if (lsr & TEMT)
  509. return TIOCSER_TEMT;
  510. else
  511. return 0;
  512. }
  513. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  514. {
  515. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  516. u16 lcr = UART_GET_LCR(uart);
  517. if (break_state)
  518. lcr |= SB;
  519. else
  520. lcr &= ~SB;
  521. UART_PUT_LCR(uart, lcr);
  522. SSYNC();
  523. }
  524. static int bfin_serial_startup(struct uart_port *port)
  525. {
  526. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  527. #ifdef CONFIG_SERIAL_BFIN_DMA
  528. dma_addr_t dma_handle;
  529. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  530. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  531. return -EBUSY;
  532. }
  533. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  534. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  535. free_dma(uart->rx_dma_channel);
  536. return -EBUSY;
  537. }
  538. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  539. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  540. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  541. uart->rx_dma_buf.head = 0;
  542. uart->rx_dma_buf.tail = 0;
  543. uart->rx_dma_nrows = 0;
  544. set_dma_config(uart->rx_dma_channel,
  545. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  546. INTR_ON_ROW, DIMENSION_2D,
  547. DATA_SIZE_8,
  548. DMA_SYNC_RESTART));
  549. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  550. set_dma_x_modify(uart->rx_dma_channel, 1);
  551. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  552. set_dma_y_modify(uart->rx_dma_channel, 1);
  553. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  554. enable_dma(uart->rx_dma_channel);
  555. uart->rx_dma_timer.data = (unsigned long)(uart);
  556. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  557. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  558. add_timer(&(uart->rx_dma_timer));
  559. #else
  560. # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  561. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  562. if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
  563. kgdboc_break_enabled = 0;
  564. else {
  565. # endif
  566. if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  567. "BFIN_UART_RX", uart)) {
  568. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  569. return -EBUSY;
  570. }
  571. if (request_irq
  572. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  573. "BFIN_UART_TX", uart)) {
  574. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  575. free_irq(uart->port.irq, uart);
  576. return -EBUSY;
  577. }
  578. # ifdef CONFIG_BF54x
  579. {
  580. /*
  581. * UART2 and UART3 on BF548 share interrupt PINs and DMA
  582. * controllers with SPORT2 and SPORT3. UART rx and tx
  583. * interrupts are generated in PIO mode only when configure
  584. * their peripheral mapping registers properly, which means
  585. * request corresponding DMA channels in PIO mode as well.
  586. */
  587. unsigned uart_dma_ch_rx, uart_dma_ch_tx;
  588. switch (uart->port.irq) {
  589. case IRQ_UART3_RX:
  590. uart_dma_ch_rx = CH_UART3_RX;
  591. uart_dma_ch_tx = CH_UART3_TX;
  592. break;
  593. case IRQ_UART2_RX:
  594. uart_dma_ch_rx = CH_UART2_RX;
  595. uart_dma_ch_tx = CH_UART2_TX;
  596. break;
  597. default:
  598. uart_dma_ch_rx = uart_dma_ch_tx = 0;
  599. break;
  600. };
  601. if (uart_dma_ch_rx &&
  602. request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
  603. printk(KERN_NOTICE"Fail to attach UART interrupt\n");
  604. free_irq(uart->port.irq, uart);
  605. free_irq(uart->port.irq + 1, uart);
  606. return -EBUSY;
  607. }
  608. if (uart_dma_ch_tx &&
  609. request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
  610. printk(KERN_NOTICE "Fail to attach UART interrupt\n");
  611. free_dma(uart_dma_ch_rx);
  612. free_irq(uart->port.irq, uart);
  613. free_irq(uart->port.irq + 1, uart);
  614. return -EBUSY;
  615. }
  616. }
  617. # endif
  618. # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  619. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  620. }
  621. # endif
  622. #endif
  623. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  624. if (uart->cts_pin >= 0) {
  625. if (request_irq(gpio_to_irq(uart->cts_pin),
  626. bfin_serial_mctrl_cts_int,
  627. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
  628. IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
  629. uart->cts_pin = -1;
  630. pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
  631. }
  632. }
  633. if (uart->rts_pin >= 0) {
  634. gpio_direction_output(uart->rts_pin, 0);
  635. }
  636. #endif
  637. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  638. if (uart->cts_pin >= 0 && request_irq(uart->status_irq,
  639. bfin_serial_mctrl_cts_int,
  640. IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
  641. uart->cts_pin = -1;
  642. pr_info("Unable to attach BlackFin UART Modem Status interrupt.\n");
  643. }
  644. /* CTS RTS PINs are negative assertive. */
  645. UART_PUT_MCR(uart, ACTS);
  646. UART_SET_IER(uart, EDSSI);
  647. #endif
  648. UART_SET_IER(uart, ERBFI);
  649. return 0;
  650. }
  651. static void bfin_serial_shutdown(struct uart_port *port)
  652. {
  653. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  654. #ifdef CONFIG_SERIAL_BFIN_DMA
  655. disable_dma(uart->tx_dma_channel);
  656. free_dma(uart->tx_dma_channel);
  657. disable_dma(uart->rx_dma_channel);
  658. free_dma(uart->rx_dma_channel);
  659. del_timer(&(uart->rx_dma_timer));
  660. dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
  661. #else
  662. #ifdef CONFIG_BF54x
  663. switch (uart->port.irq) {
  664. case IRQ_UART3_RX:
  665. free_dma(CH_UART3_RX);
  666. free_dma(CH_UART3_TX);
  667. break;
  668. case IRQ_UART2_RX:
  669. free_dma(CH_UART2_RX);
  670. free_dma(CH_UART2_TX);
  671. break;
  672. default:
  673. break;
  674. };
  675. #endif
  676. free_irq(uart->port.irq, uart);
  677. free_irq(uart->port.irq+1, uart);
  678. #endif
  679. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  680. if (uart->cts_pin >= 0)
  681. free_irq(gpio_to_irq(uart->cts_pin), uart);
  682. #endif
  683. #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
  684. if (uart->cts_pin >= 0)
  685. free_irq(uart->status_irq, uart);
  686. #endif
  687. }
  688. static void
  689. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  690. struct ktermios *old)
  691. {
  692. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  693. unsigned long flags;
  694. unsigned int baud, quot;
  695. unsigned short val, ier, lcr = 0;
  696. switch (termios->c_cflag & CSIZE) {
  697. case CS8:
  698. lcr = WLS(8);
  699. break;
  700. case CS7:
  701. lcr = WLS(7);
  702. break;
  703. case CS6:
  704. lcr = WLS(6);
  705. break;
  706. case CS5:
  707. lcr = WLS(5);
  708. break;
  709. default:
  710. printk(KERN_ERR "%s: word lengh not supported\n",
  711. __func__);
  712. }
  713. /* Anomaly notes:
  714. * 05000231 - STOP bit is always set to 1 whatever the user is set.
  715. */
  716. if (termios->c_cflag & CSTOPB) {
  717. if (ANOMALY_05000231)
  718. printk(KERN_WARNING "STOP bits other than 1 is not "
  719. "supported in case of anomaly 05000231.\n");
  720. else
  721. lcr |= STB;
  722. }
  723. if (termios->c_cflag & PARENB)
  724. lcr |= PEN;
  725. if (!(termios->c_cflag & PARODD))
  726. lcr |= EPS;
  727. if (termios->c_cflag & CMSPAR)
  728. lcr |= STP;
  729. spin_lock_irqsave(&uart->port.lock, flags);
  730. port->read_status_mask = OE;
  731. if (termios->c_iflag & INPCK)
  732. port->read_status_mask |= (FE | PE);
  733. if (termios->c_iflag & (BRKINT | PARMRK))
  734. port->read_status_mask |= BI;
  735. /*
  736. * Characters to ignore
  737. */
  738. port->ignore_status_mask = 0;
  739. if (termios->c_iflag & IGNPAR)
  740. port->ignore_status_mask |= FE | PE;
  741. if (termios->c_iflag & IGNBRK) {
  742. port->ignore_status_mask |= BI;
  743. /*
  744. * If we're ignoring parity and break indicators,
  745. * ignore overruns too (for real raw support).
  746. */
  747. if (termios->c_iflag & IGNPAR)
  748. port->ignore_status_mask |= OE;
  749. }
  750. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  751. quot = uart_get_divisor(port, baud);
  752. /* If discipline is not IRDA, apply ANOMALY_05000230 */
  753. if (termios->c_line != N_IRDA)
  754. quot -= ANOMALY_05000230;
  755. UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
  756. /* Disable UART */
  757. ier = UART_GET_IER(uart);
  758. UART_DISABLE_INTS(uart);
  759. /* Set DLAB in LCR to Access DLL and DLH */
  760. UART_SET_DLAB(uart);
  761. UART_PUT_DLL(uart, quot & 0xFF);
  762. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  763. SSYNC();
  764. /* Clear DLAB in LCR to Access THR RBR IER */
  765. UART_CLEAR_DLAB(uart);
  766. UART_PUT_LCR(uart, lcr);
  767. /* Enable UART */
  768. UART_ENABLE_INTS(uart, ier);
  769. val = UART_GET_GCTL(uart);
  770. val |= UCEN;
  771. UART_PUT_GCTL(uart, val);
  772. /* Port speed changed, update the per-port timeout. */
  773. uart_update_timeout(port, termios->c_cflag, baud);
  774. spin_unlock_irqrestore(&uart->port.lock, flags);
  775. }
  776. static const char *bfin_serial_type(struct uart_port *port)
  777. {
  778. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  779. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  780. }
  781. /*
  782. * Release the memory region(s) being used by 'port'.
  783. */
  784. static void bfin_serial_release_port(struct uart_port *port)
  785. {
  786. }
  787. /*
  788. * Request the memory region(s) being used by 'port'.
  789. */
  790. static int bfin_serial_request_port(struct uart_port *port)
  791. {
  792. return 0;
  793. }
  794. /*
  795. * Configure/autoconfigure the port.
  796. */
  797. static void bfin_serial_config_port(struct uart_port *port, int flags)
  798. {
  799. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  800. if (flags & UART_CONFIG_TYPE &&
  801. bfin_serial_request_port(&uart->port) == 0)
  802. uart->port.type = PORT_BFIN;
  803. }
  804. /*
  805. * Verify the new serial_struct (for TIOCSSERIAL).
  806. * The only change we allow are to the flags and type, and
  807. * even then only between PORT_BFIN and PORT_UNKNOWN
  808. */
  809. static int
  810. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  811. {
  812. return 0;
  813. }
  814. /*
  815. * Enable the IrDA function if tty->ldisc.num is N_IRDA.
  816. * In other cases, disable IrDA function.
  817. */
  818. static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
  819. {
  820. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  821. unsigned short val;
  822. switch (ld) {
  823. case N_IRDA:
  824. val = UART_GET_GCTL(uart);
  825. val |= (IREN | RPOLC);
  826. UART_PUT_GCTL(uart, val);
  827. break;
  828. default:
  829. val = UART_GET_GCTL(uart);
  830. val &= ~(IREN | RPOLC);
  831. UART_PUT_GCTL(uart, val);
  832. }
  833. }
  834. static void bfin_serial_reset_irda(struct uart_port *port)
  835. {
  836. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  837. unsigned short val;
  838. val = UART_GET_GCTL(uart);
  839. val &= ~(IREN | RPOLC);
  840. UART_PUT_GCTL(uart, val);
  841. SSYNC();
  842. val |= (IREN | RPOLC);
  843. UART_PUT_GCTL(uart, val);
  844. SSYNC();
  845. }
  846. #ifdef CONFIG_CONSOLE_POLL
  847. /* Anomaly notes:
  848. * 05000099 - Because we only use THRE in poll_put and DR in poll_get,
  849. * losing other bits of UART_LSR is not a problem here.
  850. */
  851. static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
  852. {
  853. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  854. while (!(UART_GET_LSR(uart) & THRE))
  855. cpu_relax();
  856. UART_CLEAR_DLAB(uart);
  857. UART_PUT_CHAR(uart, (unsigned char)chr);
  858. }
  859. static int bfin_serial_poll_get_char(struct uart_port *port)
  860. {
  861. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  862. unsigned char chr;
  863. while (!(UART_GET_LSR(uart) & DR))
  864. cpu_relax();
  865. UART_CLEAR_DLAB(uart);
  866. chr = UART_GET_CHAR(uart);
  867. return chr;
  868. }
  869. #endif
  870. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  871. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  872. static void bfin_kgdboc_port_shutdown(struct uart_port *port)
  873. {
  874. if (kgdboc_break_enabled) {
  875. kgdboc_break_enabled = 0;
  876. bfin_serial_shutdown(port);
  877. }
  878. }
  879. static int bfin_kgdboc_port_startup(struct uart_port *port)
  880. {
  881. kgdboc_port_line = port->line;
  882. kgdboc_break_enabled = !bfin_serial_startup(port);
  883. return 0;
  884. }
  885. #endif
  886. static struct uart_ops bfin_serial_pops = {
  887. .tx_empty = bfin_serial_tx_empty,
  888. .set_mctrl = bfin_serial_set_mctrl,
  889. .get_mctrl = bfin_serial_get_mctrl,
  890. .stop_tx = bfin_serial_stop_tx,
  891. .start_tx = bfin_serial_start_tx,
  892. .stop_rx = bfin_serial_stop_rx,
  893. .enable_ms = bfin_serial_enable_ms,
  894. .break_ctl = bfin_serial_break_ctl,
  895. .startup = bfin_serial_startup,
  896. .shutdown = bfin_serial_shutdown,
  897. .set_termios = bfin_serial_set_termios,
  898. .set_ldisc = bfin_serial_set_ldisc,
  899. .type = bfin_serial_type,
  900. .release_port = bfin_serial_release_port,
  901. .request_port = bfin_serial_request_port,
  902. .config_port = bfin_serial_config_port,
  903. .verify_port = bfin_serial_verify_port,
  904. #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  905. defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  906. .kgdboc_port_startup = bfin_kgdboc_port_startup,
  907. .kgdboc_port_shutdown = bfin_kgdboc_port_shutdown,
  908. #endif
  909. #ifdef CONFIG_CONSOLE_POLL
  910. .poll_put_char = bfin_serial_poll_put_char,
  911. .poll_get_char = bfin_serial_poll_get_char,
  912. #endif
  913. };
  914. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  915. /*
  916. * If the port was already initialised (eg, by a boot loader),
  917. * try to determine the current setup.
  918. */
  919. static void __init
  920. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  921. int *parity, int *bits)
  922. {
  923. unsigned short status;
  924. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  925. if (status == (ERBFI | ETBEI)) {
  926. /* ok, the port was enabled */
  927. u16 lcr, dlh, dll;
  928. lcr = UART_GET_LCR(uart);
  929. *parity = 'n';
  930. if (lcr & PEN) {
  931. if (lcr & EPS)
  932. *parity = 'e';
  933. else
  934. *parity = 'o';
  935. }
  936. switch (lcr & 0x03) {
  937. case 0: *bits = 5; break;
  938. case 1: *bits = 6; break;
  939. case 2: *bits = 7; break;
  940. case 3: *bits = 8; break;
  941. }
  942. /* Set DLAB in LCR to Access DLL and DLH */
  943. UART_SET_DLAB(uart);
  944. dll = UART_GET_DLL(uart);
  945. dlh = UART_GET_DLH(uart);
  946. /* Clear DLAB in LCR to Access THR RBR IER */
  947. UART_CLEAR_DLAB(uart);
  948. *baud = get_sclk() / (16*(dll | dlh << 8));
  949. }
  950. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
  951. }
  952. static struct uart_driver bfin_serial_reg;
  953. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  954. {
  955. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  956. while (!(UART_GET_LSR(uart) & THRE))
  957. barrier();
  958. UART_PUT_CHAR(uart, ch);
  959. }
  960. #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
  961. defined (CONFIG_EARLY_PRINTK) */
  962. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  963. #define CLASS_BFIN_CONSOLE "bfin-console"
  964. /*
  965. * Interrupts are disabled on entering
  966. */
  967. static void
  968. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  969. {
  970. struct bfin_serial_port *uart = bfin_serial_ports[co->index];
  971. unsigned long flags;
  972. spin_lock_irqsave(&uart->port.lock, flags);
  973. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  974. spin_unlock_irqrestore(&uart->port.lock, flags);
  975. }
  976. static int __init
  977. bfin_serial_console_setup(struct console *co, char *options)
  978. {
  979. struct bfin_serial_port *uart;
  980. int baud = 57600;
  981. int bits = 8;
  982. int parity = 'n';
  983. # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  984. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  985. int flow = 'r';
  986. # else
  987. int flow = 'n';
  988. # endif
  989. /*
  990. * Check whether an invalid uart number has been specified, and
  991. * if so, search for the first available port that does have
  992. * console support.
  993. */
  994. if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
  995. return -ENODEV;
  996. uart = bfin_serial_ports[co->index];
  997. if (!uart)
  998. return -ENODEV;
  999. if (options)
  1000. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1001. else
  1002. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  1003. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  1004. }
  1005. static struct console bfin_serial_console = {
  1006. .name = BFIN_SERIAL_DEV_NAME,
  1007. .write = bfin_serial_console_write,
  1008. .device = uart_console_device,
  1009. .setup = bfin_serial_console_setup,
  1010. .flags = CON_PRINTBUFFER,
  1011. .index = -1,
  1012. .data = &bfin_serial_reg,
  1013. };
  1014. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  1015. #else
  1016. #define BFIN_SERIAL_CONSOLE NULL
  1017. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  1018. #ifdef CONFIG_EARLY_PRINTK
  1019. static struct bfin_serial_port bfin_earlyprintk_port;
  1020. #define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk"
  1021. /*
  1022. * Interrupts are disabled on entering
  1023. */
  1024. static void
  1025. bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
  1026. {
  1027. unsigned long flags;
  1028. if (bfin_earlyprintk_port.port.line != co->index)
  1029. return;
  1030. spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
  1031. uart_console_write(&bfin_earlyprintk_port.port, s, count,
  1032. bfin_serial_console_putchar);
  1033. spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
  1034. }
  1035. /*
  1036. * This should have a .setup or .early_setup in it, but then things get called
  1037. * without the command line options, and the baud rate gets messed up - so
  1038. * don't let the common infrastructure play with things. (see calls to setup
  1039. * & earlysetup in ./kernel/printk.c:register_console()
  1040. */
  1041. static struct __initdata console bfin_early_serial_console = {
  1042. .name = "early_BFuart",
  1043. .write = bfin_earlyprintk_console_write,
  1044. .device = uart_console_device,
  1045. .flags = CON_PRINTBUFFER,
  1046. .index = -1,
  1047. .data = &bfin_serial_reg,
  1048. };
  1049. #endif
  1050. static struct uart_driver bfin_serial_reg = {
  1051. .owner = THIS_MODULE,
  1052. .driver_name = DRIVER_NAME,
  1053. .dev_name = BFIN_SERIAL_DEV_NAME,
  1054. .major = BFIN_SERIAL_MAJOR,
  1055. .minor = BFIN_SERIAL_MINOR,
  1056. .nr = BFIN_UART_NR_PORTS,
  1057. .cons = BFIN_SERIAL_CONSOLE,
  1058. };
  1059. static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
  1060. {
  1061. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1062. return uart_suspend_port(&bfin_serial_reg, &uart->port);
  1063. }
  1064. static int bfin_serial_resume(struct platform_device *pdev)
  1065. {
  1066. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1067. return uart_resume_port(&bfin_serial_reg, &uart->port);
  1068. }
  1069. static int bfin_serial_probe(struct platform_device *pdev)
  1070. {
  1071. struct resource *res;
  1072. struct bfin_serial_port *uart = NULL;
  1073. int ret = 0;
  1074. if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
  1075. dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
  1076. return -ENOENT;
  1077. }
  1078. if (bfin_serial_ports[pdev->id] == NULL) {
  1079. uart = kzalloc(sizeof(*uart), GFP_KERNEL);
  1080. if (!uart) {
  1081. dev_err(&pdev->dev,
  1082. "fail to malloc bfin_serial_port\n");
  1083. return -ENOMEM;
  1084. }
  1085. bfin_serial_ports[pdev->id] = uart;
  1086. #ifdef CONFIG_EARLY_PRINTK
  1087. if (!(bfin_earlyprintk_port.port.membase
  1088. && bfin_earlyprintk_port.port.line == pdev->id)) {
  1089. /*
  1090. * If the peripheral PINs of current port is allocated
  1091. * in earlyprintk probe stage, don't do it again.
  1092. */
  1093. #endif
  1094. ret = peripheral_request_list(
  1095. (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
  1096. if (ret) {
  1097. dev_err(&pdev->dev,
  1098. "fail to request bfin serial peripherals\n");
  1099. goto out_error_free_mem;
  1100. }
  1101. #ifdef CONFIG_EARLY_PRINTK
  1102. }
  1103. #endif
  1104. spin_lock_init(&uart->port.lock);
  1105. uart->port.uartclk = get_sclk();
  1106. uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE;
  1107. uart->port.ops = &bfin_serial_pops;
  1108. uart->port.line = pdev->id;
  1109. uart->port.iotype = UPIO_MEM;
  1110. uart->port.flags = UPF_BOOT_AUTOCONF;
  1111. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1112. if (res == NULL) {
  1113. dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
  1114. ret = -ENOENT;
  1115. goto out_error_free_peripherals;
  1116. }
  1117. uart->port.membase = ioremap(res->start,
  1118. res->end - res->start);
  1119. if (!uart->port.membase) {
  1120. dev_err(&pdev->dev, "Cannot map uart IO\n");
  1121. ret = -ENXIO;
  1122. goto out_error_free_peripherals;
  1123. }
  1124. uart->port.mapbase = res->start;
  1125. uart->port.irq = platform_get_irq(pdev, 0);
  1126. if (uart->port.irq < 0) {
  1127. dev_err(&pdev->dev, "No uart RX/TX IRQ specified\n");
  1128. ret = -ENOENT;
  1129. goto out_error_unmap;
  1130. }
  1131. uart->status_irq = platform_get_irq(pdev, 1);
  1132. if (uart->status_irq < 0) {
  1133. dev_err(&pdev->dev, "No uart status IRQ specified\n");
  1134. ret = -ENOENT;
  1135. goto out_error_unmap;
  1136. }
  1137. #ifdef CONFIG_SERIAL_BFIN_DMA
  1138. uart->tx_done = 1;
  1139. uart->tx_count = 0;
  1140. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  1141. if (res == NULL) {
  1142. dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
  1143. ret = -ENOENT;
  1144. goto out_error_unmap;
  1145. }
  1146. uart->tx_dma_channel = res->start;
  1147. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  1148. if (res == NULL) {
  1149. dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
  1150. ret = -ENOENT;
  1151. goto out_error_unmap;
  1152. }
  1153. uart->rx_dma_channel = res->start;
  1154. init_timer(&(uart->rx_dma_timer));
  1155. #endif
  1156. #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  1157. defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  1158. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1159. if (res == NULL)
  1160. uart->cts_pin = -1;
  1161. else
  1162. uart->cts_pin = res->start;
  1163. res = platform_get_resource(pdev, IORESOURCE_IO, 1);
  1164. if (res == NULL)
  1165. uart->rts_pin = -1;
  1166. else
  1167. uart->rts_pin = res->start;
  1168. # if defined(CONFIG_SERIAL_BFIN_CTSRTS)
  1169. if (uart->rts_pin >= 0)
  1170. gpio_request(uart->rts_pin, DRIVER_NAME);
  1171. # endif
  1172. #endif
  1173. }
  1174. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1175. if (!is_early_platform_device(pdev)) {
  1176. #endif
  1177. uart = bfin_serial_ports[pdev->id];
  1178. uart->port.dev = &pdev->dev;
  1179. dev_set_drvdata(&pdev->dev, uart);
  1180. ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
  1181. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1182. }
  1183. #endif
  1184. if (!ret)
  1185. return 0;
  1186. if (uart) {
  1187. out_error_unmap:
  1188. iounmap(uart->port.membase);
  1189. out_error_free_peripherals:
  1190. peripheral_free_list(
  1191. (unsigned short *)pdev->dev.platform_data);
  1192. out_error_free_mem:
  1193. kfree(uart);
  1194. bfin_serial_ports[pdev->id] = NULL;
  1195. }
  1196. return ret;
  1197. }
  1198. static int __devexit bfin_serial_remove(struct platform_device *pdev)
  1199. {
  1200. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1201. dev_set_drvdata(&pdev->dev, NULL);
  1202. if (uart) {
  1203. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  1204. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  1205. if (uart->rts_pin >= 0)
  1206. gpio_free(uart->rts_pin);
  1207. #endif
  1208. iounmap(uart->port.membase);
  1209. peripheral_free_list(
  1210. (unsigned short *)pdev->dev.platform_data);
  1211. kfree(uart);
  1212. bfin_serial_ports[pdev->id] = NULL;
  1213. }
  1214. return 0;
  1215. }
  1216. static struct platform_driver bfin_serial_driver = {
  1217. .probe = bfin_serial_probe,
  1218. .remove = __devexit_p(bfin_serial_remove),
  1219. .suspend = bfin_serial_suspend,
  1220. .resume = bfin_serial_resume,
  1221. .driver = {
  1222. .name = DRIVER_NAME,
  1223. .owner = THIS_MODULE,
  1224. },
  1225. };
  1226. #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
  1227. static __initdata struct early_platform_driver early_bfin_serial_driver = {
  1228. .class_str = CLASS_BFIN_CONSOLE,
  1229. .pdrv = &bfin_serial_driver,
  1230. .requested_id = EARLY_PLATFORM_ID_UNSET,
  1231. };
  1232. static int __init bfin_serial_rs_console_init(void)
  1233. {
  1234. early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
  1235. early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
  1236. register_console(&bfin_serial_console);
  1237. return 0;
  1238. }
  1239. console_initcall(bfin_serial_rs_console_init);
  1240. #endif
  1241. #ifdef CONFIG_EARLY_PRINTK
  1242. /*
  1243. * Memory can't be allocated dynamically during earlyprink init stage.
  1244. * So, do individual probe for earlyprink with a static uart port variable.
  1245. */
  1246. static int bfin_earlyprintk_probe(struct platform_device *pdev)
  1247. {
  1248. struct resource *res;
  1249. int ret;
  1250. if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
  1251. dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
  1252. return -ENOENT;
  1253. }
  1254. ret = peripheral_request_list(
  1255. (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
  1256. if (ret) {
  1257. dev_err(&pdev->dev,
  1258. "fail to request bfin serial peripherals\n");
  1259. return ret;
  1260. }
  1261. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1262. if (res == NULL) {
  1263. dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
  1264. ret = -ENOENT;
  1265. goto out_error_free_peripherals;
  1266. }
  1267. bfin_earlyprintk_port.port.membase = ioremap(res->start,
  1268. res->end - res->start);
  1269. if (!bfin_earlyprintk_port.port.membase) {
  1270. dev_err(&pdev->dev, "Cannot map uart IO\n");
  1271. ret = -ENXIO;
  1272. goto out_error_free_peripherals;
  1273. }
  1274. bfin_earlyprintk_port.port.mapbase = res->start;
  1275. bfin_earlyprintk_port.port.line = pdev->id;
  1276. bfin_earlyprintk_port.port.uartclk = get_sclk();
  1277. bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE;
  1278. spin_lock_init(&bfin_earlyprintk_port.port.lock);
  1279. return 0;
  1280. out_error_free_peripherals:
  1281. peripheral_free_list(
  1282. (unsigned short *)pdev->dev.platform_data);
  1283. return ret;
  1284. }
  1285. static struct platform_driver bfin_earlyprintk_driver = {
  1286. .probe = bfin_earlyprintk_probe,
  1287. .driver = {
  1288. .name = DRIVER_NAME,
  1289. .owner = THIS_MODULE,
  1290. },
  1291. };
  1292. static __initdata struct early_platform_driver early_bfin_earlyprintk_driver = {
  1293. .class_str = CLASS_BFIN_EARLYPRINTK,
  1294. .pdrv = &bfin_earlyprintk_driver,
  1295. .requested_id = EARLY_PLATFORM_ID_UNSET,
  1296. };
  1297. struct console __init *bfin_earlyserial_init(unsigned int port,
  1298. unsigned int cflag)
  1299. {
  1300. struct ktermios t;
  1301. char port_name[20];
  1302. if (port < 0 || port >= BFIN_UART_NR_PORTS)
  1303. return NULL;
  1304. /*
  1305. * Only probe resource of the given port in earlyprintk boot arg.
  1306. * The expected port id should be indicated in port name string.
  1307. */
  1308. snprintf(port_name, 20, DRIVER_NAME ".%d", port);
  1309. early_platform_driver_register(&early_bfin_earlyprintk_driver,
  1310. port_name);
  1311. early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
  1312. if (!bfin_earlyprintk_port.port.membase)
  1313. return NULL;
  1314. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  1315. /*
  1316. * If we are using early serial, don't let the normal console rewind
  1317. * log buffer, since that causes things to be printed multiple times
  1318. */
  1319. bfin_serial_console.flags &= ~CON_PRINTBUFFER;
  1320. #endif
  1321. bfin_early_serial_console.index = port;
  1322. t.c_cflag = cflag;
  1323. t.c_iflag = 0;
  1324. t.c_oflag = 0;
  1325. t.c_lflag = ICANON;
  1326. t.c_line = port;
  1327. bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
  1328. return &bfin_early_serial_console;
  1329. }
  1330. #endif /* CONFIG_EARLY_PRINTK */
  1331. static int __init bfin_serial_init(void)
  1332. {
  1333. int ret;
  1334. pr_info("Blackfin serial driver\n");
  1335. ret = uart_register_driver(&bfin_serial_reg);
  1336. if (ret) {
  1337. pr_err("failed to register %s:%d\n",
  1338. bfin_serial_reg.driver_name, ret);
  1339. }
  1340. ret = platform_driver_register(&bfin_serial_driver);
  1341. if (ret) {
  1342. pr_err("fail to register bfin uart\n");
  1343. uart_unregister_driver(&bfin_serial_reg);
  1344. }
  1345. return ret;
  1346. }
  1347. static void __exit bfin_serial_exit(void)
  1348. {
  1349. platform_driver_unregister(&bfin_serial_driver);
  1350. uart_unregister_driver(&bfin_serial_reg);
  1351. }
  1352. module_init(bfin_serial_init);
  1353. module_exit(bfin_serial_exit);
  1354. MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
  1355. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  1356. MODULE_LICENSE("GPL");
  1357. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
  1358. MODULE_ALIAS("platform:bfin-uart");