altera_uart.c 16 KB

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  1. /*
  2. * altera_uart.c -- Altera UART driver
  3. *
  4. * Based on mcf.c -- Freescale ColdFire UART driver
  5. *
  6. * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
  7. * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
  8. * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/timer.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/module.h>
  20. #include <linux/console.h>
  21. #include <linux/tty.h>
  22. #include <linux/tty_flip.h>
  23. #include <linux/serial.h>
  24. #include <linux/serial_core.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/io.h>
  27. #include <linux/altera_uart.h>
  28. #define DRV_NAME "altera_uart"
  29. #define SERIAL_ALTERA_MAJOR 204
  30. #define SERIAL_ALTERA_MINOR 213
  31. /*
  32. * Altera UART register definitions according to the Nios UART datasheet:
  33. * http://www.altera.com/literature/ds/ds_nios_uart.pdf
  34. */
  35. #define ALTERA_UART_SIZE 32
  36. #define ALTERA_UART_RXDATA_REG 0
  37. #define ALTERA_UART_TXDATA_REG 4
  38. #define ALTERA_UART_STATUS_REG 8
  39. #define ALTERA_UART_CONTROL_REG 12
  40. #define ALTERA_UART_DIVISOR_REG 16
  41. #define ALTERA_UART_EOP_REG 20
  42. #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
  43. #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
  44. #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
  45. #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
  46. #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
  47. #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
  48. #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
  49. #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
  50. #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
  51. #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
  52. #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
  53. #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
  54. /* Enable interrupt on... */
  55. #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
  56. #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
  57. #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
  58. #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
  59. #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
  60. #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
  61. #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
  62. #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
  63. #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
  64. #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
  65. #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
  66. #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
  67. #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
  68. /*
  69. * Local per-uart structure.
  70. */
  71. struct altera_uart {
  72. struct uart_port port;
  73. struct timer_list tmr;
  74. unsigned int sigs; /* Local copy of line sigs */
  75. unsigned short imr; /* Local IMR mirror */
  76. };
  77. static u32 altera_uart_readl(struct uart_port *port, int reg)
  78. {
  79. struct altera_uart_platform_uart *platp = port->private_data;
  80. return readl(port->membase + (reg << platp->bus_shift));
  81. }
  82. static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
  83. {
  84. struct altera_uart_platform_uart *platp = port->private_data;
  85. writel(dat, port->membase + (reg << platp->bus_shift));
  86. }
  87. static unsigned int altera_uart_tx_empty(struct uart_port *port)
  88. {
  89. return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  90. ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
  91. }
  92. static unsigned int altera_uart_get_mctrl(struct uart_port *port)
  93. {
  94. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  95. unsigned int sigs;
  96. sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  97. ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
  98. sigs |= (pp->sigs & TIOCM_RTS);
  99. return sigs;
  100. }
  101. static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
  102. {
  103. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  104. pp->sigs = sigs;
  105. if (sigs & TIOCM_RTS)
  106. pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
  107. else
  108. pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
  109. altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
  110. }
  111. static void altera_uart_start_tx(struct uart_port *port)
  112. {
  113. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  114. pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
  115. altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
  116. }
  117. static void altera_uart_stop_tx(struct uart_port *port)
  118. {
  119. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  120. pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
  121. altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
  122. }
  123. static void altera_uart_stop_rx(struct uart_port *port)
  124. {
  125. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  126. pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
  127. altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
  128. }
  129. static void altera_uart_break_ctl(struct uart_port *port, int break_state)
  130. {
  131. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  132. unsigned long flags;
  133. spin_lock_irqsave(&port->lock, flags);
  134. if (break_state == -1)
  135. pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
  136. else
  137. pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
  138. altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
  139. spin_unlock_irqrestore(&port->lock, flags);
  140. }
  141. static void altera_uart_enable_ms(struct uart_port *port)
  142. {
  143. }
  144. static void altera_uart_set_termios(struct uart_port *port,
  145. struct ktermios *termios,
  146. struct ktermios *old)
  147. {
  148. unsigned long flags;
  149. unsigned int baud, baudclk;
  150. baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
  151. baudclk = port->uartclk / baud;
  152. if (old)
  153. tty_termios_copy_hw(termios, old);
  154. tty_termios_encode_baud_rate(termios, baud, baud);
  155. spin_lock_irqsave(&port->lock, flags);
  156. uart_update_timeout(port, termios->c_cflag, baud);
  157. altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
  158. spin_unlock_irqrestore(&port->lock, flags);
  159. }
  160. static void altera_uart_rx_chars(struct altera_uart *pp)
  161. {
  162. struct uart_port *port = &pp->port;
  163. unsigned char ch, flag;
  164. unsigned short status;
  165. while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
  166. ALTERA_UART_STATUS_RRDY_MSK) {
  167. ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
  168. flag = TTY_NORMAL;
  169. port->icount.rx++;
  170. if (status & ALTERA_UART_STATUS_E_MSK) {
  171. altera_uart_writel(port, status,
  172. ALTERA_UART_STATUS_REG);
  173. if (status & ALTERA_UART_STATUS_BRK_MSK) {
  174. port->icount.brk++;
  175. if (uart_handle_break(port))
  176. continue;
  177. } else if (status & ALTERA_UART_STATUS_PE_MSK) {
  178. port->icount.parity++;
  179. } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
  180. port->icount.overrun++;
  181. } else if (status & ALTERA_UART_STATUS_FE_MSK) {
  182. port->icount.frame++;
  183. }
  184. status &= port->read_status_mask;
  185. if (status & ALTERA_UART_STATUS_BRK_MSK)
  186. flag = TTY_BREAK;
  187. else if (status & ALTERA_UART_STATUS_PE_MSK)
  188. flag = TTY_PARITY;
  189. else if (status & ALTERA_UART_STATUS_FE_MSK)
  190. flag = TTY_FRAME;
  191. }
  192. if (uart_handle_sysrq_char(port, ch))
  193. continue;
  194. uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
  195. flag);
  196. }
  197. tty_flip_buffer_push(port->state->port.tty);
  198. }
  199. static void altera_uart_tx_chars(struct altera_uart *pp)
  200. {
  201. struct uart_port *port = &pp->port;
  202. struct circ_buf *xmit = &port->state->xmit;
  203. if (port->x_char) {
  204. /* Send special char - probably flow control */
  205. altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
  206. port->x_char = 0;
  207. port->icount.tx++;
  208. return;
  209. }
  210. while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  211. ALTERA_UART_STATUS_TRDY_MSK) {
  212. if (xmit->head == xmit->tail)
  213. break;
  214. altera_uart_writel(port, xmit->buf[xmit->tail],
  215. ALTERA_UART_TXDATA_REG);
  216. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  217. port->icount.tx++;
  218. }
  219. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  220. uart_write_wakeup(port);
  221. if (xmit->head == xmit->tail) {
  222. pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
  223. altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
  224. }
  225. }
  226. static irqreturn_t altera_uart_interrupt(int irq, void *data)
  227. {
  228. struct uart_port *port = data;
  229. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  230. unsigned int isr;
  231. isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
  232. spin_lock(&port->lock);
  233. if (isr & ALTERA_UART_STATUS_RRDY_MSK)
  234. altera_uart_rx_chars(pp);
  235. if (isr & ALTERA_UART_STATUS_TRDY_MSK)
  236. altera_uart_tx_chars(pp);
  237. spin_unlock(&port->lock);
  238. return IRQ_RETVAL(isr);
  239. }
  240. static void altera_uart_timer(unsigned long data)
  241. {
  242. struct uart_port *port = (void *)data;
  243. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  244. altera_uart_interrupt(0, port);
  245. mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
  246. }
  247. static void altera_uart_config_port(struct uart_port *port, int flags)
  248. {
  249. port->type = PORT_ALTERA_UART;
  250. /* Clear mask, so no surprise interrupts. */
  251. altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
  252. /* Clear status register */
  253. altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
  254. }
  255. static int altera_uart_startup(struct uart_port *port)
  256. {
  257. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  258. unsigned long flags;
  259. int ret;
  260. if (!port->irq) {
  261. setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port);
  262. mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
  263. return 0;
  264. }
  265. ret = request_irq(port->irq, altera_uart_interrupt, IRQF_DISABLED,
  266. DRV_NAME, port);
  267. if (ret) {
  268. pr_err(DRV_NAME ": unable to attach Altera UART %d "
  269. "interrupt vector=%d\n", port->line, port->irq);
  270. return ret;
  271. }
  272. spin_lock_irqsave(&port->lock, flags);
  273. /* Enable RX interrupts now */
  274. pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
  275. writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
  276. spin_unlock_irqrestore(&port->lock, flags);
  277. return 0;
  278. }
  279. static void altera_uart_shutdown(struct uart_port *port)
  280. {
  281. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  282. unsigned long flags;
  283. spin_lock_irqsave(&port->lock, flags);
  284. /* Disable all interrupts now */
  285. pp->imr = 0;
  286. writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
  287. spin_unlock_irqrestore(&port->lock, flags);
  288. if (port->irq)
  289. free_irq(port->irq, port);
  290. else
  291. del_timer_sync(&pp->tmr);
  292. }
  293. static const char *altera_uart_type(struct uart_port *port)
  294. {
  295. return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
  296. }
  297. static int altera_uart_request_port(struct uart_port *port)
  298. {
  299. /* UARTs always present */
  300. return 0;
  301. }
  302. static void altera_uart_release_port(struct uart_port *port)
  303. {
  304. /* Nothing to release... */
  305. }
  306. static int altera_uart_verify_port(struct uart_port *port,
  307. struct serial_struct *ser)
  308. {
  309. if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
  310. return -EINVAL;
  311. return 0;
  312. }
  313. /*
  314. * Define the basic serial functions we support.
  315. */
  316. static struct uart_ops altera_uart_ops = {
  317. .tx_empty = altera_uart_tx_empty,
  318. .get_mctrl = altera_uart_get_mctrl,
  319. .set_mctrl = altera_uart_set_mctrl,
  320. .start_tx = altera_uart_start_tx,
  321. .stop_tx = altera_uart_stop_tx,
  322. .stop_rx = altera_uart_stop_rx,
  323. .enable_ms = altera_uart_enable_ms,
  324. .break_ctl = altera_uart_break_ctl,
  325. .startup = altera_uart_startup,
  326. .shutdown = altera_uart_shutdown,
  327. .set_termios = altera_uart_set_termios,
  328. .type = altera_uart_type,
  329. .request_port = altera_uart_request_port,
  330. .release_port = altera_uart_release_port,
  331. .config_port = altera_uart_config_port,
  332. .verify_port = altera_uart_verify_port,
  333. };
  334. static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
  335. #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
  336. int __init early_altera_uart_setup(struct altera_uart_platform_uart *platp)
  337. {
  338. struct uart_port *port;
  339. int i;
  340. for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS && platp[i].mapbase; i++) {
  341. port = &altera_uart_ports[i].port;
  342. port->line = i;
  343. port->type = PORT_ALTERA_UART;
  344. port->mapbase = platp[i].mapbase;
  345. port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
  346. port->iotype = SERIAL_IO_MEM;
  347. port->irq = platp[i].irq;
  348. port->uartclk = platp[i].uartclk;
  349. port->flags = UPF_BOOT_AUTOCONF;
  350. port->ops = &altera_uart_ops;
  351. port->private_data = platp;
  352. }
  353. return 0;
  354. }
  355. static void altera_uart_console_putc(struct uart_port *port, const char c)
  356. {
  357. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  358. ALTERA_UART_STATUS_TRDY_MSK))
  359. cpu_relax();
  360. writel(c, port->membase + ALTERA_UART_TXDATA_REG);
  361. }
  362. static void altera_uart_console_write(struct console *co, const char *s,
  363. unsigned int count)
  364. {
  365. struct uart_port *port = &(altera_uart_ports + co->index)->port;
  366. for (; count; count--, s++) {
  367. altera_uart_console_putc(port, *s);
  368. if (*s == '\n')
  369. altera_uart_console_putc(port, '\r');
  370. }
  371. }
  372. static int __init altera_uart_console_setup(struct console *co, char *options)
  373. {
  374. struct uart_port *port;
  375. int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
  376. int bits = 8;
  377. int parity = 'n';
  378. int flow = 'n';
  379. if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
  380. return -EINVAL;
  381. port = &altera_uart_ports[co->index].port;
  382. if (!port->membase)
  383. return -ENODEV;
  384. if (options)
  385. uart_parse_options(options, &baud, &parity, &bits, &flow);
  386. return uart_set_options(port, co, baud, parity, bits, flow);
  387. }
  388. static struct uart_driver altera_uart_driver;
  389. static struct console altera_uart_console = {
  390. .name = "ttyAL",
  391. .write = altera_uart_console_write,
  392. .device = uart_console_device,
  393. .setup = altera_uart_console_setup,
  394. .flags = CON_PRINTBUFFER,
  395. .index = -1,
  396. .data = &altera_uart_driver,
  397. };
  398. static int __init altera_uart_console_init(void)
  399. {
  400. register_console(&altera_uart_console);
  401. return 0;
  402. }
  403. console_initcall(altera_uart_console_init);
  404. #define ALTERA_UART_CONSOLE (&altera_uart_console)
  405. #else
  406. #define ALTERA_UART_CONSOLE NULL
  407. #endif /* CONFIG_ALTERA_UART_CONSOLE */
  408. /*
  409. * Define the altera_uart UART driver structure.
  410. */
  411. static struct uart_driver altera_uart_driver = {
  412. .owner = THIS_MODULE,
  413. .driver_name = DRV_NAME,
  414. .dev_name = "ttyAL",
  415. .major = SERIAL_ALTERA_MAJOR,
  416. .minor = SERIAL_ALTERA_MINOR,
  417. .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
  418. .cons = ALTERA_UART_CONSOLE,
  419. };
  420. static int __devinit altera_uart_probe(struct platform_device *pdev)
  421. {
  422. struct altera_uart_platform_uart *platp = pdev->dev.platform_data;
  423. struct uart_port *port;
  424. struct resource *res_mem;
  425. struct resource *res_irq;
  426. int i = pdev->id;
  427. /* -1 emphasizes that the platform must have one port, no .N suffix */
  428. if (i == -1)
  429. i = 0;
  430. if (i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
  431. return -EINVAL;
  432. port = &altera_uart_ports[i].port;
  433. res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  434. if (res_mem)
  435. port->mapbase = res_mem->start;
  436. else if (platp->mapbase)
  437. port->mapbase = platp->mapbase;
  438. else
  439. return -EINVAL;
  440. res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  441. if (res_irq)
  442. port->irq = res_irq->start;
  443. else if (platp->irq)
  444. port->irq = platp->irq;
  445. port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
  446. if (!port->membase)
  447. return -ENOMEM;
  448. port->line = i;
  449. port->type = PORT_ALTERA_UART;
  450. port->iotype = SERIAL_IO_MEM;
  451. port->uartclk = platp->uartclk;
  452. port->ops = &altera_uart_ops;
  453. port->flags = UPF_BOOT_AUTOCONF;
  454. port->private_data = platp;
  455. uart_add_one_port(&altera_uart_driver, port);
  456. return 0;
  457. }
  458. static int __devexit altera_uart_remove(struct platform_device *pdev)
  459. {
  460. struct uart_port *port = &altera_uart_ports[pdev->id].port;
  461. uart_remove_one_port(&altera_uart_driver, port);
  462. return 0;
  463. }
  464. static struct platform_driver altera_uart_platform_driver = {
  465. .probe = altera_uart_probe,
  466. .remove = __devexit_p(altera_uart_remove),
  467. .driver = {
  468. .name = DRV_NAME,
  469. .owner = THIS_MODULE,
  470. .pm = NULL,
  471. },
  472. };
  473. static int __init altera_uart_init(void)
  474. {
  475. int rc;
  476. rc = uart_register_driver(&altera_uart_driver);
  477. if (rc)
  478. return rc;
  479. rc = platform_driver_register(&altera_uart_platform_driver);
  480. if (rc) {
  481. uart_unregister_driver(&altera_uart_driver);
  482. return rc;
  483. }
  484. return 0;
  485. }
  486. static void __exit altera_uart_exit(void)
  487. {
  488. platform_driver_unregister(&altera_uart_platform_driver);
  489. uart_unregister_driver(&altera_uart_driver);
  490. }
  491. module_init(altera_uart_init);
  492. module_exit(altera_uart_exit);
  493. MODULE_DESCRIPTION("Altera UART driver");
  494. MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
  495. MODULE_LICENSE("GPL");
  496. MODULE_ALIAS("platform:" DRV_NAME);
  497. MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);