68360serial.c 74 KB

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  1. /*
  2. * UART driver for 68360 CPM SCC or SMC
  3. * Copyright (c) 2000 D. Jeff Dionne <jeff@uclinux.org>,
  4. * Copyright (c) 2000 Michael Leslie <mleslie@lineo.ca>
  5. * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
  6. *
  7. * I used the serial.c driver as the framework for this driver.
  8. * Give credit to those guys.
  9. * The original code was written for the MBX860 board. I tried to make
  10. * it generic, but there may be some assumptions in the structures that
  11. * have to be fixed later.
  12. * To save porting time, I did not bother to change any object names
  13. * that are not accessed outside of this file.
  14. * It still needs lots of work........When it was easy, I included code
  15. * to support the SCCs, but this has never been tested, nor is it complete.
  16. * Only the SCCs support modem control, so that is not complete either.
  17. *
  18. * This module exports the following rs232 io functions:
  19. *
  20. * int rs_360_init(void);
  21. */
  22. #include <linux/module.h>
  23. #include <linux/errno.h>
  24. #include <linux/signal.h>
  25. #include <linux/sched.h>
  26. #include <linux/timer.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/tty.h>
  29. #include <linux/tty_flip.h>
  30. #include <linux/serial.h>
  31. #include <linux/serialP.h>
  32. #include <linux/major.h>
  33. #include <linux/string.h>
  34. #include <linux/fcntl.h>
  35. #include <linux/ptrace.h>
  36. #include <linux/mm.h>
  37. #include <linux/init.h>
  38. #include <linux/delay.h>
  39. #include <asm/irq.h>
  40. #include <asm/m68360.h>
  41. #include <asm/commproc.h>
  42. #ifdef CONFIG_KGDB
  43. extern void breakpoint(void);
  44. extern void set_debug_traps(void);
  45. extern int kgdb_output_string (const char* s, unsigned int count);
  46. #endif
  47. /* #ifdef CONFIG_SERIAL_CONSOLE */ /* This seems to be a post 2.0 thing - mles */
  48. #include <linux/console.h>
  49. #include <linux/jiffies.h>
  50. /* this defines the index into rs_table for the port to use
  51. */
  52. #ifndef CONFIG_SERIAL_CONSOLE_PORT
  53. #define CONFIG_SERIAL_CONSOLE_PORT 1 /* ie SMC2 - note USE_SMC2 must be defined */
  54. #endif
  55. /* #endif */
  56. #if 0
  57. /* SCC2 for console
  58. */
  59. #undef CONFIG_SERIAL_CONSOLE_PORT
  60. #define CONFIG_SERIAL_CONSOLE_PORT 2
  61. #endif
  62. #define TX_WAKEUP ASYNC_SHARE_IRQ
  63. static char *serial_name = "CPM UART driver";
  64. static char *serial_version = "0.03";
  65. static struct tty_driver *serial_driver;
  66. int serial_console_setup(struct console *co, char *options);
  67. /*
  68. * Serial driver configuration section. Here are the various options:
  69. */
  70. #define SERIAL_PARANOIA_CHECK
  71. #define CONFIG_SERIAL_NOPAUSE_IO
  72. #define SERIAL_DO_RESTART
  73. /* Set of debugging defines */
  74. #undef SERIAL_DEBUG_INTR
  75. #undef SERIAL_DEBUG_OPEN
  76. #undef SERIAL_DEBUG_FLOW
  77. #undef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  78. #define _INLINE_ inline
  79. #define DBG_CNT(s)
  80. /* We overload some of the items in the data structure to meet our
  81. * needs. For example, the port address is the CPM parameter ram
  82. * offset for the SCC or SMC. The maximum number of ports is 4 SCCs and
  83. * 2 SMCs. The "hub6" field is used to indicate the channel number, with
  84. * a flag indicating SCC or SMC, and the number is used as an index into
  85. * the CPM parameter area for this device.
  86. * The "type" field is currently set to 0, for PORT_UNKNOWN. It is
  87. * not currently used. I should probably use it to indicate the port
  88. * type of SMC or SCC.
  89. * The SMCs do not support any modem control signals.
  90. */
  91. #define smc_scc_num hub6
  92. #define NUM_IS_SCC ((int)0x00010000)
  93. #define PORT_NUM(P) ((P) & 0x0000ffff)
  94. #if defined (CONFIG_UCQUICC)
  95. volatile extern void *_periph_base;
  96. /* sipex transceiver
  97. * mode bits for are on pins
  98. *
  99. * SCC2 d16..19
  100. * SCC3 d20..23
  101. * SCC4 d24..27
  102. */
  103. #define SIPEX_MODE(n,m) ((m & 0x0f)<<(16+4*(n-1)))
  104. static uint sipex_mode_bits = 0x00000000;
  105. #endif
  106. /* There is no `serial_state' defined back here in 2.0.
  107. * Try to get by with serial_struct
  108. */
  109. /* #define serial_state serial_struct */
  110. /* 2.4 -> 2.0 portability problem: async_icount in 2.4 has a few
  111. * extras: */
  112. #if 0
  113. struct async_icount_24 {
  114. __u32 cts, dsr, rng, dcd, tx, rx;
  115. __u32 frame, parity, overrun, brk;
  116. __u32 buf_overrun;
  117. } icount;
  118. #endif
  119. #if 0
  120. struct serial_state {
  121. int magic;
  122. int baud_base;
  123. unsigned long port;
  124. int irq;
  125. int flags;
  126. int hub6;
  127. int type;
  128. int line;
  129. int revision; /* Chip revision (950) */
  130. int xmit_fifo_size;
  131. int custom_divisor;
  132. int count;
  133. u8 *iomem_base;
  134. u16 iomem_reg_shift;
  135. unsigned short close_delay;
  136. unsigned short closing_wait; /* time to wait before closing */
  137. struct async_icount_24 icount;
  138. int io_type;
  139. struct async_struct *info;
  140. };
  141. #endif
  142. #define SSTATE_MAGIC 0x5302
  143. /* SMC2 is sometimes used for low performance TDM interfaces. Define
  144. * this as 1 if you want SMC2 as a serial port UART managed by this driver.
  145. * Define this as 0 if you wish to use SMC2 for something else.
  146. */
  147. #define USE_SMC2 1
  148. #if 0
  149. /* Define SCC to ttySx mapping. */
  150. #define SCC_NUM_BASE (USE_SMC2 + 1) /* SCC base tty "number" */
  151. /* Define which SCC is the first one to use for a serial port. These
  152. * are 0-based numbers, i.e. this assumes the first SCC (SCC1) is used
  153. * for Ethernet, and the first available SCC for serial UART is SCC2.
  154. * NOTE: IF YOU CHANGE THIS, you have to change the PROFF_xxx and
  155. * interrupt vectors in the table below to match.
  156. */
  157. #define SCC_IDX_BASE 1 /* table index */
  158. #endif
  159. /* Processors other than the 860 only get SMCs configured by default.
  160. * Either they don't have SCCs or they are allocated somewhere else.
  161. * Of course, there are now 860s without some SCCs, so we will need to
  162. * address that someday.
  163. * The Embedded Planet Multimedia I/O cards use TDM interfaces to the
  164. * stereo codec parts, and we use SMC2 to help support that.
  165. */
  166. static struct serial_state rs_table[] = {
  167. /* type line PORT IRQ FLAGS smc_scc_num (F.K.A. hub6) */
  168. { 0, 0, PRSLOT_SMC1, CPMVEC_SMC1, 0, 0 } /* SMC1 ttyS0 */
  169. #if USE_SMC2
  170. ,{ 0, 0, PRSLOT_SMC2, CPMVEC_SMC2, 0, 1 } /* SMC2 ttyS1 */
  171. #endif
  172. #if defined(CONFIG_SERIAL_68360_SCC)
  173. ,{ 0, 0, PRSLOT_SCC2, CPMVEC_SCC2, 0, (NUM_IS_SCC | 1) } /* SCC2 ttyS2 */
  174. ,{ 0, 0, PRSLOT_SCC3, CPMVEC_SCC3, 0, (NUM_IS_SCC | 2) } /* SCC3 ttyS3 */
  175. ,{ 0, 0, PRSLOT_SCC4, CPMVEC_SCC4, 0, (NUM_IS_SCC | 3) } /* SCC4 ttyS4 */
  176. #endif
  177. };
  178. #define NR_PORTS (sizeof(rs_table)/sizeof(struct serial_state))
  179. /* The number of buffer descriptors and their sizes.
  180. */
  181. #define RX_NUM_FIFO 4
  182. #define RX_BUF_SIZE 32
  183. #define TX_NUM_FIFO 4
  184. #define TX_BUF_SIZE 32
  185. #define CONSOLE_NUM_FIFO 2
  186. #define CONSOLE_BUF_SIZE 4
  187. char *console_fifos[CONSOLE_NUM_FIFO * CONSOLE_BUF_SIZE];
  188. /* The async_struct in serial.h does not really give us what we
  189. * need, so define our own here.
  190. */
  191. typedef struct serial_info {
  192. int magic;
  193. int flags;
  194. struct serial_state *state;
  195. /* struct serial_struct *state; */
  196. /* struct async_struct *state; */
  197. struct tty_struct *tty;
  198. int read_status_mask;
  199. int ignore_status_mask;
  200. int timeout;
  201. int line;
  202. int x_char; /* xon/xoff character */
  203. int close_delay;
  204. unsigned short closing_wait;
  205. unsigned short closing_wait2;
  206. unsigned long event;
  207. unsigned long last_active;
  208. int blocked_open; /* # of blocked opens */
  209. struct work_struct tqueue;
  210. struct work_struct tqueue_hangup;
  211. wait_queue_head_t open_wait;
  212. wait_queue_head_t close_wait;
  213. /* CPM Buffer Descriptor pointers.
  214. */
  215. QUICC_BD *rx_bd_base;
  216. QUICC_BD *rx_cur;
  217. QUICC_BD *tx_bd_base;
  218. QUICC_BD *tx_cur;
  219. } ser_info_t;
  220. /* since kmalloc_init() does not get called until much after this initialization: */
  221. static ser_info_t quicc_ser_info[NR_PORTS];
  222. static char rx_buf_pool[NR_PORTS * RX_NUM_FIFO * RX_BUF_SIZE];
  223. static char tx_buf_pool[NR_PORTS * TX_NUM_FIFO * TX_BUF_SIZE];
  224. static void change_speed(ser_info_t *info);
  225. static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout);
  226. static inline int serial_paranoia_check(ser_info_t *info,
  227. char *name, const char *routine)
  228. {
  229. #ifdef SERIAL_PARANOIA_CHECK
  230. static const char *badmagic =
  231. "Warning: bad magic number for serial struct (%s) in %s\n";
  232. static const char *badinfo =
  233. "Warning: null async_struct for (%s) in %s\n";
  234. if (!info) {
  235. printk(badinfo, name, routine);
  236. return 1;
  237. }
  238. if (info->magic != SERIAL_MAGIC) {
  239. printk(badmagic, name, routine);
  240. return 1;
  241. }
  242. #endif
  243. return 0;
  244. }
  245. /*
  246. * This is used to figure out the divisor speeds and the timeouts,
  247. * indexed by the termio value. The generic CPM functions are responsible
  248. * for setting and assigning baud rate generators for us.
  249. */
  250. static int baud_table[] = {
  251. 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
  252. 9600, 19200, 38400, 57600, 115200, 230400, 460800, 0 };
  253. /* This sucks. There is a better way: */
  254. #if defined(CONFIG_CONSOLE_9600)
  255. #define CONSOLE_BAUDRATE 9600
  256. #elif defined(CONFIG_CONSOLE_19200)
  257. #define CONSOLE_BAUDRATE 19200
  258. #elif defined(CONFIG_CONSOLE_115200)
  259. #define CONSOLE_BAUDRATE 115200
  260. #else
  261. #warning "console baud rate undefined"
  262. #define CONSOLE_BAUDRATE 9600
  263. #endif
  264. /*
  265. * ------------------------------------------------------------
  266. * rs_stop() and rs_start()
  267. *
  268. * This routines are called before setting or resetting tty->stopped.
  269. * They enable or disable transmitter interrupts, as necessary.
  270. * ------------------------------------------------------------
  271. */
  272. static void rs_360_stop(struct tty_struct *tty)
  273. {
  274. ser_info_t *info = (ser_info_t *)tty->driver_data;
  275. int idx;
  276. unsigned long flags;
  277. volatile struct scc_regs *sccp;
  278. volatile struct smc_regs *smcp;
  279. if (serial_paranoia_check(info, tty->name, "rs_stop"))
  280. return;
  281. local_irq_save(flags);
  282. idx = PORT_NUM(info->state->smc_scc_num);
  283. if (info->state->smc_scc_num & NUM_IS_SCC) {
  284. sccp = &pquicc->scc_regs[idx];
  285. sccp->scc_sccm &= ~UART_SCCM_TX;
  286. } else {
  287. /* smcp = &cpmp->cp_smc[idx]; */
  288. smcp = &pquicc->smc_regs[idx];
  289. smcp->smc_smcm &= ~SMCM_TX;
  290. }
  291. local_irq_restore(flags);
  292. }
  293. static void rs_360_start(struct tty_struct *tty)
  294. {
  295. ser_info_t *info = (ser_info_t *)tty->driver_data;
  296. int idx;
  297. unsigned long flags;
  298. volatile struct scc_regs *sccp;
  299. volatile struct smc_regs *smcp;
  300. if (serial_paranoia_check(info, tty->name, "rs_stop"))
  301. return;
  302. local_irq_save(flags);
  303. idx = PORT_NUM(info->state->smc_scc_num);
  304. if (info->state->smc_scc_num & NUM_IS_SCC) {
  305. sccp = &pquicc->scc_regs[idx];
  306. sccp->scc_sccm |= UART_SCCM_TX;
  307. } else {
  308. smcp = &pquicc->smc_regs[idx];
  309. smcp->smc_smcm |= SMCM_TX;
  310. }
  311. local_irq_restore(flags);
  312. }
  313. /*
  314. * ----------------------------------------------------------------------
  315. *
  316. * Here starts the interrupt handling routines. All of the following
  317. * subroutines are declared as inline and are folded into
  318. * rs_interrupt(). They were separated out for readability's sake.
  319. *
  320. * Note: rs_interrupt() is a "fast" interrupt, which means that it
  321. * runs with interrupts turned off. People who may want to modify
  322. * rs_interrupt() should try to keep the interrupt handler as fast as
  323. * possible. After you are done making modifications, it is not a bad
  324. * idea to do:
  325. *
  326. * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
  327. *
  328. * and look at the resulting assemble code in serial.s.
  329. *
  330. * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
  331. * -----------------------------------------------------------------------
  332. */
  333. static _INLINE_ void receive_chars(ser_info_t *info)
  334. {
  335. struct tty_struct *tty = info->port.tty;
  336. unsigned char ch, flag, *cp;
  337. /*int ignored = 0;*/
  338. int i;
  339. ushort status;
  340. struct async_icount *icount;
  341. /* struct async_icount_24 *icount; */
  342. volatile QUICC_BD *bdp;
  343. icount = &info->state->icount;
  344. /* Just loop through the closed BDs and copy the characters into
  345. * the buffer.
  346. */
  347. bdp = info->rx_cur;
  348. for (;;) {
  349. if (bdp->status & BD_SC_EMPTY) /* If this one is empty */
  350. break; /* we are all done */
  351. /* The read status mask tell us what we should do with
  352. * incoming characters, especially if errors occur.
  353. * One special case is the use of BD_SC_EMPTY. If
  354. * this is not set, we are supposed to be ignoring
  355. * inputs. In this case, just mark the buffer empty and
  356. * continue.
  357. */
  358. if (!(info->read_status_mask & BD_SC_EMPTY)) {
  359. bdp->status |= BD_SC_EMPTY;
  360. bdp->status &=
  361. ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
  362. if (bdp->status & BD_SC_WRAP)
  363. bdp = info->rx_bd_base;
  364. else
  365. bdp++;
  366. continue;
  367. }
  368. /* Get the number of characters and the buffer pointer.
  369. */
  370. i = bdp->length;
  371. /* cp = (unsigned char *)__va(bdp->buf); */
  372. cp = (char *)bdp->buf;
  373. status = bdp->status;
  374. while (i-- > 0) {
  375. ch = *cp++;
  376. icount->rx++;
  377. #ifdef SERIAL_DEBUG_INTR
  378. printk("DR%02x:%02x...", ch, status);
  379. #endif
  380. flag = TTY_NORMAL;
  381. if (status & (BD_SC_BR | BD_SC_FR |
  382. BD_SC_PR | BD_SC_OV)) {
  383. /*
  384. * For statistics only
  385. */
  386. if (status & BD_SC_BR)
  387. icount->brk++;
  388. else if (status & BD_SC_PR)
  389. icount->parity++;
  390. else if (status & BD_SC_FR)
  391. icount->frame++;
  392. if (status & BD_SC_OV)
  393. icount->overrun++;
  394. /*
  395. * Now check to see if character should be
  396. * ignored, and mask off conditions which
  397. * should be ignored.
  398. if (status & info->ignore_status_mask) {
  399. if (++ignored > 100)
  400. break;
  401. continue;
  402. }
  403. */
  404. status &= info->read_status_mask;
  405. if (status & (BD_SC_BR)) {
  406. #ifdef SERIAL_DEBUG_INTR
  407. printk("handling break....");
  408. #endif
  409. *tty->flip.flag_buf_ptr = TTY_BREAK;
  410. if (info->flags & ASYNC_SAK)
  411. do_SAK(tty);
  412. } else if (status & BD_SC_PR)
  413. flag = TTY_PARITY;
  414. else if (status & BD_SC_FR)
  415. flag = TTY_FRAME;
  416. }
  417. tty_insert_flip_char(tty, ch, flag);
  418. if (status & BD_SC_OV)
  419. /*
  420. * Overrun is special, since it's
  421. * reported immediately, and doesn't
  422. * affect the current character
  423. */
  424. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  425. }
  426. /* This BD is ready to be used again. Clear status.
  427. * Get next BD.
  428. */
  429. bdp->status |= BD_SC_EMPTY;
  430. bdp->status &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV);
  431. if (bdp->status & BD_SC_WRAP)
  432. bdp = info->rx_bd_base;
  433. else
  434. bdp++;
  435. }
  436. info->rx_cur = (QUICC_BD *)bdp;
  437. tty_schedule_flip(tty);
  438. }
  439. static _INLINE_ void receive_break(ser_info_t *info)
  440. {
  441. struct tty_struct *tty = info->port.tty;
  442. info->state->icount.brk++;
  443. /* Check to see if there is room in the tty buffer for
  444. * the break. If not, we exit now, losing the break. FIXME
  445. */
  446. tty_insert_flip_char(tty, 0, TTY_BREAK);
  447. tty_schedule_flip(tty);
  448. }
  449. static _INLINE_ void transmit_chars(ser_info_t *info)
  450. {
  451. if ((info->flags & TX_WAKEUP) ||
  452. (info->port.tty->flags & (1 << TTY_DO_WRITE_WAKEUP))) {
  453. schedule_work(&info->tqueue);
  454. }
  455. #ifdef SERIAL_DEBUG_INTR
  456. printk("THRE...");
  457. #endif
  458. }
  459. #ifdef notdef
  460. /* I need to do this for the SCCs, so it is left as a reminder.
  461. */
  462. static _INLINE_ void check_modem_status(struct async_struct *info)
  463. {
  464. int status;
  465. /* struct async_icount *icount; */
  466. struct async_icount_24 *icount;
  467. status = serial_in(info, UART_MSR);
  468. if (status & UART_MSR_ANY_DELTA) {
  469. icount = &info->state->icount;
  470. /* update input line counters */
  471. if (status & UART_MSR_TERI)
  472. icount->rng++;
  473. if (status & UART_MSR_DDSR)
  474. icount->dsr++;
  475. if (status & UART_MSR_DDCD) {
  476. icount->dcd++;
  477. #ifdef CONFIG_HARD_PPS
  478. if ((info->flags & ASYNC_HARDPPS_CD) &&
  479. (status & UART_MSR_DCD))
  480. hardpps();
  481. #endif
  482. }
  483. if (status & UART_MSR_DCTS)
  484. icount->cts++;
  485. wake_up_interruptible(&info->delta_msr_wait);
  486. }
  487. if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  488. #if (defined(SERIAL_DEBUG_OPEN) || defined(SERIAL_DEBUG_INTR))
  489. printk("ttys%d CD now %s...", info->line,
  490. (status & UART_MSR_DCD) ? "on" : "off");
  491. #endif
  492. if (status & UART_MSR_DCD)
  493. wake_up_interruptible(&info->open_wait);
  494. else {
  495. #ifdef SERIAL_DEBUG_OPEN
  496. printk("scheduling hangup...");
  497. #endif
  498. queue_task(&info->tqueue_hangup,
  499. &tq_scheduler);
  500. }
  501. }
  502. if (info->flags & ASYNC_CTS_FLOW) {
  503. if (info->port.tty->hw_stopped) {
  504. if (status & UART_MSR_CTS) {
  505. #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
  506. printk("CTS tx start...");
  507. #endif
  508. info->port.tty->hw_stopped = 0;
  509. info->IER |= UART_IER_THRI;
  510. serial_out(info, UART_IER, info->IER);
  511. rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
  512. return;
  513. }
  514. } else {
  515. if (!(status & UART_MSR_CTS)) {
  516. #if (defined(SERIAL_DEBUG_INTR) || defined(SERIAL_DEBUG_FLOW))
  517. printk("CTS tx stop...");
  518. #endif
  519. info->port.tty->hw_stopped = 1;
  520. info->IER &= ~UART_IER_THRI;
  521. serial_out(info, UART_IER, info->IER);
  522. }
  523. }
  524. }
  525. }
  526. #endif
  527. /*
  528. * This is the serial driver's interrupt routine for a single port
  529. */
  530. /* static void rs_360_interrupt(void *dev_id) */ /* until and if we start servicing irqs here */
  531. static void rs_360_interrupt(int vec, void *dev_id)
  532. {
  533. u_char events;
  534. int idx;
  535. ser_info_t *info;
  536. volatile struct smc_regs *smcp;
  537. volatile struct scc_regs *sccp;
  538. info = dev_id;
  539. idx = PORT_NUM(info->state->smc_scc_num);
  540. if (info->state->smc_scc_num & NUM_IS_SCC) {
  541. sccp = &pquicc->scc_regs[idx];
  542. events = sccp->scc_scce;
  543. if (events & SCCM_RX)
  544. receive_chars(info);
  545. if (events & SCCM_TX)
  546. transmit_chars(info);
  547. sccp->scc_scce = events;
  548. } else {
  549. smcp = &pquicc->smc_regs[idx];
  550. events = smcp->smc_smce;
  551. if (events & SMCM_BRKE)
  552. receive_break(info);
  553. if (events & SMCM_RX)
  554. receive_chars(info);
  555. if (events & SMCM_TX)
  556. transmit_chars(info);
  557. smcp->smc_smce = events;
  558. }
  559. #ifdef SERIAL_DEBUG_INTR
  560. printk("rs_interrupt_single(%d, %x)...",
  561. info->state->smc_scc_num, events);
  562. #endif
  563. #ifdef modem_control
  564. check_modem_status(info);
  565. #endif
  566. info->last_active = jiffies;
  567. #ifdef SERIAL_DEBUG_INTR
  568. printk("end.\n");
  569. #endif
  570. }
  571. /*
  572. * -------------------------------------------------------------------
  573. * Here ends the serial interrupt routines.
  574. * -------------------------------------------------------------------
  575. */
  576. static void do_softint(void *private_)
  577. {
  578. ser_info_t *info = (ser_info_t *) private_;
  579. struct tty_struct *tty;
  580. tty = info->port.tty;
  581. if (!tty)
  582. return;
  583. if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
  584. tty_wakeup(tty);
  585. }
  586. /*
  587. * This routine is called from the scheduler tqueue when the interrupt
  588. * routine has signalled that a hangup has occurred. The path of
  589. * hangup processing is:
  590. *
  591. * serial interrupt routine -> (scheduler tqueue) ->
  592. * do_serial_hangup() -> tty->hangup() -> rs_hangup()
  593. *
  594. */
  595. static void do_serial_hangup(void *private_)
  596. {
  597. struct async_struct *info = (struct async_struct *) private_;
  598. struct tty_struct *tty;
  599. tty = info->port.tty;
  600. if (!tty)
  601. return;
  602. tty_hangup(tty);
  603. }
  604. static int startup(ser_info_t *info)
  605. {
  606. unsigned long flags;
  607. int retval=0;
  608. int idx;
  609. /*struct serial_state *state = info->state;*/
  610. volatile struct smc_regs *smcp;
  611. volatile struct scc_regs *sccp;
  612. volatile struct smc_uart_pram *up;
  613. volatile struct uart_pram *scup;
  614. local_irq_save(flags);
  615. if (info->flags & ASYNC_INITIALIZED) {
  616. goto errout;
  617. }
  618. #ifdef maybe
  619. if (!state->port || !state->type) {
  620. if (info->port.tty)
  621. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  622. goto errout;
  623. }
  624. #endif
  625. #ifdef SERIAL_DEBUG_OPEN
  626. printk("starting up ttys%d (irq %d)...", info->line, state->irq);
  627. #endif
  628. #ifdef modem_control
  629. info->MCR = 0;
  630. if (info->port.tty->termios->c_cflag & CBAUD)
  631. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  632. #endif
  633. if (info->port.tty)
  634. clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
  635. /*
  636. * and set the speed of the serial port
  637. */
  638. change_speed(info);
  639. idx = PORT_NUM(info->state->smc_scc_num);
  640. if (info->state->smc_scc_num & NUM_IS_SCC) {
  641. sccp = &pquicc->scc_regs[idx];
  642. scup = &pquicc->pram[info->state->port].scc.pscc.u;
  643. scup->mrblr = RX_BUF_SIZE;
  644. scup->max_idl = RX_BUF_SIZE;
  645. sccp->scc_sccm |= (UART_SCCM_TX | UART_SCCM_RX);
  646. sccp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  647. } else {
  648. smcp = &pquicc->smc_regs[idx];
  649. /* Enable interrupts and I/O.
  650. */
  651. smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
  652. smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN);
  653. /* We can tune the buffer length and idle characters
  654. * to take advantage of the entire incoming buffer size.
  655. * If mrblr is something other than 1, maxidl has to be
  656. * non-zero or we never get an interrupt. The maxidl
  657. * is the number of character times we wait after reception
  658. * of the last character before we decide no more characters
  659. * are coming.
  660. */
  661. /* up = (smc_uart_t *)&pquicc->cp_dparam[state->port]; */
  662. /* holy unionized structures, Batman: */
  663. up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
  664. up->mrblr = RX_BUF_SIZE;
  665. up->max_idl = RX_BUF_SIZE;
  666. up->brkcr = 1; /* number of break chars */
  667. }
  668. info->flags |= ASYNC_INITIALIZED;
  669. local_irq_restore(flags);
  670. return 0;
  671. errout:
  672. local_irq_restore(flags);
  673. return retval;
  674. }
  675. /*
  676. * This routine will shutdown a serial port; interrupts are disabled, and
  677. * DTR is dropped if the hangup on close termio flag is on.
  678. */
  679. static void shutdown(ser_info_t *info)
  680. {
  681. unsigned long flags;
  682. struct serial_state *state;
  683. int idx;
  684. volatile struct smc_regs *smcp;
  685. volatile struct scc_regs *sccp;
  686. if (!(info->flags & ASYNC_INITIALIZED))
  687. return;
  688. state = info->state;
  689. #ifdef SERIAL_DEBUG_OPEN
  690. printk("Shutting down serial port %d (irq %d)....", info->line,
  691. state->irq);
  692. #endif
  693. local_irq_save(flags);
  694. idx = PORT_NUM(state->smc_scc_num);
  695. if (state->smc_scc_num & NUM_IS_SCC) {
  696. sccp = &pquicc->scc_regs[idx];
  697. sccp->scc_gsmr.w.low &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  698. #ifdef CONFIG_SERIAL_CONSOLE
  699. /* We can't disable the transmitter if this is the
  700. * system console.
  701. */
  702. if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
  703. #endif
  704. sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
  705. } else {
  706. smcp = &pquicc->smc_regs[idx];
  707. /* Disable interrupts and I/O.
  708. */
  709. smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX);
  710. #ifdef CONFIG_SERIAL_CONSOLE
  711. /* We can't disable the transmitter if this is the
  712. * system console.
  713. */
  714. if ((state - rs_table) != CONFIG_SERIAL_CONSOLE_PORT)
  715. #endif
  716. smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
  717. }
  718. if (info->port.tty)
  719. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  720. info->flags &= ~ASYNC_INITIALIZED;
  721. local_irq_restore(flags);
  722. }
  723. /*
  724. * This routine is called to set the UART divisor registers to match
  725. * the specified baud rate for a serial port.
  726. */
  727. static void change_speed(ser_info_t *info)
  728. {
  729. int baud_rate;
  730. unsigned cflag, cval, scval, prev_mode;
  731. int i, bits, sbits, idx;
  732. unsigned long flags;
  733. struct serial_state *state;
  734. volatile struct smc_regs *smcp;
  735. volatile struct scc_regs *sccp;
  736. if (!info->port.tty || !info->port.tty->termios)
  737. return;
  738. cflag = info->port.tty->termios->c_cflag;
  739. state = info->state;
  740. /* Character length programmed into the mode register is the
  741. * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
  742. * 1 or 2 stop bits, minus 1.
  743. * The value 'bits' counts this for us.
  744. */
  745. cval = 0;
  746. scval = 0;
  747. /* byte size and parity */
  748. switch (cflag & CSIZE) {
  749. case CS5: bits = 5; break;
  750. case CS6: bits = 6; break;
  751. case CS7: bits = 7; break;
  752. case CS8: bits = 8; break;
  753. /* Never happens, but GCC is too dumb to figure it out */
  754. default: bits = 8; break;
  755. }
  756. sbits = bits - 5;
  757. if (cflag & CSTOPB) {
  758. cval |= SMCMR_SL; /* Two stops */
  759. scval |= SCU_PMSR_SL;
  760. bits++;
  761. }
  762. if (cflag & PARENB) {
  763. cval |= SMCMR_PEN;
  764. scval |= SCU_PMSR_PEN;
  765. bits++;
  766. }
  767. if (!(cflag & PARODD)) {
  768. cval |= SMCMR_PM_EVEN;
  769. scval |= (SCU_PMSR_REVP | SCU_PMSR_TEVP);
  770. }
  771. /* Determine divisor based on baud rate */
  772. i = cflag & CBAUD;
  773. if (i >= (sizeof(baud_table)/sizeof(int)))
  774. baud_rate = 9600;
  775. else
  776. baud_rate = baud_table[i];
  777. info->timeout = (TX_BUF_SIZE*HZ*bits);
  778. info->timeout += HZ/50; /* Add .02 seconds of slop */
  779. #ifdef modem_control
  780. /* CTS flow control flag and modem status interrupts */
  781. info->IER &= ~UART_IER_MSI;
  782. if (info->flags & ASYNC_HARDPPS_CD)
  783. info->IER |= UART_IER_MSI;
  784. if (cflag & CRTSCTS) {
  785. info->flags |= ASYNC_CTS_FLOW;
  786. info->IER |= UART_IER_MSI;
  787. } else
  788. info->flags &= ~ASYNC_CTS_FLOW;
  789. if (cflag & CLOCAL)
  790. info->flags &= ~ASYNC_CHECK_CD;
  791. else {
  792. info->flags |= ASYNC_CHECK_CD;
  793. info->IER |= UART_IER_MSI;
  794. }
  795. serial_out(info, UART_IER, info->IER);
  796. #endif
  797. /*
  798. * Set up parity check flag
  799. */
  800. info->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
  801. if (I_INPCK(info->port.tty))
  802. info->read_status_mask |= BD_SC_FR | BD_SC_PR;
  803. if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
  804. info->read_status_mask |= BD_SC_BR;
  805. /*
  806. * Characters to ignore
  807. */
  808. info->ignore_status_mask = 0;
  809. if (I_IGNPAR(info->port.tty))
  810. info->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
  811. if (I_IGNBRK(info->port.tty)) {
  812. info->ignore_status_mask |= BD_SC_BR;
  813. /*
  814. * If we're ignore parity and break indicators, ignore
  815. * overruns too. (For real raw support).
  816. */
  817. if (I_IGNPAR(info->port.tty))
  818. info->ignore_status_mask |= BD_SC_OV;
  819. }
  820. /*
  821. * !!! ignore all characters if CREAD is not set
  822. */
  823. if ((cflag & CREAD) == 0)
  824. info->read_status_mask &= ~BD_SC_EMPTY;
  825. local_irq_save(flags);
  826. /* Start bit has not been added (so don't, because we would just
  827. * subtract it later), and we need to add one for the number of
  828. * stops bits (there is always at least one).
  829. */
  830. bits++;
  831. idx = PORT_NUM(state->smc_scc_num);
  832. if (state->smc_scc_num & NUM_IS_SCC) {
  833. sccp = &pquicc->scc_regs[idx];
  834. sccp->scc_psmr = (sbits << 12) | scval;
  835. } else {
  836. smcp = &pquicc->smc_regs[idx];
  837. /* Set the mode register. We want to keep a copy of the
  838. * enables, because we want to put them back if they were
  839. * present.
  840. */
  841. prev_mode = smcp->smc_smcmr;
  842. smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART;
  843. smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN));
  844. }
  845. m360_cpm_setbrg((state - rs_table), baud_rate);
  846. local_irq_restore(flags);
  847. }
  848. static void rs_360_put_char(struct tty_struct *tty, unsigned char ch)
  849. {
  850. ser_info_t *info = (ser_info_t *)tty->driver_data;
  851. volatile QUICC_BD *bdp;
  852. if (serial_paranoia_check(info, tty->name, "rs_put_char"))
  853. return 0;
  854. if (!tty)
  855. return 0;
  856. bdp = info->tx_cur;
  857. while (bdp->status & BD_SC_READY);
  858. /* *((char *)__va(bdp->buf)) = ch; */
  859. *((char *)bdp->buf) = ch;
  860. bdp->length = 1;
  861. bdp->status |= BD_SC_READY;
  862. /* Get next BD.
  863. */
  864. if (bdp->status & BD_SC_WRAP)
  865. bdp = info->tx_bd_base;
  866. else
  867. bdp++;
  868. info->tx_cur = (QUICC_BD *)bdp;
  869. return 1;
  870. }
  871. static int rs_360_write(struct tty_struct * tty,
  872. const unsigned char *buf, int count)
  873. {
  874. int c, ret = 0;
  875. ser_info_t *info = (ser_info_t *)tty->driver_data;
  876. volatile QUICC_BD *bdp;
  877. #ifdef CONFIG_KGDB
  878. /* Try to let stub handle output. Returns true if it did. */
  879. if (kgdb_output_string(buf, count))
  880. return ret;
  881. #endif
  882. if (serial_paranoia_check(info, tty->name, "rs_write"))
  883. return 0;
  884. if (!tty)
  885. return 0;
  886. bdp = info->tx_cur;
  887. while (1) {
  888. c = min(count, TX_BUF_SIZE);
  889. if (c <= 0)
  890. break;
  891. if (bdp->status & BD_SC_READY) {
  892. info->flags |= TX_WAKEUP;
  893. break;
  894. }
  895. /* memcpy(__va(bdp->buf), buf, c); */
  896. memcpy((void *)bdp->buf, buf, c);
  897. bdp->length = c;
  898. bdp->status |= BD_SC_READY;
  899. buf += c;
  900. count -= c;
  901. ret += c;
  902. /* Get next BD.
  903. */
  904. if (bdp->status & BD_SC_WRAP)
  905. bdp = info->tx_bd_base;
  906. else
  907. bdp++;
  908. info->tx_cur = (QUICC_BD *)bdp;
  909. }
  910. return ret;
  911. }
  912. static int rs_360_write_room(struct tty_struct *tty)
  913. {
  914. ser_info_t *info = (ser_info_t *)tty->driver_data;
  915. int ret;
  916. if (serial_paranoia_check(info, tty->name, "rs_write_room"))
  917. return 0;
  918. if ((info->tx_cur->status & BD_SC_READY) == 0) {
  919. info->flags &= ~TX_WAKEUP;
  920. ret = TX_BUF_SIZE;
  921. }
  922. else {
  923. info->flags |= TX_WAKEUP;
  924. ret = 0;
  925. }
  926. return ret;
  927. }
  928. /* I could track this with transmit counters....maybe later.
  929. */
  930. static int rs_360_chars_in_buffer(struct tty_struct *tty)
  931. {
  932. ser_info_t *info = (ser_info_t *)tty->driver_data;
  933. if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
  934. return 0;
  935. return 0;
  936. }
  937. static void rs_360_flush_buffer(struct tty_struct *tty)
  938. {
  939. ser_info_t *info = (ser_info_t *)tty->driver_data;
  940. if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
  941. return;
  942. /* There is nothing to "flush", whatever we gave the CPM
  943. * is on its way out.
  944. */
  945. tty_wakeup(tty);
  946. info->flags &= ~TX_WAKEUP;
  947. }
  948. /*
  949. * This function is used to send a high-priority XON/XOFF character to
  950. * the device
  951. */
  952. static void rs_360_send_xchar(struct tty_struct *tty, char ch)
  953. {
  954. volatile QUICC_BD *bdp;
  955. ser_info_t *info = (ser_info_t *)tty->driver_data;
  956. if (serial_paranoia_check(info, tty->name, "rs_send_char"))
  957. return;
  958. bdp = info->tx_cur;
  959. while (bdp->status & BD_SC_READY);
  960. /* *((char *)__va(bdp->buf)) = ch; */
  961. *((char *)bdp->buf) = ch;
  962. bdp->length = 1;
  963. bdp->status |= BD_SC_READY;
  964. /* Get next BD.
  965. */
  966. if (bdp->status & BD_SC_WRAP)
  967. bdp = info->tx_bd_base;
  968. else
  969. bdp++;
  970. info->tx_cur = (QUICC_BD *)bdp;
  971. }
  972. /*
  973. * ------------------------------------------------------------
  974. * rs_throttle()
  975. *
  976. * This routine is called by the upper-layer tty layer to signal that
  977. * incoming characters should be throttled.
  978. * ------------------------------------------------------------
  979. */
  980. static void rs_360_throttle(struct tty_struct * tty)
  981. {
  982. ser_info_t *info = (ser_info_t *)tty->driver_data;
  983. #ifdef SERIAL_DEBUG_THROTTLE
  984. char buf[64];
  985. printk("throttle %s: %d....\n", _tty_name(tty, buf),
  986. tty->ldisc.chars_in_buffer(tty));
  987. #endif
  988. if (serial_paranoia_check(info, tty->name, "rs_throttle"))
  989. return;
  990. if (I_IXOFF(tty))
  991. rs_360_send_xchar(tty, STOP_CHAR(tty));
  992. #ifdef modem_control
  993. if (tty->termios->c_cflag & CRTSCTS)
  994. info->MCR &= ~UART_MCR_RTS;
  995. local_irq_disable();
  996. serial_out(info, UART_MCR, info->MCR);
  997. local_irq_enable();
  998. #endif
  999. }
  1000. static void rs_360_unthrottle(struct tty_struct * tty)
  1001. {
  1002. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1003. #ifdef SERIAL_DEBUG_THROTTLE
  1004. char buf[64];
  1005. printk("unthrottle %s: %d....\n", _tty_name(tty, buf),
  1006. tty->ldisc.chars_in_buffer(tty));
  1007. #endif
  1008. if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
  1009. return;
  1010. if (I_IXOFF(tty)) {
  1011. if (info->x_char)
  1012. info->x_char = 0;
  1013. else
  1014. rs_360_send_xchar(tty, START_CHAR(tty));
  1015. }
  1016. #ifdef modem_control
  1017. if (tty->termios->c_cflag & CRTSCTS)
  1018. info->MCR |= UART_MCR_RTS;
  1019. local_irq_disable();
  1020. serial_out(info, UART_MCR, info->MCR);
  1021. local_irq_enable();
  1022. #endif
  1023. }
  1024. /*
  1025. * ------------------------------------------------------------
  1026. * rs_ioctl() and friends
  1027. * ------------------------------------------------------------
  1028. */
  1029. #ifdef maybe
  1030. /*
  1031. * get_lsr_info - get line status register info
  1032. *
  1033. * Purpose: Let user call ioctl() to get info when the UART physically
  1034. * is emptied. On bus types like RS485, the transmitter must
  1035. * release the bus after transmitting. This must be done when
  1036. * the transmit shift register is empty, not be done when the
  1037. * transmit holding register is empty. This functionality
  1038. * allows an RS485 driver to be written in user space.
  1039. */
  1040. static int get_lsr_info(struct async_struct * info, unsigned int *value)
  1041. {
  1042. unsigned char status;
  1043. unsigned int result;
  1044. local_irq_disable();
  1045. status = serial_in(info, UART_LSR);
  1046. local_irq_enable();
  1047. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1048. return put_user(result,value);
  1049. }
  1050. #endif
  1051. static int rs_360_tiocmget(struct tty_struct *tty, struct file *file)
  1052. {
  1053. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1054. unsigned int result = 0;
  1055. #ifdef modem_control
  1056. unsigned char control, status;
  1057. if (serial_paranoia_check(info, tty->name, __func__))
  1058. return -ENODEV;
  1059. if (tty->flags & (1 << TTY_IO_ERROR))
  1060. return -EIO;
  1061. control = info->MCR;
  1062. local_irq_disable();
  1063. status = serial_in(info, UART_MSR);
  1064. local_irq_enable();
  1065. result = ((control & UART_MCR_RTS) ? TIOCM_RTS : 0)
  1066. | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0)
  1067. #ifdef TIOCM_OUT1
  1068. | ((control & UART_MCR_OUT1) ? TIOCM_OUT1 : 0)
  1069. | ((control & UART_MCR_OUT2) ? TIOCM_OUT2 : 0)
  1070. #endif
  1071. | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0)
  1072. | ((status & UART_MSR_RI) ? TIOCM_RNG : 0)
  1073. | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0)
  1074. | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1075. #endif
  1076. return result;
  1077. }
  1078. static int rs_360_tiocmset(struct tty_struct *tty, struct file *file,
  1079. unsigned int set, unsigned int clear)
  1080. {
  1081. #ifdef modem_control
  1082. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1083. unsigned int arg;
  1084. if (serial_paranoia_check(info, tty->name, __func__))
  1085. return -ENODEV;
  1086. if (tty->flags & (1 << TTY_IO_ERROR))
  1087. return -EIO;
  1088. /* FIXME: locking on info->mcr */
  1089. if (set & TIOCM_RTS)
  1090. info->mcr |= UART_MCR_RTS;
  1091. if (set & TIOCM_DTR)
  1092. info->mcr |= UART_MCR_DTR;
  1093. if (clear & TIOCM_RTS)
  1094. info->MCR &= ~UART_MCR_RTS;
  1095. if (clear & TIOCM_DTR)
  1096. info->MCR &= ~UART_MCR_DTR;
  1097. #ifdef TIOCM_OUT1
  1098. if (set & TIOCM_OUT1)
  1099. info->MCR |= UART_MCR_OUT1;
  1100. if (set & TIOCM_OUT2)
  1101. info->MCR |= UART_MCR_OUT2;
  1102. if (clear & TIOCM_OUT1)
  1103. info->MCR &= ~UART_MCR_OUT1;
  1104. if (clear & TIOCM_OUT2)
  1105. info->MCR &= ~UART_MCR_OUT2;
  1106. #endif
  1107. local_irq_disable();
  1108. serial_out(info, UART_MCR, info->MCR);
  1109. local_irq_enable();
  1110. #endif
  1111. return 0;
  1112. }
  1113. /* Sending a break is a two step process on the SMC/SCC. It is accomplished
  1114. * by sending a STOP TRANSMIT command followed by a RESTART TRANSMIT
  1115. * command. We take advantage of the begin/end functions to make this
  1116. * happen.
  1117. */
  1118. static ushort smc_chan_map[] = {
  1119. CPM_CR_CH_SMC1,
  1120. CPM_CR_CH_SMC2
  1121. };
  1122. static ushort scc_chan_map[] = {
  1123. CPM_CR_CH_SCC1,
  1124. CPM_CR_CH_SCC2,
  1125. CPM_CR_CH_SCC3,
  1126. CPM_CR_CH_SCC4
  1127. };
  1128. static void begin_break(ser_info_t *info)
  1129. {
  1130. volatile QUICC *cp;
  1131. ushort chan;
  1132. int idx;
  1133. cp = pquicc;
  1134. idx = PORT_NUM(info->state->smc_scc_num);
  1135. if (info->state->smc_scc_num & NUM_IS_SCC)
  1136. chan = scc_chan_map[idx];
  1137. else
  1138. chan = smc_chan_map[idx];
  1139. cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG;
  1140. while (cp->cp_cr & CPM_CR_FLG);
  1141. }
  1142. static void end_break(ser_info_t *info)
  1143. {
  1144. volatile QUICC *cp;
  1145. ushort chan;
  1146. int idx;
  1147. cp = pquicc;
  1148. idx = PORT_NUM(info->state->smc_scc_num);
  1149. if (info->state->smc_scc_num & NUM_IS_SCC)
  1150. chan = scc_chan_map[idx];
  1151. else
  1152. chan = smc_chan_map[idx];
  1153. cp->cp_cr = mk_cr_cmd(chan, CPM_CR_RESTART_TX) | CPM_CR_FLG;
  1154. while (cp->cp_cr & CPM_CR_FLG);
  1155. }
  1156. /*
  1157. * This routine sends a break character out the serial port.
  1158. */
  1159. static void send_break(ser_info_t *info, unsigned int duration)
  1160. {
  1161. #ifdef SERIAL_DEBUG_SEND_BREAK
  1162. printk("rs_send_break(%d) jiff=%lu...", duration, jiffies);
  1163. #endif
  1164. begin_break(info);
  1165. msleep_interruptible(duration);
  1166. end_break(info);
  1167. #ifdef SERIAL_DEBUG_SEND_BREAK
  1168. printk("done jiffies=%lu\n", jiffies);
  1169. #endif
  1170. }
  1171. /*
  1172. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1173. * Return: write counters to the user passed counter struct
  1174. * NB: both 1->0 and 0->1 transitions are counted except for
  1175. * RI where only 0->1 is counted.
  1176. */
  1177. static int rs_360_get_icount(struct tty_struct *tty,
  1178. struct serial_icounter_struct *icount)
  1179. {
  1180. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1181. struct async_icount cnow;
  1182. local_irq_disable();
  1183. cnow = info->state->icount;
  1184. local_irq_enable();
  1185. icount->cts = cnow.cts;
  1186. icount->dsr = cnow.dsr;
  1187. icount->rng = cnow.rng;
  1188. icount->dcd = cnow.dcd;
  1189. return 0;
  1190. }
  1191. static int rs_360_ioctl(struct tty_struct *tty, struct file * file,
  1192. unsigned int cmd, unsigned long arg)
  1193. {
  1194. int error;
  1195. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1196. int retval;
  1197. struct async_icount cnow;
  1198. /* struct async_icount_24 cnow;*/ /* kernel counter temps */
  1199. struct serial_icounter_struct *p_cuser; /* user space */
  1200. if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
  1201. return -ENODEV;
  1202. if (cmd != TIOCMIWAIT) {
  1203. if (tty->flags & (1 << TTY_IO_ERROR))
  1204. return -EIO;
  1205. }
  1206. switch (cmd) {
  1207. case TCSBRK: /* SVID version: non-zero arg --> no break */
  1208. retval = tty_check_change(tty);
  1209. if (retval)
  1210. return retval;
  1211. tty_wait_until_sent(tty, 0);
  1212. if (signal_pending(current))
  1213. return -EINTR;
  1214. if (!arg) {
  1215. send_break(info, 250); /* 1/4 second */
  1216. if (signal_pending(current))
  1217. return -EINTR;
  1218. }
  1219. return 0;
  1220. case TCSBRKP: /* support for POSIX tcsendbreak() */
  1221. retval = tty_check_change(tty);
  1222. if (retval)
  1223. return retval;
  1224. tty_wait_until_sent(tty, 0);
  1225. if (signal_pending(current))
  1226. return -EINTR;
  1227. send_break(info, arg ? arg*100 : 250);
  1228. if (signal_pending(current))
  1229. return -EINTR;
  1230. return 0;
  1231. case TIOCSBRK:
  1232. retval = tty_check_change(tty);
  1233. if (retval)
  1234. return retval;
  1235. tty_wait_until_sent(tty, 0);
  1236. begin_break(info);
  1237. return 0;
  1238. case TIOCCBRK:
  1239. retval = tty_check_change(tty);
  1240. if (retval)
  1241. return retval;
  1242. end_break(info);
  1243. return 0;
  1244. #ifdef maybe
  1245. case TIOCSERGETLSR: /* Get line status register */
  1246. return get_lsr_info(info, (unsigned int *) arg);
  1247. #endif
  1248. /*
  1249. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1250. * - mask passed in arg for lines of interest
  1251. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1252. * Caller should use TIOCGICOUNT to see which one it was
  1253. */
  1254. case TIOCMIWAIT:
  1255. #ifdef modem_control
  1256. local_irq_disable();
  1257. /* note the counters on entry */
  1258. cprev = info->state->icount;
  1259. local_irq_enable();
  1260. while (1) {
  1261. interruptible_sleep_on(&info->delta_msr_wait);
  1262. /* see if a signal did it */
  1263. if (signal_pending(current))
  1264. return -ERESTARTSYS;
  1265. local_irq_disable();
  1266. cnow = info->state->icount; /* atomic copy */
  1267. local_irq_enable();
  1268. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1269. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
  1270. return -EIO; /* no change => error */
  1271. if ( ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
  1272. ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
  1273. ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
  1274. ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)) ) {
  1275. return 0;
  1276. }
  1277. cprev = cnow;
  1278. }
  1279. /* NOTREACHED */
  1280. #else
  1281. return 0;
  1282. #endif
  1283. default:
  1284. return -ENOIOCTLCMD;
  1285. }
  1286. return 0;
  1287. }
  1288. /* FIX UP modem control here someday......
  1289. */
  1290. static void rs_360_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1291. {
  1292. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1293. change_speed(info);
  1294. #ifdef modem_control
  1295. /* Handle transition to B0 status */
  1296. if ((old_termios->c_cflag & CBAUD) &&
  1297. !(tty->termios->c_cflag & CBAUD)) {
  1298. info->MCR &= ~(UART_MCR_DTR|UART_MCR_RTS);
  1299. local_irq_disable();
  1300. serial_out(info, UART_MCR, info->MCR);
  1301. local_irq_enable();
  1302. }
  1303. /* Handle transition away from B0 status */
  1304. if (!(old_termios->c_cflag & CBAUD) &&
  1305. (tty->termios->c_cflag & CBAUD)) {
  1306. info->MCR |= UART_MCR_DTR;
  1307. if (!tty->hw_stopped ||
  1308. !(tty->termios->c_cflag & CRTSCTS)) {
  1309. info->MCR |= UART_MCR_RTS;
  1310. }
  1311. local_irq_disable();
  1312. serial_out(info, UART_MCR, info->MCR);
  1313. local_irq_enable();
  1314. }
  1315. /* Handle turning off CRTSCTS */
  1316. if ((old_termios->c_cflag & CRTSCTS) &&
  1317. !(tty->termios->c_cflag & CRTSCTS)) {
  1318. tty->hw_stopped = 0;
  1319. rs_360_start(tty);
  1320. }
  1321. #endif
  1322. #if 0
  1323. /*
  1324. * No need to wake up processes in open wait, since they
  1325. * sample the CLOCAL flag once, and don't recheck it.
  1326. * XXX It's not clear whether the current behavior is correct
  1327. * or not. Hence, this may change.....
  1328. */
  1329. if (!(old_termios->c_cflag & CLOCAL) &&
  1330. (tty->termios->c_cflag & CLOCAL))
  1331. wake_up_interruptible(&info->open_wait);
  1332. #endif
  1333. }
  1334. /*
  1335. * ------------------------------------------------------------
  1336. * rs_close()
  1337. *
  1338. * This routine is called when the serial port gets closed. First, we
  1339. * wait for the last remaining data to be sent. Then, we unlink its
  1340. * async structure from the interrupt chain if necessary, and we free
  1341. * that IRQ if nothing is left in the chain.
  1342. * ------------------------------------------------------------
  1343. */
  1344. static void rs_360_close(struct tty_struct *tty, struct file * filp)
  1345. {
  1346. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1347. /* struct async_state *state; */
  1348. struct serial_state *state;
  1349. unsigned long flags;
  1350. int idx;
  1351. volatile struct smc_regs *smcp;
  1352. volatile struct scc_regs *sccp;
  1353. if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
  1354. return;
  1355. state = info->state;
  1356. local_irq_save(flags);
  1357. if (tty_hung_up_p(filp)) {
  1358. DBG_CNT("before DEC-hung");
  1359. local_irq_restore(flags);
  1360. return;
  1361. }
  1362. #ifdef SERIAL_DEBUG_OPEN
  1363. printk("rs_close ttys%d, count = %d\n", info->line, state->count);
  1364. #endif
  1365. if ((tty->count == 1) && (state->count != 1)) {
  1366. /*
  1367. * Uh, oh. tty->count is 1, which means that the tty
  1368. * structure will be freed. state->count should always
  1369. * be one in these conditions. If it's greater than
  1370. * one, we've got real problems, since it means the
  1371. * serial port won't be shutdown.
  1372. */
  1373. printk("rs_close: bad serial port count; tty->count is 1, "
  1374. "state->count is %d\n", state->count);
  1375. state->count = 1;
  1376. }
  1377. if (--state->count < 0) {
  1378. printk("rs_close: bad serial port count for ttys%d: %d\n",
  1379. info->line, state->count);
  1380. state->count = 0;
  1381. }
  1382. if (state->count) {
  1383. DBG_CNT("before DEC-2");
  1384. local_irq_restore(flags);
  1385. return;
  1386. }
  1387. info->flags |= ASYNC_CLOSING;
  1388. /*
  1389. * Now we wait for the transmit buffer to clear; and we notify
  1390. * the line discipline to only process XON/XOFF characters.
  1391. */
  1392. tty->closing = 1;
  1393. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
  1394. tty_wait_until_sent(tty, info->closing_wait);
  1395. /*
  1396. * At this point we stop accepting input. To do this, we
  1397. * disable the receive line status interrupts, and tell the
  1398. * interrupt driver to stop checking the data ready bit in the
  1399. * line status register.
  1400. */
  1401. info->read_status_mask &= ~BD_SC_EMPTY;
  1402. if (info->flags & ASYNC_INITIALIZED) {
  1403. idx = PORT_NUM(info->state->smc_scc_num);
  1404. if (info->state->smc_scc_num & NUM_IS_SCC) {
  1405. sccp = &pquicc->scc_regs[idx];
  1406. sccp->scc_sccm &= ~UART_SCCM_RX;
  1407. sccp->scc_gsmr.w.low &= ~SCC_GSMRL_ENR;
  1408. } else {
  1409. smcp = &pquicc->smc_regs[idx];
  1410. smcp->smc_smcm &= ~SMCM_RX;
  1411. smcp->smc_smcmr &= ~SMCMR_REN;
  1412. }
  1413. /*
  1414. * Before we drop DTR, make sure the UART transmitter
  1415. * has completely drained; this is especially
  1416. * important if there is a transmit FIFO!
  1417. */
  1418. rs_360_wait_until_sent(tty, info->timeout);
  1419. }
  1420. shutdown(info);
  1421. rs_360_flush_buffer(tty);
  1422. tty_ldisc_flush(tty);
  1423. tty->closing = 0;
  1424. info->event = 0;
  1425. info->port.tty = NULL;
  1426. if (info->blocked_open) {
  1427. if (info->close_delay) {
  1428. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  1429. }
  1430. wake_up_interruptible(&info->open_wait);
  1431. }
  1432. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  1433. wake_up_interruptible(&info->close_wait);
  1434. local_irq_restore(flags);
  1435. }
  1436. /*
  1437. * rs_wait_until_sent() --- wait until the transmitter is empty
  1438. */
  1439. static void rs_360_wait_until_sent(struct tty_struct *tty, int timeout)
  1440. {
  1441. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1442. unsigned long orig_jiffies, char_time;
  1443. /*int lsr;*/
  1444. volatile QUICC_BD *bdp;
  1445. if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
  1446. return;
  1447. #ifdef maybe
  1448. if (info->state->type == PORT_UNKNOWN)
  1449. return;
  1450. #endif
  1451. orig_jiffies = jiffies;
  1452. /*
  1453. * Set the check interval to be 1/5 of the estimated time to
  1454. * send a single character, and make it at least 1. The check
  1455. * interval should also be less than the timeout.
  1456. *
  1457. * Note: we have to use pretty tight timings here to satisfy
  1458. * the NIST-PCTS.
  1459. */
  1460. char_time = 1;
  1461. if (timeout)
  1462. char_time = min(char_time, (unsigned long)timeout);
  1463. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1464. printk("In rs_wait_until_sent(%d) check=%lu...", timeout, char_time);
  1465. printk("jiff=%lu...", jiffies);
  1466. #endif
  1467. /* We go through the loop at least once because we can't tell
  1468. * exactly when the last character exits the shifter. There can
  1469. * be at least two characters waiting to be sent after the buffers
  1470. * are empty.
  1471. */
  1472. do {
  1473. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1474. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1475. #endif
  1476. /* current->counter = 0; make us low-priority */
  1477. msleep_interruptible(jiffies_to_msecs(char_time));
  1478. if (signal_pending(current))
  1479. break;
  1480. if (timeout && (time_after(jiffies, orig_jiffies + timeout)))
  1481. break;
  1482. /* The 'tx_cur' is really the next buffer to send. We
  1483. * have to back up to the previous BD and wait for it
  1484. * to go. This isn't perfect, because all this indicates
  1485. * is the buffer is available. There are still characters
  1486. * in the CPM FIFO.
  1487. */
  1488. bdp = info->tx_cur;
  1489. if (bdp == info->tx_bd_base)
  1490. bdp += (TX_NUM_FIFO-1);
  1491. else
  1492. bdp--;
  1493. } while (bdp->status & BD_SC_READY);
  1494. current->state = TASK_RUNNING;
  1495. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1496. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1497. #endif
  1498. }
  1499. /*
  1500. * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
  1501. */
  1502. static void rs_360_hangup(struct tty_struct *tty)
  1503. {
  1504. ser_info_t *info = (ser_info_t *)tty->driver_data;
  1505. struct serial_state *state = info->state;
  1506. if (serial_paranoia_check(info, tty->name, "rs_hangup"))
  1507. return;
  1508. state = info->state;
  1509. rs_360_flush_buffer(tty);
  1510. shutdown(info);
  1511. info->event = 0;
  1512. state->count = 0;
  1513. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  1514. info->port.tty = NULL;
  1515. wake_up_interruptible(&info->open_wait);
  1516. }
  1517. /*
  1518. * ------------------------------------------------------------
  1519. * rs_open() and friends
  1520. * ------------------------------------------------------------
  1521. */
  1522. static int block_til_ready(struct tty_struct *tty, struct file * filp,
  1523. ser_info_t *info)
  1524. {
  1525. #ifdef DO_THIS_LATER
  1526. DECLARE_WAITQUEUE(wait, current);
  1527. #endif
  1528. struct serial_state *state = info->state;
  1529. int retval;
  1530. int do_clocal = 0;
  1531. /*
  1532. * If the device is in the middle of being closed, then block
  1533. * until it's done, and then try again.
  1534. */
  1535. if (tty_hung_up_p(filp) ||
  1536. (info->flags & ASYNC_CLOSING)) {
  1537. if (info->flags & ASYNC_CLOSING)
  1538. interruptible_sleep_on(&info->close_wait);
  1539. #ifdef SERIAL_DO_RESTART
  1540. if (info->flags & ASYNC_HUP_NOTIFY)
  1541. return -EAGAIN;
  1542. else
  1543. return -ERESTARTSYS;
  1544. #else
  1545. return -EAGAIN;
  1546. #endif
  1547. }
  1548. /*
  1549. * If non-blocking mode is set, or the port is not enabled,
  1550. * then make the check up front and then exit.
  1551. * If this is an SMC port, we don't have modem control to wait
  1552. * for, so just get out here.
  1553. */
  1554. if ((filp->f_flags & O_NONBLOCK) ||
  1555. (tty->flags & (1 << TTY_IO_ERROR)) ||
  1556. !(info->state->smc_scc_num & NUM_IS_SCC)) {
  1557. info->flags |= ASYNC_NORMAL_ACTIVE;
  1558. return 0;
  1559. }
  1560. if (tty->termios->c_cflag & CLOCAL)
  1561. do_clocal = 1;
  1562. /*
  1563. * Block waiting for the carrier detect and the line to become
  1564. * free (i.e., not in use by the callout). While we are in
  1565. * this loop, state->count is dropped by one, so that
  1566. * rs_close() knows when to free things. We restore it upon
  1567. * exit, either normal or abnormal.
  1568. */
  1569. retval = 0;
  1570. #ifdef DO_THIS_LATER
  1571. add_wait_queue(&info->open_wait, &wait);
  1572. #ifdef SERIAL_DEBUG_OPEN
  1573. printk("block_til_ready before block: ttys%d, count = %d\n",
  1574. state->line, state->count);
  1575. #endif
  1576. local_irq_disable();
  1577. if (!tty_hung_up_p(filp))
  1578. state->count--;
  1579. local_irq_enable();
  1580. info->blocked_open++;
  1581. while (1) {
  1582. local_irq_disable();
  1583. if (tty->termios->c_cflag & CBAUD)
  1584. serial_out(info, UART_MCR,
  1585. serial_inp(info, UART_MCR) |
  1586. (UART_MCR_DTR | UART_MCR_RTS));
  1587. local_irq_enable();
  1588. set_current_state(TASK_INTERRUPTIBLE);
  1589. if (tty_hung_up_p(filp) ||
  1590. !(info->flags & ASYNC_INITIALIZED)) {
  1591. #ifdef SERIAL_DO_RESTART
  1592. if (info->flags & ASYNC_HUP_NOTIFY)
  1593. retval = -EAGAIN;
  1594. else
  1595. retval = -ERESTARTSYS;
  1596. #else
  1597. retval = -EAGAIN;
  1598. #endif
  1599. break;
  1600. }
  1601. if (!(info->flags & ASYNC_CLOSING) &&
  1602. (do_clocal || (serial_in(info, UART_MSR) &
  1603. UART_MSR_DCD)))
  1604. break;
  1605. if (signal_pending(current)) {
  1606. retval = -ERESTARTSYS;
  1607. break;
  1608. }
  1609. #ifdef SERIAL_DEBUG_OPEN
  1610. printk("block_til_ready blocking: ttys%d, count = %d\n",
  1611. info->line, state->count);
  1612. #endif
  1613. tty_unlock();
  1614. schedule();
  1615. tty_lock();
  1616. }
  1617. current->state = TASK_RUNNING;
  1618. remove_wait_queue(&info->open_wait, &wait);
  1619. if (!tty_hung_up_p(filp))
  1620. state->count++;
  1621. info->blocked_open--;
  1622. #ifdef SERIAL_DEBUG_OPEN
  1623. printk("block_til_ready after blocking: ttys%d, count = %d\n",
  1624. info->line, state->count);
  1625. #endif
  1626. #endif /* DO_THIS_LATER */
  1627. if (retval)
  1628. return retval;
  1629. info->flags |= ASYNC_NORMAL_ACTIVE;
  1630. return 0;
  1631. }
  1632. static int get_async_struct(int line, ser_info_t **ret_info)
  1633. {
  1634. struct serial_state *sstate;
  1635. sstate = rs_table + line;
  1636. if (sstate->info) {
  1637. sstate->count++;
  1638. *ret_info = (ser_info_t *)sstate->info;
  1639. return 0;
  1640. }
  1641. else {
  1642. return -ENOMEM;
  1643. }
  1644. }
  1645. /*
  1646. * This routine is called whenever a serial port is opened. It
  1647. * enables interrupts for a serial port, linking in its async structure into
  1648. * the IRQ chain. It also performs the serial-specific
  1649. * initialization for the tty structure.
  1650. */
  1651. static int rs_360_open(struct tty_struct *tty, struct file * filp)
  1652. {
  1653. ser_info_t *info;
  1654. int retval, line;
  1655. line = tty->index;
  1656. if ((line < 0) || (line >= NR_PORTS))
  1657. return -ENODEV;
  1658. retval = get_async_struct(line, &info);
  1659. if (retval)
  1660. return retval;
  1661. if (serial_paranoia_check(info, tty->name, "rs_open"))
  1662. return -ENODEV;
  1663. #ifdef SERIAL_DEBUG_OPEN
  1664. printk("rs_open %s, count = %d\n", tty->name, info->state->count);
  1665. #endif
  1666. tty->driver_data = info;
  1667. info->port.tty = tty;
  1668. /*
  1669. * Start up serial port
  1670. */
  1671. retval = startup(info);
  1672. if (retval)
  1673. return retval;
  1674. retval = block_til_ready(tty, filp, info);
  1675. if (retval) {
  1676. #ifdef SERIAL_DEBUG_OPEN
  1677. printk("rs_open returning after block_til_ready with %d\n",
  1678. retval);
  1679. #endif
  1680. return retval;
  1681. }
  1682. #ifdef SERIAL_DEBUG_OPEN
  1683. printk("rs_open %s successful...", tty->name);
  1684. #endif
  1685. return 0;
  1686. }
  1687. /*
  1688. * /proc fs routines....
  1689. */
  1690. static inline int line_info(char *buf, struct serial_state *state)
  1691. {
  1692. #ifdef notdef
  1693. struct async_struct *info = state->info, scr_info;
  1694. char stat_buf[30], control, status;
  1695. #endif
  1696. int ret;
  1697. ret = sprintf(buf, "%d: uart:%s port:%X irq:%d",
  1698. state->line,
  1699. (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC",
  1700. (unsigned int)(state->port), state->irq);
  1701. if (!state->port || (state->type == PORT_UNKNOWN)) {
  1702. ret += sprintf(buf+ret, "\n");
  1703. return ret;
  1704. }
  1705. #ifdef notdef
  1706. /*
  1707. * Figure out the current RS-232 lines
  1708. */
  1709. if (!info) {
  1710. info = &scr_info; /* This is just for serial_{in,out} */
  1711. info->magic = SERIAL_MAGIC;
  1712. info->port = state->port;
  1713. info->flags = state->flags;
  1714. info->quot = 0;
  1715. info->port.tty = NULL;
  1716. }
  1717. local_irq_disable();
  1718. status = serial_in(info, UART_MSR);
  1719. control = info ? info->MCR : serial_in(info, UART_MCR);
  1720. local_irq_enable();
  1721. stat_buf[0] = 0;
  1722. stat_buf[1] = 0;
  1723. if (control & UART_MCR_RTS)
  1724. strcat(stat_buf, "|RTS");
  1725. if (status & UART_MSR_CTS)
  1726. strcat(stat_buf, "|CTS");
  1727. if (control & UART_MCR_DTR)
  1728. strcat(stat_buf, "|DTR");
  1729. if (status & UART_MSR_DSR)
  1730. strcat(stat_buf, "|DSR");
  1731. if (status & UART_MSR_DCD)
  1732. strcat(stat_buf, "|CD");
  1733. if (status & UART_MSR_RI)
  1734. strcat(stat_buf, "|RI");
  1735. if (info->quot) {
  1736. ret += sprintf(buf+ret, " baud:%d",
  1737. state->baud_base / info->quot);
  1738. }
  1739. ret += sprintf(buf+ret, " tx:%d rx:%d",
  1740. state->icount.tx, state->icount.rx);
  1741. if (state->icount.frame)
  1742. ret += sprintf(buf+ret, " fe:%d", state->icount.frame);
  1743. if (state->icount.parity)
  1744. ret += sprintf(buf+ret, " pe:%d", state->icount.parity);
  1745. if (state->icount.brk)
  1746. ret += sprintf(buf+ret, " brk:%d", state->icount.brk);
  1747. if (state->icount.overrun)
  1748. ret += sprintf(buf+ret, " oe:%d", state->icount.overrun);
  1749. /*
  1750. * Last thing is the RS-232 status lines
  1751. */
  1752. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  1753. #endif
  1754. return ret;
  1755. }
  1756. int rs_360_read_proc(char *page, char **start, off_t off, int count,
  1757. int *eof, void *data)
  1758. {
  1759. int i, len = 0;
  1760. off_t begin = 0;
  1761. len += sprintf(page, "serinfo:1.0 driver:%s\n", serial_version);
  1762. for (i = 0; i < NR_PORTS && len < 4000; i++) {
  1763. len += line_info(page + len, &rs_table[i]);
  1764. if (len+begin > off+count)
  1765. goto done;
  1766. if (len+begin < off) {
  1767. begin += len;
  1768. len = 0;
  1769. }
  1770. }
  1771. *eof = 1;
  1772. done:
  1773. if (off >= len+begin)
  1774. return 0;
  1775. *start = page + (begin-off);
  1776. return ((count < begin+len-off) ? count : begin+len-off);
  1777. }
  1778. /*
  1779. * ---------------------------------------------------------------------
  1780. * rs_init() and friends
  1781. *
  1782. * rs_init() is called at boot-time to initialize the serial driver.
  1783. * ---------------------------------------------------------------------
  1784. */
  1785. /*
  1786. * This routine prints out the appropriate serial driver version
  1787. * number, and identifies which options were configured into this
  1788. * driver.
  1789. */
  1790. static _INLINE_ void show_serial_version(void)
  1791. {
  1792. printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
  1793. }
  1794. /*
  1795. * The serial console driver used during boot. Note that these names
  1796. * clash with those found in "serial.c", so we currently can't support
  1797. * the 16xxx uarts and these at the same time. I will fix this to become
  1798. * an indirect function call from tty_io.c (or something).
  1799. */
  1800. #ifdef CONFIG_SERIAL_CONSOLE
  1801. /*
  1802. * Print a string to the serial port trying not to disturb any possible
  1803. * real use of the port...
  1804. */
  1805. static void my_console_write(int idx, const char *s,
  1806. unsigned count)
  1807. {
  1808. struct serial_state *ser;
  1809. ser_info_t *info;
  1810. unsigned i;
  1811. QUICC_BD *bdp, *bdbase;
  1812. volatile struct smc_uart_pram *up;
  1813. volatile u_char *cp;
  1814. ser = rs_table + idx;
  1815. /* If the port has been initialized for general use, we have
  1816. * to use the buffer descriptors allocated there. Otherwise,
  1817. * we simply use the single buffer allocated.
  1818. */
  1819. if ((info = (ser_info_t *)ser->info) != NULL) {
  1820. bdp = info->tx_cur;
  1821. bdbase = info->tx_bd_base;
  1822. }
  1823. else {
  1824. /* Pointer to UART in parameter ram.
  1825. */
  1826. /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
  1827. up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
  1828. /* Get the address of the host memory buffer.
  1829. */
  1830. bdp = bdbase = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
  1831. }
  1832. /*
  1833. * We need to gracefully shut down the transmitter, disable
  1834. * interrupts, then send our bytes out.
  1835. */
  1836. /*
  1837. * Now, do each character. This is not as bad as it looks
  1838. * since this is a holding FIFO and not a transmitting FIFO.
  1839. * We could add the complexity of filling the entire transmit
  1840. * buffer, but we would just wait longer between accesses......
  1841. */
  1842. for (i = 0; i < count; i++, s++) {
  1843. /* Wait for transmitter fifo to empty.
  1844. * Ready indicates output is ready, and xmt is doing
  1845. * that, not that it is ready for us to send.
  1846. */
  1847. while (bdp->status & BD_SC_READY);
  1848. /* Send the character out.
  1849. */
  1850. cp = bdp->buf;
  1851. *cp = *s;
  1852. bdp->length = 1;
  1853. bdp->status |= BD_SC_READY;
  1854. if (bdp->status & BD_SC_WRAP)
  1855. bdp = bdbase;
  1856. else
  1857. bdp++;
  1858. /* if a LF, also do CR... */
  1859. if (*s == 10) {
  1860. while (bdp->status & BD_SC_READY);
  1861. /* cp = __va(bdp->buf); */
  1862. cp = bdp->buf;
  1863. *cp = 13;
  1864. bdp->length = 1;
  1865. bdp->status |= BD_SC_READY;
  1866. if (bdp->status & BD_SC_WRAP) {
  1867. bdp = bdbase;
  1868. }
  1869. else {
  1870. bdp++;
  1871. }
  1872. }
  1873. }
  1874. /*
  1875. * Finally, Wait for transmitter & holding register to empty
  1876. * and restore the IER
  1877. */
  1878. while (bdp->status & BD_SC_READY);
  1879. if (info)
  1880. info->tx_cur = (QUICC_BD *)bdp;
  1881. }
  1882. static void serial_console_write(struct console *c, const char *s,
  1883. unsigned count)
  1884. {
  1885. #ifdef CONFIG_KGDB
  1886. /* Try to let stub handle output. Returns true if it did. */
  1887. if (kgdb_output_string(s, count))
  1888. return;
  1889. #endif
  1890. my_console_write(c->index, s, count);
  1891. }
  1892. /*void console_print_68360(const char *p)
  1893. {
  1894. const char *cp = p;
  1895. int i;
  1896. for (i=0;cp[i]!=0;i++);
  1897. serial_console_write (p, i);
  1898. //Comment this if you want to have a strict interrupt-driven output
  1899. //rs_fair_output();
  1900. return;
  1901. }*/
  1902. #ifdef CONFIG_XMON
  1903. int
  1904. xmon_360_write(const char *s, unsigned count)
  1905. {
  1906. my_console_write(0, s, count);
  1907. return(count);
  1908. }
  1909. #endif
  1910. #ifdef CONFIG_KGDB
  1911. void
  1912. putDebugChar(char ch)
  1913. {
  1914. my_console_write(0, &ch, 1);
  1915. }
  1916. #endif
  1917. /*
  1918. * Receive character from the serial port. This only works well
  1919. * before the port is initialized for real use.
  1920. */
  1921. static int my_console_wait_key(int idx, int xmon, char *obuf)
  1922. {
  1923. struct serial_state *ser;
  1924. u_char c, *cp;
  1925. ser_info_t *info;
  1926. QUICC_BD *bdp;
  1927. volatile struct smc_uart_pram *up;
  1928. int i;
  1929. ser = rs_table + idx;
  1930. /* Get the address of the host memory buffer.
  1931. * If the port has been initialized for general use, we must
  1932. * use information from the port structure.
  1933. */
  1934. if ((info = (ser_info_t *)ser->info))
  1935. bdp = info->rx_cur;
  1936. else
  1937. /* bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase]; */
  1938. bdp = (QUICC_BD *)((uint)pquicc + (uint)up->tbase);
  1939. /* Pointer to UART in parameter ram.
  1940. */
  1941. /* up = (smc_uart_t *)&cpmp->cp_dparam[ser->port]; */
  1942. up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
  1943. /*
  1944. * We need to gracefully shut down the receiver, disable
  1945. * interrupts, then read the input.
  1946. * XMON just wants a poll. If no character, return -1, else
  1947. * return the character.
  1948. */
  1949. if (!xmon) {
  1950. while (bdp->status & BD_SC_EMPTY);
  1951. }
  1952. else {
  1953. if (bdp->status & BD_SC_EMPTY)
  1954. return -1;
  1955. }
  1956. cp = (char *)bdp->buf;
  1957. if (obuf) {
  1958. i = c = bdp->length;
  1959. while (i-- > 0)
  1960. *obuf++ = *cp++;
  1961. }
  1962. else {
  1963. c = *cp;
  1964. }
  1965. bdp->status |= BD_SC_EMPTY;
  1966. if (info) {
  1967. if (bdp->status & BD_SC_WRAP) {
  1968. bdp = info->rx_bd_base;
  1969. }
  1970. else {
  1971. bdp++;
  1972. }
  1973. info->rx_cur = (QUICC_BD *)bdp;
  1974. }
  1975. return((int)c);
  1976. }
  1977. static int serial_console_wait_key(struct console *co)
  1978. {
  1979. return(my_console_wait_key(co->index, 0, NULL));
  1980. }
  1981. #ifdef CONFIG_XMON
  1982. int
  1983. xmon_360_read_poll(void)
  1984. {
  1985. return(my_console_wait_key(0, 1, NULL));
  1986. }
  1987. int
  1988. xmon_360_read_char(void)
  1989. {
  1990. return(my_console_wait_key(0, 0, NULL));
  1991. }
  1992. #endif
  1993. #ifdef CONFIG_KGDB
  1994. static char kgdb_buf[RX_BUF_SIZE], *kgdp;
  1995. static int kgdb_chars;
  1996. unsigned char
  1997. getDebugChar(void)
  1998. {
  1999. if (kgdb_chars <= 0) {
  2000. kgdb_chars = my_console_wait_key(0, 0, kgdb_buf);
  2001. kgdp = kgdb_buf;
  2002. }
  2003. kgdb_chars--;
  2004. return(*kgdp++);
  2005. }
  2006. void kgdb_interruptible(int state)
  2007. {
  2008. }
  2009. void kgdb_map_scc(void)
  2010. {
  2011. struct serial_state *ser;
  2012. uint mem_addr;
  2013. volatile QUICC_BD *bdp;
  2014. volatile smc_uart_t *up;
  2015. cpmp = (cpm360_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
  2016. /* To avoid data cache CPM DMA coherency problems, allocate a
  2017. * buffer in the CPM DPRAM. This will work until the CPM and
  2018. * serial ports are initialized. At that time a memory buffer
  2019. * will be allocated.
  2020. * The port is already initialized from the boot procedure, all
  2021. * we do here is give it a different buffer and make it a FIFO.
  2022. */
  2023. ser = rs_table;
  2024. /* Right now, assume we are using SMCs.
  2025. */
  2026. up = (smc_uart_t *)&cpmp->cp_dparam[ser->port];
  2027. /* Allocate space for an input FIFO, plus a few bytes for output.
  2028. * Allocate bytes to maintain word alignment.
  2029. */
  2030. mem_addr = (uint)(&cpmp->cp_dpmem[0x1000]);
  2031. /* Set the physical address of the host memory buffers in
  2032. * the buffer descriptors.
  2033. */
  2034. bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_rbase];
  2035. bdp->buf = mem_addr;
  2036. bdp = (QUICC_BD *)&cpmp->cp_dpmem[up->smc_tbase];
  2037. bdp->buf = mem_addr+RX_BUF_SIZE;
  2038. up->smc_mrblr = RX_BUF_SIZE; /* receive buffer length */
  2039. up->smc_maxidl = RX_BUF_SIZE;
  2040. }
  2041. #endif
  2042. static struct tty_struct *serial_console_device(struct console *c, int *index)
  2043. {
  2044. *index = c->index;
  2045. return serial_driver;
  2046. }
  2047. struct console sercons = {
  2048. .name = "ttyS",
  2049. .write = serial_console_write,
  2050. .device = serial_console_device,
  2051. .wait_key = serial_console_wait_key,
  2052. .setup = serial_console_setup,
  2053. .flags = CON_PRINTBUFFER,
  2054. .index = CONFIG_SERIAL_CONSOLE_PORT,
  2055. };
  2056. /*
  2057. * Register console.
  2058. */
  2059. long console_360_init(long kmem_start, long kmem_end)
  2060. {
  2061. register_console(&sercons);
  2062. /*register_console (console_print_68360); - 2.0.38 only required a write
  2063. function pointer. */
  2064. return kmem_start;
  2065. }
  2066. #endif
  2067. /* Index in baud rate table of the default console baud rate.
  2068. */
  2069. static int baud_idx;
  2070. static const struct tty_operations rs_360_ops = {
  2071. .owner = THIS_MODULE,
  2072. .open = rs_360_open,
  2073. .close = rs_360_close,
  2074. .write = rs_360_write,
  2075. .put_char = rs_360_put_char,
  2076. .write_room = rs_360_write_room,
  2077. .chars_in_buffer = rs_360_chars_in_buffer,
  2078. .flush_buffer = rs_360_flush_buffer,
  2079. .ioctl = rs_360_ioctl,
  2080. .throttle = rs_360_throttle,
  2081. .unthrottle = rs_360_unthrottle,
  2082. /* .send_xchar = rs_360_send_xchar, */
  2083. .set_termios = rs_360_set_termios,
  2084. .stop = rs_360_stop,
  2085. .start = rs_360_start,
  2086. .hangup = rs_360_hangup,
  2087. /* .wait_until_sent = rs_360_wait_until_sent, */
  2088. /* .read_proc = rs_360_read_proc, */
  2089. .tiocmget = rs_360_tiocmget,
  2090. .tiocmset = rs_360_tiocmset,
  2091. };
  2092. static int __init rs_360_init(void)
  2093. {
  2094. struct serial_state * state;
  2095. ser_info_t *info;
  2096. void *mem_addr;
  2097. uint dp_addr, iobits;
  2098. int i, j, idx;
  2099. ushort chan;
  2100. QUICC_BD *bdp;
  2101. volatile QUICC *cp;
  2102. volatile struct smc_regs *sp;
  2103. volatile struct smc_uart_pram *up;
  2104. volatile struct scc_regs *scp;
  2105. volatile struct uart_pram *sup;
  2106. /* volatile immap_t *immap; */
  2107. serial_driver = alloc_tty_driver(NR_PORTS);
  2108. if (!serial_driver)
  2109. return -1;
  2110. show_serial_version();
  2111. serial_driver->name = "ttyS";
  2112. serial_driver->major = TTY_MAJOR;
  2113. serial_driver->minor_start = 64;
  2114. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2115. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2116. serial_driver->init_termios = tty_std_termios;
  2117. serial_driver->init_termios.c_cflag =
  2118. baud_idx | CS8 | CREAD | HUPCL | CLOCAL;
  2119. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2120. tty_set_operations(serial_driver, &rs_360_ops);
  2121. if (tty_register_driver(serial_driver))
  2122. panic("Couldn't register serial driver\n");
  2123. cp = pquicc; /* Get pointer to Communication Processor */
  2124. /* immap = (immap_t *)IMAP_ADDR; */ /* and to internal registers */
  2125. /* Configure SCC2, SCC3, and SCC4 instead of port A parallel I/O.
  2126. */
  2127. /* The "standard" configuration through the 860.
  2128. */
  2129. /* immap->im_ioport.iop_papar |= 0x00fc; */
  2130. /* immap->im_ioport.iop_padir &= ~0x00fc; */
  2131. /* immap->im_ioport.iop_paodr &= ~0x00fc; */
  2132. cp->pio_papar |= 0x00fc;
  2133. cp->pio_padir &= ~0x00fc;
  2134. /* cp->pio_paodr &= ~0x00fc; */
  2135. /* Since we don't yet do modem control, connect the port C pins
  2136. * as general purpose I/O. This will assert CTS and CD for the
  2137. * SCC ports.
  2138. */
  2139. /* FIXME: see 360um p.7-365 and 860um p.34-12
  2140. * I can't make sense of these bits - mleslie*/
  2141. /* immap->im_ioport.iop_pcdir |= 0x03c6; */
  2142. /* immap->im_ioport.iop_pcpar &= ~0x03c6; */
  2143. /* cp->pio_pcdir |= 0x03c6; */
  2144. /* cp->pio_pcpar &= ~0x03c6; */
  2145. /* Connect SCC2 and SCC3 to NMSI. Connect BRG3 to SCC2 and
  2146. * BRG4 to SCC3.
  2147. */
  2148. cp->si_sicr &= ~0x00ffff00;
  2149. cp->si_sicr |= 0x001b1200;
  2150. #ifdef CONFIG_PP04
  2151. /* Frequentis PP04 forced to RS-232 until we know better.
  2152. * Port C 12 and 13 low enables RS-232 on SCC3 and SCC4.
  2153. */
  2154. immap->im_ioport.iop_pcdir |= 0x000c;
  2155. immap->im_ioport.iop_pcpar &= ~0x000c;
  2156. immap->im_ioport.iop_pcdat &= ~0x000c;
  2157. /* This enables the TX driver.
  2158. */
  2159. cp->cp_pbpar &= ~0x6000;
  2160. cp->cp_pbdat &= ~0x6000;
  2161. #endif
  2162. for (i = 0, state = rs_table; i < NR_PORTS; i++,state++) {
  2163. state->magic = SSTATE_MAGIC;
  2164. state->line = i;
  2165. state->type = PORT_UNKNOWN;
  2166. state->custom_divisor = 0;
  2167. state->close_delay = 5*HZ/10;
  2168. state->closing_wait = 30*HZ;
  2169. state->icount.cts = state->icount.dsr =
  2170. state->icount.rng = state->icount.dcd = 0;
  2171. state->icount.rx = state->icount.tx = 0;
  2172. state->icount.frame = state->icount.parity = 0;
  2173. state->icount.overrun = state->icount.brk = 0;
  2174. printk(KERN_INFO "ttyS%d at irq 0x%02x is an %s\n",
  2175. i, (unsigned int)(state->irq),
  2176. (state->smc_scc_num & NUM_IS_SCC) ? "SCC" : "SMC");
  2177. #ifdef CONFIG_SERIAL_CONSOLE
  2178. /* If we just printed the message on the console port, and
  2179. * we are about to initialize it for general use, we have
  2180. * to wait a couple of character times for the CR/NL to
  2181. * make it out of the transmit buffer.
  2182. */
  2183. if (i == CONFIG_SERIAL_CONSOLE_PORT)
  2184. mdelay(8);
  2185. /* idx = PORT_NUM(info->state->smc_scc_num); */
  2186. /* if (info->state->smc_scc_num & NUM_IS_SCC) */
  2187. /* chan = scc_chan_map[idx]; */
  2188. /* else */
  2189. /* chan = smc_chan_map[idx]; */
  2190. /* cp->cp_cr = mk_cr_cmd(chan, CPM_CR_STOP_TX) | CPM_CR_FLG; */
  2191. /* while (cp->cp_cr & CPM_CR_FLG); */
  2192. #endif
  2193. /* info = kmalloc(sizeof(ser_info_t), GFP_KERNEL); */
  2194. info = &quicc_ser_info[i];
  2195. if (info) {
  2196. memset (info, 0, sizeof(ser_info_t));
  2197. info->magic = SERIAL_MAGIC;
  2198. info->line = i;
  2199. info->flags = state->flags;
  2200. INIT_WORK(&info->tqueue, do_softint, info);
  2201. INIT_WORK(&info->tqueue_hangup, do_serial_hangup, info);
  2202. init_waitqueue_head(&info->open_wait);
  2203. init_waitqueue_head(&info->close_wait);
  2204. info->state = state;
  2205. state->info = (struct async_struct *)info;
  2206. /* We need to allocate a transmit and receive buffer
  2207. * descriptors from dual port ram, and a character
  2208. * buffer area from host mem.
  2209. */
  2210. dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * RX_NUM_FIFO);
  2211. /* Allocate space for FIFOs in the host memory.
  2212. * (for now this is from a static array of buffers :(
  2213. */
  2214. /* mem_addr = m360_cpm_hostalloc(RX_NUM_FIFO * RX_BUF_SIZE); */
  2215. /* mem_addr = kmalloc (RX_NUM_FIFO * RX_BUF_SIZE, GFP_BUFFER); */
  2216. mem_addr = &rx_buf_pool[i * RX_NUM_FIFO * RX_BUF_SIZE];
  2217. /* Set the physical address of the host memory
  2218. * buffers in the buffer descriptors, and the
  2219. * virtual address for us to work with.
  2220. */
  2221. bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
  2222. info->rx_cur = info->rx_bd_base = bdp;
  2223. /* initialize rx buffer descriptors */
  2224. for (j=0; j<(RX_NUM_FIFO-1); j++) {
  2225. bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
  2226. bdp->status = BD_SC_EMPTY | BD_SC_INTRPT;
  2227. mem_addr += RX_BUF_SIZE;
  2228. bdp++;
  2229. }
  2230. bdp->buf = &rx_buf_pool[(i * RX_NUM_FIFO + j ) * RX_BUF_SIZE];
  2231. bdp->status = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT;
  2232. idx = PORT_NUM(info->state->smc_scc_num);
  2233. if (info->state->smc_scc_num & NUM_IS_SCC) {
  2234. #if defined (CONFIG_UCQUICC) && 1
  2235. /* set the transceiver mode to RS232 */
  2236. sipex_mode_bits &= ~(uint)SIPEX_MODE(idx,0x0f); /* clear current mode */
  2237. sipex_mode_bits |= (uint)SIPEX_MODE(idx,0x02);
  2238. *(uint *)_periph_base = sipex_mode_bits;
  2239. /* printk ("sipex bits = 0x%08x\n", sipex_mode_bits); */
  2240. #endif
  2241. }
  2242. dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * TX_NUM_FIFO);
  2243. /* Allocate space for FIFOs in the host memory.
  2244. */
  2245. /* mem_addr = m360_cpm_hostalloc(TX_NUM_FIFO * TX_BUF_SIZE); */
  2246. /* mem_addr = kmalloc (TX_NUM_FIFO * TX_BUF_SIZE, GFP_BUFFER); */
  2247. mem_addr = &tx_buf_pool[i * TX_NUM_FIFO * TX_BUF_SIZE];
  2248. /* Set the physical address of the host memory
  2249. * buffers in the buffer descriptors, and the
  2250. * virtual address for us to work with.
  2251. */
  2252. /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
  2253. bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
  2254. info->tx_cur = info->tx_bd_base = (QUICC_BD *)bdp;
  2255. /* initialize tx buffer descriptors */
  2256. for (j=0; j<(TX_NUM_FIFO-1); j++) {
  2257. bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
  2258. bdp->status = BD_SC_INTRPT;
  2259. mem_addr += TX_BUF_SIZE;
  2260. bdp++;
  2261. }
  2262. bdp->buf = &tx_buf_pool[(i * TX_NUM_FIFO + j ) * TX_BUF_SIZE];
  2263. bdp->status = (BD_SC_WRAP | BD_SC_INTRPT);
  2264. if (info->state->smc_scc_num & NUM_IS_SCC) {
  2265. scp = &pquicc->scc_regs[idx];
  2266. sup = &pquicc->pram[info->state->port].scc.pscc.u;
  2267. sup->rbase = dp_addr;
  2268. sup->tbase = dp_addr;
  2269. /* Set up the uart parameters in the
  2270. * parameter ram.
  2271. */
  2272. sup->rfcr = SMC_EB;
  2273. sup->tfcr = SMC_EB;
  2274. /* Set this to 1 for now, so we get single
  2275. * character interrupts. Using idle character
  2276. * time requires some additional tuning.
  2277. */
  2278. sup->mrblr = 1;
  2279. sup->max_idl = 0;
  2280. sup->brkcr = 1;
  2281. sup->parec = 0;
  2282. sup->frmer = 0;
  2283. sup->nosec = 0;
  2284. sup->brkec = 0;
  2285. sup->uaddr1 = 0;
  2286. sup->uaddr2 = 0;
  2287. sup->toseq = 0;
  2288. {
  2289. int i;
  2290. for (i=0;i<8;i++)
  2291. sup->cc[i] = 0x8000;
  2292. }
  2293. sup->rccm = 0xc0ff;
  2294. /* Send the CPM an initialize command.
  2295. */
  2296. chan = scc_chan_map[idx];
  2297. /* execute the INIT RX & TX PARAMS command for this channel. */
  2298. cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
  2299. while (cp->cp_cr & CPM_CR_FLG);
  2300. /* Set UART mode, 8 bit, no parity, one stop.
  2301. * Enable receive and transmit.
  2302. */
  2303. scp->scc_gsmr.w.high = 0;
  2304. scp->scc_gsmr.w.low =
  2305. (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
  2306. /* Disable all interrupts and clear all pending
  2307. * events.
  2308. */
  2309. scp->scc_sccm = 0;
  2310. scp->scc_scce = 0xffff;
  2311. scp->scc_dsr = 0x7e7e;
  2312. scp->scc_psmr = 0x3000;
  2313. /* If the port is the console, enable Rx and Tx.
  2314. */
  2315. #ifdef CONFIG_SERIAL_CONSOLE
  2316. if (i == CONFIG_SERIAL_CONSOLE_PORT)
  2317. scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  2318. #endif
  2319. }
  2320. else {
  2321. /* Configure SMCs Tx/Rx instead of port B
  2322. * parallel I/O.
  2323. */
  2324. up = &pquicc->pram[info->state->port].scc.pothers.idma_smc.psmc.u;
  2325. up->rbase = dp_addr;
  2326. iobits = 0xc0 << (idx * 4);
  2327. cp->pip_pbpar |= iobits;
  2328. cp->pip_pbdir &= ~iobits;
  2329. cp->pip_pbodr &= ~iobits;
  2330. /* Connect the baud rate generator to the
  2331. * SMC based upon index in rs_table. Also
  2332. * make sure it is connected to NMSI.
  2333. */
  2334. cp->si_simode &= ~(0xffff << (idx * 16));
  2335. cp->si_simode |= (i << ((idx * 16) + 12));
  2336. up->tbase = dp_addr;
  2337. /* Set up the uart parameters in the
  2338. * parameter ram.
  2339. */
  2340. up->rfcr = SMC_EB;
  2341. up->tfcr = SMC_EB;
  2342. /* Set this to 1 for now, so we get single
  2343. * character interrupts. Using idle character
  2344. * time requires some additional tuning.
  2345. */
  2346. up->mrblr = 1;
  2347. up->max_idl = 0;
  2348. up->brkcr = 1;
  2349. /* Send the CPM an initialize command.
  2350. */
  2351. chan = smc_chan_map[idx];
  2352. cp->cp_cr = mk_cr_cmd(chan,
  2353. CPM_CR_INIT_TRX) | CPM_CR_FLG;
  2354. #ifdef CONFIG_SERIAL_CONSOLE
  2355. if (i == CONFIG_SERIAL_CONSOLE_PORT)
  2356. printk("");
  2357. #endif
  2358. while (cp->cp_cr & CPM_CR_FLG);
  2359. /* Set UART mode, 8 bit, no parity, one stop.
  2360. * Enable receive and transmit.
  2361. */
  2362. sp = &cp->smc_regs[idx];
  2363. sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
  2364. /* Disable all interrupts and clear all pending
  2365. * events.
  2366. */
  2367. sp->smc_smcm = 0;
  2368. sp->smc_smce = 0xff;
  2369. /* If the port is the console, enable Rx and Tx.
  2370. */
  2371. #ifdef CONFIG_SERIAL_CONSOLE
  2372. if (i == CONFIG_SERIAL_CONSOLE_PORT)
  2373. sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
  2374. #endif
  2375. }
  2376. /* Install interrupt handler.
  2377. */
  2378. /* cpm_install_handler(IRQ_MACHSPEC | state->irq, rs_360_interrupt, info); */
  2379. /*request_irq(IRQ_MACHSPEC | state->irq, rs_360_interrupt, */
  2380. request_irq(state->irq, rs_360_interrupt,
  2381. IRQ_FLG_LOCK, "ttyS", (void *)info);
  2382. /* Set up the baud rate generator.
  2383. */
  2384. m360_cpm_setbrg(i, baud_table[baud_idx]);
  2385. }
  2386. }
  2387. return 0;
  2388. }
  2389. module_init(rs_360_init);
  2390. /* This must always be called before the rs_360_init() function, otherwise
  2391. * it blows away the port control information.
  2392. */
  2393. //static int __init serial_console_setup( struct console *co, char *options)
  2394. int serial_console_setup( struct console *co, char *options)
  2395. {
  2396. struct serial_state *ser;
  2397. uint mem_addr, dp_addr, bidx, idx, iobits;
  2398. ushort chan;
  2399. QUICC_BD *bdp;
  2400. volatile QUICC *cp;
  2401. volatile struct smc_regs *sp;
  2402. volatile struct scc_regs *scp;
  2403. volatile struct smc_uart_pram *up;
  2404. volatile struct uart_pram *sup;
  2405. /* mleslie TODO:
  2406. * add something to the 68k bootloader to store a desired initial console baud rate */
  2407. /* bd_t *bd; */ /* a board info struct used by EPPC-bug */
  2408. /* bd = (bd_t *)__res; */
  2409. for (bidx = 0; bidx < (sizeof(baud_table) / sizeof(int)); bidx++)
  2410. /* if (bd->bi_baudrate == baud_table[bidx]) */
  2411. if (CONSOLE_BAUDRATE == baud_table[bidx])
  2412. break;
  2413. /* co->cflag = CREAD|CLOCAL|bidx|CS8; */
  2414. baud_idx = bidx;
  2415. ser = rs_table + CONFIG_SERIAL_CONSOLE_PORT;
  2416. cp = pquicc; /* Get pointer to Communication Processor */
  2417. idx = PORT_NUM(ser->smc_scc_num);
  2418. if (ser->smc_scc_num & NUM_IS_SCC) {
  2419. /* TODO: need to set up SCC pin assignment etc. here */
  2420. }
  2421. else {
  2422. iobits = 0xc0 << (idx * 4);
  2423. cp->pip_pbpar |= iobits;
  2424. cp->pip_pbdir &= ~iobits;
  2425. cp->pip_pbodr &= ~iobits;
  2426. /* Connect the baud rate generator to the
  2427. * SMC based upon index in rs_table. Also
  2428. * make sure it is connected to NMSI.
  2429. */
  2430. cp->si_simode &= ~(0xffff << (idx * 16));
  2431. cp->si_simode |= (idx << ((idx * 16) + 12));
  2432. }
  2433. /* When we get here, the CPM has been reset, so we need
  2434. * to configure the port.
  2435. * We need to allocate a transmit and receive buffer descriptor
  2436. * from dual port ram, and a character buffer area from host mem.
  2437. */
  2438. /* Allocate space for two buffer descriptors in the DP ram.
  2439. */
  2440. dp_addr = m360_cpm_dpalloc(sizeof(QUICC_BD) * CONSOLE_NUM_FIFO);
  2441. /* Allocate space for two 2 byte FIFOs in the host memory.
  2442. */
  2443. /* mem_addr = m360_cpm_hostalloc(8); */
  2444. mem_addr = (uint)console_fifos;
  2445. /* Set the physical address of the host memory buffers in
  2446. * the buffer descriptors.
  2447. */
  2448. /* bdp = (QUICC_BD *)&cp->cp_dpmem[dp_addr]; */
  2449. bdp = (QUICC_BD *)((uint)pquicc + dp_addr);
  2450. bdp->buf = (char *)mem_addr;
  2451. (bdp+1)->buf = (char *)(mem_addr+4);
  2452. /* For the receive, set empty and wrap.
  2453. * For transmit, set wrap.
  2454. */
  2455. bdp->status = BD_SC_EMPTY | BD_SC_WRAP;
  2456. (bdp+1)->status = BD_SC_WRAP;
  2457. /* Set up the uart parameters in the parameter ram.
  2458. */
  2459. if (ser->smc_scc_num & NUM_IS_SCC) {
  2460. scp = &cp->scc_regs[idx];
  2461. /* sup = (scc_uart_t *)&cp->cp_dparam[ser->port]; */
  2462. sup = &pquicc->pram[ser->port].scc.pscc.u;
  2463. sup->rbase = dp_addr;
  2464. sup->tbase = dp_addr + sizeof(QUICC_BD);
  2465. /* Set up the uart parameters in the
  2466. * parameter ram.
  2467. */
  2468. sup->rfcr = SMC_EB;
  2469. sup->tfcr = SMC_EB;
  2470. /* Set this to 1 for now, so we get single
  2471. * character interrupts. Using idle character
  2472. * time requires some additional tuning.
  2473. */
  2474. sup->mrblr = 1;
  2475. sup->max_idl = 0;
  2476. sup->brkcr = 1;
  2477. sup->parec = 0;
  2478. sup->frmer = 0;
  2479. sup->nosec = 0;
  2480. sup->brkec = 0;
  2481. sup->uaddr1 = 0;
  2482. sup->uaddr2 = 0;
  2483. sup->toseq = 0;
  2484. {
  2485. int i;
  2486. for (i=0;i<8;i++)
  2487. sup->cc[i] = 0x8000;
  2488. }
  2489. sup->rccm = 0xc0ff;
  2490. /* Send the CPM an initialize command.
  2491. */
  2492. chan = scc_chan_map[idx];
  2493. cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
  2494. while (cp->cp_cr & CPM_CR_FLG);
  2495. /* Set UART mode, 8 bit, no parity, one stop.
  2496. * Enable receive and transmit.
  2497. */
  2498. scp->scc_gsmr.w.high = 0;
  2499. scp->scc_gsmr.w.low =
  2500. (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
  2501. /* Disable all interrupts and clear all pending
  2502. * events.
  2503. */
  2504. scp->scc_sccm = 0;
  2505. scp->scc_scce = 0xffff;
  2506. scp->scc_dsr = 0x7e7e;
  2507. scp->scc_psmr = 0x3000;
  2508. scp->scc_gsmr.w.low |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
  2509. }
  2510. else {
  2511. /* up = (smc_uart_t *)&cp->cp_dparam[ser->port]; */
  2512. up = &pquicc->pram[ser->port].scc.pothers.idma_smc.psmc.u;
  2513. up->rbase = dp_addr; /* Base of receive buffer desc. */
  2514. up->tbase = dp_addr+sizeof(QUICC_BD); /* Base of xmt buffer desc. */
  2515. up->rfcr = SMC_EB;
  2516. up->tfcr = SMC_EB;
  2517. /* Set this to 1 for now, so we get single character interrupts.
  2518. */
  2519. up->mrblr = 1; /* receive buffer length */
  2520. up->max_idl = 0; /* wait forever for next char */
  2521. /* Send the CPM an initialize command.
  2522. */
  2523. chan = smc_chan_map[idx];
  2524. cp->cp_cr = mk_cr_cmd(chan, CPM_CR_INIT_TRX) | CPM_CR_FLG;
  2525. while (cp->cp_cr & CPM_CR_FLG);
  2526. /* Set UART mode, 8 bit, no parity, one stop.
  2527. * Enable receive and transmit.
  2528. */
  2529. sp = &cp->smc_regs[idx];
  2530. sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
  2531. /* And finally, enable Rx and Tx.
  2532. */
  2533. sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
  2534. }
  2535. /* Set up the baud rate generator.
  2536. */
  2537. /* m360_cpm_setbrg((ser - rs_table), bd->bi_baudrate); */
  2538. m360_cpm_setbrg((ser - rs_table), CONSOLE_BAUDRATE);
  2539. return 0;
  2540. }
  2541. /*
  2542. * Local variables:
  2543. * c-indent-level: 4
  2544. * c-basic-offset: 4
  2545. * tab-width: 4
  2546. * End:
  2547. */