rtc-sh.c 21 KB

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  1. /*
  2. * SuperH On-Chip RTC Support
  3. *
  4. * Copyright (C) 2006 - 2009 Paul Mundt
  5. * Copyright (C) 2006 Jamie Lenehan
  6. * Copyright (C) 2008 Angelo Castello
  7. *
  8. * Based on the old arch/sh/kernel/cpu/rtc.c by:
  9. *
  10. * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
  11. * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
  12. *
  13. * This file is subject to the terms and conditions of the GNU General Public
  14. * License. See the file "COPYING" in the main directory of this archive
  15. * for more details.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/bcd.h>
  20. #include <linux/rtc.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/io.h>
  27. #include <linux/log2.h>
  28. #include <linux/clk.h>
  29. #include <linux/slab.h>
  30. #include <asm/rtc.h>
  31. #define DRV_NAME "sh-rtc"
  32. #define DRV_VERSION "0.2.3"
  33. #define RTC_REG(r) ((r) * rtc_reg_size)
  34. #define R64CNT RTC_REG(0)
  35. #define RSECCNT RTC_REG(1) /* RTC sec */
  36. #define RMINCNT RTC_REG(2) /* RTC min */
  37. #define RHRCNT RTC_REG(3) /* RTC hour */
  38. #define RWKCNT RTC_REG(4) /* RTC week */
  39. #define RDAYCNT RTC_REG(5) /* RTC day */
  40. #define RMONCNT RTC_REG(6) /* RTC month */
  41. #define RYRCNT RTC_REG(7) /* RTC year */
  42. #define RSECAR RTC_REG(8) /* ALARM sec */
  43. #define RMINAR RTC_REG(9) /* ALARM min */
  44. #define RHRAR RTC_REG(10) /* ALARM hour */
  45. #define RWKAR RTC_REG(11) /* ALARM week */
  46. #define RDAYAR RTC_REG(12) /* ALARM day */
  47. #define RMONAR RTC_REG(13) /* ALARM month */
  48. #define RCR1 RTC_REG(14) /* Control */
  49. #define RCR2 RTC_REG(15) /* Control */
  50. /*
  51. * Note on RYRAR and RCR3: Up until this point most of the register
  52. * definitions are consistent across all of the available parts. However,
  53. * the placement of the optional RYRAR and RCR3 (the RYRAR control
  54. * register used to control RYRCNT/RYRAR compare) varies considerably
  55. * across various parts, occasionally being mapped in to a completely
  56. * unrelated address space. For proper RYRAR support a separate resource
  57. * would have to be handed off, but as this is purely optional in
  58. * practice, we simply opt not to support it, thereby keeping the code
  59. * quite a bit more simplified.
  60. */
  61. /* ALARM Bits - or with BCD encoded value */
  62. #define AR_ENB 0x80 /* Enable for alarm cmp */
  63. /* Period Bits */
  64. #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
  65. #define PF_COUNT 0x200 /* Half periodic counter */
  66. #define PF_OXS 0x400 /* Periodic One x Second */
  67. #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
  68. #define PF_MASK 0xf00
  69. /* RCR1 Bits */
  70. #define RCR1_CF 0x80 /* Carry Flag */
  71. #define RCR1_CIE 0x10 /* Carry Interrupt Enable */
  72. #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
  73. #define RCR1_AF 0x01 /* Alarm Flag */
  74. /* RCR2 Bits */
  75. #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
  76. #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
  77. #define RCR2_RTCEN 0x08 /* ENable RTC */
  78. #define RCR2_ADJ 0x04 /* ADJustment (30-second) */
  79. #define RCR2_RESET 0x02 /* Reset bit */
  80. #define RCR2_START 0x01 /* Start bit */
  81. struct sh_rtc {
  82. void __iomem *regbase;
  83. unsigned long regsize;
  84. struct resource *res;
  85. int alarm_irq;
  86. int periodic_irq;
  87. int carry_irq;
  88. struct clk *clk;
  89. struct rtc_device *rtc_dev;
  90. spinlock_t lock;
  91. unsigned long capabilities; /* See asm/rtc.h for cap bits */
  92. unsigned short periodic_freq;
  93. };
  94. static int __sh_rtc_interrupt(struct sh_rtc *rtc)
  95. {
  96. unsigned int tmp, pending;
  97. tmp = readb(rtc->regbase + RCR1);
  98. pending = tmp & RCR1_CF;
  99. tmp &= ~RCR1_CF;
  100. writeb(tmp, rtc->regbase + RCR1);
  101. /* Users have requested One x Second IRQ */
  102. if (pending && rtc->periodic_freq & PF_OXS)
  103. rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
  104. return pending;
  105. }
  106. static int __sh_rtc_alarm(struct sh_rtc *rtc)
  107. {
  108. unsigned int tmp, pending;
  109. tmp = readb(rtc->regbase + RCR1);
  110. pending = tmp & RCR1_AF;
  111. tmp &= ~(RCR1_AF | RCR1_AIE);
  112. writeb(tmp, rtc->regbase + RCR1);
  113. if (pending)
  114. rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
  115. return pending;
  116. }
  117. static int __sh_rtc_periodic(struct sh_rtc *rtc)
  118. {
  119. struct rtc_device *rtc_dev = rtc->rtc_dev;
  120. struct rtc_task *irq_task;
  121. unsigned int tmp, pending;
  122. tmp = readb(rtc->regbase + RCR2);
  123. pending = tmp & RCR2_PEF;
  124. tmp &= ~RCR2_PEF;
  125. writeb(tmp, rtc->regbase + RCR2);
  126. if (!pending)
  127. return 0;
  128. /* Half period enabled than one skipped and the next notified */
  129. if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
  130. rtc->periodic_freq &= ~PF_COUNT;
  131. else {
  132. if (rtc->periodic_freq & PF_HP)
  133. rtc->periodic_freq |= PF_COUNT;
  134. if (rtc->periodic_freq & PF_KOU) {
  135. spin_lock(&rtc_dev->irq_task_lock);
  136. irq_task = rtc_dev->irq_task;
  137. if (irq_task)
  138. irq_task->func(irq_task->private_data);
  139. spin_unlock(&rtc_dev->irq_task_lock);
  140. } else
  141. rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
  142. }
  143. return pending;
  144. }
  145. static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
  146. {
  147. struct sh_rtc *rtc = dev_id;
  148. int ret;
  149. spin_lock(&rtc->lock);
  150. ret = __sh_rtc_interrupt(rtc);
  151. spin_unlock(&rtc->lock);
  152. return IRQ_RETVAL(ret);
  153. }
  154. static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
  155. {
  156. struct sh_rtc *rtc = dev_id;
  157. int ret;
  158. spin_lock(&rtc->lock);
  159. ret = __sh_rtc_alarm(rtc);
  160. spin_unlock(&rtc->lock);
  161. return IRQ_RETVAL(ret);
  162. }
  163. static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
  164. {
  165. struct sh_rtc *rtc = dev_id;
  166. int ret;
  167. spin_lock(&rtc->lock);
  168. ret = __sh_rtc_periodic(rtc);
  169. spin_unlock(&rtc->lock);
  170. return IRQ_RETVAL(ret);
  171. }
  172. static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
  173. {
  174. struct sh_rtc *rtc = dev_id;
  175. int ret;
  176. spin_lock(&rtc->lock);
  177. ret = __sh_rtc_interrupt(rtc);
  178. ret |= __sh_rtc_alarm(rtc);
  179. ret |= __sh_rtc_periodic(rtc);
  180. spin_unlock(&rtc->lock);
  181. return IRQ_RETVAL(ret);
  182. }
  183. static int sh_rtc_irq_set_state(struct device *dev, int enable)
  184. {
  185. struct sh_rtc *rtc = dev_get_drvdata(dev);
  186. unsigned int tmp;
  187. spin_lock_irq(&rtc->lock);
  188. tmp = readb(rtc->regbase + RCR2);
  189. if (enable) {
  190. rtc->periodic_freq |= PF_KOU;
  191. tmp &= ~RCR2_PEF; /* Clear PES bit */
  192. tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
  193. } else {
  194. rtc->periodic_freq &= ~PF_KOU;
  195. tmp &= ~(RCR2_PESMASK | RCR2_PEF);
  196. }
  197. writeb(tmp, rtc->regbase + RCR2);
  198. spin_unlock_irq(&rtc->lock);
  199. return 0;
  200. }
  201. static int sh_rtc_irq_set_freq(struct device *dev, int freq)
  202. {
  203. struct sh_rtc *rtc = dev_get_drvdata(dev);
  204. int tmp, ret = 0;
  205. spin_lock_irq(&rtc->lock);
  206. tmp = rtc->periodic_freq & PF_MASK;
  207. switch (freq) {
  208. case 0:
  209. rtc->periodic_freq = 0x00;
  210. break;
  211. case 1:
  212. rtc->periodic_freq = 0x60;
  213. break;
  214. case 2:
  215. rtc->periodic_freq = 0x50;
  216. break;
  217. case 4:
  218. rtc->periodic_freq = 0x40;
  219. break;
  220. case 8:
  221. rtc->periodic_freq = 0x30 | PF_HP;
  222. break;
  223. case 16:
  224. rtc->periodic_freq = 0x30;
  225. break;
  226. case 32:
  227. rtc->periodic_freq = 0x20 | PF_HP;
  228. break;
  229. case 64:
  230. rtc->periodic_freq = 0x20;
  231. break;
  232. case 128:
  233. rtc->periodic_freq = 0x10 | PF_HP;
  234. break;
  235. case 256:
  236. rtc->periodic_freq = 0x10;
  237. break;
  238. default:
  239. ret = -ENOTSUPP;
  240. }
  241. if (ret == 0)
  242. rtc->periodic_freq |= tmp;
  243. spin_unlock_irq(&rtc->lock);
  244. return ret;
  245. }
  246. static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
  247. {
  248. struct sh_rtc *rtc = dev_get_drvdata(dev);
  249. unsigned int tmp;
  250. spin_lock_irq(&rtc->lock);
  251. tmp = readb(rtc->regbase + RCR1);
  252. if (enable)
  253. tmp |= RCR1_AIE;
  254. else
  255. tmp &= ~RCR1_AIE;
  256. writeb(tmp, rtc->regbase + RCR1);
  257. spin_unlock_irq(&rtc->lock);
  258. }
  259. static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
  260. {
  261. struct sh_rtc *rtc = dev_get_drvdata(dev);
  262. unsigned int tmp;
  263. tmp = readb(rtc->regbase + RCR1);
  264. seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
  265. tmp = readb(rtc->regbase + RCR2);
  266. seq_printf(seq, "periodic_IRQ\t: %s\n",
  267. (tmp & RCR2_PESMASK) ? "yes" : "no");
  268. return 0;
  269. }
  270. static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
  271. {
  272. struct sh_rtc *rtc = dev_get_drvdata(dev);
  273. unsigned int tmp;
  274. spin_lock_irq(&rtc->lock);
  275. tmp = readb(rtc->regbase + RCR1);
  276. if (!enable)
  277. tmp &= ~RCR1_CIE;
  278. else
  279. tmp |= RCR1_CIE;
  280. writeb(tmp, rtc->regbase + RCR1);
  281. spin_unlock_irq(&rtc->lock);
  282. }
  283. static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  284. {
  285. struct sh_rtc *rtc = dev_get_drvdata(dev);
  286. unsigned int ret = 0;
  287. switch (cmd) {
  288. case RTC_AIE_OFF:
  289. case RTC_AIE_ON:
  290. sh_rtc_setaie(dev, cmd == RTC_AIE_ON);
  291. break;
  292. case RTC_UIE_OFF:
  293. rtc->periodic_freq &= ~PF_OXS;
  294. sh_rtc_setcie(dev, 0);
  295. break;
  296. case RTC_UIE_ON:
  297. rtc->periodic_freq |= PF_OXS;
  298. sh_rtc_setcie(dev, 1);
  299. break;
  300. default:
  301. ret = -ENOIOCTLCMD;
  302. }
  303. return ret;
  304. }
  305. static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
  306. {
  307. struct platform_device *pdev = to_platform_device(dev);
  308. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  309. unsigned int sec128, sec2, yr, yr100, cf_bit;
  310. do {
  311. unsigned int tmp;
  312. spin_lock_irq(&rtc->lock);
  313. tmp = readb(rtc->regbase + RCR1);
  314. tmp &= ~RCR1_CF; /* Clear CF-bit */
  315. tmp |= RCR1_CIE;
  316. writeb(tmp, rtc->regbase + RCR1);
  317. sec128 = readb(rtc->regbase + R64CNT);
  318. tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
  319. tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
  320. tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
  321. tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
  322. tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
  323. tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
  324. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  325. yr = readw(rtc->regbase + RYRCNT);
  326. yr100 = bcd2bin(yr >> 8);
  327. yr &= 0xff;
  328. } else {
  329. yr = readb(rtc->regbase + RYRCNT);
  330. yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
  331. }
  332. tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
  333. sec2 = readb(rtc->regbase + R64CNT);
  334. cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
  335. spin_unlock_irq(&rtc->lock);
  336. } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
  337. #if RTC_BIT_INVERTED != 0
  338. if ((sec128 & RTC_BIT_INVERTED))
  339. tm->tm_sec--;
  340. #endif
  341. /* only keep the carry interrupt enabled if UIE is on */
  342. if (!(rtc->periodic_freq & PF_OXS))
  343. sh_rtc_setcie(dev, 0);
  344. dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  345. "mday=%d, mon=%d, year=%d, wday=%d\n",
  346. __func__,
  347. tm->tm_sec, tm->tm_min, tm->tm_hour,
  348. tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
  349. return rtc_valid_tm(tm);
  350. }
  351. static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
  352. {
  353. struct platform_device *pdev = to_platform_device(dev);
  354. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  355. unsigned int tmp;
  356. int year;
  357. spin_lock_irq(&rtc->lock);
  358. /* Reset pre-scaler & stop RTC */
  359. tmp = readb(rtc->regbase + RCR2);
  360. tmp |= RCR2_RESET;
  361. tmp &= ~RCR2_START;
  362. writeb(tmp, rtc->regbase + RCR2);
  363. writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
  364. writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
  365. writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
  366. writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
  367. writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
  368. writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
  369. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  370. year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
  371. bin2bcd(tm->tm_year % 100);
  372. writew(year, rtc->regbase + RYRCNT);
  373. } else {
  374. year = tm->tm_year % 100;
  375. writeb(bin2bcd(year), rtc->regbase + RYRCNT);
  376. }
  377. /* Start RTC */
  378. tmp = readb(rtc->regbase + RCR2);
  379. tmp &= ~RCR2_RESET;
  380. tmp |= RCR2_RTCEN | RCR2_START;
  381. writeb(tmp, rtc->regbase + RCR2);
  382. spin_unlock_irq(&rtc->lock);
  383. return 0;
  384. }
  385. static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
  386. {
  387. unsigned int byte;
  388. int value = 0xff; /* return 0xff for ignored values */
  389. byte = readb(rtc->regbase + reg_off);
  390. if (byte & AR_ENB) {
  391. byte &= ~AR_ENB; /* strip the enable bit */
  392. value = bcd2bin(byte);
  393. }
  394. return value;
  395. }
  396. static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  397. {
  398. struct platform_device *pdev = to_platform_device(dev);
  399. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  400. struct rtc_time *tm = &wkalrm->time;
  401. spin_lock_irq(&rtc->lock);
  402. tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
  403. tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
  404. tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
  405. tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
  406. tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
  407. tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
  408. if (tm->tm_mon > 0)
  409. tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
  410. tm->tm_year = 0xffff;
  411. wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
  412. spin_unlock_irq(&rtc->lock);
  413. return 0;
  414. }
  415. static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
  416. int value, int reg_off)
  417. {
  418. /* < 0 for a value that is ignored */
  419. if (value < 0)
  420. writeb(0, rtc->regbase + reg_off);
  421. else
  422. writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
  423. }
  424. static int sh_rtc_check_alarm(struct rtc_time *tm)
  425. {
  426. /*
  427. * The original rtc says anything > 0xc0 is "don't care" or "match
  428. * all" - most users use 0xff but rtc-dev uses -1 for the same thing.
  429. * The original rtc doesn't support years - some things use -1 and
  430. * some 0xffff. We use -1 to make out tests easier.
  431. */
  432. if (tm->tm_year == 0xffff)
  433. tm->tm_year = -1;
  434. if (tm->tm_mon >= 0xff)
  435. tm->tm_mon = -1;
  436. if (tm->tm_mday >= 0xff)
  437. tm->tm_mday = -1;
  438. if (tm->tm_wday >= 0xff)
  439. tm->tm_wday = -1;
  440. if (tm->tm_hour >= 0xff)
  441. tm->tm_hour = -1;
  442. if (tm->tm_min >= 0xff)
  443. tm->tm_min = -1;
  444. if (tm->tm_sec >= 0xff)
  445. tm->tm_sec = -1;
  446. if (tm->tm_year > 9999 ||
  447. tm->tm_mon >= 12 ||
  448. tm->tm_mday == 0 || tm->tm_mday >= 32 ||
  449. tm->tm_wday >= 7 ||
  450. tm->tm_hour >= 24 ||
  451. tm->tm_min >= 60 ||
  452. tm->tm_sec >= 60)
  453. return -EINVAL;
  454. return 0;
  455. }
  456. static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  457. {
  458. struct platform_device *pdev = to_platform_device(dev);
  459. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  460. unsigned int rcr1;
  461. struct rtc_time *tm = &wkalrm->time;
  462. int mon, err;
  463. err = sh_rtc_check_alarm(tm);
  464. if (unlikely(err < 0))
  465. return err;
  466. spin_lock_irq(&rtc->lock);
  467. /* disable alarm interrupt and clear the alarm flag */
  468. rcr1 = readb(rtc->regbase + RCR1);
  469. rcr1 &= ~(RCR1_AF | RCR1_AIE);
  470. writeb(rcr1, rtc->regbase + RCR1);
  471. /* set alarm time */
  472. sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
  473. sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
  474. sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
  475. sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
  476. sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
  477. mon = tm->tm_mon;
  478. if (mon >= 0)
  479. mon += 1;
  480. sh_rtc_write_alarm_value(rtc, mon, RMONAR);
  481. if (wkalrm->enabled) {
  482. rcr1 |= RCR1_AIE;
  483. writeb(rcr1, rtc->regbase + RCR1);
  484. }
  485. spin_unlock_irq(&rtc->lock);
  486. return 0;
  487. }
  488. static struct rtc_class_ops sh_rtc_ops = {
  489. .ioctl = sh_rtc_ioctl,
  490. .read_time = sh_rtc_read_time,
  491. .set_time = sh_rtc_set_time,
  492. .read_alarm = sh_rtc_read_alarm,
  493. .set_alarm = sh_rtc_set_alarm,
  494. .irq_set_state = sh_rtc_irq_set_state,
  495. .irq_set_freq = sh_rtc_irq_set_freq,
  496. .proc = sh_rtc_proc,
  497. };
  498. static int __init sh_rtc_probe(struct platform_device *pdev)
  499. {
  500. struct sh_rtc *rtc;
  501. struct resource *res;
  502. struct rtc_time r;
  503. char clk_name[6];
  504. int clk_id, ret;
  505. rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL);
  506. if (unlikely(!rtc))
  507. return -ENOMEM;
  508. spin_lock_init(&rtc->lock);
  509. /* get periodic/carry/alarm irqs */
  510. ret = platform_get_irq(pdev, 0);
  511. if (unlikely(ret <= 0)) {
  512. ret = -ENOENT;
  513. dev_err(&pdev->dev, "No IRQ resource\n");
  514. goto err_badres;
  515. }
  516. rtc->periodic_irq = ret;
  517. rtc->carry_irq = platform_get_irq(pdev, 1);
  518. rtc->alarm_irq = platform_get_irq(pdev, 2);
  519. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  520. if (unlikely(res == NULL)) {
  521. ret = -ENOENT;
  522. dev_err(&pdev->dev, "No IO resource\n");
  523. goto err_badres;
  524. }
  525. rtc->regsize = resource_size(res);
  526. rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name);
  527. if (unlikely(!rtc->res)) {
  528. ret = -EBUSY;
  529. goto err_badres;
  530. }
  531. rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
  532. if (unlikely(!rtc->regbase)) {
  533. ret = -EINVAL;
  534. goto err_badmap;
  535. }
  536. clk_id = pdev->id;
  537. /* With a single device, the clock id is still "rtc0" */
  538. if (clk_id < 0)
  539. clk_id = 0;
  540. snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
  541. rtc->clk = clk_get(&pdev->dev, clk_name);
  542. if (IS_ERR(rtc->clk)) {
  543. /*
  544. * No error handling for rtc->clk intentionally, not all
  545. * platforms will have a unique clock for the RTC, and
  546. * the clk API can handle the struct clk pointer being
  547. * NULL.
  548. */
  549. rtc->clk = NULL;
  550. }
  551. clk_enable(rtc->clk);
  552. rtc->capabilities = RTC_DEF_CAPABILITIES;
  553. if (pdev->dev.platform_data) {
  554. struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data;
  555. /*
  556. * Some CPUs have special capabilities in addition to the
  557. * default set. Add those in here.
  558. */
  559. rtc->capabilities |= pinfo->capabilities;
  560. }
  561. if (rtc->carry_irq <= 0) {
  562. /* register shared periodic/carry/alarm irq */
  563. ret = request_irq(rtc->periodic_irq, sh_rtc_shared,
  564. IRQF_DISABLED, "sh-rtc", rtc);
  565. if (unlikely(ret)) {
  566. dev_err(&pdev->dev,
  567. "request IRQ failed with %d, IRQ %d\n", ret,
  568. rtc->periodic_irq);
  569. goto err_unmap;
  570. }
  571. } else {
  572. /* register periodic/carry/alarm irqs */
  573. ret = request_irq(rtc->periodic_irq, sh_rtc_periodic,
  574. IRQF_DISABLED, "sh-rtc period", rtc);
  575. if (unlikely(ret)) {
  576. dev_err(&pdev->dev,
  577. "request period IRQ failed with %d, IRQ %d\n",
  578. ret, rtc->periodic_irq);
  579. goto err_unmap;
  580. }
  581. ret = request_irq(rtc->carry_irq, sh_rtc_interrupt,
  582. IRQF_DISABLED, "sh-rtc carry", rtc);
  583. if (unlikely(ret)) {
  584. dev_err(&pdev->dev,
  585. "request carry IRQ failed with %d, IRQ %d\n",
  586. ret, rtc->carry_irq);
  587. free_irq(rtc->periodic_irq, rtc);
  588. goto err_unmap;
  589. }
  590. ret = request_irq(rtc->alarm_irq, sh_rtc_alarm,
  591. IRQF_DISABLED, "sh-rtc alarm", rtc);
  592. if (unlikely(ret)) {
  593. dev_err(&pdev->dev,
  594. "request alarm IRQ failed with %d, IRQ %d\n",
  595. ret, rtc->alarm_irq);
  596. free_irq(rtc->carry_irq, rtc);
  597. free_irq(rtc->periodic_irq, rtc);
  598. goto err_unmap;
  599. }
  600. }
  601. platform_set_drvdata(pdev, rtc);
  602. /* everything disabled by default */
  603. sh_rtc_irq_set_freq(&pdev->dev, 0);
  604. sh_rtc_irq_set_state(&pdev->dev, 0);
  605. sh_rtc_setaie(&pdev->dev, 0);
  606. sh_rtc_setcie(&pdev->dev, 0);
  607. rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
  608. &sh_rtc_ops, THIS_MODULE);
  609. if (IS_ERR(rtc->rtc_dev)) {
  610. ret = PTR_ERR(rtc->rtc_dev);
  611. free_irq(rtc->periodic_irq, rtc);
  612. free_irq(rtc->carry_irq, rtc);
  613. free_irq(rtc->alarm_irq, rtc);
  614. goto err_unmap;
  615. }
  616. rtc->rtc_dev->max_user_freq = 256;
  617. /* reset rtc to epoch 0 if time is invalid */
  618. if (rtc_read_time(rtc->rtc_dev, &r) < 0) {
  619. rtc_time_to_tm(0, &r);
  620. rtc_set_time(rtc->rtc_dev, &r);
  621. }
  622. device_init_wakeup(&pdev->dev, 1);
  623. return 0;
  624. err_unmap:
  625. clk_disable(rtc->clk);
  626. clk_put(rtc->clk);
  627. iounmap(rtc->regbase);
  628. err_badmap:
  629. release_mem_region(rtc->res->start, rtc->regsize);
  630. err_badres:
  631. kfree(rtc);
  632. return ret;
  633. }
  634. static int __exit sh_rtc_remove(struct platform_device *pdev)
  635. {
  636. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  637. rtc_device_unregister(rtc->rtc_dev);
  638. sh_rtc_irq_set_state(&pdev->dev, 0);
  639. sh_rtc_setaie(&pdev->dev, 0);
  640. sh_rtc_setcie(&pdev->dev, 0);
  641. free_irq(rtc->periodic_irq, rtc);
  642. if (rtc->carry_irq > 0) {
  643. free_irq(rtc->carry_irq, rtc);
  644. free_irq(rtc->alarm_irq, rtc);
  645. }
  646. iounmap(rtc->regbase);
  647. release_mem_region(rtc->res->start, rtc->regsize);
  648. clk_disable(rtc->clk);
  649. clk_put(rtc->clk);
  650. platform_set_drvdata(pdev, NULL);
  651. kfree(rtc);
  652. return 0;
  653. }
  654. static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
  655. {
  656. struct platform_device *pdev = to_platform_device(dev);
  657. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  658. set_irq_wake(rtc->periodic_irq, enabled);
  659. if (rtc->carry_irq > 0) {
  660. set_irq_wake(rtc->carry_irq, enabled);
  661. set_irq_wake(rtc->alarm_irq, enabled);
  662. }
  663. }
  664. static int sh_rtc_suspend(struct device *dev)
  665. {
  666. if (device_may_wakeup(dev))
  667. sh_rtc_set_irq_wake(dev, 1);
  668. return 0;
  669. }
  670. static int sh_rtc_resume(struct device *dev)
  671. {
  672. if (device_may_wakeup(dev))
  673. sh_rtc_set_irq_wake(dev, 0);
  674. return 0;
  675. }
  676. static const struct dev_pm_ops sh_rtc_dev_pm_ops = {
  677. .suspend = sh_rtc_suspend,
  678. .resume = sh_rtc_resume,
  679. };
  680. static struct platform_driver sh_rtc_platform_driver = {
  681. .driver = {
  682. .name = DRV_NAME,
  683. .owner = THIS_MODULE,
  684. .pm = &sh_rtc_dev_pm_ops,
  685. },
  686. .remove = __exit_p(sh_rtc_remove),
  687. };
  688. static int __init sh_rtc_init(void)
  689. {
  690. return platform_driver_probe(&sh_rtc_platform_driver, sh_rtc_probe);
  691. }
  692. static void __exit sh_rtc_exit(void)
  693. {
  694. platform_driver_unregister(&sh_rtc_platform_driver);
  695. }
  696. module_init(sh_rtc_init);
  697. module_exit(sh_rtc_exit);
  698. MODULE_DESCRIPTION("SuperH on-chip RTC driver");
  699. MODULE_VERSION(DRV_VERSION);
  700. MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
  701. "Jamie Lenehan <lenehan@twibble.org>, "
  702. "Angelo Castello <angelo.castello@st.com>");
  703. MODULE_LICENSE("GPL");
  704. MODULE_ALIAS("platform:" DRV_NAME);