rtc-rs5c372.c 18 KB

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  1. /*
  2. * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs
  3. *
  4. * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net>
  5. * Copyright (C) 2006 Tower Technologies
  6. * Copyright (C) 2008 Paul Mundt
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/i2c.h>
  13. #include <linux/rtc.h>
  14. #include <linux/bcd.h>
  15. #include <linux/slab.h>
  16. #define DRV_VERSION "0.6"
  17. /*
  18. * Ricoh has a family of I2C based RTCs, which differ only slightly from
  19. * each other. Differences center on pinout (e.g. how many interrupts,
  20. * output clock, etc) and how the control registers are used. The '372
  21. * is significant only because that's the one this driver first supported.
  22. */
  23. #define RS5C372_REG_SECS 0
  24. #define RS5C372_REG_MINS 1
  25. #define RS5C372_REG_HOURS 2
  26. #define RS5C372_REG_WDAY 3
  27. #define RS5C372_REG_DAY 4
  28. #define RS5C372_REG_MONTH 5
  29. #define RS5C372_REG_YEAR 6
  30. #define RS5C372_REG_TRIM 7
  31. # define RS5C372_TRIM_XSL 0x80
  32. # define RS5C372_TRIM_MASK 0x7F
  33. #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */
  34. #define RS5C_REG_ALARM_A_HOURS 9
  35. #define RS5C_REG_ALARM_A_WDAY 10
  36. #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */
  37. #define RS5C_REG_ALARM_B_HOURS 12
  38. #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */
  39. #define RS5C_REG_CTRL1 14
  40. # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */
  41. # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */
  42. # define RV5C387_CTRL1_24 (1 << 5)
  43. # define RS5C372A_CTRL1_SL1 (1 << 5)
  44. # define RS5C_CTRL1_CT_MASK (7 << 0)
  45. # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */
  46. # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */
  47. #define RS5C_REG_CTRL2 15
  48. # define RS5C372_CTRL2_24 (1 << 5)
  49. # define R2025_CTRL2_XST (1 << 5)
  50. # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */
  51. # define RS5C_CTRL2_CTFG (1 << 2)
  52. # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */
  53. # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */
  54. /* to read (style 1) or write registers starting at R */
  55. #define RS5C_ADDR(R) (((R) << 4) | 0)
  56. enum rtc_type {
  57. rtc_undef = 0,
  58. rtc_r2025sd,
  59. rtc_rs5c372a,
  60. rtc_rs5c372b,
  61. rtc_rv5c386,
  62. rtc_rv5c387a,
  63. };
  64. static const struct i2c_device_id rs5c372_id[] = {
  65. { "r2025sd", rtc_r2025sd },
  66. { "rs5c372a", rtc_rs5c372a },
  67. { "rs5c372b", rtc_rs5c372b },
  68. { "rv5c386", rtc_rv5c386 },
  69. { "rv5c387a", rtc_rv5c387a },
  70. { }
  71. };
  72. MODULE_DEVICE_TABLE(i2c, rs5c372_id);
  73. /* REVISIT: this assumes that:
  74. * - we're in the 21st century, so it's safe to ignore the century
  75. * bit for rv5c38[67] (REG_MONTH bit 7);
  76. * - we should use ALARM_A not ALARM_B (may be wrong on some boards)
  77. */
  78. struct rs5c372 {
  79. struct i2c_client *client;
  80. struct rtc_device *rtc;
  81. enum rtc_type type;
  82. unsigned time24:1;
  83. unsigned has_irq:1;
  84. unsigned smbus:1;
  85. char buf[17];
  86. char *regs;
  87. };
  88. static int rs5c_get_regs(struct rs5c372 *rs5c)
  89. {
  90. struct i2c_client *client = rs5c->client;
  91. struct i2c_msg msgs[] = {
  92. { client->addr, I2C_M_RD, sizeof rs5c->buf, rs5c->buf },
  93. };
  94. /* This implements the third reading method from the datasheet, using
  95. * an internal address that's reset after each transaction (by STOP)
  96. * to 0x0f ... so we read extra registers, and skip the first one.
  97. *
  98. * The first method doesn't work with the iop3xx adapter driver, on at
  99. * least 80219 chips; this works around that bug.
  100. *
  101. * The third method on the other hand doesn't work for the SMBus-only
  102. * configurations, so we use the the first method there, stripping off
  103. * the extra register in the process.
  104. */
  105. if (rs5c->smbus) {
  106. int addr = RS5C_ADDR(RS5C372_REG_SECS);
  107. int size = sizeof(rs5c->buf) - 1;
  108. if (i2c_smbus_read_i2c_block_data(client, addr, size,
  109. rs5c->buf + 1) != size) {
  110. dev_warn(&client->dev, "can't read registers\n");
  111. return -EIO;
  112. }
  113. } else {
  114. if ((i2c_transfer(client->adapter, msgs, 1)) != 1) {
  115. dev_warn(&client->dev, "can't read registers\n");
  116. return -EIO;
  117. }
  118. }
  119. dev_dbg(&client->dev,
  120. "%02x %02x %02x (%02x) %02x %02x %02x (%02x), "
  121. "%02x %02x %02x, %02x %02x %02x; %02x %02x\n",
  122. rs5c->regs[0], rs5c->regs[1], rs5c->regs[2], rs5c->regs[3],
  123. rs5c->regs[4], rs5c->regs[5], rs5c->regs[6], rs5c->regs[7],
  124. rs5c->regs[8], rs5c->regs[9], rs5c->regs[10], rs5c->regs[11],
  125. rs5c->regs[12], rs5c->regs[13], rs5c->regs[14], rs5c->regs[15]);
  126. return 0;
  127. }
  128. static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg)
  129. {
  130. unsigned hour;
  131. if (rs5c->time24)
  132. return bcd2bin(reg & 0x3f);
  133. hour = bcd2bin(reg & 0x1f);
  134. if (hour == 12)
  135. hour = 0;
  136. if (reg & 0x20)
  137. hour += 12;
  138. return hour;
  139. }
  140. static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour)
  141. {
  142. if (rs5c->time24)
  143. return bin2bcd(hour);
  144. if (hour > 12)
  145. return 0x20 | bin2bcd(hour - 12);
  146. if (hour == 12)
  147. return 0x20 | bin2bcd(12);
  148. if (hour == 0)
  149. return bin2bcd(12);
  150. return bin2bcd(hour);
  151. }
  152. static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm)
  153. {
  154. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  155. int status = rs5c_get_regs(rs5c);
  156. if (status < 0)
  157. return status;
  158. tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f);
  159. tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f);
  160. tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]);
  161. tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07);
  162. tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f);
  163. /* tm->tm_mon is zero-based */
  164. tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1;
  165. /* year is 1900 + tm->tm_year */
  166. tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100;
  167. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  168. "mday=%d, mon=%d, year=%d, wday=%d\n",
  169. __func__,
  170. tm->tm_sec, tm->tm_min, tm->tm_hour,
  171. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  172. /* rtc might need initialization */
  173. return rtc_valid_tm(tm);
  174. }
  175. static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm)
  176. {
  177. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  178. unsigned char buf[7];
  179. int addr;
  180. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d "
  181. "mday=%d, mon=%d, year=%d, wday=%d\n",
  182. __func__,
  183. tm->tm_sec, tm->tm_min, tm->tm_hour,
  184. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  185. addr = RS5C_ADDR(RS5C372_REG_SECS);
  186. buf[0] = bin2bcd(tm->tm_sec);
  187. buf[1] = bin2bcd(tm->tm_min);
  188. buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour);
  189. buf[3] = bin2bcd(tm->tm_wday);
  190. buf[4] = bin2bcd(tm->tm_mday);
  191. buf[5] = bin2bcd(tm->tm_mon + 1);
  192. buf[6] = bin2bcd(tm->tm_year - 100);
  193. if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {
  194. dev_err(&client->dev, "%s: write error\n", __func__);
  195. return -EIO;
  196. }
  197. return 0;
  198. }
  199. #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
  200. #define NEED_TRIM
  201. #endif
  202. #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE)
  203. #define NEED_TRIM
  204. #endif
  205. #ifdef NEED_TRIM
  206. static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim)
  207. {
  208. struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
  209. u8 tmp = rs5c372->regs[RS5C372_REG_TRIM];
  210. if (osc)
  211. *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768;
  212. if (trim) {
  213. dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp);
  214. tmp &= RS5C372_TRIM_MASK;
  215. if (tmp & 0x3e) {
  216. int t = tmp & 0x3f;
  217. if (tmp & 0x40)
  218. t = (~t | (s8)0xc0) + 1;
  219. else
  220. t = t - 1;
  221. tmp = t * 2;
  222. } else
  223. tmp = 0;
  224. *trim = tmp;
  225. }
  226. return 0;
  227. }
  228. #endif
  229. static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm)
  230. {
  231. return rs5c372_get_datetime(to_i2c_client(dev), tm);
  232. }
  233. static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm)
  234. {
  235. return rs5c372_set_datetime(to_i2c_client(dev), tm);
  236. }
  237. #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
  238. static int
  239. rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  240. {
  241. struct i2c_client *client = to_i2c_client(dev);
  242. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  243. unsigned char buf;
  244. int status, addr;
  245. buf = rs5c->regs[RS5C_REG_CTRL1];
  246. switch (cmd) {
  247. case RTC_UIE_OFF:
  248. case RTC_UIE_ON:
  249. /* some 327a modes use a different IRQ pin for 1Hz irqs */
  250. if (rs5c->type == rtc_rs5c372a
  251. && (buf & RS5C372A_CTRL1_SL1))
  252. return -ENOIOCTLCMD;
  253. case RTC_AIE_OFF:
  254. case RTC_AIE_ON:
  255. /* these irq management calls only make sense for chips
  256. * which are wired up to an IRQ.
  257. */
  258. if (!rs5c->has_irq)
  259. return -ENOIOCTLCMD;
  260. break;
  261. default:
  262. return -ENOIOCTLCMD;
  263. }
  264. status = rs5c_get_regs(rs5c);
  265. if (status < 0)
  266. return status;
  267. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  268. switch (cmd) {
  269. case RTC_AIE_OFF: /* alarm off */
  270. buf &= ~RS5C_CTRL1_AALE;
  271. break;
  272. case RTC_AIE_ON: /* alarm on */
  273. buf |= RS5C_CTRL1_AALE;
  274. break;
  275. case RTC_UIE_OFF: /* update off */
  276. buf &= ~RS5C_CTRL1_CT_MASK;
  277. break;
  278. case RTC_UIE_ON: /* update on */
  279. buf &= ~RS5C_CTRL1_CT_MASK;
  280. buf |= RS5C_CTRL1_CT4;
  281. break;
  282. }
  283. if (i2c_smbus_write_byte_data(client, addr, buf) < 0) {
  284. printk(KERN_WARNING "%s: can't update alarm\n",
  285. rs5c->rtc->name);
  286. status = -EIO;
  287. } else
  288. rs5c->regs[RS5C_REG_CTRL1] = buf;
  289. return status;
  290. }
  291. #else
  292. #define rs5c_rtc_ioctl NULL
  293. #endif
  294. /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI,
  295. * which only exposes a polled programming interface; and since
  296. * these calls map directly to those EFI requests; we don't demand
  297. * we have an IRQ for this chip when we go through this API.
  298. *
  299. * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs
  300. * though, managed through RTC_AIE_{ON,OFF} requests.
  301. */
  302. static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  303. {
  304. struct i2c_client *client = to_i2c_client(dev);
  305. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  306. int status;
  307. status = rs5c_get_regs(rs5c);
  308. if (status < 0)
  309. return status;
  310. /* report alarm time */
  311. t->time.tm_sec = 0;
  312. t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
  313. t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
  314. t->time.tm_mday = -1;
  315. t->time.tm_mon = -1;
  316. t->time.tm_year = -1;
  317. t->time.tm_wday = -1;
  318. t->time.tm_yday = -1;
  319. t->time.tm_isdst = -1;
  320. /* ... and status */
  321. t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
  322. t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG);
  323. return 0;
  324. }
  325. static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  326. {
  327. struct i2c_client *client = to_i2c_client(dev);
  328. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  329. int status, addr, i;
  330. unsigned char buf[3];
  331. /* only handle up to 24 hours in the future, like RTC_ALM_SET */
  332. if (t->time.tm_mday != -1
  333. || t->time.tm_mon != -1
  334. || t->time.tm_year != -1)
  335. return -EINVAL;
  336. /* REVISIT: round up tm_sec */
  337. /* if needed, disable irq (clears pending status) */
  338. status = rs5c_get_regs(rs5c);
  339. if (status < 0)
  340. return status;
  341. if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) {
  342. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  343. buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;
  344. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) {
  345. pr_debug("%s: can't disable alarm\n", rs5c->rtc->name);
  346. return -EIO;
  347. }
  348. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  349. }
  350. /* set alarm */
  351. buf[0] = bin2bcd(t->time.tm_min);
  352. buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
  353. buf[2] = 0x7f; /* any/all days */
  354. for (i = 0; i < sizeof(buf); i++) {
  355. addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
  356. if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) {
  357. pr_debug("%s: can't set alarm time\n", rs5c->rtc->name);
  358. return -EIO;
  359. }
  360. }
  361. /* ... and maybe enable its irq */
  362. if (t->enabled) {
  363. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  364. buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;
  365. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0)
  366. printk(KERN_WARNING "%s: can't enable alarm\n",
  367. rs5c->rtc->name);
  368. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  369. }
  370. return 0;
  371. }
  372. #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
  373. static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq)
  374. {
  375. int err, osc, trim;
  376. err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim);
  377. if (err == 0) {
  378. seq_printf(seq, "crystal\t\t: %d.%03d KHz\n",
  379. osc / 1000, osc % 1000);
  380. seq_printf(seq, "trim\t\t: %d\n", trim);
  381. }
  382. return 0;
  383. }
  384. #else
  385. #define rs5c372_rtc_proc NULL
  386. #endif
  387. static const struct rtc_class_ops rs5c372_rtc_ops = {
  388. .proc = rs5c372_rtc_proc,
  389. .ioctl = rs5c_rtc_ioctl,
  390. .read_time = rs5c372_rtc_read_time,
  391. .set_time = rs5c372_rtc_set_time,
  392. .read_alarm = rs5c_read_alarm,
  393. .set_alarm = rs5c_set_alarm,
  394. };
  395. #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE)
  396. static ssize_t rs5c372_sysfs_show_trim(struct device *dev,
  397. struct device_attribute *attr, char *buf)
  398. {
  399. int err, trim;
  400. err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim);
  401. if (err)
  402. return err;
  403. return sprintf(buf, "%d\n", trim);
  404. }
  405. static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL);
  406. static ssize_t rs5c372_sysfs_show_osc(struct device *dev,
  407. struct device_attribute *attr, char *buf)
  408. {
  409. int err, osc;
  410. err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL);
  411. if (err)
  412. return err;
  413. return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000);
  414. }
  415. static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL);
  416. static int rs5c_sysfs_register(struct device *dev)
  417. {
  418. int err;
  419. err = device_create_file(dev, &dev_attr_trim);
  420. if (err)
  421. return err;
  422. err = device_create_file(dev, &dev_attr_osc);
  423. if (err)
  424. device_remove_file(dev, &dev_attr_trim);
  425. return err;
  426. }
  427. static void rs5c_sysfs_unregister(struct device *dev)
  428. {
  429. device_remove_file(dev, &dev_attr_trim);
  430. device_remove_file(dev, &dev_attr_osc);
  431. }
  432. #else
  433. static int rs5c_sysfs_register(struct device *dev)
  434. {
  435. return 0;
  436. }
  437. static void rs5c_sysfs_unregister(struct device *dev)
  438. {
  439. /* nothing */
  440. }
  441. #endif /* SYSFS */
  442. static struct i2c_driver rs5c372_driver;
  443. static int rs5c_oscillator_setup(struct rs5c372 *rs5c372)
  444. {
  445. unsigned char buf[2];
  446. int addr, i, ret = 0;
  447. if (rs5c372->type == rtc_r2025sd) {
  448. if (!(rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST))
  449. return ret;
  450. rs5c372->regs[RS5C_REG_CTRL2] &= ~R2025_CTRL2_XST;
  451. } else {
  452. if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP))
  453. return ret;
  454. rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP;
  455. }
  456. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  457. buf[0] = rs5c372->regs[RS5C_REG_CTRL1];
  458. buf[1] = rs5c372->regs[RS5C_REG_CTRL2];
  459. /* use 24hr mode */
  460. switch (rs5c372->type) {
  461. case rtc_rs5c372a:
  462. case rtc_rs5c372b:
  463. buf[1] |= RS5C372_CTRL2_24;
  464. rs5c372->time24 = 1;
  465. break;
  466. case rtc_r2025sd:
  467. case rtc_rv5c386:
  468. case rtc_rv5c387a:
  469. buf[0] |= RV5C387_CTRL1_24;
  470. rs5c372->time24 = 1;
  471. break;
  472. default:
  473. /* impossible */
  474. break;
  475. }
  476. for (i = 0; i < sizeof(buf); i++) {
  477. addr = RS5C_ADDR(RS5C_REG_CTRL1 + i);
  478. ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]);
  479. if (unlikely(ret < 0))
  480. return ret;
  481. }
  482. rs5c372->regs[RS5C_REG_CTRL1] = buf[0];
  483. rs5c372->regs[RS5C_REG_CTRL2] = buf[1];
  484. return 0;
  485. }
  486. static int rs5c372_probe(struct i2c_client *client,
  487. const struct i2c_device_id *id)
  488. {
  489. int err = 0;
  490. int smbus_mode = 0;
  491. struct rs5c372 *rs5c372;
  492. struct rtc_time tm;
  493. dev_dbg(&client->dev, "%s\n", __func__);
  494. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
  495. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) {
  496. /*
  497. * If we don't have any master mode adapter, try breaking
  498. * it down in to the barest of capabilities.
  499. */
  500. if (i2c_check_functionality(client->adapter,
  501. I2C_FUNC_SMBUS_BYTE_DATA |
  502. I2C_FUNC_SMBUS_I2C_BLOCK))
  503. smbus_mode = 1;
  504. else {
  505. /* Still no good, give up */
  506. err = -ENODEV;
  507. goto exit;
  508. }
  509. }
  510. if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) {
  511. err = -ENOMEM;
  512. goto exit;
  513. }
  514. rs5c372->client = client;
  515. i2c_set_clientdata(client, rs5c372);
  516. rs5c372->type = id->driver_data;
  517. /* we read registers 0x0f then 0x00-0x0f; skip the first one */
  518. rs5c372->regs = &rs5c372->buf[1];
  519. rs5c372->smbus = smbus_mode;
  520. err = rs5c_get_regs(rs5c372);
  521. if (err < 0)
  522. goto exit_kfree;
  523. /* clock may be set for am/pm or 24 hr time */
  524. switch (rs5c372->type) {
  525. case rtc_rs5c372a:
  526. case rtc_rs5c372b:
  527. /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b.
  528. * so does periodic irq, except some 327a modes.
  529. */
  530. if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24)
  531. rs5c372->time24 = 1;
  532. break;
  533. case rtc_r2025sd:
  534. case rtc_rv5c386:
  535. case rtc_rv5c387a:
  536. if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24)
  537. rs5c372->time24 = 1;
  538. /* alarm uses ALARM_W; and nINTRB for alarm and periodic
  539. * irq, on both 386 and 387
  540. */
  541. break;
  542. default:
  543. dev_err(&client->dev, "unknown RTC type\n");
  544. goto exit_kfree;
  545. }
  546. /* if the oscillator lost power and no other software (like
  547. * the bootloader) set it up, do it here.
  548. *
  549. * The R2025S/D does this a little differently than the other
  550. * parts, so we special case that..
  551. */
  552. err = rs5c_oscillator_setup(rs5c372);
  553. if (unlikely(err < 0)) {
  554. dev_err(&client->dev, "setup error\n");
  555. goto exit_kfree;
  556. }
  557. if (rs5c372_get_datetime(client, &tm) < 0)
  558. dev_warn(&client->dev, "clock needs to be set\n");
  559. dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n",
  560. ({ char *s; switch (rs5c372->type) {
  561. case rtc_r2025sd: s = "r2025sd"; break;
  562. case rtc_rs5c372a: s = "rs5c372a"; break;
  563. case rtc_rs5c372b: s = "rs5c372b"; break;
  564. case rtc_rv5c386: s = "rv5c386"; break;
  565. case rtc_rv5c387a: s = "rv5c387a"; break;
  566. default: s = "chip"; break;
  567. }; s;}),
  568. rs5c372->time24 ? "24hr" : "am/pm"
  569. );
  570. /* REVISIT use client->irq to register alarm irq ... */
  571. rs5c372->rtc = rtc_device_register(rs5c372_driver.driver.name,
  572. &client->dev, &rs5c372_rtc_ops, THIS_MODULE);
  573. if (IS_ERR(rs5c372->rtc)) {
  574. err = PTR_ERR(rs5c372->rtc);
  575. goto exit_kfree;
  576. }
  577. err = rs5c_sysfs_register(&client->dev);
  578. if (err)
  579. goto exit_devreg;
  580. return 0;
  581. exit_devreg:
  582. rtc_device_unregister(rs5c372->rtc);
  583. exit_kfree:
  584. kfree(rs5c372);
  585. exit:
  586. return err;
  587. }
  588. static int rs5c372_remove(struct i2c_client *client)
  589. {
  590. struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
  591. rtc_device_unregister(rs5c372->rtc);
  592. rs5c_sysfs_unregister(&client->dev);
  593. kfree(rs5c372);
  594. return 0;
  595. }
  596. static struct i2c_driver rs5c372_driver = {
  597. .driver = {
  598. .name = "rtc-rs5c372",
  599. },
  600. .probe = rs5c372_probe,
  601. .remove = rs5c372_remove,
  602. .id_table = rs5c372_id,
  603. };
  604. static __init int rs5c372_init(void)
  605. {
  606. return i2c_add_driver(&rs5c372_driver);
  607. }
  608. static __exit void rs5c372_exit(void)
  609. {
  610. i2c_del_driver(&rs5c372_driver);
  611. }
  612. module_init(rs5c372_init);
  613. module_exit(rs5c372_exit);
  614. MODULE_AUTHOR(
  615. "Pavel Mironchik <pmironchik@optifacio.net>, "
  616. "Alessandro Zummo <a.zummo@towertech.it>, "
  617. "Paul Mundt <lethal@linux-sh.org>");
  618. MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver");
  619. MODULE_LICENSE("GPL");
  620. MODULE_VERSION(DRV_VERSION);