rtc-omap.c 13 KB

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  1. /*
  2. * TI OMAP1 Real Time Clock interface for Linux
  3. *
  4. * Copyright (C) 2003 MontaVista Software, Inc.
  5. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  6. *
  7. * Copyright (C) 2006 David Brownell (new RTC framework)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/ioport.h>
  18. #include <linux/delay.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/platform_device.h>
  22. #include <asm/io.h>
  23. /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  24. * with century-range alarm matching, driven by the 32kHz clock.
  25. *
  26. * The main user-visible ways it differs from PC RTCs are by omitting
  27. * "don't care" alarm fields and sub-second periodic IRQs, and having
  28. * an autoadjust mechanism to calibrate to the true oscillator rate.
  29. *
  30. * Board-specific wiring options include using split power mode with
  31. * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  32. * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  33. * low power modes) for OMAP1 boards (OMAP-L138 has this built into
  34. * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  35. */
  36. #define OMAP_RTC_BASE 0xfffb4800
  37. /* RTC registers */
  38. #define OMAP_RTC_SECONDS_REG 0x00
  39. #define OMAP_RTC_MINUTES_REG 0x04
  40. #define OMAP_RTC_HOURS_REG 0x08
  41. #define OMAP_RTC_DAYS_REG 0x0C
  42. #define OMAP_RTC_MONTHS_REG 0x10
  43. #define OMAP_RTC_YEARS_REG 0x14
  44. #define OMAP_RTC_WEEKS_REG 0x18
  45. #define OMAP_RTC_ALARM_SECONDS_REG 0x20
  46. #define OMAP_RTC_ALARM_MINUTES_REG 0x24
  47. #define OMAP_RTC_ALARM_HOURS_REG 0x28
  48. #define OMAP_RTC_ALARM_DAYS_REG 0x2c
  49. #define OMAP_RTC_ALARM_MONTHS_REG 0x30
  50. #define OMAP_RTC_ALARM_YEARS_REG 0x34
  51. #define OMAP_RTC_CTRL_REG 0x40
  52. #define OMAP_RTC_STATUS_REG 0x44
  53. #define OMAP_RTC_INTERRUPTS_REG 0x48
  54. #define OMAP_RTC_COMP_LSB_REG 0x4c
  55. #define OMAP_RTC_COMP_MSB_REG 0x50
  56. #define OMAP_RTC_OSC_REG 0x54
  57. /* OMAP_RTC_CTRL_REG bit fields: */
  58. #define OMAP_RTC_CTRL_SPLIT (1<<7)
  59. #define OMAP_RTC_CTRL_DISABLE (1<<6)
  60. #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
  61. #define OMAP_RTC_CTRL_TEST (1<<4)
  62. #define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
  63. #define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
  64. #define OMAP_RTC_CTRL_ROUND_30S (1<<1)
  65. #define OMAP_RTC_CTRL_STOP (1<<0)
  66. /* OMAP_RTC_STATUS_REG bit fields: */
  67. #define OMAP_RTC_STATUS_POWER_UP (1<<7)
  68. #define OMAP_RTC_STATUS_ALARM (1<<6)
  69. #define OMAP_RTC_STATUS_1D_EVENT (1<<5)
  70. #define OMAP_RTC_STATUS_1H_EVENT (1<<4)
  71. #define OMAP_RTC_STATUS_1M_EVENT (1<<3)
  72. #define OMAP_RTC_STATUS_1S_EVENT (1<<2)
  73. #define OMAP_RTC_STATUS_RUN (1<<1)
  74. #define OMAP_RTC_STATUS_BUSY (1<<0)
  75. /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  76. #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
  77. #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
  78. static void __iomem *rtc_base;
  79. #define rtc_read(addr) __raw_readb(rtc_base + (addr))
  80. #define rtc_write(val, addr) __raw_writeb(val, rtc_base + (addr))
  81. /* we rely on the rtc framework to handle locking (rtc->ops_lock),
  82. * so the only other requirement is that register accesses which
  83. * require BUSY to be clear are made with IRQs locally disabled
  84. */
  85. static void rtc_wait_not_busy(void)
  86. {
  87. int count = 0;
  88. u8 status;
  89. /* BUSY may stay active for 1/32768 second (~30 usec) */
  90. for (count = 0; count < 50; count++) {
  91. status = rtc_read(OMAP_RTC_STATUS_REG);
  92. if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
  93. break;
  94. udelay(1);
  95. }
  96. /* now we have ~15 usec to read/write various registers */
  97. }
  98. static irqreturn_t rtc_irq(int irq, void *rtc)
  99. {
  100. unsigned long events = 0;
  101. u8 irq_data;
  102. irq_data = rtc_read(OMAP_RTC_STATUS_REG);
  103. /* alarm irq? */
  104. if (irq_data & OMAP_RTC_STATUS_ALARM) {
  105. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  106. events |= RTC_IRQF | RTC_AF;
  107. }
  108. /* 1/sec periodic/update irq? */
  109. if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
  110. events |= RTC_IRQF | RTC_UF;
  111. rtc_update_irq(rtc, 1, events);
  112. return IRQ_HANDLED;
  113. }
  114. #ifdef CONFIG_RTC_INTF_DEV
  115. static int
  116. omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  117. {
  118. u8 reg;
  119. switch (cmd) {
  120. case RTC_AIE_OFF:
  121. case RTC_AIE_ON:
  122. case RTC_UIE_OFF:
  123. case RTC_UIE_ON:
  124. break;
  125. default:
  126. return -ENOIOCTLCMD;
  127. }
  128. local_irq_disable();
  129. rtc_wait_not_busy();
  130. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  131. switch (cmd) {
  132. /* AIE = Alarm Interrupt Enable */
  133. case RTC_AIE_OFF:
  134. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  135. break;
  136. case RTC_AIE_ON:
  137. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  138. break;
  139. /* UIE = Update Interrupt Enable (1/second) */
  140. case RTC_UIE_OFF:
  141. reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER;
  142. break;
  143. case RTC_UIE_ON:
  144. reg |= OMAP_RTC_INTERRUPTS_IT_TIMER;
  145. break;
  146. }
  147. rtc_wait_not_busy();
  148. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  149. local_irq_enable();
  150. return 0;
  151. }
  152. #else
  153. #define omap_rtc_ioctl NULL
  154. #endif
  155. /* this hardware doesn't support "don't care" alarm fields */
  156. static int tm2bcd(struct rtc_time *tm)
  157. {
  158. if (rtc_valid_tm(tm) != 0)
  159. return -EINVAL;
  160. tm->tm_sec = bin2bcd(tm->tm_sec);
  161. tm->tm_min = bin2bcd(tm->tm_min);
  162. tm->tm_hour = bin2bcd(tm->tm_hour);
  163. tm->tm_mday = bin2bcd(tm->tm_mday);
  164. tm->tm_mon = bin2bcd(tm->tm_mon + 1);
  165. /* epoch == 1900 */
  166. if (tm->tm_year < 100 || tm->tm_year > 199)
  167. return -EINVAL;
  168. tm->tm_year = bin2bcd(tm->tm_year - 100);
  169. return 0;
  170. }
  171. static void bcd2tm(struct rtc_time *tm)
  172. {
  173. tm->tm_sec = bcd2bin(tm->tm_sec);
  174. tm->tm_min = bcd2bin(tm->tm_min);
  175. tm->tm_hour = bcd2bin(tm->tm_hour);
  176. tm->tm_mday = bcd2bin(tm->tm_mday);
  177. tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
  178. /* epoch == 1900 */
  179. tm->tm_year = bcd2bin(tm->tm_year) + 100;
  180. }
  181. static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
  182. {
  183. /* we don't report wday/yday/isdst ... */
  184. local_irq_disable();
  185. rtc_wait_not_busy();
  186. tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
  187. tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
  188. tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
  189. tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
  190. tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
  191. tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
  192. local_irq_enable();
  193. bcd2tm(tm);
  194. return 0;
  195. }
  196. static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
  197. {
  198. if (tm2bcd(tm) < 0)
  199. return -EINVAL;
  200. local_irq_disable();
  201. rtc_wait_not_busy();
  202. rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
  203. rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
  204. rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
  205. rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
  206. rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
  207. rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
  208. local_irq_enable();
  209. return 0;
  210. }
  211. static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  212. {
  213. local_irq_disable();
  214. rtc_wait_not_busy();
  215. alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
  216. alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
  217. alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
  218. alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
  219. alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
  220. alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
  221. local_irq_enable();
  222. bcd2tm(&alm->time);
  223. alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
  224. & OMAP_RTC_INTERRUPTS_IT_ALARM);
  225. return 0;
  226. }
  227. static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  228. {
  229. u8 reg;
  230. if (tm2bcd(&alm->time) < 0)
  231. return -EINVAL;
  232. local_irq_disable();
  233. rtc_wait_not_busy();
  234. rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
  235. rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
  236. rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
  237. rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
  238. rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
  239. rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
  240. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  241. if (alm->enabled)
  242. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  243. else
  244. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  245. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  246. local_irq_enable();
  247. return 0;
  248. }
  249. static struct rtc_class_ops omap_rtc_ops = {
  250. .ioctl = omap_rtc_ioctl,
  251. .read_time = omap_rtc_read_time,
  252. .set_time = omap_rtc_set_time,
  253. .read_alarm = omap_rtc_read_alarm,
  254. .set_alarm = omap_rtc_set_alarm,
  255. };
  256. static int omap_rtc_alarm;
  257. static int omap_rtc_timer;
  258. static int __init omap_rtc_probe(struct platform_device *pdev)
  259. {
  260. struct resource *res, *mem;
  261. struct rtc_device *rtc;
  262. u8 reg, new_ctrl;
  263. omap_rtc_timer = platform_get_irq(pdev, 0);
  264. if (omap_rtc_timer <= 0) {
  265. pr_debug("%s: no update irq?\n", pdev->name);
  266. return -ENOENT;
  267. }
  268. omap_rtc_alarm = platform_get_irq(pdev, 1);
  269. if (omap_rtc_alarm <= 0) {
  270. pr_debug("%s: no alarm irq?\n", pdev->name);
  271. return -ENOENT;
  272. }
  273. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  274. if (!res) {
  275. pr_debug("%s: RTC resource data missing\n", pdev->name);
  276. return -ENOENT;
  277. }
  278. mem = request_mem_region(res->start, resource_size(res), pdev->name);
  279. if (!mem) {
  280. pr_debug("%s: RTC registers at %08x are not free\n",
  281. pdev->name, res->start);
  282. return -EBUSY;
  283. }
  284. rtc_base = ioremap(res->start, resource_size(res));
  285. if (!rtc_base) {
  286. pr_debug("%s: RTC registers can't be mapped\n", pdev->name);
  287. goto fail;
  288. }
  289. rtc = rtc_device_register(pdev->name, &pdev->dev,
  290. &omap_rtc_ops, THIS_MODULE);
  291. if (IS_ERR(rtc)) {
  292. pr_debug("%s: can't register RTC device, err %ld\n",
  293. pdev->name, PTR_ERR(rtc));
  294. goto fail0;
  295. }
  296. platform_set_drvdata(pdev, rtc);
  297. dev_set_drvdata(&rtc->dev, mem);
  298. /* clear pending irqs, and set 1/second periodic,
  299. * which we'll use instead of update irqs
  300. */
  301. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  302. /* clear old status */
  303. reg = rtc_read(OMAP_RTC_STATUS_REG);
  304. if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
  305. pr_info("%s: RTC power up reset detected\n",
  306. pdev->name);
  307. rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
  308. }
  309. if (reg & (u8) OMAP_RTC_STATUS_ALARM)
  310. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  311. /* handle periodic and alarm irqs */
  312. if (request_irq(omap_rtc_timer, rtc_irq, IRQF_DISABLED,
  313. dev_name(&rtc->dev), rtc)) {
  314. pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
  315. pdev->name, omap_rtc_timer);
  316. goto fail1;
  317. }
  318. if ((omap_rtc_timer != omap_rtc_alarm) &&
  319. (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED,
  320. dev_name(&rtc->dev), rtc))) {
  321. pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
  322. pdev->name, omap_rtc_alarm);
  323. goto fail2;
  324. }
  325. /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
  326. reg = rtc_read(OMAP_RTC_CTRL_REG);
  327. if (reg & (u8) OMAP_RTC_CTRL_STOP)
  328. pr_info("%s: already running\n", pdev->name);
  329. /* force to 24 hour mode */
  330. new_ctrl = reg & ~(OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
  331. new_ctrl |= OMAP_RTC_CTRL_STOP;
  332. /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
  333. *
  334. * - Device wake-up capability setting should come through chip
  335. * init logic. OMAP1 boards should initialize the "wakeup capable"
  336. * flag in the platform device if the board is wired right for
  337. * being woken up by RTC alarm. For OMAP-L138, this capability
  338. * is built into the SoC by the "Deep Sleep" capability.
  339. *
  340. * - Boards wired so RTC_ON_nOFF is used as the reset signal,
  341. * rather than nPWRON_RESET, should forcibly enable split
  342. * power mode. (Some chip errata report that RTC_CTRL_SPLIT
  343. * is write-only, and always reads as zero...)
  344. */
  345. if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
  346. pr_info("%s: split power mode\n", pdev->name);
  347. if (reg != new_ctrl)
  348. rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
  349. return 0;
  350. fail2:
  351. free_irq(omap_rtc_timer, NULL);
  352. fail1:
  353. rtc_device_unregister(rtc);
  354. fail0:
  355. iounmap(rtc_base);
  356. fail:
  357. release_resource(mem);
  358. return -EIO;
  359. }
  360. static int __exit omap_rtc_remove(struct platform_device *pdev)
  361. {
  362. struct rtc_device *rtc = platform_get_drvdata(pdev);
  363. device_init_wakeup(&pdev->dev, 0);
  364. /* leave rtc running, but disable irqs */
  365. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  366. free_irq(omap_rtc_timer, rtc);
  367. if (omap_rtc_timer != omap_rtc_alarm)
  368. free_irq(omap_rtc_alarm, rtc);
  369. release_resource(dev_get_drvdata(&rtc->dev));
  370. rtc_device_unregister(rtc);
  371. return 0;
  372. }
  373. #ifdef CONFIG_PM
  374. static u8 irqstat;
  375. static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  376. {
  377. irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  378. /* FIXME the RTC alarm is not currently acting as a wakeup event
  379. * source, and in fact this enable() call is just saving a flag
  380. * that's never used...
  381. */
  382. if (device_may_wakeup(&pdev->dev))
  383. enable_irq_wake(omap_rtc_alarm);
  384. else
  385. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  386. return 0;
  387. }
  388. static int omap_rtc_resume(struct platform_device *pdev)
  389. {
  390. if (device_may_wakeup(&pdev->dev))
  391. disable_irq_wake(omap_rtc_alarm);
  392. else
  393. rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
  394. return 0;
  395. }
  396. #else
  397. #define omap_rtc_suspend NULL
  398. #define omap_rtc_resume NULL
  399. #endif
  400. static void omap_rtc_shutdown(struct platform_device *pdev)
  401. {
  402. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  403. }
  404. MODULE_ALIAS("platform:omap_rtc");
  405. static struct platform_driver omap_rtc_driver = {
  406. .remove = __exit_p(omap_rtc_remove),
  407. .suspend = omap_rtc_suspend,
  408. .resume = omap_rtc_resume,
  409. .shutdown = omap_rtc_shutdown,
  410. .driver = {
  411. .name = "omap_rtc",
  412. .owner = THIS_MODULE,
  413. },
  414. };
  415. static int __init rtc_init(void)
  416. {
  417. return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe);
  418. }
  419. module_init(rtc_init);
  420. static void __exit rtc_exit(void)
  421. {
  422. platform_driver_unregister(&omap_rtc_driver);
  423. }
  424. module_exit(rtc_exit);
  425. MODULE_AUTHOR("George G. Davis (and others)");
  426. MODULE_LICENSE("GPL");