lp3972.c 16 KB

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  1. /*
  2. * Regulator driver for National Semiconductors LP3972 PMIC chip
  3. *
  4. * Based on lp3971.c
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. #include <linux/bug.h>
  12. #include <linux/err.h>
  13. #include <linux/i2c.h>
  14. #include <linux/kernel.h>
  15. #include <linux/regulator/driver.h>
  16. #include <linux/regulator/lp3972.h>
  17. #include <linux/slab.h>
  18. struct lp3972 {
  19. struct device *dev;
  20. struct mutex io_lock;
  21. struct i2c_client *i2c;
  22. int num_regulators;
  23. struct regulator_dev **rdev;
  24. };
  25. /* LP3972 Control Registers */
  26. #define LP3972_SCR_REG 0x07
  27. #define LP3972_OVER1_REG 0x10
  28. #define LP3972_OVSR1_REG 0x11
  29. #define LP3972_OVER2_REG 0x12
  30. #define LP3972_OVSR2_REG 0x13
  31. #define LP3972_VCC1_REG 0x20
  32. #define LP3972_ADTV1_REG 0x23
  33. #define LP3972_ADTV2_REG 0x24
  34. #define LP3972_AVRC_REG 0x25
  35. #define LP3972_CDTC1_REG 0x26
  36. #define LP3972_CDTC2_REG 0x27
  37. #define LP3972_SDTV1_REG 0x29
  38. #define LP3972_SDTV2_REG 0x2A
  39. #define LP3972_MDTV1_REG 0x32
  40. #define LP3972_MDTV2_REG 0x33
  41. #define LP3972_L2VCR_REG 0x39
  42. #define LP3972_L34VCR_REG 0x3A
  43. #define LP3972_SCR1_REG 0x80
  44. #define LP3972_SCR2_REG 0x81
  45. #define LP3972_OEN3_REG 0x82
  46. #define LP3972_OSR3_REG 0x83
  47. #define LP3972_LOER4_REG 0x84
  48. #define LP3972_B2TV_REG 0x85
  49. #define LP3972_B3TV_REG 0x86
  50. #define LP3972_B32RC_REG 0x87
  51. #define LP3972_ISRA_REG 0x88
  52. #define LP3972_BCCR_REG 0x89
  53. #define LP3972_II1RR_REG 0x8E
  54. #define LP3972_II2RR_REG 0x8F
  55. #define LP3972_SYS_CONTROL1_REG LP3972_SCR1_REG
  56. /* System control register 1 initial value,
  57. * bits 5, 6 and 7 are EPROM programmable */
  58. #define SYS_CONTROL1_INIT_VAL 0x02
  59. #define SYS_CONTROL1_INIT_MASK 0x1F
  60. #define LP3972_VOL_CHANGE_REG LP3972_VCC1_REG
  61. #define LP3972_VOL_CHANGE_FLAG_GO 0x01
  62. #define LP3972_VOL_CHANGE_FLAG_MASK 0x03
  63. /* LDO output enable mask */
  64. #define LP3972_OEN3_L1EN BIT(0)
  65. #define LP3972_OVER2_LDO2_EN BIT(2)
  66. #define LP3972_OVER2_LDO3_EN BIT(3)
  67. #define LP3972_OVER2_LDO4_EN BIT(4)
  68. #define LP3972_OVER1_S_EN BIT(2)
  69. static const int ldo1_voltage_map[] = {
  70. 1700, 1725, 1750, 1775, 1800, 1825, 1850, 1875,
  71. 1900, 1925, 1950, 1975, 2000,
  72. };
  73. static const int ldo23_voltage_map[] = {
  74. 1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500,
  75. 2600, 2700, 2800, 2900, 3000, 3100, 3200, 3300,
  76. };
  77. static const int ldo4_voltage_map[] = {
  78. 1000, 1050, 1100, 1150, 1200, 1250, 1300, 1350,
  79. 1400, 1500, 1800, 1900, 2500, 2800, 3000, 3300,
  80. };
  81. static const int ldo5_voltage_map[] = {
  82. 0, 0, 0, 0, 0, 850, 875, 900,
  83. 925, 950, 975, 1000, 1025, 1050, 1075, 1100,
  84. 1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300,
  85. 1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500,
  86. };
  87. static const int buck1_voltage_map[] = {
  88. 725, 750, 775, 800, 825, 850, 875, 900,
  89. 925, 950, 975, 1000, 1025, 1050, 1075, 1100,
  90. 1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300,
  91. 1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500,
  92. };
  93. static const int buck23_voltage_map[] = {
  94. 0, 800, 850, 900, 950, 1000, 1050, 1100,
  95. 1150, 1200, 1250, 1300, 1350, 1400, 1450, 1500,
  96. 1550, 1600, 1650, 1700, 1800, 1900, 2500, 2800,
  97. 3000, 3300,
  98. };
  99. static const int *ldo_voltage_map[] = {
  100. ldo1_voltage_map,
  101. ldo23_voltage_map,
  102. ldo23_voltage_map,
  103. ldo4_voltage_map,
  104. ldo5_voltage_map,
  105. };
  106. static const int *buck_voltage_map[] = {
  107. buck1_voltage_map,
  108. buck23_voltage_map,
  109. buck23_voltage_map,
  110. };
  111. static const int ldo_output_enable_mask[] = {
  112. LP3972_OEN3_L1EN,
  113. LP3972_OVER2_LDO2_EN,
  114. LP3972_OVER2_LDO3_EN,
  115. LP3972_OVER2_LDO4_EN,
  116. LP3972_OVER1_S_EN,
  117. };
  118. static const int ldo_output_enable_addr[] = {
  119. LP3972_OEN3_REG,
  120. LP3972_OVER2_REG,
  121. LP3972_OVER2_REG,
  122. LP3972_OVER2_REG,
  123. LP3972_OVER1_REG,
  124. };
  125. static const int ldo_vol_ctl_addr[] = {
  126. LP3972_MDTV1_REG,
  127. LP3972_L2VCR_REG,
  128. LP3972_L34VCR_REG,
  129. LP3972_L34VCR_REG,
  130. LP3972_SDTV1_REG,
  131. };
  132. static const int buck_vol_enable_addr[] = {
  133. LP3972_OVER1_REG,
  134. LP3972_OEN3_REG,
  135. LP3972_OEN3_REG,
  136. };
  137. static const int buck_base_addr[] = {
  138. LP3972_ADTV1_REG,
  139. LP3972_B2TV_REG,
  140. LP3972_B3TV_REG,
  141. };
  142. #define LP3972_LDO_VOL_VALUE_MAP(x) (ldo_voltage_map[x])
  143. #define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x])
  144. #define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x])
  145. /* LDO voltage control registers shift:
  146. LP3972_LDO1 -> 0, LP3972_LDO2 -> 4
  147. LP3972_LDO3 -> 0, LP3972_LDO4 -> 4
  148. LP3972_LDO5 -> 0
  149. */
  150. #define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2)
  151. #define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x])
  152. #define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6)
  153. #define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f)
  154. #define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00)
  155. #define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c)
  156. #define LP3972_BUCK_VOL_VALUE_MAP(x) (buck_voltage_map[x])
  157. #define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x])
  158. #define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x])
  159. #define LP3972_BUCK_VOL_MASK 0x1f
  160. #define LP3972_BUCK_VOL_MIN_IDX(x) ((x) ? 0x01 : 0x00)
  161. #define LP3972_BUCK_VOL_MAX_IDX(x) ((x) ? 0x19 : 0x1f)
  162. static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count,
  163. u16 *dest)
  164. {
  165. int ret;
  166. if (count != 1)
  167. return -EIO;
  168. ret = i2c_smbus_read_byte_data(i2c, reg);
  169. if (ret < 0)
  170. return ret;
  171. *dest = ret;
  172. return 0;
  173. }
  174. static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count,
  175. const u16 *src)
  176. {
  177. if (count != 1)
  178. return -EIO;
  179. return i2c_smbus_write_byte_data(i2c, reg, *src);
  180. }
  181. static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg)
  182. {
  183. u16 val = 0;
  184. mutex_lock(&lp3972->io_lock);
  185. lp3972_i2c_read(lp3972->i2c, reg, 1, &val);
  186. dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg,
  187. (unsigned)val & 0xff);
  188. mutex_unlock(&lp3972->io_lock);
  189. return val & 0xff;
  190. }
  191. static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val)
  192. {
  193. u16 tmp;
  194. int ret;
  195. mutex_lock(&lp3972->io_lock);
  196. ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp);
  197. tmp = (tmp & ~mask) | val;
  198. if (ret == 0) {
  199. ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp);
  200. dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg,
  201. (unsigned)val & 0xff);
  202. }
  203. mutex_unlock(&lp3972->io_lock);
  204. return ret;
  205. }
  206. static int lp3972_ldo_list_voltage(struct regulator_dev *dev, unsigned index)
  207. {
  208. int ldo = rdev_get_id(dev) - LP3972_LDO1;
  209. return 1000 * LP3972_LDO_VOL_VALUE_MAP(ldo)[index];
  210. }
  211. static int lp3972_ldo_is_enabled(struct regulator_dev *dev)
  212. {
  213. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  214. int ldo = rdev_get_id(dev) - LP3972_LDO1;
  215. u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
  216. u16 val;
  217. val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo));
  218. return !!(val & mask);
  219. }
  220. static int lp3972_ldo_enable(struct regulator_dev *dev)
  221. {
  222. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  223. int ldo = rdev_get_id(dev) - LP3972_LDO1;
  224. u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
  225. return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
  226. mask, mask);
  227. }
  228. static int lp3972_ldo_disable(struct regulator_dev *dev)
  229. {
  230. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  231. int ldo = rdev_get_id(dev) - LP3972_LDO1;
  232. u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
  233. return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
  234. mask, 0);
  235. }
  236. static int lp3972_ldo_get_voltage(struct regulator_dev *dev)
  237. {
  238. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  239. int ldo = rdev_get_id(dev) - LP3972_LDO1;
  240. u16 mask = LP3972_LDO_VOL_MASK(ldo);
  241. u16 val, reg;
  242. reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo));
  243. val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask;
  244. return 1000 * LP3972_LDO_VOL_VALUE_MAP(ldo)[val];
  245. }
  246. static int lp3972_ldo_set_voltage(struct regulator_dev *dev,
  247. int min_uV, int max_uV)
  248. {
  249. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  250. int ldo = rdev_get_id(dev) - LP3972_LDO1;
  251. int min_vol = min_uV / 1000, max_vol = max_uV / 1000;
  252. const int *vol_map = LP3972_LDO_VOL_VALUE_MAP(ldo);
  253. u16 val;
  254. int shift, ret;
  255. if (min_vol < vol_map[LP3972_LDO_VOL_MIN_IDX(ldo)] ||
  256. min_vol > vol_map[LP3972_LDO_VOL_MAX_IDX(ldo)])
  257. return -EINVAL;
  258. for (val = LP3972_LDO_VOL_MIN_IDX(ldo);
  259. val <= LP3972_LDO_VOL_MAX_IDX(ldo); val++)
  260. if (vol_map[val] >= min_vol)
  261. break;
  262. if (val > LP3972_LDO_VOL_MAX_IDX(ldo) || vol_map[val] > max_vol)
  263. return -EINVAL;
  264. shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);
  265. ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo),
  266. LP3972_LDO_VOL_MASK(ldo) << shift, val << shift);
  267. if (ret)
  268. return ret;
  269. /*
  270. * LDO1 and LDO5 support voltage control by either target voltage1
  271. * or target voltage2 register.
  272. * We use target voltage1 register for LDO1 and LDO5 in this driver.
  273. * We need to update voltage change control register(0x20) to enable
  274. * LDO1 and LDO5 to change to their programmed target values.
  275. */
  276. switch (ldo) {
  277. case LP3972_LDO1:
  278. case LP3972_LDO5:
  279. shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo);
  280. ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
  281. LP3972_VOL_CHANGE_FLAG_MASK << shift,
  282. LP3972_VOL_CHANGE_FLAG_GO << shift);
  283. if (ret)
  284. return ret;
  285. ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
  286. LP3972_VOL_CHANGE_FLAG_MASK << shift, 0);
  287. break;
  288. }
  289. return ret;
  290. }
  291. static struct regulator_ops lp3972_ldo_ops = {
  292. .list_voltage = lp3972_ldo_list_voltage,
  293. .is_enabled = lp3972_ldo_is_enabled,
  294. .enable = lp3972_ldo_enable,
  295. .disable = lp3972_ldo_disable,
  296. .get_voltage = lp3972_ldo_get_voltage,
  297. .set_voltage = lp3972_ldo_set_voltage,
  298. };
  299. static int lp3972_dcdc_list_voltage(struct regulator_dev *dev, unsigned index)
  300. {
  301. int buck = rdev_get_id(dev) - LP3972_DCDC1;
  302. return 1000 * buck_voltage_map[buck][index];
  303. }
  304. static int lp3972_dcdc_is_enabled(struct regulator_dev *dev)
  305. {
  306. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  307. int buck = rdev_get_id(dev) - LP3972_DCDC1;
  308. u16 mask = 1 << (buck * 2);
  309. u16 val;
  310. val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck));
  311. return !!(val & mask);
  312. }
  313. static int lp3972_dcdc_enable(struct regulator_dev *dev)
  314. {
  315. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  316. int buck = rdev_get_id(dev) - LP3972_DCDC1;
  317. u16 mask = 1 << (buck * 2);
  318. u16 val;
  319. val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
  320. mask, mask);
  321. return val;
  322. }
  323. static int lp3972_dcdc_disable(struct regulator_dev *dev)
  324. {
  325. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  326. int buck = rdev_get_id(dev) - LP3972_DCDC1;
  327. u16 mask = 1 << (buck * 2);
  328. u16 val;
  329. val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
  330. mask, 0);
  331. return val;
  332. }
  333. static int lp3972_dcdc_get_voltage(struct regulator_dev *dev)
  334. {
  335. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  336. int buck = rdev_get_id(dev) - LP3972_DCDC1;
  337. u16 reg;
  338. int val;
  339. reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck));
  340. reg &= LP3972_BUCK_VOL_MASK;
  341. if (reg <= LP3972_BUCK_VOL_MAX_IDX(buck))
  342. val = 1000 * buck_voltage_map[buck][reg];
  343. else {
  344. val = 0;
  345. dev_warn(&dev->dev, "chip reported incorrect voltage value."
  346. " reg = %d\n", reg);
  347. }
  348. return val;
  349. }
  350. static int lp3972_dcdc_set_voltage(struct regulator_dev *dev,
  351. int min_uV, int max_uV)
  352. {
  353. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  354. int buck = rdev_get_id(dev) - LP3972_DCDC1;
  355. int min_vol = min_uV / 1000, max_vol = max_uV / 1000;
  356. const int *vol_map = buck_voltage_map[buck];
  357. u16 val;
  358. int ret;
  359. if (min_vol < vol_map[LP3972_BUCK_VOL_MIN_IDX(buck)] ||
  360. min_vol > vol_map[LP3972_BUCK_VOL_MAX_IDX(buck)])
  361. return -EINVAL;
  362. for (val = LP3972_BUCK_VOL_MIN_IDX(buck);
  363. val <= LP3972_BUCK_VOL_MAX_IDX(buck); val++)
  364. if (vol_map[val] >= min_vol)
  365. break;
  366. if (val > LP3972_BUCK_VOL_MAX_IDX(buck) ||
  367. vol_map[val] > max_vol)
  368. return -EINVAL;
  369. ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck),
  370. LP3972_BUCK_VOL_MASK, val);
  371. if (ret)
  372. return ret;
  373. if (buck != 0)
  374. return ret;
  375. ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
  376. LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO);
  377. if (ret)
  378. return ret;
  379. return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
  380. LP3972_VOL_CHANGE_FLAG_MASK, 0);
  381. }
  382. static struct regulator_ops lp3972_dcdc_ops = {
  383. .list_voltage = lp3972_dcdc_list_voltage,
  384. .is_enabled = lp3972_dcdc_is_enabled,
  385. .enable = lp3972_dcdc_enable,
  386. .disable = lp3972_dcdc_disable,
  387. .get_voltage = lp3972_dcdc_get_voltage,
  388. .set_voltage = lp3972_dcdc_set_voltage,
  389. };
  390. static struct regulator_desc regulators[] = {
  391. {
  392. .name = "LDO1",
  393. .id = LP3972_LDO1,
  394. .ops = &lp3972_ldo_ops,
  395. .n_voltages = ARRAY_SIZE(ldo1_voltage_map),
  396. .type = REGULATOR_VOLTAGE,
  397. .owner = THIS_MODULE,
  398. },
  399. {
  400. .name = "LDO2",
  401. .id = LP3972_LDO2,
  402. .ops = &lp3972_ldo_ops,
  403. .n_voltages = ARRAY_SIZE(ldo23_voltage_map),
  404. .type = REGULATOR_VOLTAGE,
  405. .owner = THIS_MODULE,
  406. },
  407. {
  408. .name = "LDO3",
  409. .id = LP3972_LDO3,
  410. .ops = &lp3972_ldo_ops,
  411. .n_voltages = ARRAY_SIZE(ldo23_voltage_map),
  412. .type = REGULATOR_VOLTAGE,
  413. .owner = THIS_MODULE,
  414. },
  415. {
  416. .name = "LDO4",
  417. .id = LP3972_LDO4,
  418. .ops = &lp3972_ldo_ops,
  419. .n_voltages = ARRAY_SIZE(ldo4_voltage_map),
  420. .type = REGULATOR_VOLTAGE,
  421. .owner = THIS_MODULE,
  422. },
  423. {
  424. .name = "LDO5",
  425. .id = LP3972_LDO5,
  426. .ops = &lp3972_ldo_ops,
  427. .n_voltages = ARRAY_SIZE(ldo5_voltage_map),
  428. .type = REGULATOR_VOLTAGE,
  429. .owner = THIS_MODULE,
  430. },
  431. {
  432. .name = "DCDC1",
  433. .id = LP3972_DCDC1,
  434. .ops = &lp3972_dcdc_ops,
  435. .n_voltages = ARRAY_SIZE(buck1_voltage_map),
  436. .type = REGULATOR_VOLTAGE,
  437. .owner = THIS_MODULE,
  438. },
  439. {
  440. .name = "DCDC2",
  441. .id = LP3972_DCDC2,
  442. .ops = &lp3972_dcdc_ops,
  443. .n_voltages = ARRAY_SIZE(buck23_voltage_map),
  444. .type = REGULATOR_VOLTAGE,
  445. .owner = THIS_MODULE,
  446. },
  447. {
  448. .name = "DCDC3",
  449. .id = LP3972_DCDC3,
  450. .ops = &lp3972_dcdc_ops,
  451. .n_voltages = ARRAY_SIZE(buck23_voltage_map),
  452. .type = REGULATOR_VOLTAGE,
  453. .owner = THIS_MODULE,
  454. },
  455. };
  456. static int __devinit setup_regulators(struct lp3972 *lp3972,
  457. struct lp3972_platform_data *pdata)
  458. {
  459. int i, err;
  460. lp3972->num_regulators = pdata->num_regulators;
  461. lp3972->rdev = kcalloc(pdata->num_regulators,
  462. sizeof(struct regulator_dev *), GFP_KERNEL);
  463. if (!lp3972->rdev) {
  464. err = -ENOMEM;
  465. goto err_nomem;
  466. }
  467. /* Instantiate the regulators */
  468. for (i = 0; i < pdata->num_regulators; i++) {
  469. struct lp3972_regulator_subdev *reg = &pdata->regulators[i];
  470. lp3972->rdev[i] = regulator_register(&regulators[reg->id],
  471. lp3972->dev, reg->initdata, lp3972);
  472. if (IS_ERR(lp3972->rdev[i])) {
  473. err = PTR_ERR(lp3972->rdev[i]);
  474. dev_err(lp3972->dev, "regulator init failed: %d\n",
  475. err);
  476. goto error;
  477. }
  478. }
  479. return 0;
  480. error:
  481. while (--i >= 0)
  482. regulator_unregister(lp3972->rdev[i]);
  483. kfree(lp3972->rdev);
  484. lp3972->rdev = NULL;
  485. err_nomem:
  486. return err;
  487. }
  488. static int __devinit lp3972_i2c_probe(struct i2c_client *i2c,
  489. const struct i2c_device_id *id)
  490. {
  491. struct lp3972 *lp3972;
  492. struct lp3972_platform_data *pdata = i2c->dev.platform_data;
  493. int ret;
  494. u16 val;
  495. if (!pdata) {
  496. dev_dbg(&i2c->dev, "No platform init data supplied\n");
  497. return -ENODEV;
  498. }
  499. lp3972 = kzalloc(sizeof(struct lp3972), GFP_KERNEL);
  500. if (!lp3972)
  501. return -ENOMEM;
  502. lp3972->i2c = i2c;
  503. lp3972->dev = &i2c->dev;
  504. mutex_init(&lp3972->io_lock);
  505. /* Detect LP3972 */
  506. ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val);
  507. if (ret == 0 &&
  508. (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) {
  509. ret = -ENODEV;
  510. dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val);
  511. }
  512. if (ret < 0) {
  513. dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret);
  514. goto err_detect;
  515. }
  516. ret = setup_regulators(lp3972, pdata);
  517. if (ret < 0)
  518. goto err_detect;
  519. i2c_set_clientdata(i2c, lp3972);
  520. return 0;
  521. err_detect:
  522. kfree(lp3972);
  523. return ret;
  524. }
  525. static int __devexit lp3972_i2c_remove(struct i2c_client *i2c)
  526. {
  527. struct lp3972 *lp3972 = i2c_get_clientdata(i2c);
  528. int i;
  529. for (i = 0; i < lp3972->num_regulators; i++)
  530. regulator_unregister(lp3972->rdev[i]);
  531. kfree(lp3972->rdev);
  532. kfree(lp3972);
  533. return 0;
  534. }
  535. static const struct i2c_device_id lp3972_i2c_id[] = {
  536. { "lp3972", 0 },
  537. { }
  538. };
  539. MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id);
  540. static struct i2c_driver lp3972_i2c_driver = {
  541. .driver = {
  542. .name = "lp3972",
  543. .owner = THIS_MODULE,
  544. },
  545. .probe = lp3972_i2c_probe,
  546. .remove = __devexit_p(lp3972_i2c_remove),
  547. .id_table = lp3972_i2c_id,
  548. };
  549. static int __init lp3972_module_init(void)
  550. {
  551. return i2c_add_driver(&lp3972_i2c_driver);
  552. }
  553. subsys_initcall(lp3972_module_init);
  554. static void __exit lp3972_module_exit(void)
  555. {
  556. i2c_del_driver(&lp3972_i2c_driver);
  557. }
  558. module_exit(lp3972_module_exit);
  559. MODULE_LICENSE("GPL");
  560. MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>");
  561. MODULE_DESCRIPTION("LP3972 PMIC driver");