pmc551.c 25 KB

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  1. /*
  2. * PMC551 PCI Mezzanine Ram Device
  3. *
  4. * Author:
  5. * Mark Ferrell <mferrell@mvista.com>
  6. * Copyright 1999,2000 Nortel Networks
  7. *
  8. * License:
  9. * As part of this driver was derived from the slram.c driver it
  10. * falls under the same license, which is GNU General Public
  11. * License v2
  12. *
  13. * Description:
  14. * This driver is intended to support the PMC551 PCI Ram device
  15. * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
  16. * cPCI embedded systems. The device contains a single SROM
  17. * that initially programs the V370PDC chipset onboard the
  18. * device, and various banks of DRAM/SDRAM onboard. This driver
  19. * implements this PCI Ram device as an MTD (Memory Technology
  20. * Device) so that it can be used to hold a file system, or for
  21. * added swap space in embedded systems. Since the memory on
  22. * this board isn't as fast as main memory we do not try to hook
  23. * it into main memory as that would simply reduce performance
  24. * on the system. Using it as a block device allows us to use
  25. * it as high speed swap or for a high speed disk device of some
  26. * sort. Which becomes very useful on diskless systems in the
  27. * embedded market I might add.
  28. *
  29. * Notes:
  30. * Due to what I assume is more buggy SROM, the 64M PMC551 I
  31. * have available claims that all 4 of its DRAM banks have 64MiB
  32. * of ram configured (making a grand total of 256MiB onboard).
  33. * This is slightly annoying since the BAR0 size reflects the
  34. * aperture size, not the dram size, and the V370PDC supplies no
  35. * other method for memory size discovery. This problem is
  36. * mostly only relevant when compiled as a module, as the
  37. * unloading of the module with an aperture size smaller than
  38. * the ram will cause the driver to detect the onboard memory
  39. * size to be equal to the aperture size when the module is
  40. * reloaded. Soooo, to help, the module supports an msize
  41. * option to allow the specification of the onboard memory, and
  42. * an asize option, to allow the specification of the aperture
  43. * size. The aperture must be equal to or less then the memory
  44. * size, the driver will correct this if you screw it up. This
  45. * problem is not relevant for compiled in drivers as compiled
  46. * in drivers only init once.
  47. *
  48. * Credits:
  49. * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
  50. * initial example code of how to initialize this device and for
  51. * help with questions I had concerning operation of the device.
  52. *
  53. * Most of the MTD code for this driver was originally written
  54. * for the slram.o module in the MTD drivers package which
  55. * allows the mapping of system memory into an MTD device.
  56. * Since the PMC551 memory module is accessed in the same
  57. * fashion as system memory, the slram.c code became a very nice
  58. * fit to the needs of this driver. All we added was PCI
  59. * detection/initialization to the driver and automatically figure
  60. * out the size via the PCI detection.o, later changes by Corey
  61. * Minyard set up the card to utilize a 1M sliding apature.
  62. *
  63. * Corey Minyard <minyard@nortelnetworks.com>
  64. * * Modified driver to utilize a sliding aperture instead of
  65. * mapping all memory into kernel space which turned out to
  66. * be very wasteful.
  67. * * Located a bug in the SROM's initialization sequence that
  68. * made the memory unusable, added a fix to code to touch up
  69. * the DRAM some.
  70. *
  71. * Bugs/FIXMEs:
  72. * * MUST fix the init function to not spin on a register
  73. * waiting for it to set .. this does not safely handle busted
  74. * devices that never reset the register correctly which will
  75. * cause the system to hang w/ a reboot being the only chance at
  76. * recover. [sort of fixed, could be better]
  77. * * Add I2C handling of the SROM so we can read the SROM's information
  78. * about the aperture size. This should always accurately reflect the
  79. * onboard memory size.
  80. * * Comb the init routine. It's still a bit cludgy on a few things.
  81. */
  82. #include <linux/kernel.h>
  83. #include <linux/module.h>
  84. #include <asm/uaccess.h>
  85. #include <linux/types.h>
  86. #include <linux/init.h>
  87. #include <linux/ptrace.h>
  88. #include <linux/slab.h>
  89. #include <linux/string.h>
  90. #include <linux/timer.h>
  91. #include <linux/major.h>
  92. #include <linux/fs.h>
  93. #include <linux/ioctl.h>
  94. #include <asm/io.h>
  95. #include <asm/system.h>
  96. #include <linux/pci.h>
  97. #include <linux/mtd/mtd.h>
  98. #include <linux/mtd/pmc551.h>
  99. static struct mtd_info *pmc551list;
  100. static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr)
  101. {
  102. struct mypriv *priv = mtd->priv;
  103. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  104. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  105. unsigned long end;
  106. u_char *ptr;
  107. size_t retlen;
  108. #ifdef CONFIG_MTD_PMC551_DEBUG
  109. printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr,
  110. (long)instr->len);
  111. #endif
  112. end = instr->addr + instr->len - 1;
  113. /* Is it past the end? */
  114. if (end > mtd->size) {
  115. #ifdef CONFIG_MTD_PMC551_DEBUG
  116. printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n",
  117. (long)end, (long)mtd->size);
  118. #endif
  119. return -EINVAL;
  120. }
  121. eoff_hi = end & ~(priv->asize - 1);
  122. soff_hi = instr->addr & ~(priv->asize - 1);
  123. eoff_lo = end & (priv->asize - 1);
  124. soff_lo = instr->addr & (priv->asize - 1);
  125. pmc551_point(mtd, instr->addr, instr->len, &retlen,
  126. (void **)&ptr, NULL);
  127. if (soff_hi == eoff_hi || mtd->size == priv->asize) {
  128. /* The whole thing fits within one access, so just one shot
  129. will do it. */
  130. memset(ptr, 0xff, instr->len);
  131. } else {
  132. /* We have to do multiple writes to get all the data
  133. written. */
  134. while (soff_hi != eoff_hi) {
  135. #ifdef CONFIG_MTD_PMC551_DEBUG
  136. printk(KERN_DEBUG "pmc551_erase() soff_hi: %ld, "
  137. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  138. #endif
  139. memset(ptr, 0xff, priv->asize);
  140. if (soff_hi + priv->asize >= mtd->size) {
  141. goto out;
  142. }
  143. soff_hi += priv->asize;
  144. pmc551_point(mtd, (priv->base_map0 | soff_hi),
  145. priv->asize, &retlen,
  146. (void **)&ptr, NULL);
  147. }
  148. memset(ptr, 0xff, eoff_lo);
  149. }
  150. out:
  151. instr->state = MTD_ERASE_DONE;
  152. #ifdef CONFIG_MTD_PMC551_DEBUG
  153. printk(KERN_DEBUG "pmc551_erase() done\n");
  154. #endif
  155. mtd_erase_callback(instr);
  156. return 0;
  157. }
  158. static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
  159. size_t *retlen, void **virt, resource_size_t *phys)
  160. {
  161. struct mypriv *priv = mtd->priv;
  162. u32 soff_hi;
  163. u32 soff_lo;
  164. #ifdef CONFIG_MTD_PMC551_DEBUG
  165. printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
  166. #endif
  167. if (from + len > mtd->size) {
  168. #ifdef CONFIG_MTD_PMC551_DEBUG
  169. printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n",
  170. (long)from + len, (long)mtd->size);
  171. #endif
  172. return -EINVAL;
  173. }
  174. /* can we return a physical address with this driver? */
  175. if (phys)
  176. return -EINVAL;
  177. soff_hi = from & ~(priv->asize - 1);
  178. soff_lo = from & (priv->asize - 1);
  179. /* Cheap hack optimization */
  180. if (priv->curr_map0 != from) {
  181. pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
  182. (priv->base_map0 | soff_hi));
  183. priv->curr_map0 = soff_hi;
  184. }
  185. *virt = priv->start + soff_lo;
  186. *retlen = len;
  187. return 0;
  188. }
  189. static void pmc551_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
  190. {
  191. #ifdef CONFIG_MTD_PMC551_DEBUG
  192. printk(KERN_DEBUG "pmc551_unpoint()\n");
  193. #endif
  194. }
  195. static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len,
  196. size_t * retlen, u_char * buf)
  197. {
  198. struct mypriv *priv = mtd->priv;
  199. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  200. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  201. unsigned long end;
  202. u_char *ptr;
  203. u_char *copyto = buf;
  204. #ifdef CONFIG_MTD_PMC551_DEBUG
  205. printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n",
  206. (long)from, (long)len, (long)priv->asize);
  207. #endif
  208. end = from + len - 1;
  209. /* Is it past the end? */
  210. if (end > mtd->size) {
  211. #ifdef CONFIG_MTD_PMC551_DEBUG
  212. printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n",
  213. (long)end, (long)mtd->size);
  214. #endif
  215. return -EINVAL;
  216. }
  217. soff_hi = from & ~(priv->asize - 1);
  218. eoff_hi = end & ~(priv->asize - 1);
  219. soff_lo = from & (priv->asize - 1);
  220. eoff_lo = end & (priv->asize - 1);
  221. pmc551_point(mtd, from, len, retlen, (void **)&ptr, NULL);
  222. if (soff_hi == eoff_hi) {
  223. /* The whole thing fits within one access, so just one shot
  224. will do it. */
  225. memcpy(copyto, ptr, len);
  226. copyto += len;
  227. } else {
  228. /* We have to do multiple writes to get all the data
  229. written. */
  230. while (soff_hi != eoff_hi) {
  231. #ifdef CONFIG_MTD_PMC551_DEBUG
  232. printk(KERN_DEBUG "pmc551_read() soff_hi: %ld, "
  233. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  234. #endif
  235. memcpy(copyto, ptr, priv->asize);
  236. copyto += priv->asize;
  237. if (soff_hi + priv->asize >= mtd->size) {
  238. goto out;
  239. }
  240. soff_hi += priv->asize;
  241. pmc551_point(mtd, soff_hi, priv->asize, retlen,
  242. (void **)&ptr, NULL);
  243. }
  244. memcpy(copyto, ptr, eoff_lo);
  245. copyto += eoff_lo;
  246. }
  247. out:
  248. #ifdef CONFIG_MTD_PMC551_DEBUG
  249. printk(KERN_DEBUG "pmc551_read() done\n");
  250. #endif
  251. *retlen = copyto - buf;
  252. return 0;
  253. }
  254. static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len,
  255. size_t * retlen, const u_char * buf)
  256. {
  257. struct mypriv *priv = mtd->priv;
  258. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  259. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  260. unsigned long end;
  261. u_char *ptr;
  262. const u_char *copyfrom = buf;
  263. #ifdef CONFIG_MTD_PMC551_DEBUG
  264. printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n",
  265. (long)to, (long)len, (long)priv->asize);
  266. #endif
  267. end = to + len - 1;
  268. /* Is it past the end? or did the u32 wrap? */
  269. if (end > mtd->size) {
  270. #ifdef CONFIG_MTD_PMC551_DEBUG
  271. printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, "
  272. "size: %ld, to: %ld)\n", (long)end, (long)mtd->size,
  273. (long)to);
  274. #endif
  275. return -EINVAL;
  276. }
  277. soff_hi = to & ~(priv->asize - 1);
  278. eoff_hi = end & ~(priv->asize - 1);
  279. soff_lo = to & (priv->asize - 1);
  280. eoff_lo = end & (priv->asize - 1);
  281. pmc551_point(mtd, to, len, retlen, (void **)&ptr, NULL);
  282. if (soff_hi == eoff_hi) {
  283. /* The whole thing fits within one access, so just one shot
  284. will do it. */
  285. memcpy(ptr, copyfrom, len);
  286. copyfrom += len;
  287. } else {
  288. /* We have to do multiple writes to get all the data
  289. written. */
  290. while (soff_hi != eoff_hi) {
  291. #ifdef CONFIG_MTD_PMC551_DEBUG
  292. printk(KERN_DEBUG "pmc551_write() soff_hi: %ld, "
  293. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  294. #endif
  295. memcpy(ptr, copyfrom, priv->asize);
  296. copyfrom += priv->asize;
  297. if (soff_hi >= mtd->size) {
  298. goto out;
  299. }
  300. soff_hi += priv->asize;
  301. pmc551_point(mtd, soff_hi, priv->asize, retlen,
  302. (void **)&ptr, NULL);
  303. }
  304. memcpy(ptr, copyfrom, eoff_lo);
  305. copyfrom += eoff_lo;
  306. }
  307. out:
  308. #ifdef CONFIG_MTD_PMC551_DEBUG
  309. printk(KERN_DEBUG "pmc551_write() done\n");
  310. #endif
  311. *retlen = copyfrom - buf;
  312. return 0;
  313. }
  314. /*
  315. * Fixup routines for the V370PDC
  316. * PCI device ID 0x020011b0
  317. *
  318. * This function basicly kick starts the DRAM oboard the card and gets it
  319. * ready to be used. Before this is done the device reads VERY erratic, so
  320. * much that it can crash the Linux 2.2.x series kernels when a user cat's
  321. * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
  322. * register. FIXME: stop spinning on registers .. must implement a timeout
  323. * mechanism
  324. * returns the size of the memory region found.
  325. */
  326. static u32 fixup_pmc551(struct pci_dev *dev)
  327. {
  328. #ifdef CONFIG_MTD_PMC551_BUGFIX
  329. u32 dram_data;
  330. #endif
  331. u32 size, dcmd, cfg, dtmp;
  332. u16 cmd, tmp, i;
  333. u8 bcmd, counter;
  334. /* Sanity Check */
  335. if (!dev) {
  336. return -ENODEV;
  337. }
  338. /*
  339. * Attempt to reset the card
  340. * FIXME: Stop Spinning registers
  341. */
  342. counter = 0;
  343. /* unlock registers */
  344. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5);
  345. /* read in old data */
  346. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
  347. /* bang the reset line up and down for a few */
  348. for (i = 0; i < 10; i++) {
  349. counter = 0;
  350. bcmd &= ~0x80;
  351. while (counter++ < 100) {
  352. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  353. }
  354. counter = 0;
  355. bcmd |= 0x80;
  356. while (counter++ < 100) {
  357. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  358. }
  359. }
  360. bcmd |= (0x40 | 0x20);
  361. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  362. /*
  363. * Take care and turn off the memory on the device while we
  364. * tweak the configurations
  365. */
  366. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  367. tmp = cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
  368. pci_write_config_word(dev, PCI_COMMAND, tmp);
  369. /*
  370. * Disable existing aperture before probing memory size
  371. */
  372. pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
  373. dtmp = (dcmd | PMC551_PCI_MEM_MAP_ENABLE | PMC551_PCI_MEM_MAP_REG_EN);
  374. pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
  375. /*
  376. * Grab old BAR0 config so that we can figure out memory size
  377. * This is another bit of kludge going on. The reason for the
  378. * redundancy is I am hoping to retain the original configuration
  379. * previously assigned to the card by the BIOS or some previous
  380. * fixup routine in the kernel. So we read the old config into cfg,
  381. * then write all 1's to the memory space, read back the result into
  382. * "size", and then write back all the old config.
  383. */
  384. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &cfg);
  385. #ifndef CONFIG_MTD_PMC551_BUGFIX
  386. pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, ~0);
  387. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &size);
  388. size = (size & PCI_BASE_ADDRESS_MEM_MASK);
  389. size &= ~(size - 1);
  390. pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, cfg);
  391. #else
  392. /*
  393. * Get the size of the memory by reading all the DRAM size values
  394. * and adding them up.
  395. *
  396. * KLUDGE ALERT: the boards we are using have invalid column and
  397. * row mux values. We fix them here, but this will break other
  398. * memory configurations.
  399. */
  400. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
  401. size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
  402. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  403. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  404. pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
  405. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
  406. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  407. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  408. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  409. pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
  410. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
  411. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  412. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  413. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  414. pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
  415. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
  416. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  417. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  418. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  419. pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
  420. /*
  421. * Oops .. something went wrong
  422. */
  423. if ((size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
  424. return -ENODEV;
  425. }
  426. #endif /* CONFIG_MTD_PMC551_BUGFIX */
  427. if ((cfg & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
  428. return -ENODEV;
  429. }
  430. /*
  431. * Precharge Dram
  432. */
  433. pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0400);
  434. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x00bf);
  435. /*
  436. * Wait until command has gone through
  437. * FIXME: register spinning issue
  438. */
  439. do {
  440. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  441. if (counter++ > 100)
  442. break;
  443. } while ((PCI_COMMAND_IO) & cmd);
  444. /*
  445. * Turn on auto refresh
  446. * The loop is taken directly from Ramix's example code. I assume that
  447. * this must be held high for some duration of time, but I can find no
  448. * documentation refrencing the reasons why.
  449. */
  450. for (i = 1; i <= 8; i++) {
  451. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0df);
  452. /*
  453. * Make certain command has gone through
  454. * FIXME: register spinning issue
  455. */
  456. counter = 0;
  457. do {
  458. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  459. if (counter++ > 100)
  460. break;
  461. } while ((PCI_COMMAND_IO) & cmd);
  462. }
  463. pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0020);
  464. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0ff);
  465. /*
  466. * Wait until command completes
  467. * FIXME: register spinning issue
  468. */
  469. counter = 0;
  470. do {
  471. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  472. if (counter++ > 100)
  473. break;
  474. } while ((PCI_COMMAND_IO) & cmd);
  475. pci_read_config_dword(dev, PMC551_DRAM_CFG, &dcmd);
  476. dcmd |= 0x02000000;
  477. pci_write_config_dword(dev, PMC551_DRAM_CFG, dcmd);
  478. /*
  479. * Check to make certain fast back-to-back, if not
  480. * then set it so
  481. */
  482. pci_read_config_word(dev, PCI_STATUS, &cmd);
  483. if ((cmd & PCI_COMMAND_FAST_BACK) == 0) {
  484. cmd |= PCI_COMMAND_FAST_BACK;
  485. pci_write_config_word(dev, PCI_STATUS, cmd);
  486. }
  487. /*
  488. * Check to make certain the DEVSEL is set correctly, this device
  489. * has a tendancy to assert DEVSEL and TRDY when a write is performed
  490. * to the memory when memory is read-only
  491. */
  492. if ((cmd & PCI_STATUS_DEVSEL_MASK) != 0x0) {
  493. cmd &= ~PCI_STATUS_DEVSEL_MASK;
  494. pci_write_config_word(dev, PCI_STATUS, cmd);
  495. }
  496. /*
  497. * Set to be prefetchable and put everything back based on old cfg.
  498. * it's possible that the reset of the V370PDC nuked the original
  499. * setup
  500. */
  501. /*
  502. cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
  503. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  504. */
  505. /*
  506. * Turn PCI memory and I/O bus access back on
  507. */
  508. pci_write_config_word(dev, PCI_COMMAND,
  509. PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
  510. #ifdef CONFIG_MTD_PMC551_DEBUG
  511. /*
  512. * Some screen fun
  513. */
  514. printk(KERN_DEBUG "pmc551: %d%sB (0x%x) of %sprefetchable memory at "
  515. "0x%llx\n", (size < 1024) ? size : (size < 1048576) ?
  516. size >> 10 : size >> 20,
  517. (size < 1024) ? "" : (size < 1048576) ? "Ki" : "Mi", size,
  518. ((dcmd & (0x1 << 3)) == 0) ? "non-" : "",
  519. (unsigned long long)pci_resource_start(dev, 0));
  520. /*
  521. * Check to see the state of the memory
  522. */
  523. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dcmd);
  524. printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
  525. "pmc551: DRAM_BLK0 Size: %d at %d\n"
  526. "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
  527. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  528. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  529. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  530. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  531. ((dcmd >> 9) & 0xF));
  532. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dcmd);
  533. printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
  534. "pmc551: DRAM_BLK1 Size: %d at %d\n"
  535. "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
  536. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  537. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  538. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  539. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  540. ((dcmd >> 9) & 0xF));
  541. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dcmd);
  542. printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
  543. "pmc551: DRAM_BLK2 Size: %d at %d\n"
  544. "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
  545. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  546. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  547. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  548. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  549. ((dcmd >> 9) & 0xF));
  550. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dcmd);
  551. printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
  552. "pmc551: DRAM_BLK3 Size: %d at %d\n"
  553. "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
  554. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  555. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  556. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  557. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  558. ((dcmd >> 9) & 0xF));
  559. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  560. printk(KERN_DEBUG "pmc551: Memory Access %s\n",
  561. (((0x1 << 1) & cmd) == 0) ? "off" : "on");
  562. printk(KERN_DEBUG "pmc551: I/O Access %s\n",
  563. (((0x1 << 0) & cmd) == 0) ? "off" : "on");
  564. pci_read_config_word(dev, PCI_STATUS, &cmd);
  565. printk(KERN_DEBUG "pmc551: Devsel %s\n",
  566. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x000) ? "Fast" :
  567. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x200) ? "Medium" :
  568. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x400) ? "Slow" : "Invalid");
  569. printk(KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
  570. ((PCI_COMMAND_FAST_BACK & cmd) == 0) ? "Not " : "");
  571. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
  572. printk(KERN_DEBUG "pmc551: EEPROM is under %s control\n"
  573. "pmc551: System Control Register is %slocked to PCI access\n"
  574. "pmc551: System Control Register is %slocked to EEPROM access\n",
  575. (bcmd & 0x1) ? "software" : "hardware",
  576. (bcmd & 0x20) ? "" : "un", (bcmd & 0x40) ? "" : "un");
  577. #endif
  578. return size;
  579. }
  580. /*
  581. * Kernel version specific module stuffages
  582. */
  583. MODULE_LICENSE("GPL");
  584. MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
  585. MODULE_DESCRIPTION(PMC551_VERSION);
  586. /*
  587. * Stuff these outside the ifdef so as to not bust compiled in driver support
  588. */
  589. static int msize = 0;
  590. static int asize = 0;
  591. module_param(msize, int, 0);
  592. MODULE_PARM_DESC(msize, "memory size in MiB [1 - 1024]");
  593. module_param(asize, int, 0);
  594. MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
  595. /*
  596. * PMC551 Card Initialization
  597. */
  598. static int __init init_pmc551(void)
  599. {
  600. struct pci_dev *PCI_Device = NULL;
  601. struct mypriv *priv;
  602. int found = 0;
  603. struct mtd_info *mtd;
  604. u32 length = 0;
  605. if (msize) {
  606. msize = (1 << (ffs(msize) - 1)) << 20;
  607. if (msize > (1 << 30)) {
  608. printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n",
  609. msize);
  610. return -EINVAL;
  611. }
  612. }
  613. if (asize) {
  614. asize = (1 << (ffs(asize) - 1)) << 20;
  615. if (asize > (1 << 30)) {
  616. printk(KERN_NOTICE "pmc551: Invalid aperture size "
  617. "[%d]\n", asize);
  618. return -EINVAL;
  619. }
  620. }
  621. printk(KERN_INFO PMC551_VERSION);
  622. /*
  623. * PCU-bus chipset probe.
  624. */
  625. for (;;) {
  626. if ((PCI_Device = pci_get_device(PCI_VENDOR_ID_V3_SEMI,
  627. PCI_DEVICE_ID_V3_SEMI_V370PDC,
  628. PCI_Device)) == NULL) {
  629. break;
  630. }
  631. printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n",
  632. (unsigned long long)pci_resource_start(PCI_Device, 0));
  633. /*
  634. * The PMC551 device acts VERY weird if you don't init it
  635. * first. i.e. it will not correctly report devsel. If for
  636. * some reason the sdram is in a wrote-protected state the
  637. * device will DEVSEL when it is written to causing problems
  638. * with the oldproc.c driver in
  639. * some kernels (2.2.*)
  640. */
  641. if ((length = fixup_pmc551(PCI_Device)) <= 0) {
  642. printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
  643. break;
  644. }
  645. /*
  646. * This is needed until the driver is capable of reading the
  647. * onboard I2C SROM to discover the "real" memory size.
  648. */
  649. if (msize) {
  650. length = msize;
  651. printk(KERN_NOTICE "pmc551: Using specified memory "
  652. "size 0x%x\n", length);
  653. } else {
  654. msize = length;
  655. }
  656. mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
  657. if (!mtd) {
  658. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
  659. "device.\n");
  660. break;
  661. }
  662. priv = kzalloc(sizeof(struct mypriv), GFP_KERNEL);
  663. if (!priv) {
  664. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
  665. "device.\n");
  666. kfree(mtd);
  667. break;
  668. }
  669. mtd->priv = priv;
  670. priv->dev = PCI_Device;
  671. if (asize > length) {
  672. printk(KERN_NOTICE "pmc551: reducing aperture size to "
  673. "fit %dM\n", length >> 20);
  674. priv->asize = asize = length;
  675. } else if (asize == 0 || asize == length) {
  676. printk(KERN_NOTICE "pmc551: Using existing aperture "
  677. "size %dM\n", length >> 20);
  678. priv->asize = asize = length;
  679. } else {
  680. printk(KERN_NOTICE "pmc551: Using specified aperture "
  681. "size %dM\n", asize >> 20);
  682. priv->asize = asize;
  683. }
  684. priv->start = pci_iomap(PCI_Device, 0, priv->asize);
  685. if (!priv->start) {
  686. printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
  687. kfree(mtd->priv);
  688. kfree(mtd);
  689. break;
  690. }
  691. #ifdef CONFIG_MTD_PMC551_DEBUG
  692. printk(KERN_DEBUG "pmc551: setting aperture to %d\n",
  693. ffs(priv->asize >> 20) - 1);
  694. #endif
  695. priv->base_map0 = (PMC551_PCI_MEM_MAP_REG_EN
  696. | PMC551_PCI_MEM_MAP_ENABLE
  697. | (ffs(priv->asize >> 20) - 1) << 4);
  698. priv->curr_map0 = priv->base_map0;
  699. pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
  700. priv->curr_map0);
  701. #ifdef CONFIG_MTD_PMC551_DEBUG
  702. printk(KERN_DEBUG "pmc551: aperture set to %d\n",
  703. (priv->base_map0 & 0xF0) >> 4);
  704. #endif
  705. mtd->size = msize;
  706. mtd->flags = MTD_CAP_RAM;
  707. mtd->erase = pmc551_erase;
  708. mtd->read = pmc551_read;
  709. mtd->write = pmc551_write;
  710. mtd->point = pmc551_point;
  711. mtd->unpoint = pmc551_unpoint;
  712. mtd->type = MTD_RAM;
  713. mtd->name = "PMC551 RAM board";
  714. mtd->erasesize = 0x10000;
  715. mtd->writesize = 1;
  716. mtd->owner = THIS_MODULE;
  717. if (add_mtd_device(mtd)) {
  718. printk(KERN_NOTICE "pmc551: Failed to register new device\n");
  719. pci_iounmap(PCI_Device, priv->start);
  720. kfree(mtd->priv);
  721. kfree(mtd);
  722. break;
  723. }
  724. /* Keep a reference as the add_mtd_device worked */
  725. pci_dev_get(PCI_Device);
  726. printk(KERN_NOTICE "Registered pmc551 memory device.\n");
  727. printk(KERN_NOTICE "Mapped %dMiB of memory from 0x%p to 0x%p\n",
  728. priv->asize >> 20,
  729. priv->start, priv->start + priv->asize);
  730. printk(KERN_NOTICE "Total memory is %d%sB\n",
  731. (length < 1024) ? length :
  732. (length < 1048576) ? length >> 10 : length >> 20,
  733. (length < 1024) ? "" : (length < 1048576) ? "Ki" : "Mi");
  734. priv->nextpmc551 = pmc551list;
  735. pmc551list = mtd;
  736. found++;
  737. }
  738. /* Exited early, reference left over */
  739. if (PCI_Device)
  740. pci_dev_put(PCI_Device);
  741. if (!pmc551list) {
  742. printk(KERN_NOTICE "pmc551: not detected\n");
  743. return -ENODEV;
  744. } else {
  745. printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
  746. return 0;
  747. }
  748. }
  749. /*
  750. * PMC551 Card Cleanup
  751. */
  752. static void __exit cleanup_pmc551(void)
  753. {
  754. int found = 0;
  755. struct mtd_info *mtd;
  756. struct mypriv *priv;
  757. while ((mtd = pmc551list)) {
  758. priv = mtd->priv;
  759. pmc551list = priv->nextpmc551;
  760. if (priv->start) {
  761. printk(KERN_DEBUG "pmc551: unmapping %dMiB starting at "
  762. "0x%p\n", priv->asize >> 20, priv->start);
  763. pci_iounmap(priv->dev, priv->start);
  764. }
  765. pci_dev_put(priv->dev);
  766. kfree(mtd->priv);
  767. del_mtd_device(mtd);
  768. kfree(mtd);
  769. found++;
  770. }
  771. printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
  772. }
  773. module_init(init_pmc551);
  774. module_exit(cleanup_pmc551);