ushc.c 13 KB

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  1. /*
  2. * USB SD Host Controller (USHC) controller driver.
  3. *
  4. * Copyright (C) 2010 Cambridge Silicon Radio Ltd.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or (at
  9. * your option) any later version.
  10. *
  11. * Notes:
  12. * - Only version 2 devices are supported.
  13. * - Version 2 devices only support SDIO cards/devices (R2 response is
  14. * unsupported).
  15. *
  16. * References:
  17. * [USHC] USB SD Host Controller specification (CS-118793-SP)
  18. */
  19. #include <linux/module.h>
  20. #include <linux/usb.h>
  21. #include <linux/kernel.h>
  22. #include <linux/usb.h>
  23. #include <linux/slab.h>
  24. #include <linux/dma-mapping.h>
  25. #include <linux/mmc/host.h>
  26. enum ushc_request {
  27. USHC_GET_CAPS = 0x00,
  28. USHC_HOST_CTRL = 0x01,
  29. USHC_PWR_CTRL = 0x02,
  30. USHC_CLK_FREQ = 0x03,
  31. USHC_EXEC_CMD = 0x04,
  32. USHC_READ_RESP = 0x05,
  33. USHC_RESET = 0x06,
  34. };
  35. enum ushc_request_type {
  36. USHC_GET_CAPS_TYPE = USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  37. USHC_HOST_CTRL_TYPE = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  38. USHC_PWR_CTRL_TYPE = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  39. USHC_CLK_FREQ_TYPE = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  40. USHC_EXEC_CMD_TYPE = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  41. USHC_READ_RESP_TYPE = USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  42. USHC_RESET_TYPE = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  43. };
  44. #define USHC_GET_CAPS_VERSION_MASK 0xff
  45. #define USHC_GET_CAPS_3V3 (1 << 8)
  46. #define USHC_GET_CAPS_3V0 (1 << 9)
  47. #define USHC_GET_CAPS_1V8 (1 << 10)
  48. #define USHC_GET_CAPS_HIGH_SPD (1 << 16)
  49. #define USHC_HOST_CTRL_4BIT (1 << 1)
  50. #define USHC_HOST_CTRL_HIGH_SPD (1 << 0)
  51. #define USHC_PWR_CTRL_OFF 0x00
  52. #define USHC_PWR_CTRL_3V3 0x01
  53. #define USHC_PWR_CTRL_3V0 0x02
  54. #define USHC_PWR_CTRL_1V8 0x03
  55. #define USHC_READ_RESP_BUSY (1 << 4)
  56. #define USHC_READ_RESP_ERR_TIMEOUT (1 << 3)
  57. #define USHC_READ_RESP_ERR_CRC (1 << 2)
  58. #define USHC_READ_RESP_ERR_DAT (1 << 1)
  59. #define USHC_READ_RESP_ERR_CMD (1 << 0)
  60. #define USHC_READ_RESP_ERR_MASK 0x0f
  61. struct ushc_cbw {
  62. __u8 signature;
  63. __u8 cmd_idx;
  64. __le16 block_size;
  65. __le32 arg;
  66. } __attribute__((packed));
  67. #define USHC_CBW_SIGNATURE 'C'
  68. struct ushc_csw {
  69. __u8 signature;
  70. __u8 status;
  71. __le32 response;
  72. } __attribute__((packed));
  73. #define USHC_CSW_SIGNATURE 'S'
  74. struct ushc_int_data {
  75. u8 status;
  76. u8 reserved[3];
  77. };
  78. #define USHC_INT_STATUS_SDIO_INT (1 << 1)
  79. #define USHC_INT_STATUS_CARD_PRESENT (1 << 0)
  80. struct ushc_data {
  81. struct usb_device *usb_dev;
  82. struct mmc_host *mmc;
  83. struct urb *int_urb;
  84. struct ushc_int_data *int_data;
  85. struct urb *cbw_urb;
  86. struct ushc_cbw *cbw;
  87. struct urb *data_urb;
  88. struct urb *csw_urb;
  89. struct ushc_csw *csw;
  90. spinlock_t lock;
  91. struct mmc_request *current_req;
  92. u32 caps;
  93. u16 host_ctrl;
  94. unsigned long flags;
  95. u8 last_status;
  96. int clock_freq;
  97. };
  98. #define DISCONNECTED 0
  99. #define INT_EN 1
  100. #define IGNORE_NEXT_INT 2
  101. static void data_callback(struct urb *urb);
  102. static int ushc_hw_reset(struct ushc_data *ushc)
  103. {
  104. return usb_control_msg(ushc->usb_dev, usb_sndctrlpipe(ushc->usb_dev, 0),
  105. USHC_RESET, USHC_RESET_TYPE,
  106. 0, 0, NULL, 0, 100);
  107. }
  108. static int ushc_hw_get_caps(struct ushc_data *ushc)
  109. {
  110. int ret;
  111. int version;
  112. ret = usb_control_msg(ushc->usb_dev, usb_rcvctrlpipe(ushc->usb_dev, 0),
  113. USHC_GET_CAPS, USHC_GET_CAPS_TYPE,
  114. 0, 0, &ushc->caps, sizeof(ushc->caps), 100);
  115. if (ret < 0)
  116. return ret;
  117. ushc->caps = le32_to_cpu(ushc->caps);
  118. version = ushc->caps & USHC_GET_CAPS_VERSION_MASK;
  119. if (version != 0x02) {
  120. dev_err(&ushc->usb_dev->dev, "controller version %d is not supported\n", version);
  121. return -EINVAL;
  122. }
  123. return 0;
  124. }
  125. static int ushc_hw_set_host_ctrl(struct ushc_data *ushc, u16 mask, u16 val)
  126. {
  127. u16 host_ctrl;
  128. int ret;
  129. host_ctrl = (ushc->host_ctrl & ~mask) | val;
  130. ret = usb_control_msg(ushc->usb_dev, usb_sndctrlpipe(ushc->usb_dev, 0),
  131. USHC_HOST_CTRL, USHC_HOST_CTRL_TYPE,
  132. host_ctrl, 0, NULL, 0, 100);
  133. if (ret < 0)
  134. return ret;
  135. ushc->host_ctrl = host_ctrl;
  136. return 0;
  137. }
  138. static void int_callback(struct urb *urb)
  139. {
  140. struct ushc_data *ushc = urb->context;
  141. u8 status, last_status;
  142. if (urb->status < 0)
  143. return;
  144. status = ushc->int_data->status;
  145. last_status = ushc->last_status;
  146. ushc->last_status = status;
  147. /*
  148. * Ignore the card interrupt status on interrupt transfers that
  149. * were submitted while card interrupts where disabled.
  150. *
  151. * This avoid occasional spurious interrupts when enabling
  152. * interrupts immediately after clearing the source on the card.
  153. */
  154. if (!test_and_clear_bit(IGNORE_NEXT_INT, &ushc->flags)
  155. && test_bit(INT_EN, &ushc->flags)
  156. && status & USHC_INT_STATUS_SDIO_INT) {
  157. mmc_signal_sdio_irq(ushc->mmc);
  158. }
  159. if ((status ^ last_status) & USHC_INT_STATUS_CARD_PRESENT)
  160. mmc_detect_change(ushc->mmc, msecs_to_jiffies(100));
  161. if (!test_bit(INT_EN, &ushc->flags))
  162. set_bit(IGNORE_NEXT_INT, &ushc->flags);
  163. usb_submit_urb(ushc->int_urb, GFP_ATOMIC);
  164. }
  165. static void cbw_callback(struct urb *urb)
  166. {
  167. struct ushc_data *ushc = urb->context;
  168. if (urb->status != 0) {
  169. usb_unlink_urb(ushc->data_urb);
  170. usb_unlink_urb(ushc->csw_urb);
  171. }
  172. }
  173. static void data_callback(struct urb *urb)
  174. {
  175. struct ushc_data *ushc = urb->context;
  176. if (urb->status != 0)
  177. usb_unlink_urb(ushc->csw_urb);
  178. }
  179. static void csw_callback(struct urb *urb)
  180. {
  181. struct ushc_data *ushc = urb->context;
  182. struct mmc_request *req = ushc->current_req;
  183. int status;
  184. status = ushc->csw->status;
  185. if (urb->status != 0) {
  186. req->cmd->error = urb->status;
  187. } else if (status & USHC_READ_RESP_ERR_CMD) {
  188. if (status & USHC_READ_RESP_ERR_CRC)
  189. req->cmd->error = -EIO;
  190. else
  191. req->cmd->error = -ETIMEDOUT;
  192. }
  193. if (req->data) {
  194. if (status & USHC_READ_RESP_ERR_DAT) {
  195. if (status & USHC_READ_RESP_ERR_CRC)
  196. req->data->error = -EIO;
  197. else
  198. req->data->error = -ETIMEDOUT;
  199. req->data->bytes_xfered = 0;
  200. } else {
  201. req->data->bytes_xfered = req->data->blksz * req->data->blocks;
  202. }
  203. }
  204. req->cmd->resp[0] = le32_to_cpu(ushc->csw->response);
  205. mmc_request_done(ushc->mmc, req);
  206. }
  207. static void ushc_request(struct mmc_host *mmc, struct mmc_request *req)
  208. {
  209. struct ushc_data *ushc = mmc_priv(mmc);
  210. int ret;
  211. unsigned long flags;
  212. spin_lock_irqsave(&ushc->lock, flags);
  213. if (test_bit(DISCONNECTED, &ushc->flags)) {
  214. ret = -ENODEV;
  215. goto out;
  216. }
  217. /* Version 2 firmware doesn't support the R2 response format. */
  218. if (req->cmd->flags & MMC_RSP_136) {
  219. ret = -EINVAL;
  220. goto out;
  221. }
  222. /* The Astoria's data FIFOs don't work with clock speeds < 5MHz so
  223. limit commands with data to 6MHz or more. */
  224. if (req->data && ushc->clock_freq < 6000000) {
  225. ret = -EINVAL;
  226. goto out;
  227. }
  228. ushc->current_req = req;
  229. /* Start cmd with CBW. */
  230. ushc->cbw->cmd_idx = cpu_to_le16(req->cmd->opcode);
  231. if (req->data)
  232. ushc->cbw->block_size = cpu_to_le16(req->data->blksz);
  233. else
  234. ushc->cbw->block_size = 0;
  235. ushc->cbw->arg = cpu_to_le32(req->cmd->arg);
  236. ret = usb_submit_urb(ushc->cbw_urb, GFP_ATOMIC);
  237. if (ret < 0)
  238. goto out;
  239. /* Submit data (if any). */
  240. if (req->data) {
  241. struct mmc_data *data = req->data;
  242. int pipe;
  243. if (data->flags & MMC_DATA_READ)
  244. pipe = usb_rcvbulkpipe(ushc->usb_dev, 6);
  245. else
  246. pipe = usb_sndbulkpipe(ushc->usb_dev, 2);
  247. usb_fill_bulk_urb(ushc->data_urb, ushc->usb_dev, pipe,
  248. sg_virt(data->sg), data->sg->length,
  249. data_callback, ushc);
  250. ret = usb_submit_urb(ushc->data_urb, GFP_ATOMIC);
  251. if (ret < 0)
  252. goto out;
  253. }
  254. /* Submit CSW. */
  255. ret = usb_submit_urb(ushc->csw_urb, GFP_ATOMIC);
  256. if (ret < 0)
  257. goto out;
  258. out:
  259. spin_unlock_irqrestore(&ushc->lock, flags);
  260. if (ret < 0) {
  261. usb_unlink_urb(ushc->cbw_urb);
  262. usb_unlink_urb(ushc->data_urb);
  263. req->cmd->error = ret;
  264. mmc_request_done(mmc, req);
  265. }
  266. }
  267. static int ushc_set_power(struct ushc_data *ushc, unsigned char power_mode)
  268. {
  269. u16 voltage;
  270. switch (power_mode) {
  271. case MMC_POWER_OFF:
  272. voltage = USHC_PWR_CTRL_OFF;
  273. break;
  274. case MMC_POWER_UP:
  275. case MMC_POWER_ON:
  276. voltage = USHC_PWR_CTRL_3V3;
  277. break;
  278. default:
  279. return -EINVAL;
  280. }
  281. return usb_control_msg(ushc->usb_dev, usb_sndctrlpipe(ushc->usb_dev, 0),
  282. USHC_PWR_CTRL, USHC_PWR_CTRL_TYPE,
  283. voltage, 0, NULL, 0, 100);
  284. }
  285. static int ushc_set_bus_width(struct ushc_data *ushc, int bus_width)
  286. {
  287. return ushc_hw_set_host_ctrl(ushc, USHC_HOST_CTRL_4BIT,
  288. bus_width == 4 ? USHC_HOST_CTRL_4BIT : 0);
  289. }
  290. static int ushc_set_bus_freq(struct ushc_data *ushc, int clk, bool enable_hs)
  291. {
  292. int ret;
  293. /* Hardware can't detect interrupts while the clock is off. */
  294. if (clk == 0)
  295. clk = 400000;
  296. ret = ushc_hw_set_host_ctrl(ushc, USHC_HOST_CTRL_HIGH_SPD,
  297. enable_hs ? USHC_HOST_CTRL_HIGH_SPD : 0);
  298. if (ret < 0)
  299. return ret;
  300. ret = usb_control_msg(ushc->usb_dev, usb_sndctrlpipe(ushc->usb_dev, 0),
  301. USHC_CLK_FREQ, USHC_CLK_FREQ_TYPE,
  302. clk & 0xffff, (clk >> 16) & 0xffff, NULL, 0, 100);
  303. if (ret < 0)
  304. return ret;
  305. ushc->clock_freq = clk;
  306. return 0;
  307. }
  308. static void ushc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  309. {
  310. struct ushc_data *ushc = mmc_priv(mmc);
  311. ushc_set_power(ushc, ios->power_mode);
  312. ushc_set_bus_width(ushc, 1 << ios->bus_width);
  313. ushc_set_bus_freq(ushc, ios->clock, ios->timing == MMC_TIMING_SD_HS);
  314. }
  315. static int ushc_get_cd(struct mmc_host *mmc)
  316. {
  317. struct ushc_data *ushc = mmc_priv(mmc);
  318. return !!(ushc->last_status & USHC_INT_STATUS_CARD_PRESENT);
  319. }
  320. static void ushc_enable_sdio_irq(struct mmc_host *mmc, int enable)
  321. {
  322. struct ushc_data *ushc = mmc_priv(mmc);
  323. if (enable)
  324. set_bit(INT_EN, &ushc->flags);
  325. else
  326. clear_bit(INT_EN, &ushc->flags);
  327. }
  328. static void ushc_clean_up(struct ushc_data *ushc)
  329. {
  330. usb_free_urb(ushc->int_urb);
  331. usb_free_urb(ushc->csw_urb);
  332. usb_free_urb(ushc->data_urb);
  333. usb_free_urb(ushc->cbw_urb);
  334. kfree(ushc->int_data);
  335. kfree(ushc->cbw);
  336. kfree(ushc->csw);
  337. mmc_free_host(ushc->mmc);
  338. }
  339. static const struct mmc_host_ops ushc_ops = {
  340. .request = ushc_request,
  341. .set_ios = ushc_set_ios,
  342. .get_cd = ushc_get_cd,
  343. .enable_sdio_irq = ushc_enable_sdio_irq,
  344. };
  345. static int ushc_probe(struct usb_interface *intf, const struct usb_device_id *id)
  346. {
  347. struct usb_device *usb_dev = interface_to_usbdev(intf);
  348. struct mmc_host *mmc;
  349. struct ushc_data *ushc;
  350. int ret;
  351. mmc = mmc_alloc_host(sizeof(struct ushc_data), &intf->dev);
  352. if (mmc == NULL)
  353. return -ENOMEM;
  354. ushc = mmc_priv(mmc);
  355. usb_set_intfdata(intf, ushc);
  356. ushc->usb_dev = usb_dev;
  357. ushc->mmc = mmc;
  358. spin_lock_init(&ushc->lock);
  359. ret = ushc_hw_reset(ushc);
  360. if (ret < 0)
  361. goto err;
  362. /* Read capabilities. */
  363. ret = ushc_hw_get_caps(ushc);
  364. if (ret < 0)
  365. goto err;
  366. mmc->ops = &ushc_ops;
  367. mmc->f_min = 400000;
  368. mmc->f_max = 50000000;
  369. mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
  370. mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
  371. mmc->caps |= (ushc->caps & USHC_GET_CAPS_HIGH_SPD) ? MMC_CAP_SD_HIGHSPEED : 0;
  372. mmc->max_seg_size = 512*511;
  373. mmc->max_segs = 1;
  374. mmc->max_req_size = 512*511;
  375. mmc->max_blk_size = 512;
  376. mmc->max_blk_count = 511;
  377. ushc->int_urb = usb_alloc_urb(0, GFP_KERNEL);
  378. if (ushc->int_urb == NULL) {
  379. ret = -ENOMEM;
  380. goto err;
  381. }
  382. ushc->int_data = kzalloc(sizeof(struct ushc_int_data), GFP_KERNEL);
  383. if (ushc->int_data == NULL) {
  384. ret = -ENOMEM;
  385. goto err;
  386. }
  387. usb_fill_int_urb(ushc->int_urb, ushc->usb_dev,
  388. usb_rcvintpipe(usb_dev,
  389. intf->cur_altsetting->endpoint[0].desc.bEndpointAddress),
  390. ushc->int_data, sizeof(struct ushc_int_data),
  391. int_callback, ushc,
  392. intf->cur_altsetting->endpoint[0].desc.bInterval);
  393. ushc->cbw_urb = usb_alloc_urb(0, GFP_KERNEL);
  394. if (ushc->cbw_urb == NULL) {
  395. ret = -ENOMEM;
  396. goto err;
  397. }
  398. ushc->cbw = kzalloc(sizeof(struct ushc_cbw), GFP_KERNEL);
  399. if (ushc->cbw == NULL) {
  400. ret = -ENOMEM;
  401. goto err;
  402. }
  403. ushc->cbw->signature = USHC_CBW_SIGNATURE;
  404. usb_fill_bulk_urb(ushc->cbw_urb, ushc->usb_dev, usb_sndbulkpipe(usb_dev, 2),
  405. ushc->cbw, sizeof(struct ushc_cbw),
  406. cbw_callback, ushc);
  407. ushc->data_urb = usb_alloc_urb(0, GFP_KERNEL);
  408. if (ushc->data_urb == NULL) {
  409. ret = -ENOMEM;
  410. goto err;
  411. }
  412. ushc->csw_urb = usb_alloc_urb(0, GFP_KERNEL);
  413. if (ushc->csw_urb == NULL) {
  414. ret = -ENOMEM;
  415. goto err;
  416. }
  417. ushc->csw = kzalloc(sizeof(struct ushc_cbw), GFP_KERNEL);
  418. if (ushc->csw == NULL) {
  419. ret = -ENOMEM;
  420. goto err;
  421. }
  422. usb_fill_bulk_urb(ushc->csw_urb, ushc->usb_dev, usb_rcvbulkpipe(usb_dev, 6),
  423. ushc->csw, sizeof(struct ushc_csw),
  424. csw_callback, ushc);
  425. ret = mmc_add_host(ushc->mmc);
  426. if (ret)
  427. goto err;
  428. ret = usb_submit_urb(ushc->int_urb, GFP_KERNEL);
  429. if (ret < 0) {
  430. mmc_remove_host(ushc->mmc);
  431. goto err;
  432. }
  433. return 0;
  434. err:
  435. ushc_clean_up(ushc);
  436. return ret;
  437. }
  438. static void ushc_disconnect(struct usb_interface *intf)
  439. {
  440. struct ushc_data *ushc = usb_get_intfdata(intf);
  441. spin_lock_irq(&ushc->lock);
  442. set_bit(DISCONNECTED, &ushc->flags);
  443. spin_unlock_irq(&ushc->lock);
  444. usb_kill_urb(ushc->int_urb);
  445. usb_kill_urb(ushc->cbw_urb);
  446. usb_kill_urb(ushc->data_urb);
  447. usb_kill_urb(ushc->csw_urb);
  448. mmc_remove_host(ushc->mmc);
  449. ushc_clean_up(ushc);
  450. }
  451. static struct usb_device_id ushc_id_table[] = {
  452. /* CSR USB SD Host Controller */
  453. { USB_DEVICE(0x0a12, 0x5d10) },
  454. { },
  455. };
  456. MODULE_DEVICE_TABLE(usb, ushc_id_table);
  457. static struct usb_driver ushc_driver = {
  458. .name = "ushc",
  459. .id_table = ushc_id_table,
  460. .probe = ushc_probe,
  461. .disconnect = ushc_disconnect,
  462. };
  463. static int __init ushc_init(void)
  464. {
  465. return usb_register(&ushc_driver);
  466. }
  467. module_init(ushc_init);
  468. static void __exit ushc_exit(void)
  469. {
  470. usb_deregister(&ushc_driver);
  471. }
  472. module_exit(ushc_exit);
  473. MODULE_DESCRIPTION("USB SD Host Controller driver");
  474. MODULE_AUTHOR("David Vrabel <david.vrabel@csr.com>");
  475. MODULE_LICENSE("GPL");