wm8994-irq.c 7.0 KB

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  1. /*
  2. * wm8994-irq.c -- Interrupt controller support for Wolfson WM8994
  3. *
  4. * Copyright 2010 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/i2c.h>
  17. #include <linux/irq.h>
  18. #include <linux/mfd/core.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/mfd/wm8994/core.h>
  21. #include <linux/mfd/wm8994/registers.h>
  22. #include <linux/delay.h>
  23. struct wm8994_irq_data {
  24. int reg;
  25. int mask;
  26. };
  27. static struct wm8994_irq_data wm8994_irqs[] = {
  28. [WM8994_IRQ_TEMP_SHUT] = {
  29. .reg = 2,
  30. .mask = WM8994_TEMP_SHUT_EINT,
  31. },
  32. [WM8994_IRQ_MIC1_DET] = {
  33. .reg = 2,
  34. .mask = WM8994_MIC1_DET_EINT,
  35. },
  36. [WM8994_IRQ_MIC1_SHRT] = {
  37. .reg = 2,
  38. .mask = WM8994_MIC1_SHRT_EINT,
  39. },
  40. [WM8994_IRQ_MIC2_DET] = {
  41. .reg = 2,
  42. .mask = WM8994_MIC2_DET_EINT,
  43. },
  44. [WM8994_IRQ_MIC2_SHRT] = {
  45. .reg = 2,
  46. .mask = WM8994_MIC2_SHRT_EINT,
  47. },
  48. [WM8994_IRQ_FLL1_LOCK] = {
  49. .reg = 2,
  50. .mask = WM8994_FLL1_LOCK_EINT,
  51. },
  52. [WM8994_IRQ_FLL2_LOCK] = {
  53. .reg = 2,
  54. .mask = WM8994_FLL2_LOCK_EINT,
  55. },
  56. [WM8994_IRQ_SRC1_LOCK] = {
  57. .reg = 2,
  58. .mask = WM8994_SRC1_LOCK_EINT,
  59. },
  60. [WM8994_IRQ_SRC2_LOCK] = {
  61. .reg = 2,
  62. .mask = WM8994_SRC2_LOCK_EINT,
  63. },
  64. [WM8994_IRQ_AIF1DRC1_SIG_DET] = {
  65. .reg = 2,
  66. .mask = WM8994_AIF1DRC1_SIG_DET,
  67. },
  68. [WM8994_IRQ_AIF1DRC2_SIG_DET] = {
  69. .reg = 2,
  70. .mask = WM8994_AIF1DRC2_SIG_DET_EINT,
  71. },
  72. [WM8994_IRQ_AIF2DRC_SIG_DET] = {
  73. .reg = 2,
  74. .mask = WM8994_AIF2DRC_SIG_DET_EINT,
  75. },
  76. [WM8994_IRQ_FIFOS_ERR] = {
  77. .reg = 2,
  78. .mask = WM8994_FIFOS_ERR_EINT,
  79. },
  80. [WM8994_IRQ_WSEQ_DONE] = {
  81. .reg = 2,
  82. .mask = WM8994_WSEQ_DONE_EINT,
  83. },
  84. [WM8994_IRQ_DCS_DONE] = {
  85. .reg = 2,
  86. .mask = WM8994_DCS_DONE_EINT,
  87. },
  88. [WM8994_IRQ_TEMP_WARN] = {
  89. .reg = 2,
  90. .mask = WM8994_TEMP_WARN_EINT,
  91. },
  92. [WM8994_IRQ_GPIO(1)] = {
  93. .reg = 1,
  94. .mask = WM8994_GP1_EINT,
  95. },
  96. [WM8994_IRQ_GPIO(2)] = {
  97. .reg = 1,
  98. .mask = WM8994_GP2_EINT,
  99. },
  100. [WM8994_IRQ_GPIO(3)] = {
  101. .reg = 1,
  102. .mask = WM8994_GP3_EINT,
  103. },
  104. [WM8994_IRQ_GPIO(4)] = {
  105. .reg = 1,
  106. .mask = WM8994_GP4_EINT,
  107. },
  108. [WM8994_IRQ_GPIO(5)] = {
  109. .reg = 1,
  110. .mask = WM8994_GP5_EINT,
  111. },
  112. [WM8994_IRQ_GPIO(6)] = {
  113. .reg = 1,
  114. .mask = WM8994_GP6_EINT,
  115. },
  116. [WM8994_IRQ_GPIO(7)] = {
  117. .reg = 1,
  118. .mask = WM8994_GP7_EINT,
  119. },
  120. [WM8994_IRQ_GPIO(8)] = {
  121. .reg = 1,
  122. .mask = WM8994_GP8_EINT,
  123. },
  124. [WM8994_IRQ_GPIO(9)] = {
  125. .reg = 1,
  126. .mask = WM8994_GP8_EINT,
  127. },
  128. [WM8994_IRQ_GPIO(10)] = {
  129. .reg = 1,
  130. .mask = WM8994_GP10_EINT,
  131. },
  132. [WM8994_IRQ_GPIO(11)] = {
  133. .reg = 1,
  134. .mask = WM8994_GP11_EINT,
  135. },
  136. };
  137. static inline int irq_data_to_status_reg(struct wm8994_irq_data *irq_data)
  138. {
  139. return WM8994_INTERRUPT_STATUS_1 - 1 + irq_data->reg;
  140. }
  141. static inline int irq_data_to_mask_reg(struct wm8994_irq_data *irq_data)
  142. {
  143. return WM8994_INTERRUPT_STATUS_1_MASK - 1 + irq_data->reg;
  144. }
  145. static inline struct wm8994_irq_data *irq_to_wm8994_irq(struct wm8994 *wm8994,
  146. int irq)
  147. {
  148. return &wm8994_irqs[irq - wm8994->irq_base];
  149. }
  150. static void wm8994_irq_lock(unsigned int irq)
  151. {
  152. struct wm8994 *wm8994 = get_irq_chip_data(irq);
  153. mutex_lock(&wm8994->irq_lock);
  154. }
  155. static void wm8994_irq_sync_unlock(unsigned int irq)
  156. {
  157. struct wm8994 *wm8994 = get_irq_chip_data(irq);
  158. int i;
  159. for (i = 0; i < ARRAY_SIZE(wm8994->irq_masks_cur); i++) {
  160. /* If there's been a change in the mask write it back
  161. * to the hardware. */
  162. if (wm8994->irq_masks_cur[i] != wm8994->irq_masks_cache[i]) {
  163. wm8994->irq_masks_cache[i] = wm8994->irq_masks_cur[i];
  164. wm8994_reg_write(wm8994,
  165. WM8994_INTERRUPT_STATUS_1_MASK + i,
  166. wm8994->irq_masks_cur[i]);
  167. }
  168. }
  169. mutex_unlock(&wm8994->irq_lock);
  170. }
  171. static void wm8994_irq_unmask(unsigned int irq)
  172. {
  173. struct wm8994 *wm8994 = get_irq_chip_data(irq);
  174. struct wm8994_irq_data *irq_data = irq_to_wm8994_irq(wm8994, irq);
  175. wm8994->irq_masks_cur[irq_data->reg - 1] &= ~irq_data->mask;
  176. }
  177. static void wm8994_irq_mask(unsigned int irq)
  178. {
  179. struct wm8994 *wm8994 = get_irq_chip_data(irq);
  180. struct wm8994_irq_data *irq_data = irq_to_wm8994_irq(wm8994, irq);
  181. wm8994->irq_masks_cur[irq_data->reg - 1] |= irq_data->mask;
  182. }
  183. static struct irq_chip wm8994_irq_chip = {
  184. .name = "wm8994",
  185. .bus_lock = wm8994_irq_lock,
  186. .bus_sync_unlock = wm8994_irq_sync_unlock,
  187. .mask = wm8994_irq_mask,
  188. .unmask = wm8994_irq_unmask,
  189. };
  190. /* The processing of the primary interrupt occurs in a thread so that
  191. * we can interact with the device over I2C or SPI. */
  192. static irqreturn_t wm8994_irq_thread(int irq, void *data)
  193. {
  194. struct wm8994 *wm8994 = data;
  195. unsigned int i;
  196. u16 status[WM8994_NUM_IRQ_REGS];
  197. int ret;
  198. ret = wm8994_bulk_read(wm8994, WM8994_INTERRUPT_STATUS_1,
  199. WM8994_NUM_IRQ_REGS, status);
  200. if (ret < 0) {
  201. dev_err(wm8994->dev, "Failed to read interrupt status: %d\n",
  202. ret);
  203. return IRQ_NONE;
  204. }
  205. /* Apply masking */
  206. for (i = 0; i < WM8994_NUM_IRQ_REGS; i++)
  207. status[i] &= ~wm8994->irq_masks_cur[i];
  208. /* Report */
  209. for (i = 0; i < ARRAY_SIZE(wm8994_irqs); i++) {
  210. if (status[wm8994_irqs[i].reg - 1] & wm8994_irqs[i].mask)
  211. handle_nested_irq(wm8994->irq_base + i);
  212. }
  213. /* Ack any unmasked IRQs */
  214. for (i = 0; i < ARRAY_SIZE(status); i++) {
  215. if (status[i])
  216. wm8994_reg_write(wm8994, WM8994_INTERRUPT_STATUS_1 + i,
  217. status[i]);
  218. }
  219. return IRQ_HANDLED;
  220. }
  221. int wm8994_irq_init(struct wm8994 *wm8994)
  222. {
  223. int i, cur_irq, ret;
  224. mutex_init(&wm8994->irq_lock);
  225. /* Mask the individual interrupt sources */
  226. for (i = 0; i < ARRAY_SIZE(wm8994->irq_masks_cur); i++) {
  227. wm8994->irq_masks_cur[i] = 0xffff;
  228. wm8994->irq_masks_cache[i] = 0xffff;
  229. wm8994_reg_write(wm8994, WM8994_INTERRUPT_STATUS_1_MASK + i,
  230. 0xffff);
  231. }
  232. if (!wm8994->irq) {
  233. dev_warn(wm8994->dev,
  234. "No interrupt specified, no interrupts\n");
  235. wm8994->irq_base = 0;
  236. return 0;
  237. }
  238. if (!wm8994->irq_base) {
  239. dev_err(wm8994->dev,
  240. "No interrupt base specified, no interrupts\n");
  241. return 0;
  242. }
  243. /* Register them with genirq */
  244. for (cur_irq = wm8994->irq_base;
  245. cur_irq < ARRAY_SIZE(wm8994_irqs) + wm8994->irq_base;
  246. cur_irq++) {
  247. set_irq_chip_data(cur_irq, wm8994);
  248. set_irq_chip_and_handler(cur_irq, &wm8994_irq_chip,
  249. handle_edge_irq);
  250. set_irq_nested_thread(cur_irq, 1);
  251. /* ARM needs us to explicitly flag the IRQ as valid
  252. * and will set them noprobe when we do so. */
  253. #ifdef CONFIG_ARM
  254. set_irq_flags(cur_irq, IRQF_VALID);
  255. #else
  256. set_irq_noprobe(cur_irq);
  257. #endif
  258. }
  259. ret = request_threaded_irq(wm8994->irq, NULL, wm8994_irq_thread,
  260. IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
  261. "wm8994", wm8994);
  262. if (ret != 0) {
  263. dev_err(wm8994->dev, "Failed to request IRQ %d: %d\n",
  264. wm8994->irq, ret);
  265. return ret;
  266. }
  267. /* Enable top level interrupt if it was masked */
  268. wm8994_reg_write(wm8994, WM8994_INTERRUPT_CONTROL, 0);
  269. return 0;
  270. }
  271. void wm8994_irq_exit(struct wm8994 *wm8994)
  272. {
  273. if (wm8994->irq)
  274. free_irq(wm8994->irq, wm8994);
  275. }