htc-egpio.c 11 KB

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  1. /*
  2. * Support for the GPIO/IRQ expander chips present on several HTC phones.
  3. * These are implemented in CPLD chips present on the board.
  4. *
  5. * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
  6. * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
  7. *
  8. * This file may be distributed under the terms of the GNU GPL license.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/irq.h>
  14. #include <linux/io.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <linux/module.h>
  19. #include <linux/mfd/htc-egpio.h>
  20. struct egpio_chip {
  21. int reg_start;
  22. int cached_values;
  23. unsigned long is_out;
  24. struct device *dev;
  25. struct gpio_chip chip;
  26. };
  27. struct egpio_info {
  28. spinlock_t lock;
  29. /* iomem info */
  30. void __iomem *base_addr;
  31. int bus_shift; /* byte shift */
  32. int reg_shift; /* bit shift */
  33. int reg_mask;
  34. /* irq info */
  35. int ack_register;
  36. int ack_write;
  37. u16 irqs_enabled;
  38. uint irq_start;
  39. int nirqs;
  40. uint chained_irq;
  41. /* egpio info */
  42. struct egpio_chip *chip;
  43. int nchips;
  44. };
  45. static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
  46. {
  47. writew(value, ei->base_addr + (reg << ei->bus_shift));
  48. }
  49. static inline u16 egpio_readw(struct egpio_info *ei, int reg)
  50. {
  51. return readw(ei->base_addr + (reg << ei->bus_shift));
  52. }
  53. /*
  54. * IRQs
  55. */
  56. static inline void ack_irqs(struct egpio_info *ei)
  57. {
  58. egpio_writew(ei->ack_write, ei, ei->ack_register);
  59. pr_debug("EGPIO ack - write %x to base+%x\n",
  60. ei->ack_write, ei->ack_register << ei->bus_shift);
  61. }
  62. static void egpio_ack(unsigned int irq)
  63. {
  64. }
  65. /* There does not appear to be a way to proactively mask interrupts
  66. * on the egpio chip itself. So, we simply ignore interrupts that
  67. * aren't desired. */
  68. static void egpio_mask(unsigned int irq)
  69. {
  70. struct egpio_info *ei = get_irq_chip_data(irq);
  71. ei->irqs_enabled &= ~(1 << (irq - ei->irq_start));
  72. pr_debug("EGPIO mask %d %04x\n", irq, ei->irqs_enabled);
  73. }
  74. static void egpio_unmask(unsigned int irq)
  75. {
  76. struct egpio_info *ei = get_irq_chip_data(irq);
  77. ei->irqs_enabled |= 1 << (irq - ei->irq_start);
  78. pr_debug("EGPIO unmask %d %04x\n", irq, ei->irqs_enabled);
  79. }
  80. static struct irq_chip egpio_muxed_chip = {
  81. .name = "htc-egpio",
  82. .ack = egpio_ack,
  83. .mask = egpio_mask,
  84. .unmask = egpio_unmask,
  85. };
  86. static void egpio_handler(unsigned int irq, struct irq_desc *desc)
  87. {
  88. struct egpio_info *ei = get_irq_data(irq);
  89. int irqpin;
  90. /* Read current pins. */
  91. unsigned long readval = egpio_readw(ei, ei->ack_register);
  92. pr_debug("IRQ reg: %x\n", (unsigned int)readval);
  93. /* Ack/unmask interrupts. */
  94. ack_irqs(ei);
  95. /* Process all set pins. */
  96. readval &= ei->irqs_enabled;
  97. for_each_set_bit(irqpin, &readval, ei->nirqs) {
  98. /* Run irq handler */
  99. pr_debug("got IRQ %d\n", irqpin);
  100. irq = ei->irq_start + irqpin;
  101. desc = irq_to_desc(irq);
  102. desc->handle_irq(irq, desc);
  103. }
  104. }
  105. int htc_egpio_get_wakeup_irq(struct device *dev)
  106. {
  107. struct egpio_info *ei = dev_get_drvdata(dev);
  108. /* Read current pins. */
  109. u16 readval = egpio_readw(ei, ei->ack_register);
  110. /* Ack/unmask interrupts. */
  111. ack_irqs(ei);
  112. /* Return first set pin. */
  113. readval &= ei->irqs_enabled;
  114. return ei->irq_start + ffs(readval) - 1;
  115. }
  116. EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);
  117. static inline int egpio_pos(struct egpio_info *ei, int bit)
  118. {
  119. return bit >> ei->reg_shift;
  120. }
  121. static inline int egpio_bit(struct egpio_info *ei, int bit)
  122. {
  123. return 1 << (bit & ((1 << ei->reg_shift)-1));
  124. }
  125. /*
  126. * Input pins
  127. */
  128. static int egpio_get(struct gpio_chip *chip, unsigned offset)
  129. {
  130. struct egpio_chip *egpio;
  131. struct egpio_info *ei;
  132. unsigned bit;
  133. int reg;
  134. int value;
  135. pr_debug("egpio_get_value(%d)\n", chip->base + offset);
  136. egpio = container_of(chip, struct egpio_chip, chip);
  137. ei = dev_get_drvdata(egpio->dev);
  138. bit = egpio_bit(ei, offset);
  139. reg = egpio->reg_start + egpio_pos(ei, offset);
  140. value = egpio_readw(ei, reg);
  141. pr_debug("readw(%p + %x) = %x\n",
  142. ei->base_addr, reg << ei->bus_shift, value);
  143. return value & bit;
  144. }
  145. static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
  146. {
  147. struct egpio_chip *egpio;
  148. egpio = container_of(chip, struct egpio_chip, chip);
  149. return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
  150. }
  151. /*
  152. * Output pins
  153. */
  154. static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
  155. {
  156. unsigned long flag;
  157. struct egpio_chip *egpio;
  158. struct egpio_info *ei;
  159. unsigned bit;
  160. int pos;
  161. int reg;
  162. int shift;
  163. pr_debug("egpio_set(%s, %d(%d), %d)\n",
  164. chip->label, offset, offset+chip->base, value);
  165. egpio = container_of(chip, struct egpio_chip, chip);
  166. ei = dev_get_drvdata(egpio->dev);
  167. bit = egpio_bit(ei, offset);
  168. pos = egpio_pos(ei, offset);
  169. reg = egpio->reg_start + pos;
  170. shift = pos << ei->reg_shift;
  171. pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
  172. reg, (egpio->cached_values >> shift) & ei->reg_mask);
  173. spin_lock_irqsave(&ei->lock, flag);
  174. if (value)
  175. egpio->cached_values |= (1 << offset);
  176. else
  177. egpio->cached_values &= ~(1 << offset);
  178. egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
  179. spin_unlock_irqrestore(&ei->lock, flag);
  180. }
  181. static int egpio_direction_output(struct gpio_chip *chip,
  182. unsigned offset, int value)
  183. {
  184. struct egpio_chip *egpio;
  185. egpio = container_of(chip, struct egpio_chip, chip);
  186. if (test_bit(offset, &egpio->is_out)) {
  187. egpio_set(chip, offset, value);
  188. return 0;
  189. } else {
  190. return -EINVAL;
  191. }
  192. }
  193. static void egpio_write_cache(struct egpio_info *ei)
  194. {
  195. int i;
  196. struct egpio_chip *egpio;
  197. int shift;
  198. for (i = 0; i < ei->nchips; i++) {
  199. egpio = &(ei->chip[i]);
  200. if (!egpio->is_out)
  201. continue;
  202. for (shift = 0; shift < egpio->chip.ngpio;
  203. shift += (1<<ei->reg_shift)) {
  204. int reg = egpio->reg_start + egpio_pos(ei, shift);
  205. if (!((egpio->is_out >> shift) & ei->reg_mask))
  206. continue;
  207. pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
  208. (egpio->cached_values >> shift) & ei->reg_mask,
  209. egpio_readw(ei, reg));
  210. egpio_writew((egpio->cached_values >> shift)
  211. & ei->reg_mask, ei, reg);
  212. }
  213. }
  214. }
  215. /*
  216. * Setup
  217. */
  218. static int __init egpio_probe(struct platform_device *pdev)
  219. {
  220. struct htc_egpio_platform_data *pdata = pdev->dev.platform_data;
  221. struct resource *res;
  222. struct egpio_info *ei;
  223. struct gpio_chip *chip;
  224. unsigned int irq, irq_end;
  225. int i;
  226. int ret;
  227. /* Initialize ei data structure. */
  228. ei = kzalloc(sizeof(*ei), GFP_KERNEL);
  229. if (!ei)
  230. return -ENOMEM;
  231. spin_lock_init(&ei->lock);
  232. /* Find chained irq */
  233. ret = -EINVAL;
  234. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  235. if (res)
  236. ei->chained_irq = res->start;
  237. /* Map egpio chip into virtual address space. */
  238. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  239. if (!res)
  240. goto fail;
  241. ei->base_addr = ioremap_nocache(res->start, resource_size(res));
  242. if (!ei->base_addr)
  243. goto fail;
  244. pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);
  245. if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
  246. goto fail;
  247. ei->bus_shift = fls(pdata->bus_width - 1) - 3;
  248. pr_debug("bus_shift = %d\n", ei->bus_shift);
  249. if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
  250. goto fail;
  251. ei->reg_shift = fls(pdata->reg_width - 1);
  252. pr_debug("reg_shift = %d\n", ei->reg_shift);
  253. ei->reg_mask = (1 << pdata->reg_width) - 1;
  254. platform_set_drvdata(pdev, ei);
  255. ei->nchips = pdata->num_chips;
  256. ei->chip = kzalloc(sizeof(struct egpio_chip) * ei->nchips, GFP_KERNEL);
  257. if (!ei->chip) {
  258. ret = -ENOMEM;
  259. goto fail;
  260. }
  261. for (i = 0; i < ei->nchips; i++) {
  262. ei->chip[i].reg_start = pdata->chip[i].reg_start;
  263. ei->chip[i].cached_values = pdata->chip[i].initial_values;
  264. ei->chip[i].is_out = pdata->chip[i].direction;
  265. ei->chip[i].dev = &(pdev->dev);
  266. chip = &(ei->chip[i].chip);
  267. chip->label = "htc-egpio";
  268. chip->dev = &pdev->dev;
  269. chip->owner = THIS_MODULE;
  270. chip->get = egpio_get;
  271. chip->set = egpio_set;
  272. chip->direction_input = egpio_direction_input;
  273. chip->direction_output = egpio_direction_output;
  274. chip->base = pdata->chip[i].gpio_base;
  275. chip->ngpio = pdata->chip[i].num_gpios;
  276. gpiochip_add(chip);
  277. }
  278. /* Set initial pin values */
  279. egpio_write_cache(ei);
  280. ei->irq_start = pdata->irq_base;
  281. ei->nirqs = pdata->num_irqs;
  282. ei->ack_register = pdata->ack_register;
  283. if (ei->chained_irq) {
  284. /* Setup irq handlers */
  285. ei->ack_write = 0xFFFF;
  286. if (pdata->invert_acks)
  287. ei->ack_write = 0;
  288. irq_end = ei->irq_start + ei->nirqs;
  289. for (irq = ei->irq_start; irq < irq_end; irq++) {
  290. set_irq_chip(irq, &egpio_muxed_chip);
  291. set_irq_chip_data(irq, ei);
  292. set_irq_handler(irq, handle_simple_irq);
  293. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  294. }
  295. set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
  296. set_irq_data(ei->chained_irq, ei);
  297. set_irq_chained_handler(ei->chained_irq, egpio_handler);
  298. ack_irqs(ei);
  299. device_init_wakeup(&pdev->dev, 1);
  300. }
  301. return 0;
  302. fail:
  303. printk(KERN_ERR "EGPIO failed to setup\n");
  304. kfree(ei);
  305. return ret;
  306. }
  307. static int __exit egpio_remove(struct platform_device *pdev)
  308. {
  309. struct egpio_info *ei = platform_get_drvdata(pdev);
  310. unsigned int irq, irq_end;
  311. if (ei->chained_irq) {
  312. irq_end = ei->irq_start + ei->nirqs;
  313. for (irq = ei->irq_start; irq < irq_end; irq++) {
  314. set_irq_chip(irq, NULL);
  315. set_irq_handler(irq, NULL);
  316. set_irq_flags(irq, 0);
  317. }
  318. set_irq_chained_handler(ei->chained_irq, NULL);
  319. device_init_wakeup(&pdev->dev, 0);
  320. }
  321. iounmap(ei->base_addr);
  322. kfree(ei->chip);
  323. kfree(ei);
  324. return 0;
  325. }
  326. #ifdef CONFIG_PM
  327. static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
  328. {
  329. struct egpio_info *ei = platform_get_drvdata(pdev);
  330. if (ei->chained_irq && device_may_wakeup(&pdev->dev))
  331. enable_irq_wake(ei->chained_irq);
  332. return 0;
  333. }
  334. static int egpio_resume(struct platform_device *pdev)
  335. {
  336. struct egpio_info *ei = platform_get_drvdata(pdev);
  337. if (ei->chained_irq && device_may_wakeup(&pdev->dev))
  338. disable_irq_wake(ei->chained_irq);
  339. /* Update registers from the cache, in case
  340. the CPLD was powered off during suspend */
  341. egpio_write_cache(ei);
  342. return 0;
  343. }
  344. #else
  345. #define egpio_suspend NULL
  346. #define egpio_resume NULL
  347. #endif
  348. static struct platform_driver egpio_driver = {
  349. .driver = {
  350. .name = "htc-egpio",
  351. },
  352. .remove = __exit_p(egpio_remove),
  353. .suspend = egpio_suspend,
  354. .resume = egpio_resume,
  355. };
  356. static int __init egpio_init(void)
  357. {
  358. return platform_driver_probe(&egpio_driver, egpio_probe);
  359. }
  360. static void __exit egpio_exit(void)
  361. {
  362. platform_driver_unregister(&egpio_driver);
  363. }
  364. /* start early for dependencies */
  365. subsys_initcall(egpio_init);
  366. module_exit(egpio_exit)
  367. MODULE_LICENSE("GPL");
  368. MODULE_AUTHOR("Kevin O'Connor <kevin@koconnor.net>");