stv090x.c 126 KB

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  1. /*
  2. STV0900/0903 Multistandard Broadcast Frontend driver
  3. Copyright (C) Manu Abraham <abraham.manu@gmail.com>
  4. Copyright (C) ST Microelectronics
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. */
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/string.h>
  21. #include <linux/slab.h>
  22. #include <linux/mutex.h>
  23. #include <linux/dvb/frontend.h>
  24. #include "dvb_frontend.h"
  25. #include "stv6110x.h" /* for demodulator internal modes */
  26. #include "stv090x_reg.h"
  27. #include "stv090x.h"
  28. #include "stv090x_priv.h"
  29. static unsigned int verbose;
  30. module_param(verbose, int, 0644);
  31. /* internal params node */
  32. struct stv090x_dev {
  33. /* pointer for internal params, one for each pair of demods */
  34. struct stv090x_internal *internal;
  35. struct stv090x_dev *next_dev;
  36. };
  37. /* first internal params */
  38. static struct stv090x_dev *stv090x_first_dev;
  39. /* find chip by i2c adapter and i2c address */
  40. static struct stv090x_dev *find_dev(struct i2c_adapter *i2c_adap,
  41. u8 i2c_addr)
  42. {
  43. struct stv090x_dev *temp_dev = stv090x_first_dev;
  44. /*
  45. Search of the last stv0900 chip or
  46. find it by i2c adapter and i2c address */
  47. while ((temp_dev != NULL) &&
  48. ((temp_dev->internal->i2c_adap != i2c_adap) ||
  49. (temp_dev->internal->i2c_addr != i2c_addr))) {
  50. temp_dev = temp_dev->next_dev;
  51. }
  52. return temp_dev;
  53. }
  54. /* deallocating chip */
  55. static void remove_dev(struct stv090x_internal *internal)
  56. {
  57. struct stv090x_dev *prev_dev = stv090x_first_dev;
  58. struct stv090x_dev *del_dev = find_dev(internal->i2c_adap,
  59. internal->i2c_addr);
  60. if (del_dev != NULL) {
  61. if (del_dev == stv090x_first_dev) {
  62. stv090x_first_dev = del_dev->next_dev;
  63. } else {
  64. while (prev_dev->next_dev != del_dev)
  65. prev_dev = prev_dev->next_dev;
  66. prev_dev->next_dev = del_dev->next_dev;
  67. }
  68. kfree(del_dev);
  69. }
  70. }
  71. /* allocating new chip */
  72. static struct stv090x_dev *append_internal(struct stv090x_internal *internal)
  73. {
  74. struct stv090x_dev *new_dev;
  75. struct stv090x_dev *temp_dev;
  76. new_dev = kmalloc(sizeof(struct stv090x_dev), GFP_KERNEL);
  77. if (new_dev != NULL) {
  78. new_dev->internal = internal;
  79. new_dev->next_dev = NULL;
  80. /* append to list */
  81. if (stv090x_first_dev == NULL) {
  82. stv090x_first_dev = new_dev;
  83. } else {
  84. temp_dev = stv090x_first_dev;
  85. while (temp_dev->next_dev != NULL)
  86. temp_dev = temp_dev->next_dev;
  87. temp_dev->next_dev = new_dev;
  88. }
  89. }
  90. return new_dev;
  91. }
  92. /* DVBS1 and DSS C/N Lookup table */
  93. static const struct stv090x_tab stv090x_s1cn_tab[] = {
  94. { 0, 8917 }, /* 0.0dB */
  95. { 5, 8801 }, /* 0.5dB */
  96. { 10, 8667 }, /* 1.0dB */
  97. { 15, 8522 }, /* 1.5dB */
  98. { 20, 8355 }, /* 2.0dB */
  99. { 25, 8175 }, /* 2.5dB */
  100. { 30, 7979 }, /* 3.0dB */
  101. { 35, 7763 }, /* 3.5dB */
  102. { 40, 7530 }, /* 4.0dB */
  103. { 45, 7282 }, /* 4.5dB */
  104. { 50, 7026 }, /* 5.0dB */
  105. { 55, 6781 }, /* 5.5dB */
  106. { 60, 6514 }, /* 6.0dB */
  107. { 65, 6241 }, /* 6.5dB */
  108. { 70, 5965 }, /* 7.0dB */
  109. { 75, 5690 }, /* 7.5dB */
  110. { 80, 5424 }, /* 8.0dB */
  111. { 85, 5161 }, /* 8.5dB */
  112. { 90, 4902 }, /* 9.0dB */
  113. { 95, 4654 }, /* 9.5dB */
  114. { 100, 4417 }, /* 10.0dB */
  115. { 105, 4186 }, /* 10.5dB */
  116. { 110, 3968 }, /* 11.0dB */
  117. { 115, 3757 }, /* 11.5dB */
  118. { 120, 3558 }, /* 12.0dB */
  119. { 125, 3366 }, /* 12.5dB */
  120. { 130, 3185 }, /* 13.0dB */
  121. { 135, 3012 }, /* 13.5dB */
  122. { 140, 2850 }, /* 14.0dB */
  123. { 145, 2698 }, /* 14.5dB */
  124. { 150, 2550 }, /* 15.0dB */
  125. { 160, 2283 }, /* 16.0dB */
  126. { 170, 2042 }, /* 17.0dB */
  127. { 180, 1827 }, /* 18.0dB */
  128. { 190, 1636 }, /* 19.0dB */
  129. { 200, 1466 }, /* 20.0dB */
  130. { 210, 1315 }, /* 21.0dB */
  131. { 220, 1181 }, /* 22.0dB */
  132. { 230, 1064 }, /* 23.0dB */
  133. { 240, 960 }, /* 24.0dB */
  134. { 250, 869 }, /* 25.0dB */
  135. { 260, 792 }, /* 26.0dB */
  136. { 270, 724 }, /* 27.0dB */
  137. { 280, 665 }, /* 28.0dB */
  138. { 290, 616 }, /* 29.0dB */
  139. { 300, 573 }, /* 30.0dB */
  140. { 310, 537 }, /* 31.0dB */
  141. { 320, 507 }, /* 32.0dB */
  142. { 330, 483 }, /* 33.0dB */
  143. { 400, 398 }, /* 40.0dB */
  144. { 450, 381 }, /* 45.0dB */
  145. { 500, 377 } /* 50.0dB */
  146. };
  147. /* DVBS2 C/N Lookup table */
  148. static const struct stv090x_tab stv090x_s2cn_tab[] = {
  149. { -30, 13348 }, /* -3.0dB */
  150. { -20, 12640 }, /* -2d.0B */
  151. { -10, 11883 }, /* -1.0dB */
  152. { 0, 11101 }, /* -0.0dB */
  153. { 5, 10718 }, /* 0.5dB */
  154. { 10, 10339 }, /* 1.0dB */
  155. { 15, 9947 }, /* 1.5dB */
  156. { 20, 9552 }, /* 2.0dB */
  157. { 25, 9183 }, /* 2.5dB */
  158. { 30, 8799 }, /* 3.0dB */
  159. { 35, 8422 }, /* 3.5dB */
  160. { 40, 8062 }, /* 4.0dB */
  161. { 45, 7707 }, /* 4.5dB */
  162. { 50, 7353 }, /* 5.0dB */
  163. { 55, 7025 }, /* 5.5dB */
  164. { 60, 6684 }, /* 6.0dB */
  165. { 65, 6331 }, /* 6.5dB */
  166. { 70, 6036 }, /* 7.0dB */
  167. { 75, 5727 }, /* 7.5dB */
  168. { 80, 5437 }, /* 8.0dB */
  169. { 85, 5164 }, /* 8.5dB */
  170. { 90, 4902 }, /* 9.0dB */
  171. { 95, 4653 }, /* 9.5dB */
  172. { 100, 4408 }, /* 10.0dB */
  173. { 105, 4187 }, /* 10.5dB */
  174. { 110, 3961 }, /* 11.0dB */
  175. { 115, 3751 }, /* 11.5dB */
  176. { 120, 3558 }, /* 12.0dB */
  177. { 125, 3368 }, /* 12.5dB */
  178. { 130, 3191 }, /* 13.0dB */
  179. { 135, 3017 }, /* 13.5dB */
  180. { 140, 2862 }, /* 14.0dB */
  181. { 145, 2710 }, /* 14.5dB */
  182. { 150, 2565 }, /* 15.0dB */
  183. { 160, 2300 }, /* 16.0dB */
  184. { 170, 2058 }, /* 17.0dB */
  185. { 180, 1849 }, /* 18.0dB */
  186. { 190, 1663 }, /* 19.0dB */
  187. { 200, 1495 }, /* 20.0dB */
  188. { 210, 1349 }, /* 21.0dB */
  189. { 220, 1222 }, /* 22.0dB */
  190. { 230, 1110 }, /* 23.0dB */
  191. { 240, 1011 }, /* 24.0dB */
  192. { 250, 925 }, /* 25.0dB */
  193. { 260, 853 }, /* 26.0dB */
  194. { 270, 789 }, /* 27.0dB */
  195. { 280, 734 }, /* 28.0dB */
  196. { 290, 690 }, /* 29.0dB */
  197. { 300, 650 }, /* 30.0dB */
  198. { 310, 619 }, /* 31.0dB */
  199. { 320, 593 }, /* 32.0dB */
  200. { 330, 571 }, /* 33.0dB */
  201. { 400, 498 }, /* 40.0dB */
  202. { 450, 484 }, /* 45.0dB */
  203. { 500, 481 } /* 50.0dB */
  204. };
  205. /* RF level C/N lookup table */
  206. static const struct stv090x_tab stv090x_rf_tab[] = {
  207. { -5, 0xcaa1 }, /* -5dBm */
  208. { -10, 0xc229 }, /* -10dBm */
  209. { -15, 0xbb08 }, /* -15dBm */
  210. { -20, 0xb4bc }, /* -20dBm */
  211. { -25, 0xad5a }, /* -25dBm */
  212. { -30, 0xa298 }, /* -30dBm */
  213. { -35, 0x98a8 }, /* -35dBm */
  214. { -40, 0x8389 }, /* -40dBm */
  215. { -45, 0x59be }, /* -45dBm */
  216. { -50, 0x3a14 }, /* -50dBm */
  217. { -55, 0x2d11 }, /* -55dBm */
  218. { -60, 0x210d }, /* -60dBm */
  219. { -65, 0xa14f }, /* -65dBm */
  220. { -70, 0x07aa } /* -70dBm */
  221. };
  222. static struct stv090x_reg stv0900_initval[] = {
  223. { STV090x_OUTCFG, 0x00 },
  224. { STV090x_MODECFG, 0xff },
  225. { STV090x_AGCRF1CFG, 0x11 },
  226. { STV090x_AGCRF2CFG, 0x13 },
  227. { STV090x_TSGENERAL1X, 0x14 },
  228. { STV090x_TSTTNR2, 0x21 },
  229. { STV090x_TSTTNR4, 0x21 },
  230. { STV090x_P2_DISTXCTL, 0x22 },
  231. { STV090x_P2_F22TX, 0xc0 },
  232. { STV090x_P2_F22RX, 0xc0 },
  233. { STV090x_P2_DISRXCTL, 0x00 },
  234. { STV090x_P2_DMDCFGMD, 0xF9 },
  235. { STV090x_P2_DEMOD, 0x08 },
  236. { STV090x_P2_DMDCFG3, 0xc4 },
  237. { STV090x_P2_CARFREQ, 0xed },
  238. { STV090x_P2_LDT, 0xd0 },
  239. { STV090x_P2_LDT2, 0xb8 },
  240. { STV090x_P2_TMGCFG, 0xd2 },
  241. { STV090x_P2_TMGTHRISE, 0x20 },
  242. { STV090x_P1_TMGCFG, 0xd2 },
  243. { STV090x_P2_TMGTHFALL, 0x00 },
  244. { STV090x_P2_FECSPY, 0x88 },
  245. { STV090x_P2_FSPYDATA, 0x3a },
  246. { STV090x_P2_FBERCPT4, 0x00 },
  247. { STV090x_P2_FSPYBER, 0x10 },
  248. { STV090x_P2_ERRCTRL1, 0x35 },
  249. { STV090x_P2_ERRCTRL2, 0xc1 },
  250. { STV090x_P2_CFRICFG, 0xf8 },
  251. { STV090x_P2_NOSCFG, 0x1c },
  252. { STV090x_P2_DMDTOM, 0x20 },
  253. { STV090x_P2_CORRELMANT, 0x70 },
  254. { STV090x_P2_CORRELABS, 0x88 },
  255. { STV090x_P2_AGC2O, 0x5b },
  256. { STV090x_P2_AGC2REF, 0x38 },
  257. { STV090x_P2_CARCFG, 0xe4 },
  258. { STV090x_P2_ACLC, 0x1A },
  259. { STV090x_P2_BCLC, 0x09 },
  260. { STV090x_P2_CARHDR, 0x08 },
  261. { STV090x_P2_KREFTMG, 0xc1 },
  262. { STV090x_P2_SFRUPRATIO, 0xf0 },
  263. { STV090x_P2_SFRLOWRATIO, 0x70 },
  264. { STV090x_P2_SFRSTEP, 0x58 },
  265. { STV090x_P2_TMGCFG2, 0x01 },
  266. { STV090x_P2_CAR2CFG, 0x26 },
  267. { STV090x_P2_BCLC2S2Q, 0x86 },
  268. { STV090x_P2_BCLC2S28, 0x86 },
  269. { STV090x_P2_SMAPCOEF7, 0x77 },
  270. { STV090x_P2_SMAPCOEF6, 0x85 },
  271. { STV090x_P2_SMAPCOEF5, 0x77 },
  272. { STV090x_P2_TSCFGL, 0x20 },
  273. { STV090x_P2_DMDCFG2, 0x3b },
  274. { STV090x_P2_MODCODLST0, 0xff },
  275. { STV090x_P2_MODCODLST1, 0xff },
  276. { STV090x_P2_MODCODLST2, 0xff },
  277. { STV090x_P2_MODCODLST3, 0xff },
  278. { STV090x_P2_MODCODLST4, 0xff },
  279. { STV090x_P2_MODCODLST5, 0xff },
  280. { STV090x_P2_MODCODLST6, 0xff },
  281. { STV090x_P2_MODCODLST7, 0xcc },
  282. { STV090x_P2_MODCODLST8, 0xcc },
  283. { STV090x_P2_MODCODLST9, 0xcc },
  284. { STV090x_P2_MODCODLSTA, 0xcc },
  285. { STV090x_P2_MODCODLSTB, 0xcc },
  286. { STV090x_P2_MODCODLSTC, 0xcc },
  287. { STV090x_P2_MODCODLSTD, 0xcc },
  288. { STV090x_P2_MODCODLSTE, 0xcc },
  289. { STV090x_P2_MODCODLSTF, 0xcf },
  290. { STV090x_P1_DISTXCTL, 0x22 },
  291. { STV090x_P1_F22TX, 0xc0 },
  292. { STV090x_P1_F22RX, 0xc0 },
  293. { STV090x_P1_DISRXCTL, 0x00 },
  294. { STV090x_P1_DMDCFGMD, 0xf9 },
  295. { STV090x_P1_DEMOD, 0x08 },
  296. { STV090x_P1_DMDCFG3, 0xc4 },
  297. { STV090x_P1_DMDTOM, 0x20 },
  298. { STV090x_P1_CARFREQ, 0xed },
  299. { STV090x_P1_LDT, 0xd0 },
  300. { STV090x_P1_LDT2, 0xb8 },
  301. { STV090x_P1_TMGCFG, 0xd2 },
  302. { STV090x_P1_TMGTHRISE, 0x20 },
  303. { STV090x_P1_TMGTHFALL, 0x00 },
  304. { STV090x_P1_SFRUPRATIO, 0xf0 },
  305. { STV090x_P1_SFRLOWRATIO, 0x70 },
  306. { STV090x_P1_TSCFGL, 0x20 },
  307. { STV090x_P1_FECSPY, 0x88 },
  308. { STV090x_P1_FSPYDATA, 0x3a },
  309. { STV090x_P1_FBERCPT4, 0x00 },
  310. { STV090x_P1_FSPYBER, 0x10 },
  311. { STV090x_P1_ERRCTRL1, 0x35 },
  312. { STV090x_P1_ERRCTRL2, 0xc1 },
  313. { STV090x_P1_CFRICFG, 0xf8 },
  314. { STV090x_P1_NOSCFG, 0x1c },
  315. { STV090x_P1_CORRELMANT, 0x70 },
  316. { STV090x_P1_CORRELABS, 0x88 },
  317. { STV090x_P1_AGC2O, 0x5b },
  318. { STV090x_P1_AGC2REF, 0x38 },
  319. { STV090x_P1_CARCFG, 0xe4 },
  320. { STV090x_P1_ACLC, 0x1A },
  321. { STV090x_P1_BCLC, 0x09 },
  322. { STV090x_P1_CARHDR, 0x08 },
  323. { STV090x_P1_KREFTMG, 0xc1 },
  324. { STV090x_P1_SFRSTEP, 0x58 },
  325. { STV090x_P1_TMGCFG2, 0x01 },
  326. { STV090x_P1_CAR2CFG, 0x26 },
  327. { STV090x_P1_BCLC2S2Q, 0x86 },
  328. { STV090x_P1_BCLC2S28, 0x86 },
  329. { STV090x_P1_SMAPCOEF7, 0x77 },
  330. { STV090x_P1_SMAPCOEF6, 0x85 },
  331. { STV090x_P1_SMAPCOEF5, 0x77 },
  332. { STV090x_P1_DMDCFG2, 0x3b },
  333. { STV090x_P1_MODCODLST0, 0xff },
  334. { STV090x_P1_MODCODLST1, 0xff },
  335. { STV090x_P1_MODCODLST2, 0xff },
  336. { STV090x_P1_MODCODLST3, 0xff },
  337. { STV090x_P1_MODCODLST4, 0xff },
  338. { STV090x_P1_MODCODLST5, 0xff },
  339. { STV090x_P1_MODCODLST6, 0xff },
  340. { STV090x_P1_MODCODLST7, 0xcc },
  341. { STV090x_P1_MODCODLST8, 0xcc },
  342. { STV090x_P1_MODCODLST9, 0xcc },
  343. { STV090x_P1_MODCODLSTA, 0xcc },
  344. { STV090x_P1_MODCODLSTB, 0xcc },
  345. { STV090x_P1_MODCODLSTC, 0xcc },
  346. { STV090x_P1_MODCODLSTD, 0xcc },
  347. { STV090x_P1_MODCODLSTE, 0xcc },
  348. { STV090x_P1_MODCODLSTF, 0xcf },
  349. { STV090x_GENCFG, 0x1d },
  350. { STV090x_NBITER_NF4, 0x37 },
  351. { STV090x_NBITER_NF5, 0x29 },
  352. { STV090x_NBITER_NF6, 0x37 },
  353. { STV090x_NBITER_NF7, 0x33 },
  354. { STV090x_NBITER_NF8, 0x31 },
  355. { STV090x_NBITER_NF9, 0x2f },
  356. { STV090x_NBITER_NF10, 0x39 },
  357. { STV090x_NBITER_NF11, 0x3a },
  358. { STV090x_NBITER_NF12, 0x29 },
  359. { STV090x_NBITER_NF13, 0x37 },
  360. { STV090x_NBITER_NF14, 0x33 },
  361. { STV090x_NBITER_NF15, 0x2f },
  362. { STV090x_NBITER_NF16, 0x39 },
  363. { STV090x_NBITER_NF17, 0x3a },
  364. { STV090x_NBITERNOERR, 0x04 },
  365. { STV090x_GAINLLR_NF4, 0x0C },
  366. { STV090x_GAINLLR_NF5, 0x0F },
  367. { STV090x_GAINLLR_NF6, 0x11 },
  368. { STV090x_GAINLLR_NF7, 0x14 },
  369. { STV090x_GAINLLR_NF8, 0x17 },
  370. { STV090x_GAINLLR_NF9, 0x19 },
  371. { STV090x_GAINLLR_NF10, 0x20 },
  372. { STV090x_GAINLLR_NF11, 0x21 },
  373. { STV090x_GAINLLR_NF12, 0x0D },
  374. { STV090x_GAINLLR_NF13, 0x0F },
  375. { STV090x_GAINLLR_NF14, 0x13 },
  376. { STV090x_GAINLLR_NF15, 0x1A },
  377. { STV090x_GAINLLR_NF16, 0x1F },
  378. { STV090x_GAINLLR_NF17, 0x21 },
  379. { STV090x_RCCFGH, 0x20 },
  380. { STV090x_P1_FECM, 0x01 }, /* disable DSS modes */
  381. { STV090x_P2_FECM, 0x01 }, /* disable DSS modes */
  382. { STV090x_P1_PRVIT, 0x2F }, /* disable PR 6/7 */
  383. { STV090x_P2_PRVIT, 0x2F }, /* disable PR 6/7 */
  384. };
  385. static struct stv090x_reg stv0903_initval[] = {
  386. { STV090x_OUTCFG, 0x00 },
  387. { STV090x_AGCRF1CFG, 0x11 },
  388. { STV090x_STOPCLK1, 0x48 },
  389. { STV090x_STOPCLK2, 0x14 },
  390. { STV090x_TSTTNR1, 0x27 },
  391. { STV090x_TSTTNR2, 0x21 },
  392. { STV090x_P1_DISTXCTL, 0x22 },
  393. { STV090x_P1_F22TX, 0xc0 },
  394. { STV090x_P1_F22RX, 0xc0 },
  395. { STV090x_P1_DISRXCTL, 0x00 },
  396. { STV090x_P1_DMDCFGMD, 0xF9 },
  397. { STV090x_P1_DEMOD, 0x08 },
  398. { STV090x_P1_DMDCFG3, 0xc4 },
  399. { STV090x_P1_CARFREQ, 0xed },
  400. { STV090x_P1_TNRCFG2, 0x82 },
  401. { STV090x_P1_LDT, 0xd0 },
  402. { STV090x_P1_LDT2, 0xb8 },
  403. { STV090x_P1_TMGCFG, 0xd2 },
  404. { STV090x_P1_TMGTHRISE, 0x20 },
  405. { STV090x_P1_TMGTHFALL, 0x00 },
  406. { STV090x_P1_SFRUPRATIO, 0xf0 },
  407. { STV090x_P1_SFRLOWRATIO, 0x70 },
  408. { STV090x_P1_TSCFGL, 0x20 },
  409. { STV090x_P1_FECSPY, 0x88 },
  410. { STV090x_P1_FSPYDATA, 0x3a },
  411. { STV090x_P1_FBERCPT4, 0x00 },
  412. { STV090x_P1_FSPYBER, 0x10 },
  413. { STV090x_P1_ERRCTRL1, 0x35 },
  414. { STV090x_P1_ERRCTRL2, 0xc1 },
  415. { STV090x_P1_CFRICFG, 0xf8 },
  416. { STV090x_P1_NOSCFG, 0x1c },
  417. { STV090x_P1_DMDTOM, 0x20 },
  418. { STV090x_P1_CORRELMANT, 0x70 },
  419. { STV090x_P1_CORRELABS, 0x88 },
  420. { STV090x_P1_AGC2O, 0x5b },
  421. { STV090x_P1_AGC2REF, 0x38 },
  422. { STV090x_P1_CARCFG, 0xe4 },
  423. { STV090x_P1_ACLC, 0x1A },
  424. { STV090x_P1_BCLC, 0x09 },
  425. { STV090x_P1_CARHDR, 0x08 },
  426. { STV090x_P1_KREFTMG, 0xc1 },
  427. { STV090x_P1_SFRSTEP, 0x58 },
  428. { STV090x_P1_TMGCFG2, 0x01 },
  429. { STV090x_P1_CAR2CFG, 0x26 },
  430. { STV090x_P1_BCLC2S2Q, 0x86 },
  431. { STV090x_P1_BCLC2S28, 0x86 },
  432. { STV090x_P1_SMAPCOEF7, 0x77 },
  433. { STV090x_P1_SMAPCOEF6, 0x85 },
  434. { STV090x_P1_SMAPCOEF5, 0x77 },
  435. { STV090x_P1_DMDCFG2, 0x3b },
  436. { STV090x_P1_MODCODLST0, 0xff },
  437. { STV090x_P1_MODCODLST1, 0xff },
  438. { STV090x_P1_MODCODLST2, 0xff },
  439. { STV090x_P1_MODCODLST3, 0xff },
  440. { STV090x_P1_MODCODLST4, 0xff },
  441. { STV090x_P1_MODCODLST5, 0xff },
  442. { STV090x_P1_MODCODLST6, 0xff },
  443. { STV090x_P1_MODCODLST7, 0xcc },
  444. { STV090x_P1_MODCODLST8, 0xcc },
  445. { STV090x_P1_MODCODLST9, 0xcc },
  446. { STV090x_P1_MODCODLSTA, 0xcc },
  447. { STV090x_P1_MODCODLSTB, 0xcc },
  448. { STV090x_P1_MODCODLSTC, 0xcc },
  449. { STV090x_P1_MODCODLSTD, 0xcc },
  450. { STV090x_P1_MODCODLSTE, 0xcc },
  451. { STV090x_P1_MODCODLSTF, 0xcf },
  452. { STV090x_GENCFG, 0x1c },
  453. { STV090x_NBITER_NF4, 0x37 },
  454. { STV090x_NBITER_NF5, 0x29 },
  455. { STV090x_NBITER_NF6, 0x37 },
  456. { STV090x_NBITER_NF7, 0x33 },
  457. { STV090x_NBITER_NF8, 0x31 },
  458. { STV090x_NBITER_NF9, 0x2f },
  459. { STV090x_NBITER_NF10, 0x39 },
  460. { STV090x_NBITER_NF11, 0x3a },
  461. { STV090x_NBITER_NF12, 0x29 },
  462. { STV090x_NBITER_NF13, 0x37 },
  463. { STV090x_NBITER_NF14, 0x33 },
  464. { STV090x_NBITER_NF15, 0x2f },
  465. { STV090x_NBITER_NF16, 0x39 },
  466. { STV090x_NBITER_NF17, 0x3a },
  467. { STV090x_NBITERNOERR, 0x04 },
  468. { STV090x_GAINLLR_NF4, 0x0C },
  469. { STV090x_GAINLLR_NF5, 0x0F },
  470. { STV090x_GAINLLR_NF6, 0x11 },
  471. { STV090x_GAINLLR_NF7, 0x14 },
  472. { STV090x_GAINLLR_NF8, 0x17 },
  473. { STV090x_GAINLLR_NF9, 0x19 },
  474. { STV090x_GAINLLR_NF10, 0x20 },
  475. { STV090x_GAINLLR_NF11, 0x21 },
  476. { STV090x_GAINLLR_NF12, 0x0D },
  477. { STV090x_GAINLLR_NF13, 0x0F },
  478. { STV090x_GAINLLR_NF14, 0x13 },
  479. { STV090x_GAINLLR_NF15, 0x1A },
  480. { STV090x_GAINLLR_NF16, 0x1F },
  481. { STV090x_GAINLLR_NF17, 0x21 },
  482. { STV090x_RCCFGH, 0x20 },
  483. { STV090x_P1_FECM, 0x01 }, /*disable the DSS mode */
  484. { STV090x_P1_PRVIT, 0x2f } /*disable puncture rate 6/7*/
  485. };
  486. static struct stv090x_reg stv0900_cut20_val[] = {
  487. { STV090x_P2_DMDCFG3, 0xe8 },
  488. { STV090x_P2_DMDCFG4, 0x10 },
  489. { STV090x_P2_CARFREQ, 0x38 },
  490. { STV090x_P2_CARHDR, 0x20 },
  491. { STV090x_P2_KREFTMG, 0x5a },
  492. { STV090x_P2_SMAPCOEF7, 0x06 },
  493. { STV090x_P2_SMAPCOEF6, 0x00 },
  494. { STV090x_P2_SMAPCOEF5, 0x04 },
  495. { STV090x_P2_NOSCFG, 0x0c },
  496. { STV090x_P1_DMDCFG3, 0xe8 },
  497. { STV090x_P1_DMDCFG4, 0x10 },
  498. { STV090x_P1_CARFREQ, 0x38 },
  499. { STV090x_P1_CARHDR, 0x20 },
  500. { STV090x_P1_KREFTMG, 0x5a },
  501. { STV090x_P1_SMAPCOEF7, 0x06 },
  502. { STV090x_P1_SMAPCOEF6, 0x00 },
  503. { STV090x_P1_SMAPCOEF5, 0x04 },
  504. { STV090x_P1_NOSCFG, 0x0c },
  505. { STV090x_GAINLLR_NF4, 0x21 },
  506. { STV090x_GAINLLR_NF5, 0x21 },
  507. { STV090x_GAINLLR_NF6, 0x20 },
  508. { STV090x_GAINLLR_NF7, 0x1F },
  509. { STV090x_GAINLLR_NF8, 0x1E },
  510. { STV090x_GAINLLR_NF9, 0x1E },
  511. { STV090x_GAINLLR_NF10, 0x1D },
  512. { STV090x_GAINLLR_NF11, 0x1B },
  513. { STV090x_GAINLLR_NF12, 0x20 },
  514. { STV090x_GAINLLR_NF13, 0x20 },
  515. { STV090x_GAINLLR_NF14, 0x20 },
  516. { STV090x_GAINLLR_NF15, 0x20 },
  517. { STV090x_GAINLLR_NF16, 0x20 },
  518. { STV090x_GAINLLR_NF17, 0x21 },
  519. };
  520. static struct stv090x_reg stv0903_cut20_val[] = {
  521. { STV090x_P1_DMDCFG3, 0xe8 },
  522. { STV090x_P1_DMDCFG4, 0x10 },
  523. { STV090x_P1_CARFREQ, 0x38 },
  524. { STV090x_P1_CARHDR, 0x20 },
  525. { STV090x_P1_KREFTMG, 0x5a },
  526. { STV090x_P1_SMAPCOEF7, 0x06 },
  527. { STV090x_P1_SMAPCOEF6, 0x00 },
  528. { STV090x_P1_SMAPCOEF5, 0x04 },
  529. { STV090x_P1_NOSCFG, 0x0c },
  530. { STV090x_GAINLLR_NF4, 0x21 },
  531. { STV090x_GAINLLR_NF5, 0x21 },
  532. { STV090x_GAINLLR_NF6, 0x20 },
  533. { STV090x_GAINLLR_NF7, 0x1F },
  534. { STV090x_GAINLLR_NF8, 0x1E },
  535. { STV090x_GAINLLR_NF9, 0x1E },
  536. { STV090x_GAINLLR_NF10, 0x1D },
  537. { STV090x_GAINLLR_NF11, 0x1B },
  538. { STV090x_GAINLLR_NF12, 0x20 },
  539. { STV090x_GAINLLR_NF13, 0x20 },
  540. { STV090x_GAINLLR_NF14, 0x20 },
  541. { STV090x_GAINLLR_NF15, 0x20 },
  542. { STV090x_GAINLLR_NF16, 0x20 },
  543. { STV090x_GAINLLR_NF17, 0x21 }
  544. };
  545. /* Cut 2.0 Long Frame Tracking CR loop */
  546. static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
  547. /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
  548. { STV090x_QPSK_12, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
  549. { STV090x_QPSK_35, 0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
  550. { STV090x_QPSK_23, 0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
  551. { STV090x_QPSK_34, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
  552. { STV090x_QPSK_45, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
  553. { STV090x_QPSK_56, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
  554. { STV090x_QPSK_89, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
  555. { STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
  556. { STV090x_8PSK_35, 0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
  557. { STV090x_8PSK_23, 0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
  558. { STV090x_8PSK_34, 0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
  559. { STV090x_8PSK_56, 0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
  560. { STV090x_8PSK_89, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
  561. { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
  562. };
  563. /* Cut 3.0 Long Frame Tracking CR loop */
  564. static struct stv090x_long_frame_crloop stv090x_s2_crl_cut30[] = {
  565. /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
  566. { STV090x_QPSK_12, 0x3c, 0x2c, 0x0c, 0x2c, 0x1b, 0x2c, 0x1b, 0x1c, 0x0b, 0x3b },
  567. { STV090x_QPSK_35, 0x0d, 0x0d, 0x0c, 0x0d, 0x1b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
  568. { STV090x_QPSK_23, 0x1d, 0x0d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
  569. { STV090x_QPSK_34, 0x1d, 0x1d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
  570. { STV090x_QPSK_45, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
  571. { STV090x_QPSK_56, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
  572. { STV090x_QPSK_89, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
  573. { STV090x_QPSK_910, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
  574. { STV090x_8PSK_35, 0x39, 0x29, 0x39, 0x19, 0x19, 0x19, 0x19, 0x19, 0x09, 0x19 },
  575. { STV090x_8PSK_23, 0x2a, 0x39, 0x1a, 0x0a, 0x39, 0x0a, 0x29, 0x39, 0x29, 0x0a },
  576. { STV090x_8PSK_34, 0x2b, 0x3a, 0x1b, 0x1b, 0x3a, 0x1b, 0x1a, 0x0b, 0x1a, 0x3a },
  577. { STV090x_8PSK_56, 0x0c, 0x1b, 0x3b, 0x3b, 0x1b, 0x3b, 0x3a, 0x3b, 0x3a, 0x1b },
  578. { STV090x_8PSK_89, 0x0d, 0x3c, 0x2c, 0x2c, 0x2b, 0x0c, 0x0b, 0x3b, 0x0b, 0x1b },
  579. { STV090x_8PSK_910, 0x0d, 0x0d, 0x2c, 0x3c, 0x3b, 0x1c, 0x0b, 0x3b, 0x0b, 0x1b }
  580. };
  581. /* Cut 2.0 Long Frame Tracking CR Loop */
  582. static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
  583. /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
  584. { STV090x_16APSK_23, 0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
  585. { STV090x_16APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
  586. { STV090x_16APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
  587. { STV090x_16APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
  588. { STV090x_16APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
  589. { STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
  590. { STV090x_32APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
  591. { STV090x_32APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
  592. { STV090x_32APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
  593. { STV090x_32APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
  594. { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
  595. };
  596. /* Cut 3.0 Long Frame Tracking CR Loop */
  597. static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut30[] = {
  598. /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
  599. { STV090x_16APSK_23, 0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x0a, 0x3a, 0x0a, 0x2a, 0x0a },
  600. { STV090x_16APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x3b, 0x0a, 0x1b, 0x0a },
  601. { STV090x_16APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
  602. { STV090x_16APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
  603. { STV090x_16APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
  604. { STV090x_16APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
  605. { STV090x_32APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
  606. { STV090x_32APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
  607. { STV090x_32APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
  608. { STV090x_32APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
  609. { STV090x_32APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }
  610. };
  611. static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
  612. /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
  613. { STV090x_QPSK_14, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
  614. { STV090x_QPSK_13, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
  615. { STV090x_QPSK_25, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
  616. };
  617. static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut30[] = {
  618. /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
  619. { STV090x_QPSK_14, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x2a, 0x1c, 0x3a, 0x3b },
  620. { STV090x_QPSK_13, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b },
  621. { STV090x_QPSK_25, 0x1c, 0x3c, 0x1b, 0x3c, 0x3a, 0x1c, 0x3a, 0x3b, 0x3a, 0x2b }
  622. };
  623. /* Cut 2.0 Short Frame Tracking CR Loop */
  624. static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut20[] = {
  625. /* MODCOD 2M 5M 10M 20M 30M */
  626. { STV090x_QPSK, 0x2f, 0x2e, 0x0e, 0x0e, 0x3d },
  627. { STV090x_8PSK, 0x3e, 0x0e, 0x2d, 0x0d, 0x3c },
  628. { STV090x_16APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d },
  629. { STV090x_32APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d }
  630. };
  631. /* Cut 3.0 Short Frame Tracking CR Loop */
  632. static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut30[] = {
  633. /* MODCOD 2M 5M 10M 20M 30M */
  634. { STV090x_QPSK, 0x2C, 0x2B, 0x0B, 0x0B, 0x3A },
  635. { STV090x_8PSK, 0x3B, 0x0B, 0x2A, 0x0A, 0x39 },
  636. { STV090x_16APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A },
  637. { STV090x_32APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A }
  638. };
  639. static inline s32 comp2(s32 __x, s32 __width)
  640. {
  641. if (__width == 32)
  642. return __x;
  643. else
  644. return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
  645. }
  646. static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
  647. {
  648. const struct stv090x_config *config = state->config;
  649. int ret;
  650. u8 b0[] = { reg >> 8, reg & 0xff };
  651. u8 buf;
  652. struct i2c_msg msg[] = {
  653. { .addr = config->address, .flags = 0, .buf = b0, .len = 2 },
  654. { .addr = config->address, .flags = I2C_M_RD, .buf = &buf, .len = 1 }
  655. };
  656. ret = i2c_transfer(state->i2c, msg, 2);
  657. if (ret != 2) {
  658. if (ret != -ERESTARTSYS)
  659. dprintk(FE_ERROR, 1,
  660. "Read error, Reg=[0x%02x], Status=%d",
  661. reg, ret);
  662. return ret < 0 ? ret : -EREMOTEIO;
  663. }
  664. if (unlikely(*state->verbose >= FE_DEBUGREG))
  665. dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
  666. reg, buf);
  667. return (unsigned int) buf;
  668. }
  669. static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
  670. {
  671. const struct stv090x_config *config = state->config;
  672. int ret;
  673. u8 buf[2 + count];
  674. struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
  675. buf[0] = reg >> 8;
  676. buf[1] = reg & 0xff;
  677. memcpy(&buf[2], data, count);
  678. if (unlikely(*state->verbose >= FE_DEBUGREG)) {
  679. int i;
  680. printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg);
  681. for (i = 0; i < count; i++)
  682. printk(" %02x", data[i]);
  683. printk("\n");
  684. }
  685. ret = i2c_transfer(state->i2c, &i2c_msg, 1);
  686. if (ret != 1) {
  687. if (ret != -ERESTARTSYS)
  688. dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
  689. reg, data[0], count, ret);
  690. return ret < 0 ? ret : -EREMOTEIO;
  691. }
  692. return 0;
  693. }
  694. static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
  695. {
  696. return stv090x_write_regs(state, reg, &data, 1);
  697. }
  698. static int stv090x_i2c_gate_ctrl(struct stv090x_state *state, int enable)
  699. {
  700. u32 reg;
  701. /*
  702. * NOTE! A lock is used as a FSM to control the state in which
  703. * access is serialized between two tuners on the same demod.
  704. * This has nothing to do with a lock to protect a critical section
  705. * which may in some other cases be confused with protecting I/O
  706. * access to the demodulator gate.
  707. * In case of any error, the lock is unlocked and exit within the
  708. * relevant operations themselves.
  709. */
  710. if (enable)
  711. mutex_lock(&state->internal->tuner_lock);
  712. reg = STV090x_READ_DEMOD(state, I2CRPT);
  713. if (enable) {
  714. dprintk(FE_DEBUG, 1, "Enable Gate");
  715. STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
  716. if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
  717. goto err;
  718. } else {
  719. dprintk(FE_DEBUG, 1, "Disable Gate");
  720. STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
  721. if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
  722. goto err;
  723. }
  724. if (!enable)
  725. mutex_unlock(&state->internal->tuner_lock);
  726. return 0;
  727. err:
  728. dprintk(FE_ERROR, 1, "I/O error");
  729. mutex_unlock(&state->internal->tuner_lock);
  730. return -1;
  731. }
  732. static void stv090x_get_lock_tmg(struct stv090x_state *state)
  733. {
  734. switch (state->algo) {
  735. case STV090x_BLIND_SEARCH:
  736. dprintk(FE_DEBUG, 1, "Blind Search");
  737. if (state->srate <= 1500000) { /*10Msps< SR <=15Msps*/
  738. state->DemodTimeout = 1500;
  739. state->FecTimeout = 400;
  740. } else if (state->srate <= 5000000) { /*10Msps< SR <=15Msps*/
  741. state->DemodTimeout = 1000;
  742. state->FecTimeout = 300;
  743. } else { /*SR >20Msps*/
  744. state->DemodTimeout = 700;
  745. state->FecTimeout = 100;
  746. }
  747. break;
  748. case STV090x_COLD_SEARCH:
  749. case STV090x_WARM_SEARCH:
  750. default:
  751. dprintk(FE_DEBUG, 1, "Normal Search");
  752. if (state->srate <= 1000000) { /*SR <=1Msps*/
  753. state->DemodTimeout = 4500;
  754. state->FecTimeout = 1700;
  755. } else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
  756. state->DemodTimeout = 2500;
  757. state->FecTimeout = 1100;
  758. } else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
  759. state->DemodTimeout = 1000;
  760. state->FecTimeout = 550;
  761. } else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
  762. state->DemodTimeout = 700;
  763. state->FecTimeout = 250;
  764. } else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
  765. state->DemodTimeout = 400;
  766. state->FecTimeout = 130;
  767. } else { /*SR >20Msps*/
  768. state->DemodTimeout = 300;
  769. state->FecTimeout = 100;
  770. }
  771. break;
  772. }
  773. if (state->algo == STV090x_WARM_SEARCH)
  774. state->DemodTimeout /= 2;
  775. }
  776. static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
  777. {
  778. u32 sym;
  779. if (srate > 60000000) {
  780. sym = (srate << 4); /* SR * 2^16 / master_clk */
  781. sym /= (state->internal->mclk >> 12);
  782. } else if (srate > 6000000) {
  783. sym = (srate << 6);
  784. sym /= (state->internal->mclk >> 10);
  785. } else {
  786. sym = (srate << 9);
  787. sym /= (state->internal->mclk >> 7);
  788. }
  789. if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
  790. goto err;
  791. if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
  792. goto err;
  793. return 0;
  794. err:
  795. dprintk(FE_ERROR, 1, "I/O error");
  796. return -1;
  797. }
  798. static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
  799. {
  800. u32 sym;
  801. srate = 105 * (srate / 100);
  802. if (srate > 60000000) {
  803. sym = (srate << 4); /* SR * 2^16 / master_clk */
  804. sym /= (state->internal->mclk >> 12);
  805. } else if (srate > 6000000) {
  806. sym = (srate << 6);
  807. sym /= (state->internal->mclk >> 10);
  808. } else {
  809. sym = (srate << 9);
  810. sym /= (state->internal->mclk >> 7);
  811. }
  812. if (sym < 0x7fff) {
  813. if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
  814. goto err;
  815. if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
  816. goto err;
  817. } else {
  818. if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x7f) < 0) /* MSB */
  819. goto err;
  820. if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xff) < 0) /* LSB */
  821. goto err;
  822. }
  823. return 0;
  824. err:
  825. dprintk(FE_ERROR, 1, "I/O error");
  826. return -1;
  827. }
  828. static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
  829. {
  830. u32 sym;
  831. srate = 95 * (srate / 100);
  832. if (srate > 60000000) {
  833. sym = (srate << 4); /* SR * 2^16 / master_clk */
  834. sym /= (state->internal->mclk >> 12);
  835. } else if (srate > 6000000) {
  836. sym = (srate << 6);
  837. sym /= (state->internal->mclk >> 10);
  838. } else {
  839. sym = (srate << 9);
  840. sym /= (state->internal->mclk >> 7);
  841. }
  842. if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0x7f)) < 0) /* MSB */
  843. goto err;
  844. if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
  845. goto err;
  846. return 0;
  847. err:
  848. dprintk(FE_ERROR, 1, "I/O error");
  849. return -1;
  850. }
  851. static u32 stv090x_car_width(u32 srate, enum stv090x_rolloff rolloff)
  852. {
  853. u32 ro;
  854. switch (rolloff) {
  855. case STV090x_RO_20:
  856. ro = 20;
  857. break;
  858. case STV090x_RO_25:
  859. ro = 25;
  860. break;
  861. case STV090x_RO_35:
  862. default:
  863. ro = 35;
  864. break;
  865. }
  866. return srate + (srate * ro) / 100;
  867. }
  868. static int stv090x_set_vit_thacq(struct stv090x_state *state)
  869. {
  870. if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
  871. goto err;
  872. if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
  873. goto err;
  874. if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
  875. goto err;
  876. if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
  877. goto err;
  878. if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
  879. goto err;
  880. if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
  881. goto err;
  882. return 0;
  883. err:
  884. dprintk(FE_ERROR, 1, "I/O error");
  885. return -1;
  886. }
  887. static int stv090x_set_vit_thtracq(struct stv090x_state *state)
  888. {
  889. if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
  890. goto err;
  891. if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
  892. goto err;
  893. if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
  894. goto err;
  895. if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
  896. goto err;
  897. if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
  898. goto err;
  899. if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
  900. goto err;
  901. return 0;
  902. err:
  903. dprintk(FE_ERROR, 1, "I/O error");
  904. return -1;
  905. }
  906. static int stv090x_set_viterbi(struct stv090x_state *state)
  907. {
  908. switch (state->search_mode) {
  909. case STV090x_SEARCH_AUTO:
  910. if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
  911. goto err;
  912. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
  913. goto err;
  914. break;
  915. case STV090x_SEARCH_DVBS1:
  916. if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
  917. goto err;
  918. switch (state->fec) {
  919. case STV090x_PR12:
  920. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
  921. goto err;
  922. break;
  923. case STV090x_PR23:
  924. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
  925. goto err;
  926. break;
  927. case STV090x_PR34:
  928. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
  929. goto err;
  930. break;
  931. case STV090x_PR56:
  932. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
  933. goto err;
  934. break;
  935. case STV090x_PR78:
  936. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
  937. goto err;
  938. break;
  939. default:
  940. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
  941. goto err;
  942. break;
  943. }
  944. break;
  945. case STV090x_SEARCH_DSS:
  946. if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
  947. goto err;
  948. switch (state->fec) {
  949. case STV090x_PR12:
  950. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
  951. goto err;
  952. break;
  953. case STV090x_PR23:
  954. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
  955. goto err;
  956. break;
  957. case STV090x_PR67:
  958. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
  959. goto err;
  960. break;
  961. default:
  962. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
  963. goto err;
  964. break;
  965. }
  966. break;
  967. default:
  968. break;
  969. }
  970. return 0;
  971. err:
  972. dprintk(FE_ERROR, 1, "I/O error");
  973. return -1;
  974. }
  975. static int stv090x_stop_modcod(struct stv090x_state *state)
  976. {
  977. if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
  978. goto err;
  979. if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
  980. goto err;
  981. if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
  982. goto err;
  983. if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
  984. goto err;
  985. if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
  986. goto err;
  987. if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
  988. goto err;
  989. if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
  990. goto err;
  991. if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
  992. goto err;
  993. if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
  994. goto err;
  995. if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
  996. goto err;
  997. if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
  998. goto err;
  999. if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
  1000. goto err;
  1001. if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
  1002. goto err;
  1003. if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
  1004. goto err;
  1005. if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
  1006. goto err;
  1007. if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
  1008. goto err;
  1009. return 0;
  1010. err:
  1011. dprintk(FE_ERROR, 1, "I/O error");
  1012. return -1;
  1013. }
  1014. static int stv090x_activate_modcod(struct stv090x_state *state)
  1015. {
  1016. if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
  1017. goto err;
  1018. if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
  1019. goto err;
  1020. if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
  1021. goto err;
  1022. if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
  1023. goto err;
  1024. if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
  1025. goto err;
  1026. if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
  1027. goto err;
  1028. if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
  1029. goto err;
  1030. if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
  1031. goto err;
  1032. if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
  1033. goto err;
  1034. if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
  1035. goto err;
  1036. if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
  1037. goto err;
  1038. if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
  1039. goto err;
  1040. if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
  1041. goto err;
  1042. if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
  1043. goto err;
  1044. if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
  1045. goto err;
  1046. if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
  1047. goto err;
  1048. return 0;
  1049. err:
  1050. dprintk(FE_ERROR, 1, "I/O error");
  1051. return -1;
  1052. }
  1053. static int stv090x_activate_modcod_single(struct stv090x_state *state)
  1054. {
  1055. if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
  1056. goto err;
  1057. if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xf0) < 0)
  1058. goto err;
  1059. if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0x00) < 0)
  1060. goto err;
  1061. if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0x00) < 0)
  1062. goto err;
  1063. if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0x00) < 0)
  1064. goto err;
  1065. if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0x00) < 0)
  1066. goto err;
  1067. if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0x00) < 0)
  1068. goto err;
  1069. if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0x00) < 0)
  1070. goto err;
  1071. if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0x00) < 0)
  1072. goto err;
  1073. if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0x00) < 0)
  1074. goto err;
  1075. if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0x00) < 0)
  1076. goto err;
  1077. if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0x00) < 0)
  1078. goto err;
  1079. if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0x00) < 0)
  1080. goto err;
  1081. if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0x00) < 0)
  1082. goto err;
  1083. if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0x00) < 0)
  1084. goto err;
  1085. if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0x0f) < 0)
  1086. goto err;
  1087. return 0;
  1088. err:
  1089. dprintk(FE_ERROR, 1, "I/O error");
  1090. return -1;
  1091. }
  1092. static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
  1093. {
  1094. u32 reg;
  1095. switch (state->demod) {
  1096. case STV090x_DEMODULATOR_0:
  1097. mutex_lock(&state->internal->demod_lock);
  1098. reg = stv090x_read_reg(state, STV090x_STOPCLK2);
  1099. STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
  1100. if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
  1101. goto err;
  1102. mutex_unlock(&state->internal->demod_lock);
  1103. break;
  1104. case STV090x_DEMODULATOR_1:
  1105. mutex_lock(&state->internal->demod_lock);
  1106. reg = stv090x_read_reg(state, STV090x_STOPCLK2);
  1107. STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
  1108. if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
  1109. goto err;
  1110. mutex_unlock(&state->internal->demod_lock);
  1111. break;
  1112. default:
  1113. dprintk(FE_ERROR, 1, "Wrong demodulator!");
  1114. break;
  1115. }
  1116. return 0;
  1117. err:
  1118. mutex_unlock(&state->internal->demod_lock);
  1119. dprintk(FE_ERROR, 1, "I/O error");
  1120. return -1;
  1121. }
  1122. static int stv090x_dvbs_track_crl(struct stv090x_state *state)
  1123. {
  1124. if (state->internal->dev_ver >= 0x30) {
  1125. /* Set ACLC BCLC optimised value vs SR */
  1126. if (state->srate >= 15000000) {
  1127. if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0)
  1128. goto err;
  1129. if (STV090x_WRITE_DEMOD(state, BCLC, 0x1a) < 0)
  1130. goto err;
  1131. } else if ((state->srate >= 7000000) && (15000000 > state->srate)) {
  1132. if (STV090x_WRITE_DEMOD(state, ACLC, 0x0c) < 0)
  1133. goto err;
  1134. if (STV090x_WRITE_DEMOD(state, BCLC, 0x1b) < 0)
  1135. goto err;
  1136. } else if (state->srate < 7000000) {
  1137. if (STV090x_WRITE_DEMOD(state, ACLC, 0x2c) < 0)
  1138. goto err;
  1139. if (STV090x_WRITE_DEMOD(state, BCLC, 0x1c) < 0)
  1140. goto err;
  1141. }
  1142. } else {
  1143. /* Cut 2.0 */
  1144. if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
  1145. goto err;
  1146. if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
  1147. goto err;
  1148. }
  1149. return 0;
  1150. err:
  1151. dprintk(FE_ERROR, 1, "I/O error");
  1152. return -1;
  1153. }
  1154. static int stv090x_delivery_search(struct stv090x_state *state)
  1155. {
  1156. u32 reg;
  1157. switch (state->search_mode) {
  1158. case STV090x_SEARCH_DVBS1:
  1159. case STV090x_SEARCH_DSS:
  1160. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1161. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
  1162. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
  1163. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1164. goto err;
  1165. /* Activate Viterbi decoder in legacy search,
  1166. * do not use FRESVIT1, might impact VITERBI2
  1167. */
  1168. if (stv090x_vitclk_ctl(state, 0) < 0)
  1169. goto err;
  1170. if (stv090x_dvbs_track_crl(state) < 0)
  1171. goto err;
  1172. if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
  1173. goto err;
  1174. if (stv090x_set_vit_thacq(state) < 0)
  1175. goto err;
  1176. if (stv090x_set_viterbi(state) < 0)
  1177. goto err;
  1178. break;
  1179. case STV090x_SEARCH_DVBS2:
  1180. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1181. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
  1182. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
  1183. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1184. goto err;
  1185. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
  1186. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
  1187. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1188. goto err;
  1189. if (stv090x_vitclk_ctl(state, 1) < 0)
  1190. goto err;
  1191. if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
  1192. goto err;
  1193. if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
  1194. goto err;
  1195. if (state->internal->dev_ver <= 0x20) {
  1196. /* enable S2 carrier loop */
  1197. if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
  1198. goto err;
  1199. } else {
  1200. /* > Cut 3: Stop carrier 3 */
  1201. if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
  1202. goto err;
  1203. }
  1204. if (state->demod_mode != STV090x_SINGLE) {
  1205. /* Cut 2: enable link during search */
  1206. if (stv090x_activate_modcod(state) < 0)
  1207. goto err;
  1208. } else {
  1209. /* Single demodulator
  1210. * Authorize SHORT and LONG frames,
  1211. * QPSK, 8PSK, 16APSK and 32APSK
  1212. */
  1213. if (stv090x_activate_modcod_single(state) < 0)
  1214. goto err;
  1215. }
  1216. if (stv090x_set_vit_thtracq(state) < 0)
  1217. goto err;
  1218. break;
  1219. case STV090x_SEARCH_AUTO:
  1220. default:
  1221. /* enable DVB-S2 and DVB-S2 in Auto MODE */
  1222. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1223. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
  1224. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
  1225. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1226. goto err;
  1227. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
  1228. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
  1229. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1230. goto err;
  1231. if (stv090x_vitclk_ctl(state, 0) < 0)
  1232. goto err;
  1233. if (stv090x_dvbs_track_crl(state) < 0)
  1234. goto err;
  1235. if (state->internal->dev_ver <= 0x20) {
  1236. /* enable S2 carrier loop */
  1237. if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
  1238. goto err;
  1239. } else {
  1240. /* > Cut 3: Stop carrier 3 */
  1241. if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
  1242. goto err;
  1243. }
  1244. if (state->demod_mode != STV090x_SINGLE) {
  1245. /* Cut 2: enable link during search */
  1246. if (stv090x_activate_modcod(state) < 0)
  1247. goto err;
  1248. } else {
  1249. /* Single demodulator
  1250. * Authorize SHORT and LONG frames,
  1251. * QPSK, 8PSK, 16APSK and 32APSK
  1252. */
  1253. if (stv090x_activate_modcod_single(state) < 0)
  1254. goto err;
  1255. }
  1256. if (stv090x_set_vit_thacq(state) < 0)
  1257. goto err;
  1258. if (stv090x_set_viterbi(state) < 0)
  1259. goto err;
  1260. break;
  1261. }
  1262. return 0;
  1263. err:
  1264. dprintk(FE_ERROR, 1, "I/O error");
  1265. return -1;
  1266. }
  1267. static int stv090x_start_search(struct stv090x_state *state)
  1268. {
  1269. u32 reg, freq_abs;
  1270. s16 freq;
  1271. /* Reset demodulator */
  1272. reg = STV090x_READ_DEMOD(state, DMDISTATE);
  1273. STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
  1274. if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
  1275. goto err;
  1276. if (state->internal->dev_ver <= 0x20) {
  1277. if (state->srate <= 5000000) {
  1278. if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
  1279. goto err;
  1280. if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
  1281. goto err;
  1282. if (STV090x_WRITE_DEMOD(state, CFRUP0, 0xff) < 0)
  1283. goto err;
  1284. if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
  1285. goto err;
  1286. if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
  1287. goto err;
  1288. /*enlarge the timing bandwith for Low SR*/
  1289. if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
  1290. goto err;
  1291. } else {
  1292. /* If the symbol rate is >5 Msps
  1293. Set The carrier search up and low to auto mode */
  1294. if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
  1295. goto err;
  1296. /*reduce the timing bandwith for high SR*/
  1297. if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
  1298. goto err;
  1299. }
  1300. } else {
  1301. /* >= Cut 3 */
  1302. if (state->srate <= 5000000) {
  1303. /* enlarge the timing bandwith for Low SR */
  1304. STV090x_WRITE_DEMOD(state, RTCS2, 0x68);
  1305. } else {
  1306. /* reduce timing bandwith for high SR */
  1307. STV090x_WRITE_DEMOD(state, RTCS2, 0x44);
  1308. }
  1309. /* Set CFR min and max to manual mode */
  1310. STV090x_WRITE_DEMOD(state, CARCFG, 0x46);
  1311. if (state->algo == STV090x_WARM_SEARCH) {
  1312. /* WARM Start
  1313. * CFR min = -1MHz,
  1314. * CFR max = +1MHz
  1315. */
  1316. freq_abs = 1000 << 16;
  1317. freq_abs /= (state->internal->mclk / 1000);
  1318. freq = (s16) freq_abs;
  1319. } else {
  1320. /* COLD Start
  1321. * CFR min =- (SearchRange / 2 + 600KHz)
  1322. * CFR max = +(SearchRange / 2 + 600KHz)
  1323. * (600KHz for the tuner step size)
  1324. */
  1325. freq_abs = (state->search_range / 2000) + 600;
  1326. freq_abs = freq_abs << 16;
  1327. freq_abs /= (state->internal->mclk / 1000);
  1328. freq = (s16) freq_abs;
  1329. }
  1330. if (STV090x_WRITE_DEMOD(state, CFRUP1, MSB(freq)) < 0)
  1331. goto err;
  1332. if (STV090x_WRITE_DEMOD(state, CFRUP0, LSB(freq)) < 0)
  1333. goto err;
  1334. freq *= -1;
  1335. if (STV090x_WRITE_DEMOD(state, CFRLOW1, MSB(freq)) < 0)
  1336. goto err;
  1337. if (STV090x_WRITE_DEMOD(state, CFRLOW0, LSB(freq)) < 0)
  1338. goto err;
  1339. }
  1340. if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
  1341. goto err;
  1342. if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
  1343. goto err;
  1344. if (state->internal->dev_ver >= 0x20) {
  1345. if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
  1346. goto err;
  1347. if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
  1348. goto err;
  1349. if ((state->search_mode == STV090x_SEARCH_DVBS1) ||
  1350. (state->search_mode == STV090x_SEARCH_DSS) ||
  1351. (state->search_mode == STV090x_SEARCH_AUTO)) {
  1352. if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
  1353. goto err;
  1354. if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
  1355. goto err;
  1356. }
  1357. }
  1358. if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
  1359. goto err;
  1360. if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
  1361. goto err;
  1362. if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
  1363. goto err;
  1364. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1365. STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
  1366. STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
  1367. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1368. goto err;
  1369. reg = STV090x_READ_DEMOD(state, DMDCFG2);
  1370. STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
  1371. if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
  1372. goto err;
  1373. if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0)
  1374. goto err;
  1375. if (state->internal->dev_ver >= 0x20) {
  1376. /*Frequency offset detector setting*/
  1377. if (state->srate < 2000000) {
  1378. if (state->internal->dev_ver <= 0x20) {
  1379. /* Cut 2 */
  1380. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0)
  1381. goto err;
  1382. } else {
  1383. /* Cut 3 */
  1384. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x89) < 0)
  1385. goto err;
  1386. }
  1387. if (STV090x_WRITE_DEMOD(state, CARHDR, 0x40) < 0)
  1388. goto err;
  1389. } else if (state->srate < 10000000) {
  1390. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
  1391. goto err;
  1392. if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
  1393. goto err;
  1394. } else {
  1395. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
  1396. goto err;
  1397. if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
  1398. goto err;
  1399. }
  1400. } else {
  1401. if (state->srate < 10000000) {
  1402. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
  1403. goto err;
  1404. } else {
  1405. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
  1406. goto err;
  1407. }
  1408. }
  1409. switch (state->algo) {
  1410. case STV090x_WARM_SEARCH:
  1411. /* The symbol rate and the exact
  1412. * carrier Frequency are known
  1413. */
  1414. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
  1415. goto err;
  1416. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
  1417. goto err;
  1418. break;
  1419. case STV090x_COLD_SEARCH:
  1420. /* The symbol rate is known */
  1421. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
  1422. goto err;
  1423. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
  1424. goto err;
  1425. break;
  1426. default:
  1427. break;
  1428. }
  1429. return 0;
  1430. err:
  1431. dprintk(FE_ERROR, 1, "I/O error");
  1432. return -1;
  1433. }
  1434. static int stv090x_get_agc2_min_level(struct stv090x_state *state)
  1435. {
  1436. u32 agc2_min = 0xffff, agc2 = 0, freq_init, freq_step, reg;
  1437. s32 i, j, steps, dir;
  1438. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
  1439. goto err;
  1440. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1441. STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
  1442. STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
  1443. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1444. goto err;
  1445. if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
  1446. goto err;
  1447. if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
  1448. goto err;
  1449. if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
  1450. goto err;
  1451. if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
  1452. goto err;
  1453. if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
  1454. goto err;
  1455. if (stv090x_set_srate(state, 1000000) < 0)
  1456. goto err;
  1457. steps = state->search_range / 1000000;
  1458. if (steps <= 0)
  1459. steps = 1;
  1460. dir = 1;
  1461. freq_step = (1000000 * 256) / (state->internal->mclk / 256);
  1462. freq_init = 0;
  1463. for (i = 0; i < steps; i++) {
  1464. if (dir > 0)
  1465. freq_init = freq_init + (freq_step * i);
  1466. else
  1467. freq_init = freq_init - (freq_step * i);
  1468. dir *= -1;
  1469. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
  1470. goto err;
  1471. if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
  1472. goto err;
  1473. if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
  1474. goto err;
  1475. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
  1476. goto err;
  1477. msleep(10);
  1478. agc2 = 0;
  1479. for (j = 0; j < 10; j++) {
  1480. agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
  1481. STV090x_READ_DEMOD(state, AGC2I0);
  1482. }
  1483. agc2 /= 10;
  1484. if (agc2 < agc2_min)
  1485. agc2_min = agc2;
  1486. }
  1487. return agc2_min;
  1488. err:
  1489. dprintk(FE_ERROR, 1, "I/O error");
  1490. return -1;
  1491. }
  1492. static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
  1493. {
  1494. u8 r3, r2, r1, r0;
  1495. s32 srate, int_1, int_2, tmp_1, tmp_2;
  1496. r3 = STV090x_READ_DEMOD(state, SFR3);
  1497. r2 = STV090x_READ_DEMOD(state, SFR2);
  1498. r1 = STV090x_READ_DEMOD(state, SFR1);
  1499. r0 = STV090x_READ_DEMOD(state, SFR0);
  1500. srate = ((r3 << 24) | (r2 << 16) | (r1 << 8) | r0);
  1501. int_1 = clk >> 16;
  1502. int_2 = srate >> 16;
  1503. tmp_1 = clk % 0x10000;
  1504. tmp_2 = srate % 0x10000;
  1505. srate = (int_1 * int_2) +
  1506. ((int_1 * tmp_2) >> 16) +
  1507. ((int_2 * tmp_1) >> 16);
  1508. return srate;
  1509. }
  1510. static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
  1511. {
  1512. struct dvb_frontend *fe = &state->frontend;
  1513. int tmg_lock = 0, i;
  1514. s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
  1515. u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
  1516. u32 agc2th;
  1517. if (state->internal->dev_ver >= 0x30)
  1518. agc2th = 0x2e00;
  1519. else
  1520. agc2th = 0x1f00;
  1521. reg = STV090x_READ_DEMOD(state, DMDISTATE);
  1522. STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
  1523. if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
  1524. goto err;
  1525. if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
  1526. goto err;
  1527. if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0)
  1528. goto err;
  1529. if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
  1530. goto err;
  1531. if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
  1532. goto err;
  1533. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1534. STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
  1535. STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
  1536. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1537. goto err;
  1538. if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
  1539. goto err;
  1540. if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
  1541. goto err;
  1542. if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
  1543. goto err;
  1544. if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
  1545. goto err;
  1546. if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
  1547. goto err;
  1548. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0)
  1549. goto err;
  1550. if (state->internal->dev_ver >= 0x30) {
  1551. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0)
  1552. goto err;
  1553. if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x98) < 0)
  1554. goto err;
  1555. } else if (state->internal->dev_ver >= 0x20) {
  1556. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
  1557. goto err;
  1558. if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
  1559. goto err;
  1560. }
  1561. if (state->srate <= 2000000)
  1562. car_step = 1000;
  1563. else if (state->srate <= 5000000)
  1564. car_step = 2000;
  1565. else if (state->srate <= 12000000)
  1566. car_step = 3000;
  1567. else
  1568. car_step = 5000;
  1569. steps = -1 + ((state->search_range / 1000) / car_step);
  1570. steps /= 2;
  1571. steps = (2 * steps) + 1;
  1572. if (steps < 0)
  1573. steps = 1;
  1574. else if (steps > 10) {
  1575. steps = 11;
  1576. car_step = (state->search_range / 1000) / 10;
  1577. }
  1578. cur_step = 0;
  1579. dir = 1;
  1580. freq = state->frequency;
  1581. while ((!tmg_lock) && (cur_step < steps)) {
  1582. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
  1583. goto err;
  1584. if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
  1585. goto err;
  1586. if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
  1587. goto err;
  1588. if (STV090x_WRITE_DEMOD(state, SFRINIT1, 0x00) < 0)
  1589. goto err;
  1590. if (STV090x_WRITE_DEMOD(state, SFRINIT0, 0x00) < 0)
  1591. goto err;
  1592. /* trigger acquisition */
  1593. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x40) < 0)
  1594. goto err;
  1595. msleep(50);
  1596. for (i = 0; i < 10; i++) {
  1597. reg = STV090x_READ_DEMOD(state, DSTATUS);
  1598. if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
  1599. tmg_cpt++;
  1600. agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
  1601. STV090x_READ_DEMOD(state, AGC2I0);
  1602. }
  1603. agc2 /= 10;
  1604. srate_coarse = stv090x_get_srate(state, state->internal->mclk);
  1605. cur_step++;
  1606. dir *= -1;
  1607. if ((tmg_cpt >= 5) && (agc2 < agc2th) &&
  1608. (srate_coarse < 50000000) && (srate_coarse > 850000))
  1609. tmg_lock = 1;
  1610. else if (cur_step < steps) {
  1611. if (dir > 0)
  1612. freq += cur_step * car_step;
  1613. else
  1614. freq -= cur_step * car_step;
  1615. /* Setup tuner */
  1616. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  1617. goto err;
  1618. if (state->config->tuner_set_frequency) {
  1619. if (state->config->tuner_set_frequency(fe, freq) < 0)
  1620. goto err_gateoff;
  1621. }
  1622. if (state->config->tuner_set_bandwidth) {
  1623. if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
  1624. goto err_gateoff;
  1625. }
  1626. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  1627. goto err;
  1628. msleep(50);
  1629. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  1630. goto err;
  1631. if (state->config->tuner_get_status) {
  1632. if (state->config->tuner_get_status(fe, &reg) < 0)
  1633. goto err_gateoff;
  1634. }
  1635. if (reg)
  1636. dprintk(FE_DEBUG, 1, "Tuner phase locked");
  1637. else
  1638. dprintk(FE_DEBUG, 1, "Tuner unlocked");
  1639. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  1640. goto err;
  1641. }
  1642. }
  1643. if (!tmg_lock)
  1644. srate_coarse = 0;
  1645. else
  1646. srate_coarse = stv090x_get_srate(state, state->internal->mclk);
  1647. return srate_coarse;
  1648. err_gateoff:
  1649. stv090x_i2c_gate_ctrl(state, 0);
  1650. err:
  1651. dprintk(FE_ERROR, 1, "I/O error");
  1652. return -1;
  1653. }
  1654. static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
  1655. {
  1656. u32 srate_coarse, freq_coarse, sym, reg;
  1657. srate_coarse = stv090x_get_srate(state, state->internal->mclk);
  1658. freq_coarse = STV090x_READ_DEMOD(state, CFR2) << 8;
  1659. freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
  1660. sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
  1661. if (sym < state->srate)
  1662. srate_coarse = 0;
  1663. else {
  1664. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
  1665. goto err;
  1666. if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
  1667. goto err;
  1668. if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
  1669. goto err;
  1670. if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
  1671. goto err;
  1672. if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
  1673. goto err;
  1674. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1675. STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
  1676. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1677. goto err;
  1678. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
  1679. goto err;
  1680. if (state->internal->dev_ver >= 0x30) {
  1681. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
  1682. goto err;
  1683. } else if (state->internal->dev_ver >= 0x20) {
  1684. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
  1685. goto err;
  1686. }
  1687. if (srate_coarse > 3000000) {
  1688. sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
  1689. sym = (sym / 1000) * 65536;
  1690. sym /= (state->internal->mclk / 1000);
  1691. if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
  1692. goto err;
  1693. if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
  1694. goto err;
  1695. sym = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
  1696. sym = (sym / 1000) * 65536;
  1697. sym /= (state->internal->mclk / 1000);
  1698. if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
  1699. goto err;
  1700. if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
  1701. goto err;
  1702. sym = (srate_coarse / 1000) * 65536;
  1703. sym /= (state->internal->mclk / 1000);
  1704. if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
  1705. goto err;
  1706. if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
  1707. goto err;
  1708. } else {
  1709. sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
  1710. sym = (sym / 100) * 65536;
  1711. sym /= (state->internal->mclk / 100);
  1712. if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
  1713. goto err;
  1714. if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
  1715. goto err;
  1716. sym = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
  1717. sym = (sym / 100) * 65536;
  1718. sym /= (state->internal->mclk / 100);
  1719. if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
  1720. goto err;
  1721. if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
  1722. goto err;
  1723. sym = (srate_coarse / 100) * 65536;
  1724. sym /= (state->internal->mclk / 100);
  1725. if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
  1726. goto err;
  1727. if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
  1728. goto err;
  1729. }
  1730. if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
  1731. goto err;
  1732. if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
  1733. goto err;
  1734. if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
  1735. goto err;
  1736. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
  1737. goto err;
  1738. }
  1739. return srate_coarse;
  1740. err:
  1741. dprintk(FE_ERROR, 1, "I/O error");
  1742. return -1;
  1743. }
  1744. static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
  1745. {
  1746. s32 timer = 0, lock = 0;
  1747. u32 reg;
  1748. u8 stat;
  1749. while ((timer < timeout) && (!lock)) {
  1750. reg = STV090x_READ_DEMOD(state, DMDSTATE);
  1751. stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
  1752. switch (stat) {
  1753. case 0: /* searching */
  1754. case 1: /* first PLH detected */
  1755. default:
  1756. dprintk(FE_DEBUG, 1, "Demodulator searching ..");
  1757. lock = 0;
  1758. break;
  1759. case 2: /* DVB-S2 mode */
  1760. case 3: /* DVB-S1/legacy mode */
  1761. reg = STV090x_READ_DEMOD(state, DSTATUS);
  1762. lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
  1763. break;
  1764. }
  1765. if (!lock)
  1766. msleep(10);
  1767. else
  1768. dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
  1769. timer += 10;
  1770. }
  1771. return lock;
  1772. }
  1773. static int stv090x_blind_search(struct stv090x_state *state)
  1774. {
  1775. u32 agc2, reg, srate_coarse;
  1776. s32 cpt_fail, agc2_ovflw, i;
  1777. u8 k_ref, k_max, k_min;
  1778. int coarse_fail = 0;
  1779. int lock;
  1780. k_max = 110;
  1781. k_min = 10;
  1782. agc2 = stv090x_get_agc2_min_level(state);
  1783. if (agc2 > STV090x_SEARCH_AGC2_TH(state->internal->dev_ver)) {
  1784. lock = 0;
  1785. } else {
  1786. if (state->internal->dev_ver <= 0x20) {
  1787. if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
  1788. goto err;
  1789. } else {
  1790. /* > Cut 3 */
  1791. if (STV090x_WRITE_DEMOD(state, CARCFG, 0x06) < 0)
  1792. goto err;
  1793. }
  1794. if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
  1795. goto err;
  1796. if (state->internal->dev_ver >= 0x20) {
  1797. if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
  1798. goto err;
  1799. if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
  1800. goto err;
  1801. if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
  1802. goto err;
  1803. if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
  1804. goto err;
  1805. }
  1806. k_ref = k_max;
  1807. do {
  1808. if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
  1809. goto err;
  1810. if (stv090x_srate_srch_coarse(state) != 0) {
  1811. srate_coarse = stv090x_srate_srch_fine(state);
  1812. if (srate_coarse != 0) {
  1813. stv090x_get_lock_tmg(state);
  1814. lock = stv090x_get_dmdlock(state,
  1815. state->DemodTimeout);
  1816. } else {
  1817. lock = 0;
  1818. }
  1819. } else {
  1820. cpt_fail = 0;
  1821. agc2_ovflw = 0;
  1822. for (i = 0; i < 10; i++) {
  1823. agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
  1824. STV090x_READ_DEMOD(state, AGC2I0);
  1825. if (agc2 >= 0xff00)
  1826. agc2_ovflw++;
  1827. reg = STV090x_READ_DEMOD(state, DSTATUS2);
  1828. if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
  1829. (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
  1830. cpt_fail++;
  1831. }
  1832. if ((cpt_fail > 7) || (agc2_ovflw > 7))
  1833. coarse_fail = 1;
  1834. lock = 0;
  1835. }
  1836. k_ref -= 20;
  1837. } while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
  1838. }
  1839. return lock;
  1840. err:
  1841. dprintk(FE_ERROR, 1, "I/O error");
  1842. return -1;
  1843. }
  1844. static int stv090x_chk_tmg(struct stv090x_state *state)
  1845. {
  1846. u32 reg;
  1847. s32 tmg_cpt = 0, i;
  1848. u8 freq, tmg_thh, tmg_thl;
  1849. int tmg_lock = 0;
  1850. freq = STV090x_READ_DEMOD(state, CARFREQ);
  1851. tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
  1852. tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
  1853. if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
  1854. goto err;
  1855. if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
  1856. goto err;
  1857. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1858. STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
  1859. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1860. goto err;
  1861. if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
  1862. goto err;
  1863. if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
  1864. goto err;
  1865. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
  1866. goto err;
  1867. if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
  1868. goto err;
  1869. if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
  1870. goto err;
  1871. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
  1872. goto err;
  1873. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
  1874. goto err;
  1875. msleep(10);
  1876. for (i = 0; i < 10; i++) {
  1877. reg = STV090x_READ_DEMOD(state, DSTATUS);
  1878. if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
  1879. tmg_cpt++;
  1880. msleep(1);
  1881. }
  1882. if (tmg_cpt >= 3)
  1883. tmg_lock = 1;
  1884. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
  1885. goto err;
  1886. if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
  1887. goto err;
  1888. if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
  1889. goto err;
  1890. if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
  1891. goto err;
  1892. if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
  1893. goto err;
  1894. if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
  1895. goto err;
  1896. return tmg_lock;
  1897. err:
  1898. dprintk(FE_ERROR, 1, "I/O error");
  1899. return -1;
  1900. }
  1901. static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
  1902. {
  1903. struct dvb_frontend *fe = &state->frontend;
  1904. u32 reg;
  1905. s32 car_step, steps, cur_step, dir, freq, timeout_lock;
  1906. int lock = 0;
  1907. if (state->srate >= 10000000)
  1908. timeout_lock = timeout_dmd / 3;
  1909. else
  1910. timeout_lock = timeout_dmd / 2;
  1911. lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
  1912. if (!lock) {
  1913. if (state->srate >= 10000000) {
  1914. if (stv090x_chk_tmg(state)) {
  1915. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
  1916. goto err;
  1917. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
  1918. goto err;
  1919. lock = stv090x_get_dmdlock(state, timeout_dmd);
  1920. } else {
  1921. lock = 0;
  1922. }
  1923. } else {
  1924. if (state->srate <= 4000000)
  1925. car_step = 1000;
  1926. else if (state->srate <= 7000000)
  1927. car_step = 2000;
  1928. else if (state->srate <= 10000000)
  1929. car_step = 3000;
  1930. else
  1931. car_step = 5000;
  1932. steps = (state->search_range / 1000) / car_step;
  1933. steps /= 2;
  1934. steps = 2 * (steps + 1);
  1935. if (steps < 0)
  1936. steps = 2;
  1937. else if (steps > 12)
  1938. steps = 12;
  1939. cur_step = 1;
  1940. dir = 1;
  1941. if (!lock) {
  1942. freq = state->frequency;
  1943. state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
  1944. while ((cur_step <= steps) && (!lock)) {
  1945. if (dir > 0)
  1946. freq += cur_step * car_step;
  1947. else
  1948. freq -= cur_step * car_step;
  1949. /* Setup tuner */
  1950. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  1951. goto err;
  1952. if (state->config->tuner_set_frequency) {
  1953. if (state->config->tuner_set_frequency(fe, freq) < 0)
  1954. goto err_gateoff;
  1955. }
  1956. if (state->config->tuner_set_bandwidth) {
  1957. if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
  1958. goto err_gateoff;
  1959. }
  1960. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  1961. goto err;
  1962. msleep(50);
  1963. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  1964. goto err;
  1965. if (state->config->tuner_get_status) {
  1966. if (state->config->tuner_get_status(fe, &reg) < 0)
  1967. goto err_gateoff;
  1968. }
  1969. if (reg)
  1970. dprintk(FE_DEBUG, 1, "Tuner phase locked");
  1971. else
  1972. dprintk(FE_DEBUG, 1, "Tuner unlocked");
  1973. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  1974. goto err;
  1975. STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
  1976. if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
  1977. goto err;
  1978. if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
  1979. goto err;
  1980. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
  1981. goto err;
  1982. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
  1983. goto err;
  1984. lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
  1985. dir *= -1;
  1986. cur_step++;
  1987. }
  1988. }
  1989. }
  1990. }
  1991. return lock;
  1992. err_gateoff:
  1993. stv090x_i2c_gate_ctrl(state, 0);
  1994. err:
  1995. dprintk(FE_ERROR, 1, "I/O error");
  1996. return -1;
  1997. }
  1998. static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
  1999. {
  2000. s32 timeout, inc, steps_max, srate, car_max;
  2001. srate = state->srate;
  2002. car_max = state->search_range / 1000;
  2003. car_max += car_max / 10;
  2004. car_max = 65536 * (car_max / 2);
  2005. car_max /= (state->internal->mclk / 1000);
  2006. if (car_max > 0x4000)
  2007. car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
  2008. inc = srate;
  2009. inc /= state->internal->mclk / 1000;
  2010. inc *= 256;
  2011. inc *= 256;
  2012. inc /= 1000;
  2013. switch (state->search_mode) {
  2014. case STV090x_SEARCH_DVBS1:
  2015. case STV090x_SEARCH_DSS:
  2016. inc *= 3; /* freq step = 3% of srate */
  2017. timeout = 20;
  2018. break;
  2019. case STV090x_SEARCH_DVBS2:
  2020. inc *= 4;
  2021. timeout = 25;
  2022. break;
  2023. case STV090x_SEARCH_AUTO:
  2024. default:
  2025. inc *= 3;
  2026. timeout = 25;
  2027. break;
  2028. }
  2029. inc /= 100;
  2030. if ((inc > car_max) || (inc < 0))
  2031. inc = car_max / 2; /* increment <= 1/8 Mclk */
  2032. timeout *= 27500; /* 27.5 Msps reference */
  2033. if (srate > 0)
  2034. timeout /= (srate / 1000);
  2035. if ((timeout > 100) || (timeout < 0))
  2036. timeout = 100;
  2037. steps_max = (car_max / inc) + 1; /* min steps = 3 */
  2038. if ((steps_max > 100) || (steps_max < 0)) {
  2039. steps_max = 100; /* max steps <= 100 */
  2040. inc = car_max / steps_max;
  2041. }
  2042. *freq_inc = inc;
  2043. *timeout_sw = timeout;
  2044. *steps = steps_max;
  2045. return 0;
  2046. }
  2047. static int stv090x_chk_signal(struct stv090x_state *state)
  2048. {
  2049. s32 offst_car, agc2, car_max;
  2050. int no_signal;
  2051. offst_car = STV090x_READ_DEMOD(state, CFR2) << 8;
  2052. offst_car |= STV090x_READ_DEMOD(state, CFR1);
  2053. offst_car = comp2(offst_car, 16);
  2054. agc2 = STV090x_READ_DEMOD(state, AGC2I1) << 8;
  2055. agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
  2056. car_max = state->search_range / 1000;
  2057. car_max += (car_max / 10); /* 10% margin */
  2058. car_max = (65536 * car_max / 2);
  2059. car_max /= state->internal->mclk / 1000;
  2060. if (car_max > 0x4000)
  2061. car_max = 0x4000;
  2062. if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
  2063. no_signal = 1;
  2064. dprintk(FE_DEBUG, 1, "No Signal");
  2065. } else {
  2066. no_signal = 0;
  2067. dprintk(FE_DEBUG, 1, "Found Signal");
  2068. }
  2069. return no_signal;
  2070. }
  2071. static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
  2072. {
  2073. int no_signal, lock = 0;
  2074. s32 cpt_step = 0, offst_freq, car_max;
  2075. u32 reg;
  2076. car_max = state->search_range / 1000;
  2077. car_max += (car_max / 10);
  2078. car_max = (65536 * car_max / 2);
  2079. car_max /= (state->internal->mclk / 1000);
  2080. if (car_max > 0x4000)
  2081. car_max = 0x4000;
  2082. if (zigzag)
  2083. offst_freq = 0;
  2084. else
  2085. offst_freq = -car_max + inc;
  2086. do {
  2087. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
  2088. goto err;
  2089. if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
  2090. goto err;
  2091. if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
  2092. goto err;
  2093. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
  2094. goto err;
  2095. reg = STV090x_READ_DEMOD(state, PDELCTRL1);
  2096. STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
  2097. if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
  2098. goto err;
  2099. if (zigzag) {
  2100. if (offst_freq >= 0)
  2101. offst_freq = -offst_freq - 2 * inc;
  2102. else
  2103. offst_freq = -offst_freq;
  2104. } else {
  2105. offst_freq += 2 * inc;
  2106. }
  2107. cpt_step++;
  2108. lock = stv090x_get_dmdlock(state, timeout);
  2109. no_signal = stv090x_chk_signal(state);
  2110. } while ((!lock) &&
  2111. (!no_signal) &&
  2112. ((offst_freq - inc) < car_max) &&
  2113. ((offst_freq + inc) > -car_max) &&
  2114. (cpt_step < steps_max));
  2115. reg = STV090x_READ_DEMOD(state, PDELCTRL1);
  2116. STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
  2117. if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
  2118. goto err;
  2119. return lock;
  2120. err:
  2121. dprintk(FE_ERROR, 1, "I/O error");
  2122. return -1;
  2123. }
  2124. static int stv090x_sw_algo(struct stv090x_state *state)
  2125. {
  2126. int no_signal, zigzag, lock = 0;
  2127. u32 reg;
  2128. s32 dvbs2_fly_wheel;
  2129. s32 inc, timeout_step, trials, steps_max;
  2130. /* get params */
  2131. stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max);
  2132. switch (state->search_mode) {
  2133. case STV090x_SEARCH_DVBS1:
  2134. case STV090x_SEARCH_DSS:
  2135. /* accelerate the frequency detector */
  2136. if (state->internal->dev_ver >= 0x20) {
  2137. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
  2138. goto err;
  2139. }
  2140. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
  2141. goto err;
  2142. zigzag = 0;
  2143. break;
  2144. case STV090x_SEARCH_DVBS2:
  2145. if (state->internal->dev_ver >= 0x20) {
  2146. if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
  2147. goto err;
  2148. }
  2149. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
  2150. goto err;
  2151. zigzag = 1;
  2152. break;
  2153. case STV090x_SEARCH_AUTO:
  2154. default:
  2155. /* accelerate the frequency detector */
  2156. if (state->internal->dev_ver >= 0x20) {
  2157. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
  2158. goto err;
  2159. if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
  2160. goto err;
  2161. }
  2162. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0)
  2163. goto err;
  2164. zigzag = 0;
  2165. break;
  2166. }
  2167. trials = 0;
  2168. do {
  2169. lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
  2170. no_signal = stv090x_chk_signal(state);
  2171. trials++;
  2172. /*run the SW search 2 times maximum*/
  2173. if (lock || no_signal || (trials == 2)) {
  2174. /*Check if the demod is not losing lock in DVBS2*/
  2175. if (state->internal->dev_ver >= 0x20) {
  2176. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
  2177. goto err;
  2178. if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
  2179. goto err;
  2180. }
  2181. reg = STV090x_READ_DEMOD(state, DMDSTATE);
  2182. if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
  2183. /*Check if the demod is not losing lock in DVBS2*/
  2184. msleep(timeout_step);
  2185. reg = STV090x_READ_DEMOD(state, DMDFLYW);
  2186. dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
  2187. if (dvbs2_fly_wheel < 0xd) { /*if correct frames is decrementing */
  2188. msleep(timeout_step);
  2189. reg = STV090x_READ_DEMOD(state, DMDFLYW);
  2190. dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
  2191. }
  2192. if (dvbs2_fly_wheel < 0xd) {
  2193. /*FALSE lock, The demod is loosing lock */
  2194. lock = 0;
  2195. if (trials < 2) {
  2196. if (state->internal->dev_ver >= 0x20) {
  2197. if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
  2198. goto err;
  2199. }
  2200. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
  2201. goto err;
  2202. }
  2203. }
  2204. }
  2205. }
  2206. } while ((!lock) && (trials < 2) && (!no_signal));
  2207. return lock;
  2208. err:
  2209. dprintk(FE_ERROR, 1, "I/O error");
  2210. return -1;
  2211. }
  2212. static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
  2213. {
  2214. u32 reg;
  2215. enum stv090x_delsys delsys;
  2216. reg = STV090x_READ_DEMOD(state, DMDSTATE);
  2217. if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
  2218. delsys = STV090x_DVBS2;
  2219. else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
  2220. reg = STV090x_READ_DEMOD(state, FECM);
  2221. if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
  2222. delsys = STV090x_DSS;
  2223. else
  2224. delsys = STV090x_DVBS1;
  2225. } else {
  2226. delsys = STV090x_ERROR;
  2227. }
  2228. return delsys;
  2229. }
  2230. /* in Hz */
  2231. static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
  2232. {
  2233. s32 derot, int_1, int_2, tmp_1, tmp_2;
  2234. derot = STV090x_READ_DEMOD(state, CFR2) << 16;
  2235. derot |= STV090x_READ_DEMOD(state, CFR1) << 8;
  2236. derot |= STV090x_READ_DEMOD(state, CFR0);
  2237. derot = comp2(derot, 24);
  2238. int_1 = mclk >> 12;
  2239. int_2 = derot >> 12;
  2240. /* carrier_frequency = MasterClock * Reg / 2^24 */
  2241. tmp_1 = mclk % 0x1000;
  2242. tmp_2 = derot % 0x1000;
  2243. derot = (int_1 * int_2) +
  2244. ((int_1 * tmp_2) >> 12) +
  2245. ((int_2 * tmp_1) >> 12);
  2246. return derot;
  2247. }
  2248. static int stv090x_get_viterbi(struct stv090x_state *state)
  2249. {
  2250. u32 reg, rate;
  2251. reg = STV090x_READ_DEMOD(state, VITCURPUN);
  2252. rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
  2253. switch (rate) {
  2254. case 13:
  2255. state->fec = STV090x_PR12;
  2256. break;
  2257. case 18:
  2258. state->fec = STV090x_PR23;
  2259. break;
  2260. case 21:
  2261. state->fec = STV090x_PR34;
  2262. break;
  2263. case 24:
  2264. state->fec = STV090x_PR56;
  2265. break;
  2266. case 25:
  2267. state->fec = STV090x_PR67;
  2268. break;
  2269. case 26:
  2270. state->fec = STV090x_PR78;
  2271. break;
  2272. default:
  2273. state->fec = STV090x_PRERR;
  2274. break;
  2275. }
  2276. return 0;
  2277. }
  2278. static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
  2279. {
  2280. struct dvb_frontend *fe = &state->frontend;
  2281. u8 tmg;
  2282. u32 reg;
  2283. s32 i = 0, offst_freq;
  2284. msleep(5);
  2285. if (state->algo == STV090x_BLIND_SEARCH) {
  2286. tmg = STV090x_READ_DEMOD(state, TMGREG2);
  2287. STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
  2288. while ((i <= 50) && (tmg != 0) && (tmg != 0xff)) {
  2289. tmg = STV090x_READ_DEMOD(state, TMGREG2);
  2290. msleep(5);
  2291. i += 5;
  2292. }
  2293. }
  2294. state->delsys = stv090x_get_std(state);
  2295. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  2296. goto err;
  2297. if (state->config->tuner_get_frequency) {
  2298. if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
  2299. goto err_gateoff;
  2300. }
  2301. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  2302. goto err;
  2303. offst_freq = stv090x_get_car_freq(state, state->internal->mclk) / 1000;
  2304. state->frequency += offst_freq;
  2305. if (stv090x_get_viterbi(state) < 0)
  2306. goto err;
  2307. reg = STV090x_READ_DEMOD(state, DMDMODCOD);
  2308. state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
  2309. state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
  2310. state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
  2311. reg = STV090x_READ_DEMOD(state, TMGOBS);
  2312. state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
  2313. reg = STV090x_READ_DEMOD(state, FECM);
  2314. state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
  2315. if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
  2316. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  2317. goto err;
  2318. if (state->config->tuner_get_frequency) {
  2319. if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
  2320. goto err_gateoff;
  2321. }
  2322. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  2323. goto err;
  2324. if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
  2325. return STV090x_RANGEOK;
  2326. else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
  2327. return STV090x_RANGEOK;
  2328. else
  2329. return STV090x_OUTOFRANGE; /* Out of Range */
  2330. } else {
  2331. if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
  2332. return STV090x_RANGEOK;
  2333. else
  2334. return STV090x_OUTOFRANGE;
  2335. }
  2336. return STV090x_OUTOFRANGE;
  2337. err_gateoff:
  2338. stv090x_i2c_gate_ctrl(state, 0);
  2339. err:
  2340. dprintk(FE_ERROR, 1, "I/O error");
  2341. return -1;
  2342. }
  2343. static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
  2344. {
  2345. s32 offst_tmg;
  2346. offst_tmg = STV090x_READ_DEMOD(state, TMGREG2) << 16;
  2347. offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) << 8;
  2348. offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
  2349. offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
  2350. if (!offst_tmg)
  2351. offst_tmg = 1;
  2352. offst_tmg = ((s32) srate * 10) / ((s32) 0x1000000 / offst_tmg);
  2353. offst_tmg /= 320;
  2354. return offst_tmg;
  2355. }
  2356. static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
  2357. {
  2358. u8 aclc = 0x29;
  2359. s32 i;
  2360. struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low;
  2361. if (state->internal->dev_ver == 0x20) {
  2362. car_loop = stv090x_s2_crl_cut20;
  2363. car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut20;
  2364. car_loop_apsk_low = stv090x_s2_apsk_crl_cut20;
  2365. } else {
  2366. /* >= Cut 3 */
  2367. car_loop = stv090x_s2_crl_cut30;
  2368. car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut30;
  2369. car_loop_apsk_low = stv090x_s2_apsk_crl_cut30;
  2370. }
  2371. if (modcod < STV090x_QPSK_12) {
  2372. i = 0;
  2373. while ((i < 3) && (modcod != car_loop_qpsk_low[i].modcod))
  2374. i++;
  2375. if (i >= 3)
  2376. i = 2;
  2377. } else {
  2378. i = 0;
  2379. while ((i < 14) && (modcod != car_loop[i].modcod))
  2380. i++;
  2381. if (i >= 14) {
  2382. i = 0;
  2383. while ((i < 11) && (modcod != car_loop_apsk_low[i].modcod))
  2384. i++;
  2385. if (i >= 11)
  2386. i = 10;
  2387. }
  2388. }
  2389. if (modcod <= STV090x_QPSK_25) {
  2390. if (pilots) {
  2391. if (state->srate <= 3000000)
  2392. aclc = car_loop_qpsk_low[i].crl_pilots_on_2;
  2393. else if (state->srate <= 7000000)
  2394. aclc = car_loop_qpsk_low[i].crl_pilots_on_5;
  2395. else if (state->srate <= 15000000)
  2396. aclc = car_loop_qpsk_low[i].crl_pilots_on_10;
  2397. else if (state->srate <= 25000000)
  2398. aclc = car_loop_qpsk_low[i].crl_pilots_on_20;
  2399. else
  2400. aclc = car_loop_qpsk_low[i].crl_pilots_on_30;
  2401. } else {
  2402. if (state->srate <= 3000000)
  2403. aclc = car_loop_qpsk_low[i].crl_pilots_off_2;
  2404. else if (state->srate <= 7000000)
  2405. aclc = car_loop_qpsk_low[i].crl_pilots_off_5;
  2406. else if (state->srate <= 15000000)
  2407. aclc = car_loop_qpsk_low[i].crl_pilots_off_10;
  2408. else if (state->srate <= 25000000)
  2409. aclc = car_loop_qpsk_low[i].crl_pilots_off_20;
  2410. else
  2411. aclc = car_loop_qpsk_low[i].crl_pilots_off_30;
  2412. }
  2413. } else if (modcod <= STV090x_8PSK_910) {
  2414. if (pilots) {
  2415. if (state->srate <= 3000000)
  2416. aclc = car_loop[i].crl_pilots_on_2;
  2417. else if (state->srate <= 7000000)
  2418. aclc = car_loop[i].crl_pilots_on_5;
  2419. else if (state->srate <= 15000000)
  2420. aclc = car_loop[i].crl_pilots_on_10;
  2421. else if (state->srate <= 25000000)
  2422. aclc = car_loop[i].crl_pilots_on_20;
  2423. else
  2424. aclc = car_loop[i].crl_pilots_on_30;
  2425. } else {
  2426. if (state->srate <= 3000000)
  2427. aclc = car_loop[i].crl_pilots_off_2;
  2428. else if (state->srate <= 7000000)
  2429. aclc = car_loop[i].crl_pilots_off_5;
  2430. else if (state->srate <= 15000000)
  2431. aclc = car_loop[i].crl_pilots_off_10;
  2432. else if (state->srate <= 25000000)
  2433. aclc = car_loop[i].crl_pilots_off_20;
  2434. else
  2435. aclc = car_loop[i].crl_pilots_off_30;
  2436. }
  2437. } else { /* 16APSK and 32APSK */
  2438. if (state->srate <= 3000000)
  2439. aclc = car_loop_apsk_low[i].crl_pilots_on_2;
  2440. else if (state->srate <= 7000000)
  2441. aclc = car_loop_apsk_low[i].crl_pilots_on_5;
  2442. else if (state->srate <= 15000000)
  2443. aclc = car_loop_apsk_low[i].crl_pilots_on_10;
  2444. else if (state->srate <= 25000000)
  2445. aclc = car_loop_apsk_low[i].crl_pilots_on_20;
  2446. else
  2447. aclc = car_loop_apsk_low[i].crl_pilots_on_30;
  2448. }
  2449. return aclc;
  2450. }
  2451. static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
  2452. {
  2453. struct stv090x_short_frame_crloop *short_crl = NULL;
  2454. s32 index = 0;
  2455. u8 aclc = 0x0b;
  2456. switch (state->modulation) {
  2457. case STV090x_QPSK:
  2458. default:
  2459. index = 0;
  2460. break;
  2461. case STV090x_8PSK:
  2462. index = 1;
  2463. break;
  2464. case STV090x_16APSK:
  2465. index = 2;
  2466. break;
  2467. case STV090x_32APSK:
  2468. index = 3;
  2469. break;
  2470. }
  2471. if (state->internal->dev_ver >= 0x30) {
  2472. /* Cut 3.0 and up */
  2473. short_crl = stv090x_s2_short_crl_cut30;
  2474. } else {
  2475. /* Cut 2.0 and up: we don't support cuts older than 2.0 */
  2476. short_crl = stv090x_s2_short_crl_cut20;
  2477. }
  2478. if (state->srate <= 3000000)
  2479. aclc = short_crl[index].crl_2;
  2480. else if (state->srate <= 7000000)
  2481. aclc = short_crl[index].crl_5;
  2482. else if (state->srate <= 15000000)
  2483. aclc = short_crl[index].crl_10;
  2484. else if (state->srate <= 25000000)
  2485. aclc = short_crl[index].crl_20;
  2486. else
  2487. aclc = short_crl[index].crl_30;
  2488. return aclc;
  2489. }
  2490. static int stv090x_optimize_track(struct stv090x_state *state)
  2491. {
  2492. struct dvb_frontend *fe = &state->frontend;
  2493. enum stv090x_rolloff rolloff;
  2494. enum stv090x_modcod modcod;
  2495. s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
  2496. u32 reg;
  2497. srate = stv090x_get_srate(state, state->internal->mclk);
  2498. srate += stv090x_get_tmgoffst(state, srate);
  2499. switch (state->delsys) {
  2500. case STV090x_DVBS1:
  2501. case STV090x_DSS:
  2502. if (state->search_mode == STV090x_SEARCH_AUTO) {
  2503. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  2504. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
  2505. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
  2506. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  2507. goto err;
  2508. }
  2509. reg = STV090x_READ_DEMOD(state, DEMOD);
  2510. STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
  2511. STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x01);
  2512. if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
  2513. goto err;
  2514. if (state->internal->dev_ver >= 0x30) {
  2515. if (stv090x_get_viterbi(state) < 0)
  2516. goto err;
  2517. if (state->fec == STV090x_PR12) {
  2518. if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x98) < 0)
  2519. goto err;
  2520. if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
  2521. goto err;
  2522. } else {
  2523. if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x18) < 0)
  2524. goto err;
  2525. if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
  2526. goto err;
  2527. }
  2528. }
  2529. if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
  2530. goto err;
  2531. break;
  2532. case STV090x_DVBS2:
  2533. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  2534. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
  2535. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
  2536. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  2537. goto err;
  2538. if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
  2539. goto err;
  2540. if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
  2541. goto err;
  2542. if (state->frame_len == STV090x_LONG_FRAME) {
  2543. reg = STV090x_READ_DEMOD(state, DMDMODCOD);
  2544. modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
  2545. pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
  2546. aclc = stv090x_optimize_carloop(state, modcod, pilots);
  2547. if (modcod <= STV090x_QPSK_910) {
  2548. STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
  2549. } else if (modcod <= STV090x_8PSK_910) {
  2550. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
  2551. goto err;
  2552. if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
  2553. goto err;
  2554. }
  2555. if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
  2556. if (modcod <= STV090x_16APSK_910) {
  2557. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
  2558. goto err;
  2559. if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
  2560. goto err;
  2561. } else {
  2562. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
  2563. goto err;
  2564. if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
  2565. goto err;
  2566. }
  2567. }
  2568. } else {
  2569. /*Carrier loop setting for short frame*/
  2570. aclc = stv090x_optimize_carloop_short(state);
  2571. if (state->modulation == STV090x_QPSK) {
  2572. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
  2573. goto err;
  2574. } else if (state->modulation == STV090x_8PSK) {
  2575. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
  2576. goto err;
  2577. if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
  2578. goto err;
  2579. } else if (state->modulation == STV090x_16APSK) {
  2580. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
  2581. goto err;
  2582. if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
  2583. goto err;
  2584. } else if (state->modulation == STV090x_32APSK) {
  2585. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
  2586. goto err;
  2587. if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
  2588. goto err;
  2589. }
  2590. }
  2591. STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
  2592. break;
  2593. case STV090x_ERROR:
  2594. default:
  2595. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  2596. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
  2597. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
  2598. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  2599. goto err;
  2600. break;
  2601. }
  2602. f_1 = STV090x_READ_DEMOD(state, CFR2);
  2603. f_0 = STV090x_READ_DEMOD(state, CFR1);
  2604. reg = STV090x_READ_DEMOD(state, TMGOBS);
  2605. rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
  2606. if (state->algo == STV090x_BLIND_SEARCH) {
  2607. STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
  2608. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  2609. STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
  2610. STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
  2611. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  2612. goto err;
  2613. if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
  2614. goto err;
  2615. if (stv090x_set_srate(state, srate) < 0)
  2616. goto err;
  2617. blind_tune = 1;
  2618. if (stv090x_dvbs_track_crl(state) < 0)
  2619. goto err;
  2620. }
  2621. if (state->internal->dev_ver >= 0x20) {
  2622. if ((state->search_mode == STV090x_SEARCH_DVBS1) ||
  2623. (state->search_mode == STV090x_SEARCH_DSS) ||
  2624. (state->search_mode == STV090x_SEARCH_AUTO)) {
  2625. if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
  2626. goto err;
  2627. if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
  2628. goto err;
  2629. }
  2630. }
  2631. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
  2632. goto err;
  2633. /* AUTO tracking MODE */
  2634. if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x80) < 0)
  2635. goto err;
  2636. /* AUTO tracking MODE */
  2637. if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0)
  2638. goto err;
  2639. if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1) ||
  2640. (state->srate < 10000000)) {
  2641. /* update initial carrier freq with the found freq offset */
  2642. if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
  2643. goto err;
  2644. if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
  2645. goto err;
  2646. state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
  2647. if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1)) {
  2648. if (state->algo != STV090x_WARM_SEARCH) {
  2649. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  2650. goto err;
  2651. if (state->config->tuner_set_bandwidth) {
  2652. if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
  2653. goto err_gateoff;
  2654. }
  2655. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  2656. goto err;
  2657. }
  2658. }
  2659. if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
  2660. msleep(50); /* blind search: wait 50ms for SR stabilization */
  2661. else
  2662. msleep(5);
  2663. stv090x_get_lock_tmg(state);
  2664. if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
  2665. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
  2666. goto err;
  2667. if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
  2668. goto err;
  2669. if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
  2670. goto err;
  2671. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
  2672. goto err;
  2673. i = 0;
  2674. while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
  2675. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
  2676. goto err;
  2677. if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
  2678. goto err;
  2679. if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
  2680. goto err;
  2681. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
  2682. goto err;
  2683. i++;
  2684. }
  2685. }
  2686. }
  2687. if (state->internal->dev_ver >= 0x20) {
  2688. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
  2689. goto err;
  2690. }
  2691. if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
  2692. stv090x_set_vit_thtracq(state);
  2693. return 0;
  2694. err_gateoff:
  2695. stv090x_i2c_gate_ctrl(state, 0);
  2696. err:
  2697. dprintk(FE_ERROR, 1, "I/O error");
  2698. return -1;
  2699. }
  2700. static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
  2701. {
  2702. s32 timer = 0, lock = 0, stat;
  2703. u32 reg;
  2704. while ((timer < timeout) && (!lock)) {
  2705. reg = STV090x_READ_DEMOD(state, DMDSTATE);
  2706. stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
  2707. switch (stat) {
  2708. case 0: /* searching */
  2709. case 1: /* first PLH detected */
  2710. default:
  2711. lock = 0;
  2712. break;
  2713. case 2: /* DVB-S2 mode */
  2714. reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
  2715. lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
  2716. break;
  2717. case 3: /* DVB-S1/legacy mode */
  2718. reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
  2719. lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
  2720. break;
  2721. }
  2722. if (!lock) {
  2723. msleep(10);
  2724. timer += 10;
  2725. }
  2726. }
  2727. return lock;
  2728. }
  2729. static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
  2730. {
  2731. u32 reg;
  2732. s32 timer = 0;
  2733. int lock;
  2734. lock = stv090x_get_dmdlock(state, timeout_dmd);
  2735. if (lock)
  2736. lock = stv090x_get_feclock(state, timeout_fec);
  2737. if (lock) {
  2738. lock = 0;
  2739. while ((timer < timeout_fec) && (!lock)) {
  2740. reg = STV090x_READ_DEMOD(state, TSSTATUS);
  2741. lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
  2742. msleep(1);
  2743. timer++;
  2744. }
  2745. }
  2746. return lock;
  2747. }
  2748. static int stv090x_set_s2rolloff(struct stv090x_state *state)
  2749. {
  2750. u32 reg;
  2751. if (state->internal->dev_ver <= 0x20) {
  2752. /* rolloff to auto mode if DVBS2 */
  2753. reg = STV090x_READ_DEMOD(state, DEMOD);
  2754. STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00);
  2755. if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
  2756. goto err;
  2757. } else {
  2758. /* DVB-S2 rolloff to auto mode if DVBS2 */
  2759. reg = STV090x_READ_DEMOD(state, DEMOD);
  2760. STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 0x00);
  2761. if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
  2762. goto err;
  2763. }
  2764. return 0;
  2765. err:
  2766. dprintk(FE_ERROR, 1, "I/O error");
  2767. return -1;
  2768. }
  2769. static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
  2770. {
  2771. struct dvb_frontend *fe = &state->frontend;
  2772. enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
  2773. u32 reg;
  2774. s32 agc1_power, power_iq = 0, i;
  2775. int lock = 0, low_sr = 0, no_signal = 0;
  2776. reg = STV090x_READ_DEMOD(state, TSCFGH);
  2777. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
  2778. if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
  2779. goto err;
  2780. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
  2781. goto err;
  2782. if (state->internal->dev_ver >= 0x20) {
  2783. if (state->srate > 5000000) {
  2784. if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
  2785. goto err;
  2786. } else {
  2787. if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x82) < 0)
  2788. goto err;
  2789. }
  2790. }
  2791. stv090x_get_lock_tmg(state);
  2792. if (state->algo == STV090x_BLIND_SEARCH) {
  2793. state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
  2794. if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0) /* wider srate scan */
  2795. goto err;
  2796. if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
  2797. goto err;
  2798. if (stv090x_set_srate(state, 1000000) < 0) /* inital srate = 1Msps */
  2799. goto err;
  2800. } else {
  2801. /* known srate */
  2802. if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
  2803. goto err;
  2804. if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
  2805. goto err;
  2806. if (state->srate < 2000000) {
  2807. /* SR < 2MSPS */
  2808. if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x63) < 0)
  2809. goto err;
  2810. } else {
  2811. /* SR >= 2Msps */
  2812. if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
  2813. goto err;
  2814. }
  2815. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
  2816. goto err;
  2817. if (state->internal->dev_ver >= 0x20) {
  2818. if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
  2819. goto err;
  2820. if (state->algo == STV090x_COLD_SEARCH)
  2821. state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
  2822. else if (state->algo == STV090x_WARM_SEARCH)
  2823. state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
  2824. }
  2825. /* if cold start or warm (Symbolrate is known)
  2826. * use a Narrow symbol rate scan range
  2827. */
  2828. if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0) /* narrow srate scan */
  2829. goto err;
  2830. if (stv090x_set_srate(state, state->srate) < 0)
  2831. goto err;
  2832. if (stv090x_set_max_srate(state, state->internal->mclk,
  2833. state->srate) < 0)
  2834. goto err;
  2835. if (stv090x_set_min_srate(state, state->internal->mclk,
  2836. state->srate) < 0)
  2837. goto err;
  2838. if (state->srate >= 10000000)
  2839. low_sr = 0;
  2840. else
  2841. low_sr = 1;
  2842. }
  2843. /* Setup tuner */
  2844. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  2845. goto err;
  2846. if (state->config->tuner_set_bbgain) {
  2847. reg = state->config->tuner_bbgain;
  2848. if (reg == 0)
  2849. reg = 10; /* default: 10dB */
  2850. if (state->config->tuner_set_bbgain(fe, reg) < 0)
  2851. goto err_gateoff;
  2852. }
  2853. if (state->config->tuner_set_frequency) {
  2854. if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
  2855. goto err_gateoff;
  2856. }
  2857. if (state->config->tuner_set_bandwidth) {
  2858. if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
  2859. goto err_gateoff;
  2860. }
  2861. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  2862. goto err;
  2863. msleep(50);
  2864. if (state->config->tuner_get_status) {
  2865. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  2866. goto err;
  2867. if (state->config->tuner_get_status(fe, &reg) < 0)
  2868. goto err_gateoff;
  2869. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  2870. goto err;
  2871. if (reg)
  2872. dprintk(FE_DEBUG, 1, "Tuner phase locked");
  2873. else {
  2874. dprintk(FE_DEBUG, 1, "Tuner unlocked");
  2875. return STV090x_NOCARRIER;
  2876. }
  2877. }
  2878. msleep(10);
  2879. agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1),
  2880. STV090x_READ_DEMOD(state, AGCIQIN0));
  2881. if (agc1_power == 0) {
  2882. /* If AGC1 integrator value is 0
  2883. * then read POWERI, POWERQ
  2884. */
  2885. for (i = 0; i < 5; i++) {
  2886. power_iq += (STV090x_READ_DEMOD(state, POWERI) +
  2887. STV090x_READ_DEMOD(state, POWERQ)) >> 1;
  2888. }
  2889. power_iq /= 5;
  2890. }
  2891. if ((agc1_power == 0) && (power_iq < STV090x_IQPOWER_THRESHOLD)) {
  2892. dprintk(FE_ERROR, 1, "No Signal: POWER_IQ=0x%02x", power_iq);
  2893. lock = 0;
  2894. signal_state = STV090x_NOAGC1;
  2895. } else {
  2896. reg = STV090x_READ_DEMOD(state, DEMOD);
  2897. STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
  2898. if (state->internal->dev_ver <= 0x20) {
  2899. /* rolloff to auto mode if DVBS2 */
  2900. STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1);
  2901. } else {
  2902. /* DVB-S2 rolloff to auto mode if DVBS2 */
  2903. STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 1);
  2904. }
  2905. if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
  2906. goto err;
  2907. if (stv090x_delivery_search(state) < 0)
  2908. goto err;
  2909. if (state->algo != STV090x_BLIND_SEARCH) {
  2910. if (stv090x_start_search(state) < 0)
  2911. goto err;
  2912. }
  2913. }
  2914. if (signal_state == STV090x_NOAGC1)
  2915. return signal_state;
  2916. if (state->algo == STV090x_BLIND_SEARCH)
  2917. lock = stv090x_blind_search(state);
  2918. else if (state->algo == STV090x_COLD_SEARCH)
  2919. lock = stv090x_get_coldlock(state, state->DemodTimeout);
  2920. else if (state->algo == STV090x_WARM_SEARCH)
  2921. lock = stv090x_get_dmdlock(state, state->DemodTimeout);
  2922. if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
  2923. if (!low_sr) {
  2924. if (stv090x_chk_tmg(state))
  2925. lock = stv090x_sw_algo(state);
  2926. }
  2927. }
  2928. if (lock)
  2929. signal_state = stv090x_get_sig_params(state);
  2930. if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
  2931. stv090x_optimize_track(state);
  2932. if (state->internal->dev_ver >= 0x20) {
  2933. /* >= Cut 2.0 :release TS reset after
  2934. * demod lock and optimized Tracking
  2935. */
  2936. reg = STV090x_READ_DEMOD(state, TSCFGH);
  2937. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
  2938. if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
  2939. goto err;
  2940. msleep(3);
  2941. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
  2942. if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
  2943. goto err;
  2944. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
  2945. if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
  2946. goto err;
  2947. }
  2948. lock = stv090x_get_lock(state, state->FecTimeout,
  2949. state->FecTimeout);
  2950. if (lock) {
  2951. if (state->delsys == STV090x_DVBS2) {
  2952. stv090x_set_s2rolloff(state);
  2953. reg = STV090x_READ_DEMOD(state, PDELCTRL2);
  2954. STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 1);
  2955. if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
  2956. goto err;
  2957. /* Reset DVBS2 packet delinator error counter */
  2958. reg = STV090x_READ_DEMOD(state, PDELCTRL2);
  2959. STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 0);
  2960. if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
  2961. goto err;
  2962. if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
  2963. goto err;
  2964. } else {
  2965. if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
  2966. goto err;
  2967. }
  2968. /* Reset the Total packet counter */
  2969. if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
  2970. goto err;
  2971. /* Reset the packet Error counter2 */
  2972. if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
  2973. goto err;
  2974. } else {
  2975. signal_state = STV090x_NODATA;
  2976. no_signal = stv090x_chk_signal(state);
  2977. }
  2978. }
  2979. return signal_state;
  2980. err_gateoff:
  2981. stv090x_i2c_gate_ctrl(state, 0);
  2982. err:
  2983. dprintk(FE_ERROR, 1, "I/O error");
  2984. return -1;
  2985. }
  2986. static enum dvbfe_search stv090x_search(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
  2987. {
  2988. struct stv090x_state *state = fe->demodulator_priv;
  2989. struct dtv_frontend_properties *props = &fe->dtv_property_cache;
  2990. if (p->frequency == 0)
  2991. return DVBFE_ALGO_SEARCH_INVALID;
  2992. state->delsys = props->delivery_system;
  2993. state->frequency = p->frequency;
  2994. state->srate = p->u.qpsk.symbol_rate;
  2995. state->search_mode = STV090x_SEARCH_AUTO;
  2996. state->algo = STV090x_COLD_SEARCH;
  2997. state->fec = STV090x_PRERR;
  2998. if (state->srate > 10000000) {
  2999. dprintk(FE_DEBUG, 1, "Search range: 10 MHz");
  3000. state->search_range = 10000000;
  3001. } else {
  3002. dprintk(FE_DEBUG, 1, "Search range: 5 MHz");
  3003. state->search_range = 5000000;
  3004. }
  3005. if (stv090x_algo(state) == STV090x_RANGEOK) {
  3006. dprintk(FE_DEBUG, 1, "Search success!");
  3007. return DVBFE_ALGO_SEARCH_SUCCESS;
  3008. } else {
  3009. dprintk(FE_DEBUG, 1, "Search failed!");
  3010. return DVBFE_ALGO_SEARCH_FAILED;
  3011. }
  3012. return DVBFE_ALGO_SEARCH_ERROR;
  3013. }
  3014. static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
  3015. {
  3016. struct stv090x_state *state = fe->demodulator_priv;
  3017. u32 reg;
  3018. u8 search_state;
  3019. reg = STV090x_READ_DEMOD(state, DMDSTATE);
  3020. search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
  3021. switch (search_state) {
  3022. case 0: /* searching */
  3023. case 1: /* first PLH detected */
  3024. default:
  3025. dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
  3026. *status = 0;
  3027. break;
  3028. case 2: /* DVB-S2 mode */
  3029. dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
  3030. reg = STV090x_READ_DEMOD(state, DSTATUS);
  3031. if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
  3032. reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
  3033. if (STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD)) {
  3034. reg = STV090x_READ_DEMOD(state, TSSTATUS);
  3035. if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
  3036. *status = FE_HAS_SIGNAL |
  3037. FE_HAS_CARRIER |
  3038. FE_HAS_VITERBI |
  3039. FE_HAS_SYNC |
  3040. FE_HAS_LOCK;
  3041. }
  3042. }
  3043. }
  3044. break;
  3045. case 3: /* DVB-S1/legacy mode */
  3046. dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
  3047. reg = STV090x_READ_DEMOD(state, DSTATUS);
  3048. if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
  3049. reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
  3050. if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
  3051. reg = STV090x_READ_DEMOD(state, TSSTATUS);
  3052. if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
  3053. *status = FE_HAS_SIGNAL |
  3054. FE_HAS_CARRIER |
  3055. FE_HAS_VITERBI |
  3056. FE_HAS_SYNC |
  3057. FE_HAS_LOCK;
  3058. }
  3059. }
  3060. }
  3061. break;
  3062. }
  3063. return 0;
  3064. }
  3065. static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
  3066. {
  3067. struct stv090x_state *state = fe->demodulator_priv;
  3068. s32 count_4, count_3, count_2, count_1, count_0, count;
  3069. u32 reg, h, m, l;
  3070. enum fe_status status;
  3071. stv090x_read_status(fe, &status);
  3072. if (!(status & FE_HAS_LOCK)) {
  3073. *per = 1 << 23; /* Max PER */
  3074. } else {
  3075. /* Counter 2 */
  3076. reg = STV090x_READ_DEMOD(state, ERRCNT22);
  3077. h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
  3078. reg = STV090x_READ_DEMOD(state, ERRCNT21);
  3079. m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
  3080. reg = STV090x_READ_DEMOD(state, ERRCNT20);
  3081. l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
  3082. *per = ((h << 16) | (m << 8) | l);
  3083. count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
  3084. count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
  3085. count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
  3086. count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
  3087. count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
  3088. if ((!count_4) && (!count_3)) {
  3089. count = (count_2 & 0xff) << 16;
  3090. count |= (count_1 & 0xff) << 8;
  3091. count |= count_0 & 0xff;
  3092. } else {
  3093. count = 1 << 24;
  3094. }
  3095. if (count == 0)
  3096. *per = 1;
  3097. }
  3098. if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
  3099. goto err;
  3100. if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
  3101. goto err;
  3102. return 0;
  3103. err:
  3104. dprintk(FE_ERROR, 1, "I/O error");
  3105. return -1;
  3106. }
  3107. static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
  3108. {
  3109. int res = 0;
  3110. int min = 0, med;
  3111. if ((val >= tab[min].read && val < tab[max].read) ||
  3112. (val >= tab[max].read && val < tab[min].read)) {
  3113. while ((max - min) > 1) {
  3114. med = (max + min) / 2;
  3115. if ((val >= tab[min].read && val < tab[med].read) ||
  3116. (val >= tab[med].read && val < tab[min].read))
  3117. max = med;
  3118. else
  3119. min = med;
  3120. }
  3121. res = ((val - tab[min].read) *
  3122. (tab[max].real - tab[min].real) /
  3123. (tab[max].read - tab[min].read)) +
  3124. tab[min].real;
  3125. } else {
  3126. if (tab[min].read < tab[max].read) {
  3127. if (val < tab[min].read)
  3128. res = tab[min].real;
  3129. else if (val >= tab[max].read)
  3130. res = tab[max].real;
  3131. } else {
  3132. if (val >= tab[min].read)
  3133. res = tab[min].real;
  3134. else if (val < tab[max].read)
  3135. res = tab[max].real;
  3136. }
  3137. }
  3138. return res;
  3139. }
  3140. static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
  3141. {
  3142. struct stv090x_state *state = fe->demodulator_priv;
  3143. u32 reg;
  3144. s32 agc_0, agc_1, agc;
  3145. s32 str;
  3146. reg = STV090x_READ_DEMOD(state, AGCIQIN1);
  3147. agc_1 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
  3148. reg = STV090x_READ_DEMOD(state, AGCIQIN0);
  3149. agc_0 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
  3150. agc = MAKEWORD16(agc_1, agc_0);
  3151. str = stv090x_table_lookup(stv090x_rf_tab,
  3152. ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
  3153. if (agc > stv090x_rf_tab[0].read)
  3154. str = 0;
  3155. else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
  3156. str = -100;
  3157. *strength = (str + 100) * 0xFFFF / 100;
  3158. return 0;
  3159. }
  3160. static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
  3161. {
  3162. struct stv090x_state *state = fe->demodulator_priv;
  3163. u32 reg_0, reg_1, reg, i;
  3164. s32 val_0, val_1, val = 0;
  3165. u8 lock_f;
  3166. s32 div;
  3167. u32 last;
  3168. switch (state->delsys) {
  3169. case STV090x_DVBS2:
  3170. reg = STV090x_READ_DEMOD(state, DSTATUS);
  3171. lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
  3172. if (lock_f) {
  3173. msleep(5);
  3174. for (i = 0; i < 16; i++) {
  3175. reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
  3176. val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
  3177. reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
  3178. val_0 = STV090x_GETFIELD_Px(reg_0, NOSPLHT_NORMED_FIELD);
  3179. val += MAKEWORD16(val_1, val_0);
  3180. msleep(1);
  3181. }
  3182. val /= 16;
  3183. last = ARRAY_SIZE(stv090x_s2cn_tab) - 1;
  3184. div = stv090x_s2cn_tab[0].read -
  3185. stv090x_s2cn_tab[last].read;
  3186. *cnr = 0xFFFF - ((val * 0xFFFF) / div);
  3187. }
  3188. break;
  3189. case STV090x_DVBS1:
  3190. case STV090x_DSS:
  3191. reg = STV090x_READ_DEMOD(state, DSTATUS);
  3192. lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
  3193. if (lock_f) {
  3194. msleep(5);
  3195. for (i = 0; i < 16; i++) {
  3196. reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
  3197. val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
  3198. reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
  3199. val_0 = STV090x_GETFIELD_Px(reg_0, NOSDATAT_UNNORMED_FIELD);
  3200. val += MAKEWORD16(val_1, val_0);
  3201. msleep(1);
  3202. }
  3203. val /= 16;
  3204. last = ARRAY_SIZE(stv090x_s1cn_tab) - 1;
  3205. div = stv090x_s1cn_tab[0].read -
  3206. stv090x_s1cn_tab[last].read;
  3207. *cnr = 0xFFFF - ((val * 0xFFFF) / div);
  3208. }
  3209. break;
  3210. default:
  3211. break;
  3212. }
  3213. return 0;
  3214. }
  3215. static int stv090x_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
  3216. {
  3217. struct stv090x_state *state = fe->demodulator_priv;
  3218. u32 reg;
  3219. reg = STV090x_READ_DEMOD(state, DISTXCTL);
  3220. switch (tone) {
  3221. case SEC_TONE_ON:
  3222. STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
  3223. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
  3224. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3225. goto err;
  3226. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
  3227. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3228. goto err;
  3229. break;
  3230. case SEC_TONE_OFF:
  3231. STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
  3232. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
  3233. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3234. goto err;
  3235. break;
  3236. default:
  3237. return -EINVAL;
  3238. }
  3239. return 0;
  3240. err:
  3241. dprintk(FE_ERROR, 1, "I/O error");
  3242. return -1;
  3243. }
  3244. static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
  3245. {
  3246. return DVBFE_ALGO_CUSTOM;
  3247. }
  3248. static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
  3249. {
  3250. struct stv090x_state *state = fe->demodulator_priv;
  3251. u32 reg, idle = 0, fifo_full = 1;
  3252. int i;
  3253. reg = STV090x_READ_DEMOD(state, DISTXCTL);
  3254. STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD,
  3255. (state->config->diseqc_envelope_mode) ? 4 : 2);
  3256. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
  3257. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3258. goto err;
  3259. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
  3260. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3261. goto err;
  3262. STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
  3263. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3264. goto err;
  3265. for (i = 0; i < cmd->msg_len; i++) {
  3266. while (fifo_full) {
  3267. reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
  3268. fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
  3269. }
  3270. if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
  3271. goto err;
  3272. }
  3273. reg = STV090x_READ_DEMOD(state, DISTXCTL);
  3274. STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
  3275. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3276. goto err;
  3277. i = 0;
  3278. while ((!idle) && (i < 10)) {
  3279. reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
  3280. idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
  3281. msleep(10);
  3282. i++;
  3283. }
  3284. return 0;
  3285. err:
  3286. dprintk(FE_ERROR, 1, "I/O error");
  3287. return -1;
  3288. }
  3289. static int stv090x_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t burst)
  3290. {
  3291. struct stv090x_state *state = fe->demodulator_priv;
  3292. u32 reg, idle = 0, fifo_full = 1;
  3293. u8 mode, value;
  3294. int i;
  3295. reg = STV090x_READ_DEMOD(state, DISTXCTL);
  3296. if (burst == SEC_MINI_A) {
  3297. mode = (state->config->diseqc_envelope_mode) ? 5 : 3;
  3298. value = 0x00;
  3299. } else {
  3300. mode = (state->config->diseqc_envelope_mode) ? 4 : 2;
  3301. value = 0xFF;
  3302. }
  3303. STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, mode);
  3304. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
  3305. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3306. goto err;
  3307. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
  3308. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3309. goto err;
  3310. STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
  3311. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3312. goto err;
  3313. while (fifo_full) {
  3314. reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
  3315. fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
  3316. }
  3317. if (STV090x_WRITE_DEMOD(state, DISTXDATA, value) < 0)
  3318. goto err;
  3319. reg = STV090x_READ_DEMOD(state, DISTXCTL);
  3320. STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
  3321. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3322. goto err;
  3323. i = 0;
  3324. while ((!idle) && (i < 10)) {
  3325. reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
  3326. idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
  3327. msleep(10);
  3328. i++;
  3329. }
  3330. return 0;
  3331. err:
  3332. dprintk(FE_ERROR, 1, "I/O error");
  3333. return -1;
  3334. }
  3335. static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
  3336. {
  3337. struct stv090x_state *state = fe->demodulator_priv;
  3338. u32 reg = 0, i = 0, rx_end = 0;
  3339. while ((rx_end != 1) && (i < 10)) {
  3340. msleep(10);
  3341. i++;
  3342. reg = STV090x_READ_DEMOD(state, DISRX_ST0);
  3343. rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
  3344. }
  3345. if (rx_end) {
  3346. reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
  3347. for (i = 0; i < reply->msg_len; i++)
  3348. reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
  3349. }
  3350. return 0;
  3351. }
  3352. static int stv090x_sleep(struct dvb_frontend *fe)
  3353. {
  3354. struct stv090x_state *state = fe->demodulator_priv;
  3355. u32 reg;
  3356. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  3357. goto err;
  3358. if (state->config->tuner_sleep) {
  3359. if (state->config->tuner_sleep(fe) < 0)
  3360. goto err_gateoff;
  3361. }
  3362. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  3363. goto err;
  3364. dprintk(FE_DEBUG, 1, "Set %s to sleep",
  3365. state->device == STV0900 ? "STV0900" : "STV0903");
  3366. reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
  3367. STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
  3368. if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
  3369. goto err;
  3370. reg = stv090x_read_reg(state, STV090x_TSTTNR1);
  3371. STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
  3372. if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
  3373. goto err;
  3374. return 0;
  3375. err_gateoff:
  3376. stv090x_i2c_gate_ctrl(state, 0);
  3377. err:
  3378. dprintk(FE_ERROR, 1, "I/O error");
  3379. return -1;
  3380. }
  3381. static int stv090x_wakeup(struct dvb_frontend *fe)
  3382. {
  3383. struct stv090x_state *state = fe->demodulator_priv;
  3384. u32 reg;
  3385. dprintk(FE_DEBUG, 1, "Wake %s from standby",
  3386. state->device == STV0900 ? "STV0900" : "STV0903");
  3387. reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
  3388. STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
  3389. if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
  3390. goto err;
  3391. reg = stv090x_read_reg(state, STV090x_TSTTNR1);
  3392. STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
  3393. if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
  3394. goto err;
  3395. return 0;
  3396. err:
  3397. dprintk(FE_ERROR, 1, "I/O error");
  3398. return -1;
  3399. }
  3400. static void stv090x_release(struct dvb_frontend *fe)
  3401. {
  3402. struct stv090x_state *state = fe->demodulator_priv;
  3403. state->internal->num_used--;
  3404. if (state->internal->num_used <= 0) {
  3405. dprintk(FE_ERROR, 1, "Actually removing");
  3406. remove_dev(state->internal);
  3407. kfree(state->internal);
  3408. }
  3409. kfree(state);
  3410. }
  3411. static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
  3412. {
  3413. u32 reg = 0;
  3414. reg = stv090x_read_reg(state, STV090x_GENCFG);
  3415. switch (ldpc_mode) {
  3416. case STV090x_DUAL:
  3417. default:
  3418. if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
  3419. /* set LDPC to dual mode */
  3420. if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0)
  3421. goto err;
  3422. state->demod_mode = STV090x_DUAL;
  3423. reg = stv090x_read_reg(state, STV090x_TSTRES0);
  3424. STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
  3425. if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
  3426. goto err;
  3427. STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
  3428. if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
  3429. goto err;
  3430. if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
  3431. goto err;
  3432. if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
  3433. goto err;
  3434. if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
  3435. goto err;
  3436. if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
  3437. goto err;
  3438. if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
  3439. goto err;
  3440. if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
  3441. goto err;
  3442. if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
  3443. goto err;
  3444. if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
  3445. goto err;
  3446. if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
  3447. goto err;
  3448. if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
  3449. goto err;
  3450. if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
  3451. goto err;
  3452. if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
  3453. goto err;
  3454. if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
  3455. goto err;
  3456. if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
  3457. goto err;
  3458. if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
  3459. goto err;
  3460. if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
  3461. goto err;
  3462. }
  3463. break;
  3464. case STV090x_SINGLE:
  3465. if (stv090x_stop_modcod(state) < 0)
  3466. goto err;
  3467. if (stv090x_activate_modcod_single(state) < 0)
  3468. goto err;
  3469. if (state->demod == STV090x_DEMODULATOR_1) {
  3470. if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
  3471. goto err;
  3472. } else {
  3473. if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
  3474. goto err;
  3475. }
  3476. reg = stv090x_read_reg(state, STV090x_TSTRES0);
  3477. STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
  3478. if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
  3479. goto err;
  3480. STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
  3481. if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
  3482. goto err;
  3483. reg = STV090x_READ_DEMOD(state, PDELCTRL1);
  3484. STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
  3485. if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
  3486. goto err;
  3487. STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
  3488. if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
  3489. goto err;
  3490. break;
  3491. }
  3492. return 0;
  3493. err:
  3494. dprintk(FE_ERROR, 1, "I/O error");
  3495. return -1;
  3496. }
  3497. /* return (Hz), clk in Hz*/
  3498. static u32 stv090x_get_mclk(struct stv090x_state *state)
  3499. {
  3500. const struct stv090x_config *config = state->config;
  3501. u32 div, reg;
  3502. u8 ratio;
  3503. div = stv090x_read_reg(state, STV090x_NCOARSE);
  3504. reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
  3505. ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
  3506. return (div + 1) * config->xtal / ratio; /* kHz */
  3507. }
  3508. static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
  3509. {
  3510. const struct stv090x_config *config = state->config;
  3511. u32 reg, div, clk_sel;
  3512. reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
  3513. clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
  3514. div = ((clk_sel * mclk) / config->xtal) - 1;
  3515. reg = stv090x_read_reg(state, STV090x_NCOARSE);
  3516. STV090x_SETFIELD(reg, M_DIV_FIELD, div);
  3517. if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
  3518. goto err;
  3519. state->internal->mclk = stv090x_get_mclk(state);
  3520. /*Set the DiseqC frequency to 22KHz */
  3521. div = state->internal->mclk / 704000;
  3522. if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
  3523. goto err;
  3524. if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
  3525. goto err;
  3526. return 0;
  3527. err:
  3528. dprintk(FE_ERROR, 1, "I/O error");
  3529. return -1;
  3530. }
  3531. static int stv090x_set_tspath(struct stv090x_state *state)
  3532. {
  3533. u32 reg;
  3534. if (state->internal->dev_ver >= 0x20) {
  3535. switch (state->config->ts1_mode) {
  3536. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3537. case STV090x_TSMODE_DVBCI:
  3538. switch (state->config->ts2_mode) {
  3539. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3540. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3541. default:
  3542. stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
  3543. break;
  3544. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3545. case STV090x_TSMODE_DVBCI:
  3546. if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
  3547. goto err;
  3548. reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
  3549. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
  3550. if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
  3551. goto err;
  3552. reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
  3553. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
  3554. if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
  3555. goto err;
  3556. if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
  3557. goto err;
  3558. if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
  3559. goto err;
  3560. break;
  3561. }
  3562. break;
  3563. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3564. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3565. default:
  3566. switch (state->config->ts2_mode) {
  3567. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3568. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3569. default:
  3570. if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
  3571. goto err;
  3572. break;
  3573. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3574. case STV090x_TSMODE_DVBCI:
  3575. if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
  3576. goto err;
  3577. break;
  3578. }
  3579. break;
  3580. }
  3581. } else {
  3582. switch (state->config->ts1_mode) {
  3583. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3584. case STV090x_TSMODE_DVBCI:
  3585. switch (state->config->ts2_mode) {
  3586. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3587. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3588. default:
  3589. stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
  3590. break;
  3591. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3592. case STV090x_TSMODE_DVBCI:
  3593. stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
  3594. reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
  3595. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
  3596. if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
  3597. goto err;
  3598. reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
  3599. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
  3600. if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
  3601. goto err;
  3602. if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
  3603. goto err;
  3604. if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
  3605. goto err;
  3606. break;
  3607. }
  3608. break;
  3609. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3610. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3611. default:
  3612. switch (state->config->ts2_mode) {
  3613. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3614. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3615. default:
  3616. stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
  3617. break;
  3618. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3619. case STV090x_TSMODE_DVBCI:
  3620. stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
  3621. break;
  3622. }
  3623. break;
  3624. }
  3625. }
  3626. switch (state->config->ts1_mode) {
  3627. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3628. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  3629. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
  3630. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
  3631. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  3632. goto err;
  3633. break;
  3634. case STV090x_TSMODE_DVBCI:
  3635. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  3636. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
  3637. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
  3638. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  3639. goto err;
  3640. break;
  3641. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3642. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  3643. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
  3644. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
  3645. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  3646. goto err;
  3647. break;
  3648. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3649. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  3650. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
  3651. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
  3652. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  3653. goto err;
  3654. break;
  3655. default:
  3656. break;
  3657. }
  3658. switch (state->config->ts2_mode) {
  3659. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3660. reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
  3661. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
  3662. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
  3663. if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
  3664. goto err;
  3665. break;
  3666. case STV090x_TSMODE_DVBCI:
  3667. reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
  3668. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
  3669. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
  3670. if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
  3671. goto err;
  3672. break;
  3673. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3674. reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
  3675. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
  3676. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
  3677. if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
  3678. goto err;
  3679. break;
  3680. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3681. reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
  3682. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
  3683. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
  3684. if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
  3685. goto err;
  3686. break;
  3687. default:
  3688. break;
  3689. }
  3690. if (state->config->ts1_clk > 0) {
  3691. u32 speed;
  3692. switch (state->config->ts1_mode) {
  3693. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3694. case STV090x_TSMODE_DVBCI:
  3695. default:
  3696. speed = state->internal->mclk /
  3697. (state->config->ts1_clk / 4);
  3698. if (speed < 0x08)
  3699. speed = 0x08;
  3700. if (speed > 0xFF)
  3701. speed = 0xFF;
  3702. break;
  3703. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3704. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3705. speed = state->internal->mclk /
  3706. (state->config->ts1_clk / 32);
  3707. if (speed < 0x20)
  3708. speed = 0x20;
  3709. if (speed > 0xFF)
  3710. speed = 0xFF;
  3711. break;
  3712. }
  3713. reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
  3714. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
  3715. if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
  3716. goto err;
  3717. if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
  3718. goto err;
  3719. }
  3720. if (state->config->ts2_clk > 0) {
  3721. u32 speed;
  3722. switch (state->config->ts2_mode) {
  3723. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3724. case STV090x_TSMODE_DVBCI:
  3725. default:
  3726. speed = state->internal->mclk /
  3727. (state->config->ts2_clk / 4);
  3728. if (speed < 0x08)
  3729. speed = 0x08;
  3730. if (speed > 0xFF)
  3731. speed = 0xFF;
  3732. break;
  3733. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3734. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3735. speed = state->internal->mclk /
  3736. (state->config->ts2_clk / 32);
  3737. if (speed < 0x20)
  3738. speed = 0x20;
  3739. if (speed > 0xFF)
  3740. speed = 0xFF;
  3741. break;
  3742. }
  3743. reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
  3744. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
  3745. if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
  3746. goto err;
  3747. if (stv090x_write_reg(state, STV090x_P2_TSSPEED, speed) < 0)
  3748. goto err;
  3749. }
  3750. reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
  3751. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
  3752. if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
  3753. goto err;
  3754. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
  3755. if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
  3756. goto err;
  3757. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  3758. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
  3759. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  3760. goto err;
  3761. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
  3762. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  3763. goto err;
  3764. return 0;
  3765. err:
  3766. dprintk(FE_ERROR, 1, "I/O error");
  3767. return -1;
  3768. }
  3769. static int stv090x_init(struct dvb_frontend *fe)
  3770. {
  3771. struct stv090x_state *state = fe->demodulator_priv;
  3772. const struct stv090x_config *config = state->config;
  3773. u32 reg;
  3774. if (state->internal->mclk == 0) {
  3775. /* call tuner init to configure the tuner's clock output
  3776. divider directly before setting up the master clock of
  3777. the stv090x. */
  3778. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  3779. goto err;
  3780. if (config->tuner_init) {
  3781. if (config->tuner_init(fe) < 0)
  3782. goto err_gateoff;
  3783. }
  3784. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  3785. goto err;
  3786. stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
  3787. msleep(5);
  3788. if (stv090x_write_reg(state, STV090x_SYNTCTRL,
  3789. 0x20 | config->clk_mode) < 0)
  3790. goto err;
  3791. stv090x_get_mclk(state);
  3792. }
  3793. if (stv090x_wakeup(fe) < 0) {
  3794. dprintk(FE_ERROR, 1, "Error waking device");
  3795. goto err;
  3796. }
  3797. if (stv090x_ldpc_mode(state, state->demod_mode) < 0)
  3798. goto err;
  3799. reg = STV090x_READ_DEMOD(state, TNRCFG2);
  3800. STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
  3801. if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
  3802. goto err;
  3803. reg = STV090x_READ_DEMOD(state, DEMOD);
  3804. STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
  3805. if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
  3806. goto err;
  3807. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  3808. goto err;
  3809. if (config->tuner_set_mode) {
  3810. if (config->tuner_set_mode(fe, TUNER_WAKE) < 0)
  3811. goto err_gateoff;
  3812. }
  3813. if (config->tuner_init) {
  3814. if (config->tuner_init(fe) < 0)
  3815. goto err_gateoff;
  3816. }
  3817. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  3818. goto err;
  3819. if (stv090x_set_tspath(state) < 0)
  3820. goto err;
  3821. return 0;
  3822. err_gateoff:
  3823. stv090x_i2c_gate_ctrl(state, 0);
  3824. err:
  3825. dprintk(FE_ERROR, 1, "I/O error");
  3826. return -1;
  3827. }
  3828. static int stv090x_setup(struct dvb_frontend *fe)
  3829. {
  3830. struct stv090x_state *state = fe->demodulator_priv;
  3831. const struct stv090x_config *config = state->config;
  3832. const struct stv090x_reg *stv090x_initval = NULL;
  3833. const struct stv090x_reg *stv090x_cut20_val = NULL;
  3834. unsigned long t1_size = 0, t2_size = 0;
  3835. u32 reg = 0;
  3836. int i;
  3837. if (state->device == STV0900) {
  3838. dprintk(FE_DEBUG, 1, "Initializing STV0900");
  3839. stv090x_initval = stv0900_initval;
  3840. t1_size = ARRAY_SIZE(stv0900_initval);
  3841. stv090x_cut20_val = stv0900_cut20_val;
  3842. t2_size = ARRAY_SIZE(stv0900_cut20_val);
  3843. } else if (state->device == STV0903) {
  3844. dprintk(FE_DEBUG, 1, "Initializing STV0903");
  3845. stv090x_initval = stv0903_initval;
  3846. t1_size = ARRAY_SIZE(stv0903_initval);
  3847. stv090x_cut20_val = stv0903_cut20_val;
  3848. t2_size = ARRAY_SIZE(stv0903_cut20_val);
  3849. }
  3850. /* STV090x init */
  3851. /* Stop Demod */
  3852. if (stv090x_write_reg(state, STV090x_P1_DMDISTATE, 0x5c) < 0)
  3853. goto err;
  3854. if (stv090x_write_reg(state, STV090x_P2_DMDISTATE, 0x5c) < 0)
  3855. goto err;
  3856. msleep(5);
  3857. /* Set No Tuner Mode */
  3858. if (stv090x_write_reg(state, STV090x_P1_TNRCFG, 0x6c) < 0)
  3859. goto err;
  3860. if (stv090x_write_reg(state, STV090x_P2_TNRCFG, 0x6c) < 0)
  3861. goto err;
  3862. /* I2C repeater OFF */
  3863. STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
  3864. if (stv090x_write_reg(state, STV090x_P1_I2CRPT, reg) < 0)
  3865. goto err;
  3866. if (stv090x_write_reg(state, STV090x_P2_I2CRPT, reg) < 0)
  3867. goto err;
  3868. if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
  3869. goto err;
  3870. msleep(5);
  3871. if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
  3872. goto err;
  3873. if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
  3874. goto err;
  3875. msleep(5);
  3876. /* write initval */
  3877. dprintk(FE_DEBUG, 1, "Setting up initial values");
  3878. for (i = 0; i < t1_size; i++) {
  3879. if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
  3880. goto err;
  3881. }
  3882. state->internal->dev_ver = stv090x_read_reg(state, STV090x_MID);
  3883. if (state->internal->dev_ver >= 0x20) {
  3884. if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
  3885. goto err;
  3886. /* write cut20_val*/
  3887. dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
  3888. for (i = 0; i < t2_size; i++) {
  3889. if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
  3890. goto err;
  3891. }
  3892. } else if (state->internal->dev_ver < 0x20) {
  3893. dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!",
  3894. state->internal->dev_ver);
  3895. goto err;
  3896. } else if (state->internal->dev_ver > 0x30) {
  3897. /* we shouldn't bail out from here */
  3898. dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!",
  3899. state->internal->dev_ver);
  3900. }
  3901. /* ADC1 range */
  3902. reg = stv090x_read_reg(state, STV090x_TSTTNR1);
  3903. STV090x_SETFIELD(reg, ADC1_INMODE_FIELD,
  3904. (config->adc1_range == STV090x_ADC_1Vpp) ? 0 : 1);
  3905. if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
  3906. goto err;
  3907. /* ADC2 range */
  3908. reg = stv090x_read_reg(state, STV090x_TSTTNR3);
  3909. STV090x_SETFIELD(reg, ADC2_INMODE_FIELD,
  3910. (config->adc2_range == STV090x_ADC_1Vpp) ? 0 : 1);
  3911. if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
  3912. goto err;
  3913. if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
  3914. goto err;
  3915. if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
  3916. goto err;
  3917. /* workaround for stuck DiSEqC output */
  3918. if (config->diseqc_envelope_mode)
  3919. stv090x_send_diseqc_burst(fe, SEC_MINI_A);
  3920. return 0;
  3921. err:
  3922. dprintk(FE_ERROR, 1, "I/O error");
  3923. return -1;
  3924. }
  3925. static struct dvb_frontend_ops stv090x_ops = {
  3926. .info = {
  3927. .name = "STV090x Multistandard",
  3928. .type = FE_QPSK,
  3929. .frequency_min = 950000,
  3930. .frequency_max = 2150000,
  3931. .frequency_stepsize = 0,
  3932. .frequency_tolerance = 0,
  3933. .symbol_rate_min = 1000000,
  3934. .symbol_rate_max = 45000000,
  3935. .caps = FE_CAN_INVERSION_AUTO |
  3936. FE_CAN_FEC_AUTO |
  3937. FE_CAN_QPSK |
  3938. FE_CAN_2G_MODULATION
  3939. },
  3940. .release = stv090x_release,
  3941. .init = stv090x_init,
  3942. .sleep = stv090x_sleep,
  3943. .get_frontend_algo = stv090x_frontend_algo,
  3944. .diseqc_send_master_cmd = stv090x_send_diseqc_msg,
  3945. .diseqc_send_burst = stv090x_send_diseqc_burst,
  3946. .diseqc_recv_slave_reply = stv090x_recv_slave_reply,
  3947. .set_tone = stv090x_set_tone,
  3948. .search = stv090x_search,
  3949. .read_status = stv090x_read_status,
  3950. .read_ber = stv090x_read_per,
  3951. .read_signal_strength = stv090x_read_signal_strength,
  3952. .read_snr = stv090x_read_cnr
  3953. };
  3954. struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
  3955. struct i2c_adapter *i2c,
  3956. enum stv090x_demodulator demod)
  3957. {
  3958. struct stv090x_state *state = NULL;
  3959. struct stv090x_dev *temp_int;
  3960. state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL);
  3961. if (state == NULL)
  3962. goto error;
  3963. state->verbose = &verbose;
  3964. state->config = config;
  3965. state->i2c = i2c;
  3966. state->frontend.ops = stv090x_ops;
  3967. state->frontend.demodulator_priv = state;
  3968. state->demod = demod;
  3969. state->demod_mode = config->demod_mode; /* Single or Dual mode */
  3970. state->device = config->device;
  3971. state->rolloff = STV090x_RO_35; /* default */
  3972. temp_int = find_dev(state->i2c,
  3973. state->config->address);
  3974. if ((temp_int != NULL) && (state->demod_mode == STV090x_DUAL)) {
  3975. state->internal = temp_int->internal;
  3976. state->internal->num_used++;
  3977. dprintk(FE_INFO, 1, "Found Internal Structure!");
  3978. dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x",
  3979. state->device == STV0900 ? "STV0900" : "STV0903",
  3980. demod,
  3981. state->internal->dev_ver);
  3982. return &state->frontend;
  3983. } else {
  3984. state->internal = kmalloc(sizeof(struct stv090x_internal),
  3985. GFP_KERNEL);
  3986. temp_int = append_internal(state->internal);
  3987. state->internal->num_used = 1;
  3988. state->internal->mclk = 0;
  3989. state->internal->dev_ver = 0;
  3990. state->internal->i2c_adap = state->i2c;
  3991. state->internal->i2c_addr = state->config->address;
  3992. dprintk(FE_INFO, 1, "Create New Internal Structure!");
  3993. }
  3994. mutex_init(&state->internal->demod_lock);
  3995. mutex_init(&state->internal->tuner_lock);
  3996. if (stv090x_sleep(&state->frontend) < 0) {
  3997. dprintk(FE_ERROR, 1, "Error putting device to sleep");
  3998. goto error;
  3999. }
  4000. if (stv090x_setup(&state->frontend) < 0) {
  4001. dprintk(FE_ERROR, 1, "Error setting up device");
  4002. goto error;
  4003. }
  4004. if (stv090x_wakeup(&state->frontend) < 0) {
  4005. dprintk(FE_ERROR, 1, "Error waking device");
  4006. goto error;
  4007. }
  4008. dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x",
  4009. state->device == STV0900 ? "STV0900" : "STV0903",
  4010. demod,
  4011. state->internal->dev_ver);
  4012. return &state->frontend;
  4013. error:
  4014. kfree(state);
  4015. return NULL;
  4016. }
  4017. EXPORT_SYMBOL(stv090x_attach);
  4018. MODULE_PARM_DESC(verbose, "Set Verbosity level");
  4019. MODULE_AUTHOR("Manu Abraham");
  4020. MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
  4021. MODULE_LICENSE("GPL");