vx855_gpio.c 8.4 KB

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  1. /*
  2. * Linux GPIOlib driver for the VIA VX855 integrated southbridge GPIO
  3. *
  4. * Copyright (C) 2009 VIA Technologies, Inc.
  5. * Copyright (C) 2010 One Laptop per Child
  6. * Author: Harald Welte <HaraldWelte@viatech.com>
  7. * All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. *
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/gpio.h>
  28. #include <linux/device.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/pci.h>
  31. #include <linux/io.h>
  32. #define MODULE_NAME "vx855_gpio"
  33. /* The VX855 south bridge has the following GPIO pins:
  34. * GPI 0...13 General Purpose Input
  35. * GPO 0...12 General Purpose Output
  36. * GPIO 0...14 General Purpose I/O (Open-Drain)
  37. */
  38. #define NR_VX855_GPI 14
  39. #define NR_VX855_GPO 13
  40. #define NR_VX855_GPIO 15
  41. #define NR_VX855_GPInO (NR_VX855_GPI + NR_VX855_GPO)
  42. #define NR_VX855_GP (NR_VX855_GPI + NR_VX855_GPO + NR_VX855_GPIO)
  43. struct vx855_gpio {
  44. struct gpio_chip gpio;
  45. spinlock_t lock;
  46. u32 io_gpi;
  47. u32 io_gpo;
  48. bool gpi_reserved;
  49. bool gpo_reserved;
  50. };
  51. /* resolve a GPIx into the corresponding bit position */
  52. static inline u_int32_t gpi_i_bit(int i)
  53. {
  54. if (i < 10)
  55. return 1 << i;
  56. else
  57. return 1 << (i + 14);
  58. }
  59. static inline u_int32_t gpo_o_bit(int i)
  60. {
  61. if (i < 11)
  62. return 1 << i;
  63. else
  64. return 1 << (i + 14);
  65. }
  66. static inline u_int32_t gpio_i_bit(int i)
  67. {
  68. if (i < 14)
  69. return 1 << (i + 10);
  70. else
  71. return 1 << (i + 14);
  72. }
  73. static inline u_int32_t gpio_o_bit(int i)
  74. {
  75. if (i < 14)
  76. return 1 << (i + 11);
  77. else
  78. return 1 << (i + 13);
  79. }
  80. /* Mapping betwee numeric GPIO ID and the actual GPIO hardware numbering:
  81. * 0..13 GPI 0..13
  82. * 14..26 GPO 0..12
  83. * 27..41 GPIO 0..14
  84. */
  85. static int vx855gpio_direction_input(struct gpio_chip *gpio,
  86. unsigned int nr)
  87. {
  88. struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
  89. unsigned long flags;
  90. u_int32_t reg_out;
  91. /* Real GPI bits are always in input direction */
  92. if (nr < NR_VX855_GPI)
  93. return 0;
  94. /* Real GPO bits cannot be put in output direction */
  95. if (nr < NR_VX855_GPInO)
  96. return -EINVAL;
  97. /* Open Drain GPIO have to be set to one */
  98. spin_lock_irqsave(&vg->lock, flags);
  99. reg_out = inl(vg->io_gpo);
  100. reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
  101. outl(reg_out, vg->io_gpo);
  102. spin_unlock_irqrestore(&vg->lock, flags);
  103. return 0;
  104. }
  105. static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr)
  106. {
  107. struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
  108. u_int32_t reg_in;
  109. int ret = 0;
  110. if (nr < NR_VX855_GPI) {
  111. reg_in = inl(vg->io_gpi);
  112. if (reg_in & gpi_i_bit(nr))
  113. ret = 1;
  114. } else if (nr < NR_VX855_GPInO) {
  115. /* GPO don't have an input bit, we need to read it
  116. * back from the output register */
  117. reg_in = inl(vg->io_gpo);
  118. if (reg_in & gpo_o_bit(nr - NR_VX855_GPI))
  119. ret = 1;
  120. } else {
  121. reg_in = inl(vg->io_gpi);
  122. if (reg_in & gpio_i_bit(nr - NR_VX855_GPInO))
  123. ret = 1;
  124. }
  125. return ret;
  126. }
  127. static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr,
  128. int val)
  129. {
  130. struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
  131. unsigned long flags;
  132. u_int32_t reg_out;
  133. /* True GPI cannot be switched to output mode */
  134. if (nr < NR_VX855_GPI)
  135. return;
  136. spin_lock_irqsave(&vg->lock, flags);
  137. reg_out = inl(vg->io_gpo);
  138. if (nr < NR_VX855_GPInO) {
  139. if (val)
  140. reg_out |= gpo_o_bit(nr - NR_VX855_GPI);
  141. else
  142. reg_out &= ~gpo_o_bit(nr - NR_VX855_GPI);
  143. } else {
  144. if (val)
  145. reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
  146. else
  147. reg_out &= ~gpio_o_bit(nr - NR_VX855_GPInO);
  148. }
  149. outl(reg_out, vg->io_gpo);
  150. spin_unlock_irqrestore(&vg->lock, flags);
  151. }
  152. static int vx855gpio_direction_output(struct gpio_chip *gpio,
  153. unsigned int nr, int val)
  154. {
  155. /* True GPI cannot be switched to output mode */
  156. if (nr < NR_VX855_GPI)
  157. return -EINVAL;
  158. /* True GPO don't need to be switched to output mode,
  159. * and GPIO are open-drain, i.e. also need no switching,
  160. * so all we do is set the level */
  161. vx855gpio_set(gpio, nr, val);
  162. return 0;
  163. }
  164. static const char *vx855gpio_names[NR_VX855_GP] = {
  165. "VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
  166. "VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
  167. "VX855_GPI10", "VX855_GPI11", "VX855_GPI12", "VX855_GPI13",
  168. "VX855_GPO0", "VX855_GPO1", "VX855_GPO2", "VX855_GPO3", "VX855_GPO4",
  169. "VX855_GPO5", "VX855_GPO6", "VX855_GPO7", "VX855_GPO8", "VX855_GPO9",
  170. "VX855_GPO10", "VX855_GPO11", "VX855_GPO12",
  171. "VX855_GPIO0", "VX855_GPIO1", "VX855_GPIO2", "VX855_GPIO3",
  172. "VX855_GPIO4", "VX855_GPIO5", "VX855_GPIO6", "VX855_GPIO7",
  173. "VX855_GPIO8", "VX855_GPIO9", "VX855_GPIO10", "VX855_GPIO11",
  174. "VX855_GPIO12", "VX855_GPIO13", "VX855_GPIO14"
  175. };
  176. static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
  177. {
  178. struct gpio_chip *c = &vg->gpio;
  179. c->label = "VX855 South Bridge";
  180. c->owner = THIS_MODULE;
  181. c->direction_input = vx855gpio_direction_input;
  182. c->direction_output = vx855gpio_direction_output;
  183. c->get = vx855gpio_get;
  184. c->set = vx855gpio_set;
  185. c->dbg_show = NULL;
  186. c->base = 0;
  187. c->ngpio = NR_VX855_GP;
  188. c->can_sleep = 0;
  189. c->names = vx855gpio_names;
  190. }
  191. /* This platform device is ordinarily registered by the vx855 mfd driver */
  192. static __devinit int vx855gpio_probe(struct platform_device *pdev)
  193. {
  194. struct resource *res_gpi;
  195. struct resource *res_gpo;
  196. struct vx855_gpio *vg;
  197. int ret;
  198. res_gpi = platform_get_resource(pdev, IORESOURCE_IO, 0);
  199. res_gpo = platform_get_resource(pdev, IORESOURCE_IO, 1);
  200. if (!res_gpi || !res_gpo)
  201. return -EBUSY;
  202. vg = kzalloc(sizeof(*vg), GFP_KERNEL);
  203. if (!vg)
  204. return -ENOMEM;
  205. platform_set_drvdata(pdev, vg);
  206. dev_info(&pdev->dev, "found VX855 GPIO controller\n");
  207. vg->io_gpi = res_gpi->start;
  208. vg->io_gpo = res_gpo->start;
  209. spin_lock_init(&vg->lock);
  210. /*
  211. * A single byte is used to control various GPIO ports on the VX855,
  212. * and in the case of the OLPC XO-1.5, some of those ports are used
  213. * for switches that are interpreted and exposed through ACPI. ACPI
  214. * will have reserved the region, so our own reservation will not
  215. * succeed. Ignore and continue.
  216. */
  217. if (!request_region(res_gpi->start, resource_size(res_gpi),
  218. MODULE_NAME "_gpi"))
  219. dev_warn(&pdev->dev,
  220. "GPI I/O resource busy, probably claimed by ACPI\n");
  221. else
  222. vg->gpi_reserved = true;
  223. if (!request_region(res_gpo->start, resource_size(res_gpo),
  224. MODULE_NAME "_gpo"))
  225. dev_warn(&pdev->dev,
  226. "GPO I/O resource busy, probably claimed by ACPI\n");
  227. else
  228. vg->gpo_reserved = true;
  229. vx855gpio_gpio_setup(vg);
  230. ret = gpiochip_add(&vg->gpio);
  231. if (ret) {
  232. dev_err(&pdev->dev, "failed to register GPIOs\n");
  233. goto out_release;
  234. }
  235. return 0;
  236. out_release:
  237. if (vg->gpi_reserved)
  238. release_region(res_gpi->start, resource_size(res_gpi));
  239. if (vg->gpo_reserved)
  240. release_region(res_gpi->start, resource_size(res_gpo));
  241. platform_set_drvdata(pdev, NULL);
  242. kfree(vg);
  243. return ret;
  244. }
  245. static int __devexit vx855gpio_remove(struct platform_device *pdev)
  246. {
  247. struct vx855_gpio *vg = platform_get_drvdata(pdev);
  248. struct resource *res;
  249. if (gpiochip_remove(&vg->gpio))
  250. dev_err(&pdev->dev, "unable to remove gpio_chip?\n");
  251. if (vg->gpi_reserved) {
  252. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  253. release_region(res->start, resource_size(res));
  254. }
  255. if (vg->gpo_reserved) {
  256. res = platform_get_resource(pdev, IORESOURCE_IO, 1);
  257. release_region(res->start, resource_size(res));
  258. }
  259. platform_set_drvdata(pdev, NULL);
  260. kfree(vg);
  261. return 0;
  262. }
  263. static struct platform_driver vx855gpio_driver = {
  264. .driver = {
  265. .name = MODULE_NAME,
  266. .owner = THIS_MODULE,
  267. },
  268. .probe = vx855gpio_probe,
  269. .remove = __devexit_p(vx855gpio_remove),
  270. };
  271. static int vx855gpio_init(void)
  272. {
  273. return platform_driver_register(&vx855gpio_driver);
  274. }
  275. module_init(vx855gpio_init);
  276. static void vx855gpio_exit(void)
  277. {
  278. platform_driver_unregister(&vx855gpio_driver);
  279. }
  280. module_exit(vx855gpio_exit);
  281. MODULE_LICENSE("GPL");
  282. MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>");
  283. MODULE_DESCRIPTION("GPIO driver for the VIA VX855 chipset");
  284. MODULE_ALIAS("platform:vx855_gpio");